Optical interconnection system for transmitting and receiving a three-level signal and method of operating the same
Summary by NHIP
Three-level optical signal system
The system transmits and receives three-level signals by synthesizing outputs from two separate two-level optical interconnection devices. Each device contains a light emitting unit driver, a light emitting unit, an optical waveguide, a light receiving unit, and a light receiving unit driver, with a distributor splitting input signals to generate high and low level outputs.
Claim Score by NHIP
Abstract
Provided is an optical interconnection system that transmits and receives a three-level signal. The optical interconnection system includes a first and a second optical interconnection device that transmits and receives a two-level signal, and a synthesizer that outputs a three-level signal by synthesizing signals from the first and second optical interconnection devices. The optical interconnection system may transmit and receive a three-level signal while using an optical interconnection device that interconnects a two-level signal.

Term
Projected expiry 4 September 2030.
- Priority
- Filed
- Granted
- Today
- Projected expiry
10 claims: 2 independent, 8 dependent
- 1An optical interconnection system that transmits and receives a three-level signal, comprising:a first optical interconnection device and a second optical interconnection device, each of the first and second optical interconnection devices transmitting and receiving a two-level signal;and a synthesizer that outputs a three-level signal by synthesizing signals received from the first and second optical interconnection devices, wherein each of the first and second optical interconnection devices includes, a light emitting unit driver to which an electrical signal is input;a light emitting unit that emits a light from the light emitting unit driver;an optical waveguide through which the light emitted from the light emitting unit is transmitted;a light receiving unit that receives light transmitted by the optical waveguide and outputs a current based on the received light;and a light receiving unit driver that outputs a voltage signal in response to the current received from the light receiving unit.
- 7Broadest claimClaim Score 56, average(NHIP)A method of operating an optical interconnection system for transmitting and receiving a three-level signal, the method comprising:transmitting and receiving a two-level signal using a first and a second optical interconnection device;providing an output of each of the first and second optical interconnection devices to a synthesizer;and synthesizing the output of each of the first and second optical interconnection devices to output a three-level signal, wherein the transmitting and receiving includes, inputting an electrical signal to a light emitting unit driver, emitting light from the light emitting unit driver, transmitting the emitted light through an optical waveguide, and receiving the transmitted light using a light receiving unit, and the providing includes, outputting a current based on the received light, and outputting a voltage signal in response to the received current.
Independent claims2
69 paragraphs in 5 sections, as filed
PRIORITY STATEMENT
This application claims the benefit of Korean Patent Application No. 10-2008-0002639, filed on Jan. 9, 2008, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
BACKGROUND
1. Field
Example embodiments relate to an optical interconnection system that converts a two-level signal into a three-level signal and transmits and receives the three-level signal.
2. Description of the Related Art
In high speed semiconductor devices, there are limitations to the speed of signal transmission due to the use of electrical wires and to large capacity high speed signal transmission due to cross-talk between complex wirings, limited packing density, electromagnetic interference (EMI), etc. To address these problems, optical interconnection techniques using light for transmitting signals between semiconductor devices has drawn attention.
In particular, as the speed of operation of semiconductor devices increases, testing systems for testing the semiconductor devices also require high speed operation. An optical interconnection technique that transmits signals using light between a test head to which a test signal is applied and a device under test (DUT) in semiconductor testing systems has been proposed.
Generally, the signal input/output level of an optical interconnection system includes a high level signal and a low level signal which may correspond to “on” and “off” signals. As such, the optical interconnection system transmits and receives a two level signal.
In addition to the high and low input/output signal levels, semiconductor memory devices further require a reference signal intermediate to the high level signal and the low level signal.
<figref idrefs="DRAWINGS">FIG. 1</figref> illustrates a conventional optical interconnection system <b>10</b> that transmits a two-level signal. The optical interconnection system <b>10</b> may include a transmitting unit <b>12</b> that transmits an optical signal, a receiving unit <b>14</b> that receives the optical signal, and/or an optical waveguide <b>16</b> through which the optical signal is transmitted and received. The transmitting unit <b>12</b> outputs the optical signal in response to an electrical input signal, and the receiving unit <b>14</b> outputs an electrical signal in response to light received from the optical waveguide <b>16</b>.
<figref idrefs="DRAWINGS">FIG. 2</figref> is a waveform of an output voltage in a conventional optical interconnection system.
Referring to <figref idrefs="DRAWINGS">FIG. 2</figref>, an optical signal includes a two-level signal, for example, a high level voltage signal V<sub>H </sub>and a low level voltage signal V<sub>L</sub>.
<figref idrefs="DRAWINGS">FIG. 3</figref> illustrates a three level signal waveform output from a semiconductor memory according to conventional art.
<figref idrefs="DRAWINGS">FIGS. 4A and 4B</figref> are waveforms of a voltage output from the conventional optical interconnection system of <figref idrefs="DRAWINGS">FIG. 1</figref>.
As illustrated in <figref idrefs="DRAWINGS">FIG. 3</figref>, a signal output from a semiconductor memory may include, in addition to the high level signal and the low level signal, an intermediate level signal, for example, a reference signal V<sub>REF </sub>which is between the high level signal and the low level signal. That is, there are three signal levels.
Thus, in order to optically interconnect a signal in a semiconductor memory a system that transmits and receives three-level signals is required.
When a signal with a waveform of <figref idrefs="DRAWINGS">FIG. 3</figref> is input to an optical interconnection system which operates with conventional two-level signals, an incorrect voltage of the reference signal is output. If a threshold voltage V<sub>TH </sub>of a signal input to the transmitting unit <b>12</b> is higher than the reference voltage V<sub>REF </sub>of <figref idrefs="DRAWINGS">FIG. 3</figref>, then, as illustrated in <figref idrefs="DRAWINGS">FIG. 4A</figref>, the signal V<sub>REF </sub>input to the transmitting unit <b>12</b> is output as a low voltage signal V<sub>L </sub>from the receiving unit <b>14</b>. Thus, an input signal with the waveform of <figref idrefs="DRAWINGS">FIG. 3</figref> is output as the waveform of <figref idrefs="DRAWINGS">FIG. 4A</figref>. The threshold voltage V<sub>TH </sub>denotes a voltage that differentiates a low voltage signal V<sub>L </sub>and a high voltage signal V<sub>H </sub>in a two-level optical interconnection system.
<figref idrefs="DRAWINGS">FIG. 4B</figref> illustrates an output waveform when the threshold voltage V<sub>TH </sub>is lower than the reference voltage V<sub>REF</sub>. Since the reference voltage V<sub>REF </sub>is higher than the threshold voltage V<sub>TH</sub>, the reference voltage V<sub>REF </sub>input to the transmitting unit <b>12</b> is output as a high voltage signal V<sub>H </sub>from the receiving unit <b>14</b>.
SUMMARY
Example embodiments are directed to an optical interconnection system that transmits and receives a three-level signal.
According to example embodiments, an optical interconnection system may realize a three-level signal in order to apply a two-level signal optical interconnection system to a three-level signal interconnection system such as a semiconductor memory.
According to an example embodiment, an optical interconnection system that transmits and receives a three-level signal may include first and second optical interconnection devices that transmit and receive a two-level signal; and a synthesizer that may output a three-level signal by synthesizing signals received from the first and second optical interconnection devices.
According to an example embodiment, the first and second optical interconnection devices may each include light emitting unit drivers that receive an electrical signal, light emitting units that emit a light from the light emitting unit drivers, optical waveguides that transmit the light emitted from the light emitting units, light receiving units that receive light transmitted by the optical waveguides and output a current based on the received light and light receiving unit drivers that output a predetermined or desired voltage signal in response to the current received from the light receiving units.
According to an example embodiment, the optical interconnection system may further include a distributor that distributes an externally received electrical signal to the light emitting unit drivers of each of the first and second optical interconnection device.
According to an example embodiment, a signal input from the distributor to the light emitting unit driver of the first optical interconnection device may be output as a high level signal from the first optical interconnection device and a signal input from the distributor to the light emitting unit driver of the second optical interconnection device may be output as a low level signal from the second optical interconnection device.
According to an example embodiment, the distributor may divide an input reference voltage into a first reference voltage higher than a threshold voltage of the light emitting unit driver of the first optical interconnection device and a second reference voltage lower than a threshold voltage of the light emitting unit driver of the second optical interconnection device, and supply the first reference voltage to the first optical interconnection device and supply the second reference voltage to the second optical interconnection device. The light emitting units may be vertical cavity surface emitting lasers (VCSELs) that emit infrared light, and the light receiving units may be photodiodes that detect the infrared light.
According to an example embodiment, a method of operating an optical interconnection system for transmitting and receiving a three-level signal may include transmitting and receiving a two-level signal using a first and second optical interconnection device, providing an output of each of the first and second optical interconnection devices to a synthesizer and synthesizing the output of each of the first and second optical interconnection devices to output a three-level signal.
According to an example embodiment, the method of operation may include inputting an electrical signal to a light emitting unit driver, emitting light from the light emitting unit driver, transmitting the emitted light through an optical waveguide, receiving the transmitted using a light receiving unit, outputting a current based on the received light, outputting a voltage signal in response to the received current.
The method may include distributing an externally received electrical signal to the respective light emitting unit drivers of the first and second optical interconnection devices.
According to an example embodiment, in a method of operation a signal input from the distributor to the light emitting unit driver of the first optical interconnection device may be output as a high level signal and a signal input from the distributor to the light emitting unit driver of the second optical interconnection device may be output as a low level signal.
According to example embodiments, distributing an externally received electrical signal may include dividing the signal into a first reference voltage higher than a threshold voltage of the light emitting unit driver of the first optical interconnection device and a second reference voltage lower than a threshold voltage of the light emitting unit driver of the second optical interconnection device. The first reference voltage may be supplied to the first optical interconnection device and the second reference voltage to the second optical interconnection device.
According to example embodiments, an optical interconnection device may include a light emitting unit driver to which an electrical signal is input, a light emitting unit that emits a light from the light emitting unit driver, an optical waveguide through which the light emitted from the light emitting unit is transmitted, a light receiving unit that receives light transmitted by the optical waveguide and outputs a current based on the received light and a light receiving unit driver that outputs a voltage signal in response to the current received from the light receiving unit.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other features and advantages of example embodiments will become more apparent by describing in detail example embodiments with reference to the attached drawings. The accompanying drawings are intended to depict example embodiments and should not be interpreted to limit the intended scope of the claims. The accompanying drawings are not to be considered as drawn to scale unless explicitly noted.
<figref idrefs="DRAWINGS">FIG. 1</figref> illustrates a conventional art optical interconnection system that transmits a two-level signal.
<figref idrefs="DRAWINGS">FIG. 2</figref> illustrates a waveform of an output voltage in a conventional art optical interconnection system.
<figref idrefs="DRAWINGS">FIG. 3</figref> illustrates a three-level signal waveform output from a semiconductor memory according to conventional art.
<figref idrefs="DRAWINGS">FIGS. 4A and 4B</figref> are waveforms of a voltage output from the conventional optical interconnection system of <figref idrefs="DRAWINGS">FIG. 1</figref>.
<figref idrefs="DRAWINGS">FIG. 5</figref> illustrates a configuration of an optical interconnection system that transmits and receives a three-level signal according to an example embodiment.
<figref idrefs="DRAWINGS">FIGS. 6A through 6C</figref> are graphs showing input/output characteristics of an optical interconnection system according to an example embodiment.
<figref idrefs="DRAWINGS">FIGS. 7A through 7D</figref> are signal waveforms showing the interconnection of a three-level signal in an optical interconnection system according to an example embodiment.
DETAILED DESCRIPTION
Detailed example embodiments are disclosed herein. However, specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments. Example embodiments may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Like numbers indicate like elements throughout. As used herein the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that, although the terms “first”, “second”, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of example embodiments.
Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Example embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of example embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, example embodiments should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which example embodiments belong. It will be further understood that terms, such as those defined in commonly-used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
<figref idrefs="DRAWINGS">FIG. 5</figref> illustrates a configuration of an optical interconnection system <b>100</b> that transmits and receives a three-level signal according to an example embodiment.
The optical interconnection system <b>100</b> may include a first optical interconnection device <b>110</b> and a second optical interconnection device <b>120</b>, each of which may transmit and receive a two-level signal. The optical interconnection system <b>100</b> may further include a distributor <b>130</b> that may distribute an external electrical signal to the first and second optical interconnection devices <b>110</b> and <b>120</b> and a synthesizer <b>140</b> that may synthesize signals output from the first and second optical interconnection devices <b>110</b> and <b>120</b>.
The first and second optical interconnection devices <b>110</b> and <b>120</b> may respectively include light emitting unit drivers <b>111</b> and <b>121</b>, light emitting units <b>112</b> and <b>122</b>, optical waveguides <b>113</b> and <b>123</b>, light receiving units <b>114</b> and <b>124</b>, and light receiving unit drivers <b>115</b> and <b>125</b>.
The light emitting units <b>112</b> and <b>122</b> may be laser diodes, for example, vertical cavity surface emitting lasers (VCSELs) and may emit infrared light with a wavelength suitable for optical fiber communication, for example 850 nm.
The light emitting unit drivers <b>111</b> and <b>121</b> may each receive an output of the distributor <b>130</b> and may drive the light emitting units <b>112</b> and <b>122</b> to generate light in response to the electrical signal.
The distributor <b>130</b> may receive the external electrical signal and may divide the input electrical signal into two signals and output the two signals to the light emitting unit drivers <b>111</b> and <b>121</b>.
The optical waveguides <b>113</b> and <b>123</b> may be, for example, optical fibers or polymer waveguides.
The light receiving units <b>114</b> and <b>124</b> may be, for example, photodiodes that detect a wavelength of light transmitted from the light emitting units <b>112</b> and <b>122</b> through the optical waveguides <b>113</b> and <b>123</b>. The light receiving units <b>114</b> and <b>124</b> may generate a current based on the light from the optical waveguides <b>113</b> and <b>123</b>.
The light receiving unit drivers <b>115</b> and <b>125</b> may convert the current received from the light receiving units <b>114</b> and <b>124</b> into electrical signals and output the electrical signals to the synthesizer <b>140</b>.
The synthesizer <b>140</b> may output OUTPUT SIGNAL by synthesizing the electrical signals received from the light receiving unit drivers <b>115</b> and <b>125</b>. For example, the synthesizer <b>140</b> may output a three level signal.
<figref idrefs="DRAWINGS">FIGS. 6A through 6C</figref> are graphs illustrating input/output characteristics of an optical interconnection system according to an example embodiment.
<figref idrefs="DRAWINGS">FIG. 6A</figref> is a graph illustrating input/output characteristics of the first optical interconnection device <b>110</b>. A threshold voltage V<sub>TH1 </sub>of the first optical interconnection device <b>110</b> may be set lower than a reference voltage V<sub>REF1</sub>. For example, if the reference voltage V<sub>REF1 </sub>is provided as an input signal, a high voltage signal V<sub>H1 </sub>signal may be output, and if a voltage lower than the threshold voltage V<sub>TH1 </sub>is provided, a low voltage signal V<sub>L1 </sub>may be output signal. Thus, the first optical interconnection device <b>110</b> may transmit two-level signals.
<figref idrefs="DRAWINGS">FIG. 6B</figref> is a graph showing input/output characteristics of the second optical interconnection device <b>120</b>. A threshold voltage V<sub>TH2 </sub>of the second optical interconnection device <b>120</b> may be set higher than the reference voltage V<sub>REF2</sub>. For example, if the reference voltage V<sub>REF2 </sub>is provided as an input signal, a low voltage signal V<sub>L2 </sub>may be output, and if an input signal higher than the threshold voltage V<sub>TH2 </sub>is provided, a high voltage signal V<sub>H2 </sub>may be output. Thus, the second optical interconnection device <b>120</b> may also transmit two-level signals.
<figref idrefs="DRAWINGS">FIG. 6C</figref> is a graph illustrating input/output characteristics of the synthesizer <b>140</b>. If a signal V<sub>L </sub>is input to the distributor <b>130</b>, the distributor <b>130</b> may divide the signal V<sub>L </sub>into a low voltage V<sub>L1 </sub>and a low voltage V<sub>L2 </sub>and supply the low voltage V<sub>L1 </sub>to the first optical interconnection device <b>110</b> and the low voltage V<sub>L2 </sub>to the second optical interconnection device <b>120</b>. The low voltages V<sub>L1 </sub>and V<sub>L2 </sub>may be input to the synthesizer <b>140</b>. An output of the synthesizer <b>140</b> may be a signal V<sub>L3</sub>, wherein V<sub>L3</sub>=V<sub>L1</sub>+V<sub>L2</sub>. That is, a low voltage signal V<sub>L3</sub>, corresponding to the signal V<sub>L</sub>, may be output from the synthesizer <b>140</b>.
If a voltage V<sub>REF </sub>is input to the distributor <b>130</b>, the distributor <b>130</b> may supply a reference voltage V<sub>REF1 </sub>to the first optical interconnection device <b>110</b> and a reference voltage V<sub>REF2 </sub>to the second optical interconnection device <b>120</b>. The reference voltage V<sub>REF1 </sub>may be higher than the threshold voltage V<sub>TH1 </sub>of the first optical interconnection device <b>110</b>. A high voltage signal V<sub>H1 </sub>may, therefore, be output from the first optical interconnection device <b>110</b>. The reference voltage V<sub>REF2 </sub>may be lower than the threshold voltage V<sub>TH2 </sub>of the second optical interconnection device <b>120</b>. A low voltage signal V<sub>L2 </sub>may, therefore, be output from the second optical interconnection device <b>120</b>. The output of the synthesizer <b>140</b> may be a reference voltage signal V<sub>REF3</sub>, wherein V<sub>REF3</sub>=V<sub>H1</sub>+V<sub>L2</sub>.
If a signal V<sub>H </sub>is input to the distributor <b>130</b>, the distributor <b>130</b> may supply a high voltage V<sub>H1 </sub>to the first optical interconnection device <b>110</b> and a high voltage V<sub>H2 </sub>to the second optical interconnection device <b>120</b>. The high voltage V<sub>H1 </sub>and the high voltage V<sub>H2 </sub>may be input to the synthesizer <b>140</b>. An output of the synthesizer <b>140</b> may be a signal V<sub>H3</sub>, wherein V<sub>H3</sub>=V<sub>H1</sub>+V<sub>H2</sub>. That is, a high voltage signal V<sub>H3</sub>, corresponding to signal V<sub>H</sub>, may be output from the synthesizer <b>140</b>. Thus, the optical interconnection system, according to an example embodiment, may receive three-level voltage signals V<sub>L</sub>, V<sub>REF</sub>, and V<sub>H </sub>and may output three-level voltage signals V<sub>L3</sub>, V<sub>REF3</sub>, and V<sub>H3</sub>.
In the example embodiment disclosed above, the voltage signals input to the light emitting unit drivers <b>111</b> and <b>121</b> from the distributor <b>130</b> may be same, and the threshold voltages V<sub>TH1 </sub>and V<sub>TH2 </sub>of the light emitting unit drivers <b>111</b> and <b>121</b> may be different from each other. However, example embodiments are not limited thereto. For example, if the threshold voltages V<sub>TH1 </sub>and V<sub>TH2 </sub>of the light emitting unit drivers <b>111</b> and <b>121</b> are same, the distributor <b>130</b> may control the reference voltage V<sub>REF1 </sub>output to the light emitting unit driver <b>111</b> to be higher than the threshold voltage V<sub>TH1 </sub>and may control the reference voltage V<sub>REF2 </sub>output to the light emitting unit driver <b>121</b> to be lower than the threshold voltage V<sub>TH2</sub>, and the same result may be obtained.
<figref idrefs="DRAWINGS">FIGS. 7A through 7D</figref> are signal waveforms of a three-level signal in the optical interconnection system <b>100</b> according to an example embodiment.
<figref idrefs="DRAWINGS">FIG. 7A</figref> is a waveform of a three-level input signal including V<sub>H</sub>, V<sub>REF</sub>, and V<sub>L</sub>.
<figref idrefs="DRAWINGS">FIG. 7B</figref> is a waveform of a two-level signal including V<sub>H1 </sub>and V<sub>L1 </sub>output from the light receiving unit driver <b>115</b> of the first optical interconnection device <b>110</b>. An input reference voltage V<sub>REF1 </sub>may be output as a high level signal V<sub>H1 </sub>from the light receiving unit driver <b>115</b>.
<figref idrefs="DRAWINGS">FIG. 7C</figref> is a waveform of a two-level signal including V<sub>H2 </sub>and V<sub>L2 </sub>output from the light receiving unit driver <b>125</b> of the second optical interconnection device <b>120</b>. An input reference voltage V<sub>REF2 </sub>may be output as a low level signal V<sub>L2 </sub>from the light receiving unit driver <b>125</b>.
<figref idrefs="DRAWINGS">FIG. 7D</figref> illustrates a waveform, according to an example embodiment, wherein signals of <figref idrefs="DRAWINGS">FIGS. 7B and 7C</figref> are combined. The waveform may be output from the synthesizer <b>140</b> of the optical interconnection system <b>100</b>. The output signal shows three-level patterns.
In the optical interconnection system, according to example embodiments, a three-level electrical signal may be transmitted and received using an optical interconnection device. Thus, the optical interconnection system, according to example embodiments, may be used in a semiconductor memory system, for example, a memory tester that uses a three-level electrical signal.
Example embodiments having thus been described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the intended spirit and scope of example embodiments, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.
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| Case Docketed to Examiner in GAUDOCK | DOCK | |
| IFW TSS Processing by Tech Center CompleteTSSCOMP | TSSCOMP | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Sent to Classification ContractorPGPC | PGPC | |
| Filing ReceiptFLRCPT.O | FLRCPT.O | |
| Application Is Now CompleteCOMP | COMP | |
| Cleared by L&R (LARS)L128 | L128 | |
| Referred to Level 2 (LARS) by OIPE CSRL198 | L198 | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Request for Foreign Priority (Priority Papers May Be Included)RQPR | RQPR | |
| Initial Exam Team nnIEXX | IEXX |
7 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Lapsed due to failure to pay maintenance feeLapsedFP | FP | |
| Lapse for failure to pay maintenance feesLapsedPATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYLAPS | LAPS | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Fee payment procedureMAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| Fee paymentFPAY | FPAY | |
| Information on status: patent grantGrantedPATENTED CASESTCF | STCF | |
| AssignmentAS | AS |
Numbers
- Publication
- 08098994
- Publication, DOCDB
- 8098994
- Publication, EPODOC
- US8098994
- Application
- 12213151
- Application, DOCDB
- 21315108
- Application, EPODOC
- US20080213151
Titles
- English
- Optical interconnection system for transmitting and receiving a three-level signal and method of operating the same
Patent term adjustment
- A delay
- +596 daysthe office missed an examination deadline
- B delay
- +215 dayspendency past three years
- Applicant delay
- −1 day
- Net adjustment
- 810 days
Classification
- CPC, 3
- H04B10/25891
- G02B6/42
- G02B6/12
- IPC, 1
- H04B10 12
- USPC, 5
- 398141000
- 398140000
- 398185000
- 398202000
- 398211000