Method and system for motion adaptive deinterlacer with integrated directional filter

RELATED APPLICATIONS

This patent application is a continuation of U.S. patent application Ser. No. 10/945,619, entitled “Method And System For Motion Adaptive Deinterlacer With Integrated Direction Filter,” filed on Sep. 21, 2004, and makes reference to, claims priority to and claims benefit from U.S. Provisional Patent Application Ser. No. 60/540,826, entitled “Method and System for Motion Adaptive Deinterlacer with Integrated Directional Filter,” filed on Jan. 30, 2004, the complete subject matter of which is hereby incorporated herein by reference, in its entirety.

This application makes reference to:

U.S. patent application Ser. No. 10/314,525 filed Dec. 9, 2002;

U.S. patent application Ser. No. 10/945,769 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/875,422 filed Jun. 24, 2004;

U.S. patent application Ser. No. 10/945,587 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/871,758 filed Jun. 17, 2004;

U.S. patent application Ser. No. 10/945,796 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/945,817 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/945,729 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/945,828 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/946,152 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/946,153 filed Sep. 21, 2004;

U.S. patent application Ser. No. 10/945,645 filed Sep. 21, 2004; and

U.S. patent application Ser. No. 10/871,649 filed Jun. 17, 2004.

The above stated applications are hereby incorporated herein by reference in their entirety.

FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

[Not Applicable]

MICROFICHE/COPYRIGHT REFERENCE

[Not Applicable]

BACKGROUND OF THE INVENTION

In the field of video compression, communication, decompression, and display, there has been for many years problems associated with supporting both interlaced content and interlaced displays, along with progressive content and progressive displays. Many advanced video systems support either one or the other format. As a result such devices as deinterlacers have become important components in many video systems. Deinterlacers convert interlaced video format into progressive video format.

Deinterlacing takes interlaced video fields and coverts them into progressive frames, at double the display rate. Certain problems may arise concerning the motion of objects from image to image. Objects that are in motion are encoded differently in interlaced fields from progressive frames. Video images, encoded in deinterlaced format, containing little motion from one image to another may be deinterlaced into progressive format with virtually no problems or visual artifacts. However, problems arise with video images containing a lot of motion and change from one image to another, when converted from interlaced to progressive format. As a result, some video systems were designed with motion adaptive deinterlacers.

Today, motion adaptive deinterlace video systems rely on multiple fields of data to extract the highest picture quality from a video signal. When motion is detected between fields, it may be very difficult to use temporal information for deinterlacing. Instead, a deinterlacing circuit must utilize a spatial filter (usually a vertical filter of the field of interest). However, often the source material has diagonal lines, or curved edges, and using a spatial filter may not yield satisfactory results. For example, diagonal or curved edges will be represented with stair-step or jaggies that are visible in the image.

Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.

BRIEF SUMMARY OF THE INVENTION

Aspects of the present invention may be seen in a system and method that produces a spatial average for interlaced video in a deinterlacer. The method comprises detecting an edge in an image and determining the direction of the edge in the image. A filter may be selected using the direction of the edge in the image and a spatial average of the edge in the image may be produced using the selected filter.

Determining the direction of the edge in the image comprises determining a gradient of the edge in a first direction, and determining a gradient of the edge in a second direction. The gradient in the first direction and the gradient in the second direction may be used to determine the angle of the edge, which may be used to determine the direction of the edge. The gradient in the first direction and the gradient in the second direction may also be used to determine the strength of the edge. The determined direction of the edge may then be used to select filter coefficients, which may be used to produce the spatial average of the edge in the interlaced video images. The filter coefficients may be programmable, thereby permitting at least one of a plurality of filter coefficients to be selected.

The system comprises circuitry capable of performing the method as described hereinabove that produces a spatial average for interlaced video in a deinterlacer.

These and other features and advantages of the present invention may be appreciated from a review of the following detailed description of the present invention, along with the accompanying figures in which like reference numerals refer to like parts throughout.

BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS

<figref idref="DRAWINGS">FIG. 1</figref><i>a </i>illustrates a block diagram of an exemplary architecture for positioning of a MAD-3:2, in accordance with an embodiment of the invention.

<figref idref="DRAWINGS">FIG. 1</figref><i>b </i>illustrates a block diagram of exemplary interfaces for the MAD-3:2 shown in <figref idref="DRAWINGS">FIG. 1</figref><i>a</i>, in accordance with an embodiment of the invention.

<figref idref="DRAWINGS">FIG. 1</figref><i>c </i>illustrates a block diagram of an exemplary flow of the algorithm, which may be utilized by the MAD-3:2 of <figref idref="DRAWINGS">FIG. 1</figref><i>a </i>and <figref idref="DRAWINGS">FIG. 1</figref><i>b</i>, in accordance with an embodiment of the invention.

<figref idref="DRAWINGS">FIG. 2</figref> illustrates a block diagram of an exemplary directional filter that may be integrated into a motion adaptive de-interlacer and utilized for motion adaptive deinterlacing with integrated directional filtering, in accordance with an embodiment of the present invention.

<figref idref="DRAWINGS">FIG. 3</figref> illustrates a block diagram of an exemplary angle detection block that may be integrated in a directional filter and utilized for motion adaptive deinterlacing with integrated directional filtering, in accordance with an embodiment of the present invention.

<figref idref="DRAWINGS">FIG. 4</figref> illustrates a block diagram of an exemplary diagonal filter block that may be integrated in a directional filter, in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Aspects of the present invention relate to processing of video signals. More specifically, certain embodiments of the invention relate to a method and system for a motion adaptive de-interlacer with an integrated directional filter.

Certain aspects of the invention may comprise methods and systems for a motion adaptive deinterlacer (MAD) capable of reverse 3:2 pull-down and 3:2 pull-down with cadence detection, which may be referred to as MAD-3:2 or MAD32, that may be utilized in a video network (VN). The algorithms and architectures for the motion adaptive deinterlacer may be adapted to acquire interlaced video fields from one of a plurality of video sources in the video network and convert the acquired interlaced video fields into progressive frames, at double the display rate, in a visually pleasing manner.

The motion adaptive deinterlacer (MAD-3:2) may be adapted to accept interlaced video input from a video bus (VB) and output deinterlaced, progressive video to the video bus (BUS) utilized by the video network. The motion adaptive deinterlacer may accept, for example, 720x480i and produce, for example, 720x480p in the case of NTSC. For PAL, the motion adaptive deinterlacer (MAD) may accept, for example, 720x576i and produce, for example, 720x576p. Horizontal resolution may be allowed to change on a field-by-field basis up to, for example, a width of 720. The motion adaptive algorithm utilized by the motion adaptive deinterlacer (MAD-3:2) may be adapted to smoothly blend various approximations for the missing pixels to prevent visible contours produced by changing decisions.

A plurality of fields of video may be utilized to determine motion. For example, in an embodiment of the invention, five fields of video may be utilized to determine motion. The motion adaptive deinterlacer (MAD) may produce stable non-jittery video with reduced risk of visual artifacts due to motion being misinterpreted while also providing improved still frame performance. The motion adaptive deinterlacer (MAD-3:2) may also provide additional fields per field type of quantized motion information, which may be selectable in order to reduce the risk of misinterpretation. For example, up to three (3) additional fields or more, per field type, of quantized low-cost motion information may optionally be selected in order to reduce risk of misinterpreted motion even further. This may provide a total historical motion window of up to, for example, 10 fields in a cost effective manner. Integrated cross-chrominance removal functionality may be provided, which may aid in mitigating or eliminating NTSC comb artifacts. A directional compass filtering may also be provided in order to reduce or eliminate jaggies in moving diagonal edges. The MAD-3:2 may provide reverse 3:2 pull-down for improved quality from film-based sources.

In accordance with another aspect of the invention, the algorithms and architectures for the motion adaptive deinterlacer (MAD) may also be adapted to provide bad-edit detection in order to ensure a visually pleasing transition to new cadence in situations where editing may have been carelessly performed. Furthermore, per-pixel correction may also be provided to improve the quality of subject matter containing both film and video at the same time. For example, per-pixel correction may be utilized for interlaced titles, which have been overlaid on film-based content. The motion adaptive deinterlacer (MAD-3:2) may also provide optional CPU control over, for example, 3:2 and/or 2:2 cadence detection and correction.

<figref idref="DRAWINGS">FIG. 1</figref><i>a </i>is a block diagram of an exemplary architecture illustrating the positioning of a MAD-3:2 <b>100</b>, in accordance with an embodiment of the present invention. Referring to <figref idref="DRAWINGS">FIG. 1</figref><i>a</i>, the MAD-3:2 <b>100</b> along with a plurality of scalers (<b>102</b>, <b>104</b>, <b>106</b>, and <b>108</b>), for example, may be positioned between a first crossbar <b>110</b> and a second crossbar <b>112</b>. The first crossbar <b>110</b> may be referred to as an input crossbar and the second crossbar <b>112</b> may be referred to as an output crossbar.

The MAD-3:2 <b>100</b> may comprise at least one video network input and at least one video network output and may be configured to maintain its own additional field stores. A feedback path may be provided from the output of the second crossbar <b>112</b> to the input of the first crossbar <b>110</b>. This may allow any of the standard definition (SD) video sources such as the MPEG feeders <b>103</b> and <b>105</b>, video feeders <b>107</b>, <b>109</b>, <b>111</b>, <b>113</b> and <b>115</b>, and/or VDEC <b>117</b>, and so on, to function as an input to the MAD32 <b>100</b> and/or one of the scalers <b>102</b>, <b>104</b>, <b>106</b>, and <b>108</b>. The VDEC <b>117</b> may be an analog video decoder that may process NTSC signals to separate color from luma. The MPEG feeders <b>103</b> and <b>105</b> may accept 4:2:0 and 4:2:2 video data and supply 4:2:2 video data. The video feeders <b>107</b>, <b>109</b>, <b>111</b>, <b>113</b> and <b>115</b>, may accept 4:2:2 video data and supply 4:2:2 video data. The output of the second crossbar <b>112</b> may be passed back to the first crossbar <b>110</b> via the feedback path <b>114</b>.

U.S. patent application Ser. No. 10/314,525 filed Dec. 9, 2002 entitled “Network Environment for Video Processing Modules” discloses an exemplary crossbar network module and associated system, which is representative of the video network crossbar that may be utilized in connection with the present invention. Accordingly, U.S. patent application Ser. No. 10/314,525 filed Dec. 9, 2002 is hereby incorporated herein by reference in its entirety.

<figref idref="DRAWINGS">FIG. 1</figref><i>b </i>is a block diagram illustrating exemplary interfaces for the MAD-3:2 <b>100</b> shown in <figref idref="DRAWINGS">FIG. 1</figref><i>a</i>, in accordance with an embodiment of the present invention. Referring to <figref idref="DRAWINGS">FIG. 1</figref><i>b</i>, the MAD-3:2 <b>100</b> may comprise a plurality of bus interfaces and may include the capability to generate one or more system CPU interrupts. The MAD-3:2 <b>100</b> may run on, for example, a single system clock. However, the invention may not be so limited and more than one clock may be utilized. In one embodiment of the invention, the MAD-3:2 <b>100</b> may include a video bus (VB) input <b>120</b>, a video bus output <b>122</b>, and, for example, two independent bidirectional read/write SCB client connections, SCB<b>0</b><b>124</b> and SCB<b>1</b><b>126</b>. The SCB may be an internal bus utilized to access frames/fields stored in the memory. The video bus (VB) input <b>120</b> may be utilized for supplying fields to the MAD-3:2 <b>100</b>. The video bus output <b>122</b> may allow the deinterlaced output frames to be transferred throughout the video network and pass through a scaler before reaching a composite or capture block. An RBUS interface <b>128</b> may be utilized to configure the MAD-3:2 <b>100</b> or to access its status via one or more interface signals and/or registers. The RBUS may be a general-purpose bus utilized for programming registers for control and configuration of the CPU. At least a portion of the interfaces of the MAD-3:2 <b>100</b> may be synchronous to a clock input of the scaler. A video network receiver input error interrupt <b>130</b> may be generated on an input field size, which may differ from a programmed field size, which is expected. An inverse telecine ready interrupt <b>132</b> may be generated for every field, or at least some fields, at the point in time when the statistics gathered in the previous field are ready to be read by a CPU or other processor.

<figref idref="DRAWINGS">FIG. 1</figref><i>c </i>is a block diagram illustrating an exemplary flow of the algorithm which may be utilized by the MAD-3:2 <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref><i>a </i>and <figref idref="DRAWINGS">FIG. 1</figref><i>b</i>, in accordance with an embodiment of the present invention. Referring to <figref idref="DRAWINGS">FIG. 1</figref><i>c</i>, there is shown a data flow corresponding to the algorithm utilized for deinterlacing the luma component of video. The algorithm may effectively be divided into two sub-blocks. For example, diagrammed on the left of <figref idref="DRAWINGS">FIG. 1</figref><i>c </i>is the motion adaptive deinterlacer (MAD) method of deinterlacing <b>150</b> and on the right, there is shown the reverse 3:2 pulldown method <b>180</b>. For every output pixel, motion adaptive deinterlacing <b>150</b>, reverse 3:2 pulldown <b>180</b>, or a blend <b>160</b> of motion adaptive deinterlacing and reverse 3:2 deinterlacing may be utilized to determine a motion-adapted value of the output pixel under consideration.

The motion adaptive deinterlacer (MAD) <b>150</b> may comprise a directional filter <b>154</b>, a temporal average <b>156</b>, and a blender <b>158</b>. The MAD <b>150</b> may comprise suitable logic, code, and/or circuitry and may be adapted for performing the MAD method of deinterlacing. A processor may be adapted to perform the operation of the MAD <b>150</b>. The MAD <b>150</b> may comprise local memory for storage of data and/or instructions. The directional filter <b>154</b> may comprise suitable logic, code, and/or circuitry and may be adapted for spatially approximating the value of the output pixel. The temporal average <b>156</b> may comprise suitable logic, code, and/or circuitry and may be adapted for temporal approximation of the value of the output pixel. The blender <b>158</b> may comprise suitable logic, code, and/or circuitry and may be adapted to combine the temporal and spatial approximations of the value of the output pixel.

In operation, the MAD <b>150</b> may receive input field pixels from an interlaced video field and convert them into output frame fields in a progressive frame, at double the display rate. The horizontal resolution of the input to the MAD <b>150</b> may change on a field-by-field basis. The MAD <b>150</b> may utilize a motion adaptive algorithm that may smoothly blend various approximations for the output pixels to prevent visible contours, which may be produced by changing decisions. In an embodiment of the present invention, it may be necessary to determine the amount of motion around each output pixel, to use an appropriate approximation for the output pixel. The MAD <b>150</b> may utilize the directional filter <b>154</b>, the temporal average <b>156</b>, and the blender <b>158</b> to obtain a motion-adapted value for the output pixel that is visually pleasing.

<figref idref="DRAWINGS">FIG. 2</figref> illustrates a block diagram of an exemplary directional filter <b>200</b> that may be integrated into a motion adaptive de-interlacer and utilized for motion adaptive deinterlacing with integrated directional filtering, in accordance with an embodiment of the present invention. The directional filter <b>200</b> may be, for example, the directional filter <b>154</b> of the MAD <b>150</b> of <figref idref="DRAWINGS">FIG. 1</figref><i>c</i>. A plurality of pixels may be read from line buffers every cycle and processed at the clock rate. For example, four pixels <b>201</b>, <b>203</b>, <b>205</b> and <b>207</b> may be read from the line buffers every cycle and processed at the clock rate. The pixels may be arranged in, for example, a vertical order H, E, F, J from top to bottom. The current pixel O, which is missing, or part of an absent line in the interlaced field. Pixels E and F may be directly above and below pixel O, in the present lines in the interlaced field, and pixels H and J may be the pixels directly above pixel E and below pixel F in present lines in the interlaced field. U.S. patent application Ser. No. 10/945,796 filed Sep. 21, 2004 entitled “Pixel Constellation for Motion Detection in Motion Adaptive Deinterlacer” discloses an exemplary pixel constellation that may be utilized in connection with the present invention for pixels H, E, F, and J. Accordingly, U.S. Provisional Patent Application Ser. No. 10/945,796 filed Sep. 21, 2004 is hereby incorporated herein by reference in its entirety.

The directional filter <b>200</b> may receive the pixels <b>201</b>, <b>203</b>, <b>205</b> and <b>207</b> from the line buffers, and produce a spatial average using a process of adaptive diagonal filtering. The directional filter <b>200</b> may comprise an angle detection block <b>209</b> and a diagonal filter block <b>211</b>. The angle detection block <b>209</b> may examine an array of pixels to determine the angle and strength of gradients in the source picture. The diagonal filter block <b>211</b> may utilize an array of pixels and the angle information <b>215</b> outputted by the angle detection block <b>209</b> to select one of a plurality of filter kernels and blend the resulting diagonal filter with a vertical FIR based on the strength of the diagonal information <b>217</b> outputted by the angle detection block <b>209</b>. The resulting output <b>213</b> may be used as a spatial average in the motion adaptive de-interlacer (MAD).

Filtering in the directional filter <b>200</b> may be performed on field data entirely within a field. As a result the directional filter <b>200</b> may be immune from motion artifacts. Additionally, there may be no motion in the MAD, in which case the output spatial average <b>213</b> may not be used elsewhere in the MAD. As a result the diagonal filter <b>200</b> may only affect images with motion.

<figref idref="DRAWINGS">FIG. 3</figref> illustrates a block diagram of an exemplary angle detection block <b>300</b> that may be integrated in a directional filter and utilized for motion adaptive deinterlacing with integrated directional filtering, in accordance with an embodiment of the invention. The angle detection block <b>300</b> may be, for example, the angle detection block <b>209</b> of the directional filter <b>200</b> of <figref idref="DRAWINGS">FIG. 2</figref>. The angle detection block <b>300</b> may output an angle select signal <b>317</b> and a diagonal strength signal <b>315</b> per clock cycle. The angle detection block <b>300</b> may comprise a delta x (dx) kernel and a delta y (dy) kernel, comparison block <b>305</b> for angle selection; and distance approximation block <b>307</b> with a threshold block <b>309</b> for diagonal strength determination.

Delta x (dx) kernel and delta y (dy) kernel may be computed using vertical and horizontal edge detectors <b>301</b> and <b>303</b> respectively on, for example, a 3×2 array of pixels from lines E and F. Ultimately, the vertical edge detector <b>301</b> may determine the gradient in the y-direction, which may indicate whether there is a change in the vertical direction in a field. Similarly, the horizontal edge detector <b>303</b> may determine the gradient in the x-direction, which may indicate whether there is a change in the horizontal direction in the field. The dx kernel may be represented as:

[½, 0, −½]

[½, 0, −½]

The dy kernel may be represented as:

[¼, ½, ¼]

[−¼, −½, −¼]

A partial crossbar may be utilized to repeat pixels at the boundaries before they are multiplied. A gradient in both the x- and y-directions may indicate the presence of a diagonal edge. A gradient in only the x-direction may indicate the presence of a vertical edge, and a gradient in only the y-direction may indicate the presence of a horizontal edge.

The comparison block <b>305</b> may receive scaled values <b>321</b> and <b>323</b> of abs |dx| and abs |dy| respectively, as well as a sign value <b>319</b> to determine the angle of the gradient in the source image. The case selection using comparisons of |dx| and |dy| may be accurate to within, for example, about 0.001 radians of a true arc-tangent (arctan) function, but may be considerably cheaper. A modification to a true absolute value may be made to prevent overflow. When the delta x kernel |dx|=(−256), the absolute value |dx|=255. Similar absolute value operation for |dy| may be used.

U.S. patent application Ser. No. 10/946,153 filed Sep. 21, 2004 entitled “Method and System for Interpolator Direction Selection During Edge Detection” discloses a method for determining the direction and angle of an edge using |dx| and |dy|. Accordingly, U.S. patent application Ser. No. 10/946,153 filed Sep. 21, 2004 is hereby incorporated herein by reference in its entirety.

The resulting angle selection value <b>317</b> may result in a selection of one of, for example, 7 filter kernels comprising {NWW, NW, NNW, N, NNE, NE, NEE} each indicating a direction corresponding to the resulting angle. An additional filter kernel HOR may be utilized for horizontal filtering. Similar results may be achieved using the N filter in this condition. The comparison block <b>305</b> may produce one angle selection per cycle.

The distance approximation block <b>307</b> may determine the strength of the diagonal, which may be determined using the Cartesian distance: <br /><i>d</i>=√{square root over (<i>dx</i>²<i>+dy</i>²)}<br /> The ideal distance equation may be complicated to realize with simple hardware because of the squares and square root. Instead, an approximation may be implemented utilizing simpler methods to determine the distance value. U.S. patent application Ser. No. 10/945,645 filed September 21 entitled “Method and System for Detecting Diagonal Strength of an Edge for an Image” discloses a method for determining the distance using an approximation. Accordingly, U.S. patent application Ser. No. 10/945,645 filed September 21 is hereby incorporated herein by reference in its entirety.

Following the distance approximation block <b>307</b>, there may be the threshold block <b>309</b>. In the threshold block <b>309</b>, if

(d&lt;TH) then Diagonal Strength=0

(d&gt;=TH) then Diagonal Strength=d

As a result, depending on the threshold, weak edges in an image may get forced to zero and get treated as if there is no edge at all. The value of the threshold TH may be programmable. If the diagonal strength is 0, the vertical FIR may be utilized by default.

The threshold block <b>309</b> may be adapted to force the follow-on diagonal filter blend circuit to default to a simple 4-tap vertical filter in images where the diagonal content may not be particularly strong. The output signal diagonal strength <b>315</b> may be a value in the range {0-150}.

<figref idref="DRAWINGS">FIG. 4</figref> illustrates a block diagram of an exemplary diagonal filter block <b>400</b> that may be integrated in a directional filter, in accordance with an embodiment of the invention. The diagonal filter block <b>400</b> may be, for example, the diagonal filter block <b>211</b> of the directional filter <b>200</b> of <figref idref="DRAWINGS">FIG. 2</figref>. The diagonal filter block <b>400</b> may utilize the input pixel values in addition to the angle selection signal <b>215</b> and diagonal strength signal <b>217</b> outputted by the angle detection block <b>209</b> to implement a 2-D x-y filter kernel, and blend with a vertical 4-tap FIR. The diagonal filter <b>400</b> may be adapted to output a single luma value as the spatial average <b>411</b> every clock cycle. The diagonal filter <b>400</b> may comprise a 2-D x-y filter <b>401</b>, and a blend function <b>403</b>.

The 2-D x-y kernel of diagonal filter <b>400</b> may be implemented with, for example, a 5-pixel horizontal filter by 4-line vertical filter. The 4-line vertical filter may be utilized to compute the N (north) FIR filter. The remaining diagonal kernels may utilize a 5-pixel horizontal by 2-line vertical filter. The x-y kernel may output every cycle both a value <b>405</b> for N (north) and a diagonal value <b>407</b> for one of the other directional filters {NWW, NW, NNW, NNE, NE, NEE} depending upon the selected coefficients for {E₋₂E₋₁E₀E₁E₂} and {F₋₂F₋₁F₀F₁F₂} based on the direction determined by the angle detection block <b>209</b>. The selection of the filters may be determined using the angle selection signal <b>215</b> and may, for example, consist of the following choices:

<maths id="MATH-US-00001" num="00001"><math overflow="scroll"><mrow><mi>P</mi><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mo>·</mo></mtd><mtd><mo>·</mo></mtd><mtd><mi>H</mi></mtd><mtd><mo>·</mo></mtd><mtd><mo>·</mo></mtd></mtr><mtr><mtd><msub><mi>E</mi><mrow><mo>-</mo><mn>2</mn></mrow></msub></mtd><mtd><msub><mi>E</mi><mrow><mo>-</mo><mn>1</mn></mrow></msub></mtd><mtd><msub><mi>E</mi><mn>0</mn></msub></mtd><mtd><msub><mi>E</mi><mn>1</mn></msub></mtd><mtd><msub><mi>E</mi><mn>2</mn></msub></mtd></mtr><mtr><mtd><msub><mi>F</mi><mrow><mo>-</mo><mn>2</mn></mrow></msub></mtd><mtd><msub><mi>F</mi><mrow><mo>-</mo><mn>1</mn></mrow></msub></mtd><mtd><msub><mi>F</mi><mn>0</mn></msub></mtd><mtd><msub><mi>F</mi><mn>1</mn></msub></mtd><mtd><msub><mi>F</mi><mn>2</mn></msub></mtd></mtr><mtr><mtd><mo>·</mo></mtd><mtd><mo>·</mo></mtd><mtd><mi>J</mi></mtd><mtd><mo>·</mo></mtd><mtd><mo>·</mo></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0001.tif" />

The table below illustrates exemplary directional interpolators that may be utilized by the motion adaptive de-interlacer with integrated directional filter <b>200</b> based on the direction of the diagonal, in accordance with an embodiment of the invention.

<tables id="TABLE-US-00001" num="00001"><table frame="none" colsep="0" rowsep="0" pgwide="1"><tgroup align="left" colsep="0" rowsep="0" cols="3"><colspec colname="offset" colwidth="14pt" align="left" /><colspec colname="1" colwidth="126pt" align="left" /><colspec colname="2" colwidth="119pt" align="left" /><thead><row><entry /><entry namest="offset" nameend="2" align="center" rowsep="1" /></row></thead><tbody valign="top"><row><entry /><entry><maths id="MATH-US-00002" num="00002"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>N</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mrow><mo>-</mo><mn>0.046875</mn></mrow></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.546875</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.546875</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mrow><mo>-</mo><mn>0.046875</mn></mrow></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0002.tif" /></entry><entry><maths id="MATH-US-00003" num="00003"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>E</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.5</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.5</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0003.tif" /></entry></row><row><entry /><entry><maths id="MATH-US-00004" num="00004"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>NE</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.5</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0.5</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0004.tif" /></entry><entry><maths id="MATH-US-00005" num="00005"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>NW</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0.5</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.5</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0005.tif" /></entry></row><row><entry /><entry><maths id="MATH-US-00006" num="00006"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>NNE</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0006.tif" /></entry><entry><maths id="MATH-US-00007" num="00007"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>NNW</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0007.tif" /></entry></row><row><entry /><entry><maths id="MATH-US-00008" num="00008"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>NEE</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd></mtr><mtr><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0008.tif" /></entry><entry><maths id="MATH-US-00009" num="00009"><math overflow="scroll"><mrow><msub><mi>Int</mi><mi>NWW</mi></msub><mo>=</mo><mrow><mo>[</mo><mtable><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0.25</mn></mtd><mtd><mn>0.25</mn></mtd></mtr><mtr><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd><mtd><mn>0</mn></mtd></mtr></mtable><mo>]</mo></mrow></mrow></math></maths><img file="US7880809B2_D0009.tif" /></entry></row><row><entry /><entry namest="offset" nameend="2" align="center" rowsep="1" /></row></tbody></tgroup></table></tables>

The coefficients in the diagonal filter <b>400</b> may be implemented with, for example, a simple shift and inversion in order to reduce hardware cost. A partial crossbar may be utilized to repeat pixels at the boundaries of the picture. This may apply to both the vertical N (north) filter and/or the diagonal filter kernel selected for diagonal filtering.

The blend control parameter DS <b>409</b> may be derived from a select north signal and the diagonal strength signal <b>217</b> from the angle detection block <b>209</b>. The DS signal <b>409</b> may be driven to 0 when select north is active, thus forcing the blend to select pure north (N) for the spatial average output <b>411</b>. In other conditions, the DS signal <b>409</b> may be used to merge midway between north (N) and diagonal filter (diag) depending upon the diagonal strength. The spatial average output <b>411</b> may be determined in one of several ways using the blend control parameter along with the diagonal filter and north signals.

Combining the directional filter <b>200</b> adaptively with de-interlacing technology may provide high quality stills with weave function, and produce high quality motion with compass filter. Additionally, the directional filter may have unique angle detection capabilities, and may blend multiple directions for smooth transitions in the source material. Accordingly, a method and system for motion adaptive de-interlacer with an integrated directional filter <b>200</b> may provide a better quality video signal and a good complement to de-interlace processing for motion, while utilizing a low cost implementation.

Accordingly, the present invention may be realized in hardware, software, or a combination thereof. The present invention may be realized in a centralized fashion in at least one computer system, or in a distributed fashion where different elements may be spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein may be suited. A typical combination of hardware and software may be a general-purpose computer system with a computer program that, when being loaded and executed, may control the computer system such that it carries out the methods described herein.

The present invention may also be embedded in a computer program product, which comprises all the features enabling the implementation of the methods described herein, and which when loaded in a computer system is able to carry out these methods. Computer program in the present context means any expression, in any language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following: a) conversion to another language, code or notation; b) reproduction in a different material form.

While the present invention has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the present invention without departing from its scope. Therefore, it is intended that the present invention not be limited to the particular embodiment disclosed, but that the present invention will include all embodiments falling within the scope of the appended claims.