Method and system for self-testing a line card

TECHNICAL FIELD OF THE INVENTION

This invention relates generally to telecommunications and more particularly to a method and system for self-testing a line card.

BACKGROUND OF THE INVENTION

Communication systems that allow communication of data from a home or office through a wide area network are widely used. Enabling infrastructure for such communications, and others, often includes a digital subscriber line access multiplexer (DSLAM). A DSLAM includes a plurality of line cards. A line card refers to an integrated circuit card disposed in the DSLAM. A line card includes one or more modems for converting data received from a customer's home or office to a format suitable for transmission over the Internet and for formatting data received from the Internet for transmission to a customer's home. Such line cards include a plurality of electrical components, many of which require testing before sale or use of the line card.

Testing of such components is often difficult or expensive both due to the number of components to be tested as well as expensive equipment conventionally required. For example, a frequency analyzer is sometimes used to perform a filter sweep, in which a plurality of signals at varying frequencies are transmitted through the line card and the resulting signals are measured with a frequency analyzer. Such procedure is both time consuming and expensive, particularly because a frequency analyzer is an expensive piece of equipment. Expense also arises from the manpower required in such a time consuming procedure.

SUMMARY OF THE INVENTION

According to one embodiment of the invention, a method for self-testing a portion of a line card having a digital signal processor for manipulating data received by the line card, and a transmit channel and a receive channel coupled to a combined transmit and receive channel includes transmitting a test signal through at least a portion of the transmit channel toward the combined channel and detecting, by the digital signal processor any resulting signal in the receive channel to determine whether any components in the transmit channel, receive channel or combined channel are malfunctioning.

Some embodiments of the invention provide numerous technical advantages. Other embodiments may realize some, none, or all of these advantages. For example, according to one embodiment, a line card can be easily self-tested without the use of expensive equipment. Furthermore, a normally time-consuming process may be shortened.

Other advantages may be readily ascertainable by those skilled in the art from the following figures, descriptions and claims.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the invention, reference is now made to the following description taken in conjunction with the accompanying drawings, wherein like reference numerals represent like parts, in which:

<figref idrefs="DRAWINGS">FIG. 1</figref> is a block diagram of a telecommunications system that may benefit from the teachings of the invention;

<figref idrefs="DRAWINGS">FIG. 2</figref> is a block diagram of a line card of the telecommunications system of <figref idrefs="DRAWINGS">FIG. 1</figref>, which may be tested according to the teachings of the invention;

<figref idrefs="DRAWINGS">FIG. 3</figref> is a schematic diagram showing additional details of portions of the line card of <figref idrefs="DRAWINGS">FIG. 2</figref> and an associated termination circuit;

<figref idrefs="DRAWINGS">FIG. 4</figref> is a circuit diagram showing additional details of the termination circuit of <figref idrefs="DRAWINGS">FIG. 3</figref>;

<figref idrefs="DRAWINGS">FIG. 5</figref> is a flow chart showing example steps associated with a method for self-testing a line card according to one embodiment of the invention; and

<figref idrefs="DRAWINGS">FIG. 6</figref> is a flow chart showing example steps associated with a method for self-testing a line card according to another embodiment of the invention.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS OF THE INVENTION

Example embodiments of the invention are best understood by referring to <figref idrefs="DRAWINGS">FIGS. 1 through 6</figref> of the drawings, like numerals being used for like and corresponding parts of the various drawings.

<figref idrefs="DRAWINGS">FIG. 1</figref> is a block diagram of a telecommunications system <b>10</b> that may benefit from the teachings of the invention. Telecommunications system <b>10</b> includes a DSLAM <b>12</b> that couples a customer premises <b>14</b> to a network <b>16</b>. Customer premises <b>14</b> represents a user's home or office or other location in which a user may connect to a network, such as the Internet, through telephone lines, or other media. Network <b>16</b> represents any local area or wide area network that may be connected to by customer premises <b>14</b>, such as the Internet. In the example, telephone lines <b>18</b> couple customer premises <b>14</b> to DSLAM <b>12</b>; however, other types of media may be used to couple customer premises <b>14</b> to DSLAM <b>12</b>. Telephone line <b>18</b> may comprise a tip portion and a ring portion (not explicitly shown in <figref idrefs="DRAWINGS">FIG. 1</figref>). DSLAM <b>12</b> is coupled to network <b>16</b> by a communication line <b>20</b>. Communication line <b>20</b> may be an optical, electrical, or wireless communication link operable to couple a DSLAM to a network.

DSLAM <b>12</b>, in this embodiment, comprises a plurality of line cards <b>22</b> and a network interface card <b>24</b> coupled by a communication link <b>26</b>. Line cards <b>22</b> comprise one or more modems (not explicitly shown) that perform functions associated with converting signals received from customer premises <b>14</b> over telephone lines <b>18</b> into a format that is suitable for transmission to network <b>16</b> and with converting signals received from network <b>16</b> through network interface card <b>24</b> into a format that is suitable to transmission to customer premises <b>14</b>. an example line card <b>22</b> that may benefit from the teachings of the invention is available from Cisco Systems; however, other line cards may also be tested according to the teachings of the invention. Network interface card <b>24</b> receives such signals and coordinates transmission of a plurality of signals intended for, or received from, line cards <b>22</b> that are generated by, or intended for, network <b>16</b>.

According to the teachings of the invention, line cards <b>22</b> may be self-tested, allowing more rapid and less expensive testing of such devices than some conventional methods. Details associated with such a testing method are described below in conjunction with <figref idrefs="DRAWINGS">FIGS. 2 through 6</figref>.

<figref idrefs="DRAWINGS">FIG. 2</figref> is a block diagram showing additional details of one example line card <b>22</b> of <figref idrefs="DRAWINGS">FIG. 1</figref>. As described above, line card <b>22</b> receives signals from customer premises <b>14</b> over telephone lines <b>18</b> and produces signals over line <b>26</b> suitable for transmission to network <b>16</b>, and also received signals from network <b>16</b> over line and produces signals suitable for transmission to customer premises <b>14</b>. Line card <b>22</b> includes, in this example, a discrete analog front end <b>28</b>. Discrete analog front end <b>28</b> couples to an analog front end <b>30</b> by line <b>29</b>. Line card <b>22</b> also may include a digital signal processor <b>32</b> coupled to a serializer/deserializer <b>34</b>, as well as a supervising processor <b>36</b>. These example components are shown for example purposes only, and the teachings of the invention may be utilized with other suitable combinations of circuitry.

In this example, discrete analog front end <b>28</b> comprises a set of components that receives analog signals over line <b>18</b> from customer premises <b>14</b> (receive signals) for further communication to network <b>16</b>. Discrete analog front end <b>28</b> also receives analog signals (transmit signals) over line <b>29</b> for communication to customer premises <b>14</b>. Discrete analog front end <b>28</b> selects an appropriate receive or transmit signal and forwards it in the correct direction. In addition, discrete analog front end may filter out-of-band frequencies that may be associated with signals transmitted in the opposite direction of the desired signals. In addition, discrete analog front end <b>28</b> may provide gain for such transmit and receive signals. Discrete analog front end <b>28</b> is described in greater detail in conjunction with <figref idrefs="DRAWINGS">FIG. 3</figref>.

Analog front end <b>30</b> receives incoming signals over line <b>29</b> from discrete analog front end <b>28</b> (receive signals) and converts those signals to a digital format for transmission to digital signal processor <b>32</b>. Conversely, analog front end <b>30</b> receives digital signals outgoing (transmitted, signals) from digital signal processor <b>32</b> and converts the signals into an analog form for transmission to discrete analog front end <b>28</b>. Any suitable combination of hardware and/or software may be utilized, including conventional techniques, for performing such digital-to-analog and analog-to-digital conversion.

Digital signal processor <b>32</b> receives incoming digital signals from analog front end <b>30</b> and outgoing digital signals from serializer/deserializer <b>34</b>. The signals may be processed according to conventional techniques to perform any necessary modulation, demodulation, error correction, filtering, frequency analysis and other functions associated with line card <b>22</b>. The teachings of the invention are equally applicable to line cards including yet to be developed digital signal processors and associated functions. Digital signal processor <b>32</b> may also examine signals it received during testing to determine if portions of line card <b>22</b> are operating properly, as described in greater detail below. Although other formats may be used, a digital multiline-based DSL is very adept at performing spectrum analyzer functions. As part of its normal operations, it performs a Fast Fourier Transform to break a received signal down into a plurality of bins. Utilizing digital signal processor <b>32</b> to examine signals during testing allows testing of portions of line card <b>22</b> without the use of expensive test equipment.

Serializer/deserializer <b>34</b> receives outgoing signals over line <b>26</b> and incoming signals from digital signal processor <b>32</b>. Generally, serializer/deserializer <b>34</b> converts signals received from network <b>16</b> from a serial format to a desired format for receipt by digital signal processor <b>32</b>, such as a Utopia format. In one embodiment, link <b>33</b> coupling serializer/deserializer <b>34</b> to digital signal processor is a Utopia bus. Conversely, serializer/deserializer deserializes signals received over communication link <b>33</b> and transmits them in a serial format over line <b>26</b> to network interface card <b>24</b>.

Supervisor processor <b>32</b> may supervise the operations of the other components of line card <b>22</b> (connections not explicitly shown.)

According to the teachings of the invention, portions of analog front end <b>30</b> and discrete analog front end <b>28</b> may be self-tested in a simpler and less expensive manner than some conventional techniques. Although the following description describes certain components associated with analog front end and discrete analog front end <b>28</b> being tested, both components additional to those described as well as components of other portions of line card <b>22</b> may also benefit from the teachings of the invention. Additional details of such testing are described below in conjunction with <figref idrefs="DRAWINGS">FIGS. 3 through 6</figref>.

<figref idrefs="DRAWINGS">FIG. 3</figref> is a schematic diagram illustrating additional detail of portions of analog front end <b>30</b> and discrete analog front end <b>28</b>. In this example, analog front end <b>30</b> comprises a digital-to-analog converter <b>38</b> and an analog-to-digital converter <b>40</b>. Digital-to-analog converter <b>38</b> generates an analog signal on line <b>42</b> from digital signals received by analog front end <b>30</b>. Conversely, analog-to-digital converter <b>40</b> generate a digital signal for transmission to digital signal processor <b>32</b> in response to a signal received over line <b>44</b>.

In this example, discrete analog front end <b>28</b> comprises a transmit channel <b>39</b>, a receive channel <b>41</b>, and a combined transmit and receive channel <b>43</b>. In this example, transmit channel <b>39</b> generally conditions the analog signal at line <b>42</b> into an appropriate format for transmission for eventual receipt by a customer premises <b>14</b>; however, as used herein, “transmit channel” generally refers to an outgoing channel of communication for signals destined for customer premises <b>14</b>. In contrast, in this example, receive channel <b>41</b> generally conditions a received signal for eventual transmission over communication link <b>20</b> to network <b>16</b>. As used herein, “transmit channel” generally refers to an incoming channel of communication over which signals are received for eventual transmission to network <b>16</b>. Combined network and received channel <b>43</b> operates on both transmit and receive signals, as needed, and provides such signals either to receive channel <b>41</b> or customer premises <b>14</b>. As used herein, “combined channel” refers to a communication channel through which both outgoing and incoming signals flow.

Transmit channel <b>39</b> comprises, in this example, a filter <b>48</b>. Filter <b>48</b>, in this example, is a high pass filter allowing transmission of only certain frequencies above a certain corner frequency f₁. The output of filter <b>48</b> is provided at node <b>54</b>. A switch <b>59</b> allows bypassing of filter <b>48</b> by switching switch <b>59</b> to a node <b>46</b>. This allows a transmitted signal to bypass filter <b>48</b>, thus transmitting all frequency bands present on line <b>42</b>. Transmit channel <b>39</b> also includes an amplifier <b>56</b> for amplifying the transmit signal for eventual transmission to a customer premises <b>14</b>.

Receive channel <b>41</b> comprises, in this example, an amplifier <b>58</b> for amplifying a received signal for eventual transmission through analog-to-digital converter <b>40</b> to network <b>16</b>. Receive channel <b>41</b> also comprises one or more filters <b>50</b>, <b>52</b>. Such filters may be associated with particular types of modulation associated with line card <b>22</b>. For example, filter <b>50</b> may be associated with a frequency plan of discrete multitone modulation while filter <b>52</b> may be associated with carrierless amplitude modulation. As illustrated, filters <b>50</b> and <b>52</b> are low-pass filters allowing transmission of received signals, which should be generally lower frequencies. The output of filter <b>50</b> is coupled to a node <b>53</b>. The output of filter <b>52</b> is coupled to a node <b>55</b>. A node <b>56</b> is coupled to the output of amplifier <b>58</b>, providing a bypass of filters <b>50</b> and <b>52</b>. A switch <b>47</b> may allow selective coupling of the input of analog-to-digital converter <b>40</b> to either nodes <b>53</b>, <b>55</b>, or <b>56</b>.

Transmit channel <b>39</b> and receive channel <b>41</b> may be coupled to combined transmit and receive channel <b>43</b> by a hybrid <b>60</b>. Hybrid <b>60</b> separates the transmit signals from the received signals and appropriately directs such signals along combined channel <b>43</b> or to receive channel <b>41</b>. Associated with hybrid <b>60</b> may be an impedance <b>62</b> for matching the impedance associated, in this example, with telephone lines <b>18</b>. A combined channel <b>43</b> may include, a transformer <b>64</b>, a switch <b>66</b>, and a connector <b>68</b>. Transformer <b>64</b> transforms signals received from customer premises <b>14</b> into appropriate voltage levels for continued processing by line card <b>22</b> and conversely transmits signals transmitted by line card <b>12</b> into appropriate voltage levels for transmission for receipt by customer premises <b>14</b>. Switch <b>66</b> allows selective coupling of transformer <b>64</b>, and the remainder of line card <b>12</b>, to either a termination circuit <b>70</b> or customer premises <b>14</b>, when closed, or an open circuit when open. When placed in an open position, as shown, switch <b>66</b> may also allow coupling of customer premises <b>14</b> to a redundant line card (not explicitly shown). The redundant line card may be used when it is determined that line card <b>22</b> is not functioning properly. Connector <b>68</b> may be any suitable connection for coupling line card <b>22</b> to an incoming telephone line <b>18</b>.

Also shown in <figref idrefs="DRAWINGS">FIG. 3</figref> is termination circuit <b>70</b>. According to the teachings of the invention, termination circuit <b>70</b> has, in one embodiment, an impedance that is approximately the characteristic impedance of telephone line <b>18</b> coupled with customer premises <b>14</b>. As described in greater detail below, the use of termination circuit <b>70</b> facilitates self-testing of line card <b>12</b>.

In normal operation (non-test mode), incoming receive signals are received through connector <b>68</b>, through switch <b>66</b>, through transformer <b>64</b>, and are directed by hybrid <b>60</b> through receive channel <b>41</b>, including amplifier <b>58</b>. Amplifier <b>58</b> amplifies the received signal to appropriate levels. The amplified receive signal then goes through either filter <b>50</b> or filter <b>52</b>, depending on the type of modulation used. The output of the appropriate filter is then provided to analog-to-digital converter <b>40</b> for conversion to digital format and subsequent transmission to digital signal processor <b>32</b>. Once reaching digital signal processor <b>32</b>, the received signal may demodulated, filtered, error corrected, and otherwise upgraded for eventual transmission through serializer/deserializer <b>34</b> to network <b>20</b>.

For transmitted signals, transmitted by line card <b>22</b> for receipt by customer premises <b>14</b>, the signal to be transmitted is received by digital-to-analog converter <b>38</b> where it is converted to analog format and outputted on line <b>42</b>. This signal is transmitted through transmit channel <b>39</b>, including through filter <b>48</b> and then amplifier <b>56</b>. Hybrid <b>60</b> directs the transmitted signal to transformer <b>64</b>, as opposed to receive channel <b>41</b>. Transformer <b>64</b> converts the transmitted signal to appropriate voltage levels where it flows through switch <b>66</b> and connector <b>68</b> to a customer premises <b>14</b>.

In order to self-test certain components of line card <b>22</b>, termination circuit <b>70</b> may be coupled to connector <b>68</b>, in one mode of operation, rather than customer premises <b>14</b>. Once termination circuit <b>70</b> is coupled to connector <b>68</b>, the procedure described with respect to <figref idrefs="DRAWINGS">FIG. 5</figref> may be used to test various components of line card <b>22</b>.

<figref idrefs="DRAWINGS">FIG. 4</figref> is a circuit diagram showing additional details of termination circuit <b>70</b>. Termination circuit <b>70</b> receives telephone line <b>69</b>, which is shown in greater detail in <figref idrefs="DRAWINGS">FIG. 4</figref>. As shown, telephone line <b>69</b> includes a tip portion <b>102</b> and a ring portion <b>104</b>. Tip and ring portions <b>102</b>, <b>104</b> couple to termination circuit <b>70</b>. In this example, termination circuit <b>70</b> comprises a resistor coupled to two pairs <b>106</b>, <b>108</b> of resistor/capacitor combinations. As illustrated, in this embodiment, resistor/capacitor combination <b>106</b> comprises a resistor in series with capacitor <b>96</b>. Resistor/capacitor combination <b>108</b> comprises a resistor <b>98</b> in series with a capacitor <b>100</b>. In general, the design of termination circuit <b>70</b> is based on the characteristic impedance of telephone line <b>18</b> connected to customer premises <b>14</b>, and should match as closely as possible that characteristic impedance. In one common example associated with a common telephone wire in the United States, the values of resistors <b>92</b>, <b>94</b>, <b>98</b>, and capacitors <b>96</b> and <b>100</b> are as follows: resistor <b>92</b>=698 ohms; resistor <b>94</b>=348 ohms; resistor <b>98</b>=200 ohms; capacitor <b>96</b>=0.033 μF; capacitor <b>100</b>=0.015 μF.

<figref idrefs="DRAWINGS">FIG. 5</figref> is a flowchart showing example steps associated with a method for performing a self-test on a line card, such as line card <b>22</b>. The method begins at step <b>120</b>. At a step <b>122</b> termination network <b>70</b> is coupled connector <b>68</b>. As described above, termination network <b>70</b> may be any suitable network for terminating line card <b>22</b>; however, termination networks having an impedance approximating the characteristic impedance of telephone line <b>18</b> in conjunction with customer premises <b>14</b> produce more accurate results. At a step <b>124</b>, switch <b>66</b> is closed, allowing a transmitted signal to flow to termination circuit, if the components of line card <b>22</b> are operating properly. At a step <b>125</b>, switches <b>59</b> and <b>47</b> are positioned at desired positions, depending on the components that are desired to be tested. Example positionings of these switches and the resulting signals that are expected are described in greater detail below with respect to Table 1.

At a step <b>126</b>, a transmit signal is transmitted through at least a portion of transmit channel <b>39</b>. At a step <b>128</b>, any resulting signal is detected in receive channel <b>41</b> by, in this embodiment, digital signal processor <b>32</b>. As described above digital signal processor <b>32</b> has functionality for receiving signals from customer premises <b>14</b> and analyzing those signals, including performing a frequency analysis. According to the teachings of the invention, this functionality may be used for self-testing line card <b>22</b> by examining any resulting signal in receive channel <b>41</b> by the DSP. The method concludes at step <b>130</b>.

Examples associated with the method of <figref idrefs="DRAWINGS">FIG. 5</figref> are described below in conjunction with Table 1.

<tables id="TABLE-US-00001" num="00001"><table frame="none" colsep="0" rowsep="0"><tgroup align="left" colsep="0" rowsep="0" cols="1"><colspec colname="1" colwidth="217pt" align="center" /><thead><row><entry namest="1" nameend="1" rowsep="1">TABLE 1</entry></row></thead><tbody valign="top"><row><entry namest="1" nameend="1" align="center" rowsep="1" /></row><row><entry>Example Tests</entry></row></tbody></tgroup><tgroup align="left" colsep="0" rowsep="0" cols="5"><colspec colname="1" colwidth="21pt" align="center" /><colspec colname="2" colwidth="42pt" align="left" /><colspec colname="3" colwidth="49pt" align="left" /><colspec colname="4" colwidth="35pt" align="left" /><colspec colname="5" colwidth="70pt" align="left" /><tbody valign="top"><row><entry>Case</entry><entry>Switch 59</entry><entry>Switch 47</entry><entry>Switch 66</entry><entry>Tests of</entry></row><row><entry namest="1" nameend="5" align="center" rowsep="1" /></row><row><entry>1</entry><entry>54 (Normal)</entry><entry>56 (Test)</entry><entry>Open</entry><entry>shape of filter 48</entry></row><row><entry>2</entry><entry>54 (Normal)</entry><entry>56 (Test)</entry><entry>Closed</entry><entry>hybrid 60, transformer</entry></row><row><entry /><entry /><entry /><entry /><entry>64, switch 66, or</entry></row><row><entry /><entry /><entry /><entry /><entry>connector 68</entry></row><row><entry>3</entry><entry>46 (Test)</entry><entry>53 or 55</entry><entry>Open</entry><entry>filter 50 or 52</entry></row><row><entry /><entry /><entry>(DMT or CAP)</entry></row><row><entry>4</entry><entry>46 (Test)</entry><entry>56 (Test)</entry><entry>Open</entry><entry>amplifier 56, hybrid</entry></row><row><entry /><entry /><entry /><entry /><entry>30, amplifier 58, or</entry></row><row><entry /><entry /><entry /><entry /><entry>transformer 64</entry></row><row><entry>5</entry><entry>46 (Test)</entry><entry>56 (Test)</entry><entry>Closed</entry><entry>amplifier 56, hybrid</entry></row><row><entry /><entry /><entry /><entry /><entry>30, transformer 64,</entry></row><row><entry /><entry /><entry /><entry /><entry>switch 66, or</entry></row><row><entry /><entry /><entry /><entry /><entry>connector 68</entry></row><row><entry namest="1" nameend="5" align="center" rowsep="1" /></row></tbody></tgroup></table></tables>

With reference to “Case 2” of Table 1, one test is described. Switch <b>59</b> is set to node <b>54</b>, which represents a normal operating condition in which transmitted signals through channel <b>39</b> flow through filter <b>48</b>. In this example, switch <b>47</b> is set to node <b>56</b>, which represents a test condition in which filters <b>50</b> and <b>52</b> are bypassed. Also in this example, switch <b>66</b> is closed. When in this configuration a transmit signal is transmitted through transmit channel <b>39</b>. If all components are operating properly, the transmit signal flows through filter <b>48</b> through amplifier <b>56</b> through hybrid <b>60</b> toward transformer <b>64</b>. The signal continues through transformer <b>64</b>, through closed switch <b>66</b>, through connector <b>68</b>, to termination circuit <b>70</b>. The transmit signal then is absorbed in termination circuit <b>70</b> and no signal is reflected back through receive channel <b>41</b> to DSP <b>32</b>. Therefore, no signal is detected in receive channel <b>41</b>, assuming all components are operating properly. If however a reflected signal is detected, this indicates that either hybrid <b>60</b>, transformer <b>64</b>, switch <b>66</b>, or connector <b>90</b> are malfunctioning and have caused reflection of the signal transmitted through transmit channel <b>39</b>. Additionally, it may be possible to determine if amplifier <b>56</b> is causing distortion of the transmitted signal by observing any distortion in any reflected signal received in receive channel <b>41</b>.

With respect to “Case 5” of Table 1, switches <b>66</b> and are in the same positions; however, switch <b>59</b> is coupled to node <b>46</b>, indicating a test position. Assuming all components are operating properly, the signal propagates through transmit channel <b>39</b>, through node <b>46</b>, bypassing filter <b>48</b>, and through amplifier <b>56</b>, hybrid <b>60</b>, transformer <b>64</b>, switch <b>66</b>, connector <b>68</b>, and terminates in termination circuit <b>70</b>. Thus, no resulting signal should be detected in receive channel <b>41</b> if all components are operating properly. However, if a signal is detected, this indicates that either hybrid <b>60</b>, transformer <b>64</b>, switch <b>66</b>, or connector <b>68</b> is malfunctioning and might be open. Additionally, it may be possible to determine if amplifier <b>56</b> is causing distortion of the transmitted signal by observing any distortion in any reflected signal received in receive channel <b>41</b>.

Other combinations of switches <b>59</b>, <b>47</b>, and <b>66</b> may also be used, if desired to form other various tests in an analogous matter.

<figref idrefs="DRAWINGS">FIG. 6</figref> is a block diagram showing yet another method for self-testing line card <b>22</b> according to the teachings of the invention. The method begins at a step <b>140</b>. At a step <b>142</b>, switch <b>66</b> is opened. In this example, it is irrelevant whether a termination circuit is coupled to tip in ring <b>69</b>. At a step <b>143</b>, switches <b>59</b> and <b>47</b> are set to desired positions, such as the positions described below in connection with Table 1. At a step <b>144</b>, a transmit signal is transmitted through at least a portion of transmit channel toward combined channel <b>43</b>. At a step <b>146</b>, any resulting signal is detected in receive channel <b>41</b>. The method concludes at step <b>140</b>.

This method allows the testing of various components of line card <b>22</b> without the use of an expensive spectrum analyzer. In a manner analogous to the method described in conjunction with <figref idrefs="DRAWINGS">FIG. 5</figref>, any signal detected at <b>146</b> may detected by DSP <b>32</b> of line card <b>22</b>. Examples of various settings of switches <b>59</b> and <b>47</b> and the resulting expected signals are described below in conjunction with Table 1.

Referring to “Case 1” of Table 1, the following switch positions are used: Switch <b>59</b> is switched to node <b>54</b>, indicating a normal operating condition in which a transmit signal is sent through filter <b>48</b>; switch <b>47</b> is set to a node <b>56</b>, indicating a test position in which filters <b>50</b> and <b>52</b> are bypassed; and switch <b>66</b> is set to open. Assuming all components are operating properly, a transmitted signal transmitted through transmit channel flows through filter <b>48</b>, amplifier <b>56</b>, hybrid <b>60</b>, transformer <b>64</b>, and is then reflected by the open switch and the reflected signal flows back through transformer <b>64</b> and hybrid <b>60</b> toward receive channel <b>41</b>, progressing through amplifier <b>58</b>, through node <b>56</b> to analog-to-digital converter <b>40</b> and eventual receipt and detection by DSP <b>32</b>. DSP <b>32</b> can compare the received signal to the expected signal. The expected signal is simply the shape of filter <b>48</b>. Such a test allows testing of filter <b>48</b>.

With respect to “Case 3” switch <b>59</b> is placed to node <b>46</b>, indicating a test condition and bypassing filter <b>48</b>; switch <b>47</b> is set to either node <b>53</b> or <b>55</b>, indicating that a receive signal will go through one of filters <b>50</b> and <b>52</b>; and switch <b>66</b> is set to an open position. Assuming all components are operating properly, a transmitted signal transmitted through transmit channel <b>39</b> flows through test node <b>46</b>, bypassing filter <b>48</b>, through amplifier <b>56</b>, through hybrid <b>60</b> toward transformer <b>64</b>, through transformer <b>64</b> and is then reflected by an open switch <b>66</b> through hybrid <b>60</b> toward amplifier <b>58</b> and receive channel <b>41</b> and through either filter <b>50</b> or <b>52</b>, depending on the selection of switch <b>47</b>, for eventual reception by analog-to-digital converter <b>40</b> and detection by digital signal processor <b>32</b>. Such a test allows testing of either filter <b>50</b> or <b>52</b> because DSP <b>32</b> can determine if the signal it received as a result of the test is a signal expected.

With respect to “Case 4” switch <b>59</b> is coupled to node <b>46</b>, indicting bypassing of filter <b>48</b>; switch <b>47</b> is coupled to node <b>56</b> indicating bypassing of filters <b>50</b> and <b>52</b>; and switch <b>66</b> is set to open. Assuming all components are operating properly, a signal transmitted through transmit channel <b>39</b> flows through node <b>46</b>, through amplifier <b>56</b>, through hybrid <b>60</b>, through transformer <b>64</b> and is reflected by open switch <b>66</b> back through transformer <b>64</b>, back through hybrid <b>60</b> toward amplifier <b>58</b>, and through node <b>56</b> for receipt by analog-to-digital converter <b>40</b> and DSP <b>32</b>. The expected signal at DSP <b>32</b> should be simply the transmitted signal transmitted through transmit channel <b>39</b>. If a signal other than the transmitted channel is received or if no reflected signal is received, this indicates a malfunction of amplifier <b>56</b>, amplifier <b>58</b>, or hybrid <b>30</b>. If the received signal shows distortion, this indicates a malfunction in either amplifier <b>56</b>, amplifier <b>58</b>, or transformer <b>64</b>.

Other combinations of switches <b>59</b>, <b>47</b>, and <b>66</b> may be utilized to perform other self-tests if desired, and the above cases were provided for example purposes only.

Additionally, and in some embodiments, filtering, such as filtering performed by filters <b>48</b>, <b>50</b>, and <b>52</b> is performed within DSP <b>32</b> rather than as a part of discrete analog front end <b>28</b>. In such a case, such filters could also be tested in an analogous manner, with appropriate switching performed within DSP <b>32</b>. In such a context or other analogous context, transmit channel <b>39</b> and receive channel <b>41</b> include the corresponding channels within DSP receiving or transmitting such signals.

Thus, an embodiment of an invention that allows self-testing without the use of expensive equipment of portions of a line card has been provided. By reducing the need for expensive test equipment, not only is cost saved but time associated with connecting the test equipment to each individual line card is saved.

Although the present invention has been described with several example embodiments, various changes and modifications may be suggested to one skilled in the art. It is intended that the present invention encompass those changes and modifications as they fall within the scope of the claims.