Semiconductor power converter apparatus
Summary by NHIP
Parallel IGBT Converter
The apparatus connects a temperature-sensing IGBT and a current-sensing IGBT in parallel within a power conversion circuit. It limits output current if a sensor detects a value equal to or lower than a predetermined set value during protection circuit operation.
Claim Score by NHIP
Abstract
Even when one of IGBTs fails in a semiconductor power converter apparatus in which a plurality of semiconductor elements are connected in parallel, the remaining IGBT(s) is prevented from failing with a simple circuit configuration. The semiconductor power converter apparatus includes: a semiconductor power conversion circuit in which a first IGBT having a temperature sensing unit and a second IGBT having a current sensing unit are connected in parallel, for causing the first and second semiconductor elements to perform switching operations; an overheat protection circuit for performing overheat protection for the first and second IGBTs based on temperature information obtained from the temperature sensing unit of the first IGBT; and an overcurrent protection circuit for performing overcurrent protection for the first and second IGBTs based on current information obtained from the current sensing unit of the second IGBT.

Term
Projected expiry 5 December 2026.
- Priority
- Filed
- Granted
- Today
- Projected expiry
5 claims: 1 independent, 4 dependent
- 1Broadest claimClaim Score 39, average(NHIP)A semiconductor power converter apparatus comprising:a semiconductor power conversion circuit in which a first semiconductor element having a temperature sensing unit and a second semiconductor element having a current sensing unit are connected in parallel, for causing the first and second semiconductor elements to perform switching operations;an overheat protection circuit for performing overheating protection for the first and second semiconductor elements based on temperature information obtained from the temperature sensing unit of the first semiconductor element;an overcurrent protection circuit for performing overcurrent protection for the first and second semiconductor elements based on current information obtained from the current sensing unit of the second semiconductor element;a current sensor for sensing an output current of the semiconductor power conversion circuit, and means for determining that one of the first and second semiconductor elements fails to limit the output current of the semiconductor power conversion circuit if a detected value of the current sensor is equal to or lower than a predetermined set value, during operation of the overcurrent protection circuit or the overheat protection circuit.
54 paragraphs in 4 sections, as filed
BACKGROUND OF THE INVENTION
00011. Field of the Invention
0002This invention relates to a semiconductor power converter apparatus in which a plurality of semiconductor elements are connected in parallel.
00032. Description of Related Art
0004In a semiconductor power converter apparatus using power semiconductor elements, such as represented by IGBTs (Insulated Gate Bipolar Transistors), the IGBTs are caused to perform switching operations and the proportions of the current passing therethrough are controlled, to adjust the electric power flow. Passage of an overcurrent through such a semiconductor power converter apparatus elevates the temperature of the IGBTs, which may result in destruction of the semiconductor power converter apparatus. A variety of protection circuits for preventing the IGBTs from the destruction have been proposed which detects the temperature of the IGBTs with a temperature sensing unit to stop the operation of the IGBTs or to limit the passing current through the IGBTs before the IGBTs result in destruction.
0005For example, JP-B-3194353 describes a method for protecting IGBTs against overheating in the case where two chips of IGBTs are provided in parallel, each of the IGBTs having a diode for detecting temperatures thereon. The diodes are connected in parallel, and the forward voltage of the diodes is monitored while passing a constant current through the diodes from a single current source. Here, because the forward voltage of diodes shows such a profile that it decreases linearly with respect to the temperature, the temperature detection device is able to find that the detected temperature has reached a desired temperature through monitoring the forward voltage.
0006In addition, according to JP-A-2004-80865, a plurality of temperature sensing diodes connected in series are categorized into at least two separate groups, and a current is supplied from a constant current circuit to the temperature sensing diodes connected in series. A difference in the series voltage drop between the respective groups is obtained with a differential circuit. If the difference voltage exceeds a predetermined voltage, it is determined that one of the IGBTs is in an abnormal condition, so a signal indicating that is issued. Thereby, even when a temperature rise occurs in one among the plurality of the semiconductor elements, the temperature of the semiconductor elements can be detected accurately.
0007In the conventional example disclosed in JP-B-3194353, a problem has been that, since a plurality of temperature sensing diodes are connected in parallel, a variation in the characteristics of the temperature sensing diodes causes an imbalance in the currents flowing through the temperature sensing diodes, degrading the accuracy of the IGBTs' temperatures detected. Another problem has been as follows. In the case where all the IGBTs operate properly, an accurate temperature can be detected to some extent. However, in the case where any one of the IGBTs undergoes an open destruction, the temperature of the IGBT that has undergone the open destruction becomes extremely lower than those of the other IGBTs and accordingly, the detected value of the temperature of the IGBTs becomes lower than the actual temperature. This may lead to destruction of the other IGBTs, like a chain reaction. Moreover, although only one current source is necessary, all the temperature sensing diodes require passage of current therethrough. This complicates the wiring structure, leading to the problems of cost increases and degradation in noise resistance performance.
0008In addition, the conventional example disclosed in JP-A-2004-80865 performs abnormality determination for IGBTs by making use of the fact that a temperature difference occurs between a normal IGBT and an abnormal IGBT and a forward voltage difference arises between the temperature sensing diodes in each group. Nevertheless, since the temperature sensing diodes in each group are connected in series, a difference arises between the forward voltages of the temperature sensing diodes in each group even when they are at the same temperature, because of variations in the characteristics of the temperature sensing diodes. Therefore, the threshold voltage for determining an abnormality in the IGBTs cannot be set to a very low voltage. For this reason, it is necessary to cause a temperature difference between a normal IGBT and an abnormal IGBT to perform the abnormality determination for IGBTs, and this temperature difference may cause the IGBTs to undergo thermal destruction. Moreover, this conventional example requires two current sources, and furthermore, all the temperature sensing diodes require passage of current therethrough. This complicates the wiring structure, leading to the problems of cost increases and degradation in noise resistance performance.
SUMMARY OF THE INVENTION
0009This invention has been accomplished to resolve the foregoing problems, and it is an object of the invention to prevent the remaining semiconductor element(s) from failure with a simple circuit configuration, even when any one of the semiconductor elements fails in a semiconductor power converter apparatus wherein a plurality of semiconductor elements are connected in parallel.
0010This invention provides a semiconductor power converter apparatus comprising: a semiconductor power conversion circuit in which a first semiconductor element having a temperature sensing unit and a second semiconductor element having a current sensing unit are connected in parallel, for causing the first and second semiconductor elements to perform switching operations; an overheat protection circuit for performing overheating protection for the first and second semiconductor elements based on temperature information obtained from the temperature sensing unit of the first semiconductor element; and an overcurrent protection circuit for performing overcurrent protection for the first and second semiconductor elements based on current information obtained from the current sensing unit of the second semiconductor element.
0011According to the invention, even when one of the semiconductor elements fails in a semiconductor power converter apparatus in which a plurality of semiconductor elements are connected in parallel, the other semiconductor elements can be prevented from destruction, and a highly reliable semiconductor power converter apparatus can be obtained.
BRIEF DESCRIPTION OF THE DRAWINGS
0012<figref idref="DRAWINGS">FIG. 1</figref> is a circuit diagram showing a semiconductor power converter apparatus according to Embodiment 1 of the invention;
0013<figref idref="DRAWINGS">FIG. 2</figref> is a graph for illustrating a protection operation of Embodiment 1;
0014<figref idref="DRAWINGS">FIG. 3</figref> is a circuit diagram of a semiconductor power converter apparatus according to Embodiment 2;
0015<figref idref="DRAWINGS">FIG. 4</figref> is a configuration diagram of the CPU in Embodiment 2;
0016<figref idref="DRAWINGS">FIG. 5</figref> is a flowchart for illustrating the current limiting function of the CPU according to Embodiment 2;
0017<figref idref="DRAWINGS">FIG. 6</figref> is a circuit diagram of a three phase inverter device according to Embodiment 3; and
0018<figref idref="DRAWINGS">FIG. 7</figref> is a layout diagram of IGBTs that form a bridge arm of the three phase inverter device according to Embodiment 3.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Embodiment 1
0019<figref idref="DRAWINGS">FIG. 1</figref> is a circuit diagram of a semiconductor power converter apparatus according to Embodiment 1 of the invention. Here, an IGBT module in which two IGBTs are connected in parallel is shown as a semiconductor power conversion circuit <b>10</b>, which is provided with a collector terminal C, an emitter terminal E, and a gate signal terminal G as its external terminals. An IGBT <b>1</b> has a temperature sensing diode <b>3</b> for detecting the temperature of the IGBT <b>1</b>, and an IGBT <b>2</b> has a current sensing cell <b>4</b> for detecting the current of the IGBT <b>2</b>. These IGBTs <b>1</b> and <b>2</b> are mounted on a same heatsink (not shown).
0020An overheat protection circuit <b>5</b> includes a constant current source <b>5</b><i>a </i>for causing the temperature sensing diode <b>3</b> to generate a forward voltage, an overheat determining comparator circuit <b>5</b><i>b </i>for comparing the forward voltage of the temperature sensing diode <b>3</b> with a predetermined reference voltage value, a logic inverter circuit <b>5</b><i>c </i>for turning off the IGBT <b>1</b> and the IGBT <b>2</b> if the IGBT <b>1</b> is determined to be in an overheated condition, and a buffer <b>5</b><i>d </i>for reporting the overheated condition to an upper level CPU <b>7</b>.
0021An overcurrent protection circuit <b>6</b> includes a sensing resistor <b>6</b><i>a </i>for converting the current value flowing through the current sensing cell <b>4</b> into a voltage value, an overcurrent determining comparator circuit <b>6</b><i>b </i>for comparing the voltage value generated by the sensing resistor <b>6</b><i>a </i>with a predetermined reference voltage value, a logic inverter circuit <b>6</b><i>c </i>for turning off the IGBT <b>1</b> and the IGBT <b>2</b> if the IGBT <b>2</b> is determined to be in an overcurrent condition, and a buffer <b>6</b><i>d </i>for reporting the overcurrent condition to the upper level CPU <b>7</b>.
0022The IGBT <b>1</b> and the IGBT <b>2</b> connected in parallel are driven by a common gate signal G through a buffer circuit <b>8</b>, but if the overheat protection circuit <b>5</b> or the overcurrent protection circuit <b>6</b> has been operated, the IGBT <b>1</b> and the IGBT <b>2</b> are turned off by an AND circuit <b>9</b>.
0023Next, basic operations of the overheat protection and the overcurrent protection are discussed.
0024The temperature sensing diode <b>3</b> has a negative temperature dependency; that is, as the temperature becomes higher, its forward voltage becomes lower. The temperature sensing diode <b>3</b> can detect the temperature of the IGBT <b>1</b> by making use of this property. The overheat determining comparator circuit <b>5</b><i>b </i>compares the temperature of the IGBT <b>1</b> with a predetermined reference temperature, and if the IGBT <b>1</b> is in an overheated condition, it turns off the IGBT <b>1</b> and the IGBT <b>2</b> through the logic inverter circuit <b>5</b><i>c </i>and the AND circuit <b>9</b>, and at the same time, it reports to the upper level CPU <b>7</b> that the IGBT <b>1</b> is in an overheated condition. Since the temperature sensing diode <b>3</b> and the overheat determining comparator circuit <b>5</b><i>b </i>correspond to each other one to one, the overheat determining comparator circuit <b>5</b><i>b </i>can be adjusted to such a condition that the variation in the characteristics of the temperature sensing diode <b>3</b> is taken into consideration, so that the overheat determination temperature can be made more accurate. Because a current that is proportional to the current flowing through the IGBT <b>2</b> (usually one several thousandths to one several ten-thousandths) flows through the current sensing cell <b>4</b>, the current flowing through the IGBT <b>2</b> can be detected by monitoring the voltage of the sensing resistor <b>6</b><i>a. </i>
0025The overcurrent determining comparator circuit <b>6</b><i>b </i>compares the current flowing through the IGBT <b>2</b> with a predetermined reference current value, and if it is determined that the IGBT <b>2</b> is in an overcurrent condition, the overcurrent determining comparator circuit <b>6</b><i>b </i>causes the IGBT <b>1</b> and the IGBT <b>2</b> to be turned off through the logic inverter circuit <b>6</b><i>c </i>and the AND circuit <b>9</b> and reports to the upper level CPU <b>7</b> that the IGBT <b>2</b> is in an overcurrent condition.
0026Thus, providing the overheat protection circuit <b>5</b> and the overcurrent protection circuit <b>6</b> can prevent the IGBTs from the overheat destruction and the overcurrent destruction and makes it possible to realize a highly reliable semiconductor power converter apparatus.
0027Next, an operation in the case where either one of the IGBTs has failed will be discussed.
0028When the IGBT <b>1</b> undergoes an open failure, the current value flowing through the IGBT <b>2</b> becomes two times greater, and accordingly, the temperature increase of the IGBT <b>2</b> becomes about two times greater. Consequently, it is feared that the IGBT <b>2</b>, which is not provided with the temperature sensing diode <b>3</b>, also undergoes a thermal destruction and ceases the function of the power converter circuit. Nevertheless, in this embodiment, the IGBT <b>2</b> is provided with the current sensing cell, so it is possible to prevent the overheat destruction of the IGBT <b>2</b> by turning off the IGBT <b>2</b> with the overcurrent protection circuit <b>6</b> before such an overcurrent as to cause the thermal destruction of the IGBT <b>2</b> flows therethrough.
0029Especially, it is possible to prevent the overheat destruction of the IGBT <b>2</b> more reliably when the threshold value of the current at which the overcurrent protection circuit <b>6</b> operates is set to be equal to or lower than the current value at which the overheat protection circuit <b>5</b> operates. This will be explained with reference to <figref idref="DRAWINGS">FIG. 2</figref>.
0030I_limit<b>1</b> denotes the overcurrent protection operation level during a normal operation, I_limit<b>2</b> denotes the level of the current value at which the overheat protection operates in the normal condition, and I_limit<b>3</b> denotes the overcurrent protection level when the IGBT <b>1</b> has undergone an open failure. In the present embodiment, I_limit<b>1</b> is set to be equal to or lower than I_limit<b>2</b>. When the IGBT <b>1</b> undergoes an open failure, the current value flowing through the IGBT <b>2</b> and the current value flowing through the current sensing cell become two times greater. Therefore, the overcurrent protection operation level I_limit<b>3</b> results in about one half of that in the normal condition. This makes it possible to effect the overcurrent protection of the IGBT <b>2</b> reliably before the IGBT <b>2</b> reaches the overheat protection operation level T_limit as the output current increases.
0031As a result, a normal operation using the IGBT <b>2</b> only is performed when the output current is equal to or lower than I_limit<b>3</b>, while an overcurrent protection for the IGBT <b>2</b> operates when the output current is higher than I_limit<b>3</b>. The overheat destruction prevention for the IGBT <b>2</b> is possible in this way, and it becomes possible to realize a semiconductor power converter apparatus with high reliability and high redundancy.
0032Thus, according to Embodiment 1, the semiconductor power converter apparatus comprises the semiconductor power conversion circuit <b>10</b> in which the first IGBT <b>1</b> having the temperature sensing unit <b>3</b> and the second IGBT <b>2</b> having the current sensing unit <b>4</b> are connected in parallel, for causing the first and second semiconductor elements <b>1</b> and <b>2</b> to perform switching operations, the overheat protection circuit <b>5</b> for performing the overheat protection for the first and second IGBTs <b>1</b> and <b>2</b> based on temperature information obtained from the temperature sensing unit <b>3</b> of the first IGBT <b>1</b>, and the overcurrent protection circuit <b>6</b> for performing the overcurrent protection for the first and second IGBTs <b>1</b> and <b>2</b> based on current information obtained from the current sensing unit <b>4</b> of the second IGBT <b>2</b>. Thus, even when one of the IGBTs fails, it is possible to prevent the other of the IGBTs from destruction, and consequently, it is possible to realize a highly reliable semiconductor power converter apparatus.
0033In addition, even when one of the IGBTs fails, the other of the IGBTs can be prevented from overheat destruction reliably by setting the current threshold value at which the overcurrent protection circuit <b>6</b> operates to be equal to or lower than the current value at which the overheat protection circuit <b>5</b> operates, which makes it possible to realize a more reliable semiconductor power converter apparatus.
0034It should be noted that although the current sensing cell <b>4</b> is not provided for the IGBT <b>1</b> and the temperature sensing diode <b>3</b> is not provided for the IGBT <b>2</b>, the same effect can of course be attained by providing the temperature sensing diode <b>3</b> and the current sensing cell <b>4</b> for both of the IGBT <b>1</b> and the IGBT <b>2</b> and masking either one of the functions thereof.
Embodiment 2
0035<figref idref="DRAWINGS">FIG. 3</figref> is a circuit diagram of a semiconductor power converter apparatus according to Embodiment 2 of the invention, which attains a semiconductor power converter apparatus with higher reliability and higher redundancy by detecting the output current of the semiconductor power conversion circuit <b>10</b>.
0036Referring to <figref idref="DRAWINGS">FIG. 3</figref>, a current sensor <b>11</b> detects the output current of the semiconductor power conversion circuit <b>10</b>, which is the total current of the IGBT <b>1</b> and the IGBT <b>2</b>. The output of the current sensor <b>11</b> is input into a CPU <b>7</b>. When the overcurrent protection circuit <b>5</b> or the overheat protection circuit <b>6</b> operates, the CPU <b>7</b> compares the detected value by the current sensor <b>11</b> with a predetermined set value during the protection operation.
0037At this time, if both the IGBTs are in a normal condition, the output value from the current sensor shows a greater value than I_limit<b>1</b>, while if either of the IGBTs undergoes an open failure, the output value shows a value about equal to I_limit<b>3</b>. Therefore, it can be determined that both the IGBT <b>1</b> and the IGBT <b>2</b> are in a normal condition when the output of the current sensor is greater than the set value during the protection operation, while either one of the IGBTs is faulty when the output of the current sensor is less than the set value.
0038If it is determined that either one of the IGBTs is faulty, the output current of the semiconductor power conversion circuit <b>10</b> is controlled to be equal to or less than one half by the current limiting function of the CPU <b>7</b> to prevent the other one of the IGBT from being destructed. Thus, it becomes possible to realize a semiconductor power converter apparatus with high reliability and high redundancy.
0039If the IGBT <b>2</b> undergoes an open failure, the current value flowing through the IGBT <b>1</b> becomes two times greater, and accordingly the increase of the temperature of the IGBT <b>1</b> becomes two times greater; however, because the temperature detection is performed for the IGBT <b>1</b> by the temperature sensing diode <b>4</b>, the overheat destruction of the IGBT <b>1</b> can be prevented.
0040Here, the current limiting function of the CPU <b>7</b> in the case where an IGBT fails will be explained with reference to <figref idref="DRAWINGS">FIGS. 4 and 5</figref>.
0041As illustrated in <figref idref="DRAWINGS">FIG. 4</figref>, the CPU <b>7</b> has a controller <b>72</b> for comparing an actual current value I with a current command I* and generating a control signal such that both values will become equal, and a current limiter <b>71</b> for controlling the semiconductor power conversion circuit <b>10</b> so as not to exceed the permissible current. As illustrated in <figref idref="DRAWINGS">FIG. 5</figref>, the maximum current Imax is I<sub>0 </sub>while the IGBT is being operated properly, but when it is determined that either one of the IGBTs is faulty, the maximum current is changed into I<sub>1</sub>, and a semi-failure signal is transmitted to an upper level controller. Here, the I<sub>1 </sub>is set to a value equal to or less than one half of I<sub>0</sub>. If it is determined that all the IGBTs are faulty, the maximum current is set to 0, the operation of the power converter circuit <b>10</b> is halted, and a failure signal is transmitted to the upper level controller.
0042It should be noted that although one CPU is illustrated to serve the control signal generating function and the current limiting function collectively herein, a plurality of CPUs may share the functions.
0043Thus, according to Embodiment 2, the semiconductor power converter apparatus is provided with the current sensor <b>11</b> for detecting the output current of the semiconductor power conversion circuit <b>10</b> in which a plurality of IGBTs connected in parallel, and a current limiting unit for limiting the output current if the detected value by the current sensor <b>11</b> is equal to or less than a desired set value when the overcurrent protection circuit <b>6</b> or the overheat protection circuit <b>5</b> operates. Thereby, failure information of an IGBT can be kept track of, and a semiconductor power converter apparatus with higher reliability and higher redundancy can be realized.
Embodiment 3
0044<figref idref="DRAWINGS">FIGS. 6 and 7</figref> are a circuit diagram of a three phase inverter device according to Embodiment 3 of the invention and a layout diagram of IGBTs that form inverter bridges, respectively.
0045Referring to <figref idref="DRAWINGS">FIG. 6</figref>, a three phase inverter circuit <b>12</b> comprises three sets of IGBT modules <b>1</b><i>a</i>, <b>1</b><i>b</i>, and <b>1</b><i>c </i>each including two IGBTs each having a temperature sensing diode <b>3</b>, and three sets of IGBT modules <b>2</b><i>a</i>, <b>2</b><i>b</i>, and <b>2</b><i>c </i>each including two IGBTs each having a current sensing cell <b>4</b>, and it converts DC power supplied from a battery <b>13</b> into AC power.
0046Each of the bridge arms of the three phase inverter circuit <b>12</b> is formed by connecting the IGBTs of the IGBT modules <b>1</b><i>a</i>, <b>1</b><i>b</i>, and <b>1</b><i>c </i>with the IGBTs of the IGBT modules <b>2</b><i>a</i>, <b>2</b><i>b</i>, and <b>2</b><i>c </i>in parallel one by one, and each of the IGBTs connected in parallel is provided with an overheat protection circuit <b>5</b> and an overcurrent protection circuit <b>6</b>, as illustrated in Embodiment 1.
0047Furthermore, as illustrated in <figref idref="DRAWINGS">FIG. 7</figref>, the IGBT modules <b>1</b><i>a</i>, <b>1</b><i>b</i>, <b>1</b><i>c </i>and the IGBT modules <b>2</b><i>a</i>, <b>2</b><i>b</i>, <b>2</b><i>c </i>are arranged in a same heatsink <b>14</b> in a checkerboard pattern so as to alternate with each other.
0048The main cause of overheat destruction of the IGBTs is the passage of overcurrent through the IGBTs, but when there is a variation in the cooling performance, overheat destruction of the IGBTs may also occur. For this reason, for a semiconductor power converter apparatus that does not perform temperature detection for all the IGBTs, it is important to suppress the variation in cooling performance among the IGBTs.
0049This embodiment makes it possible to suppress a variation in cooling performance among the IGBT modules by providing all the IGBT modules that constitute the three phase inverter circuit <b>12</b> on the same heatsink <b>14</b> and actively effecting thermal coupling between the IGBT modules.
0050Moreover, the IGBT modules <b>1</b><i>a</i>, <b>1</b><i>b</i>, and <b>1</b><i>c </i>each having the temperature sensing diode <b>3</b> and the IGBT modules <b>2</b><i>a</i>, <b>2</b><i>b</i>, and <b>2</b><i>c </i>each having the current sensing cell <b>4</b> are arranged in the heatsink <b>14</b> in a checkerboard pattern so as to alternate with each other, whereby the variation in cooling performance can also be suppressed.
0051Thus, according to this embodiment, each of the bridge arms of the three phase inverter circuit <b>12</b> is formed by connecting the IGBTs of the IGBT modules <b>1</b><i>a</i>, <b>1</b><i>b</i>, and <b>1</b><i>c </i>each having the temperature sensing diode <b>3</b> with those of the IGBT modules <b>2</b><i>a</i>, <b>2</b><i>b</i>, and <b>2</b><i>c </i>each having the current sensing cell <b>4</b> in parallel one by one, and then by arranging all the IGBT modules in the same heatsink <b>14</b> in a checkerboard pattern, a variation in cooling performance can be suppressed, and a highly reliable three phase inverter device can be realized.
Contents4
9 sheets
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Every citation, both ways
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|---|---|---|---|
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| US2016049896A1 | Cited by | United States of America | Pre-grant |
| US2017187288A1 | Cited by | United States of America | Pre-grant |
| US9647604B2 | Cited by | United States of America | Search report |
| US10122273B2 | Cited by | United States of America | Search report |
| US2013154605A1 | Cited by | United States of America | Pre-grant |
| JP2000209776A | Cites | Japan | Applicant |
| US2002195286A1 | Cites | United States of America | Applicant |
| JP2002222920A | Cites | Japan | Applicant |
| JP2003009546A | Cites | Japan | Applicant |
| US2004024937A1 | Cites | United States of America | Search report |
| JP2004080865A | Cites | Japan | Applicant |
| US5187653A | Cites | United States of America | Search report |
| US5986902A | Cites | United States of America | Search report |
| US6215634B1 | Cites | United States of America | Applicant |
| US6268990B1 | Cites | United States of America | Search report |
| US6952355B2 | Cites | United States of America | Search report |
| US6972972B2 | Cites | United States of America | Search report |
| JPH1038964A | Cites | Japan | Applicant |
| JPH11299221A | Cites | Japan | Applicant |
| US20020195286A1 | Cites | United States of America | Third party observation |
| US20040024937A1 | Cites | United States of America | Search report |
| JP1038964A | Cites | Japan | Third party observation |
| JP2000209776 | Cites | Japan | Third party observation |
| JP11299221 | Cites | Japan | Third party observation |
| JP2002222920 | Cites | Japan | Third party observation |
| JP2003009546 | Cites | Japan | Third party observation |
| JP200480865A | Cites | Japan | Third party observation |
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| Document | Office | Kind | Date |
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| 2006159665 | Japan | A |
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| Document | Office | Kind | |
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| US2007284664A1 | United States of America | A1 | |
| JP2007330043A | Japan | A | |
| JP4177392B2 | Japan | B2 | |
| US7675763B2This record | United States of America | B2 |
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| Advisory Action (PTOL-303)CTAV | CTAV | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Final ActionA.NE | A.NE | |
| Mail Final Rejection (PTOL - 326)Final rejectionMCTFR | MCTFR | |
| Final RejectionFinal rejectionCTFR | CTFR | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Non-Final ActionA... | A... | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Reference capture on IDSRCAP | RCAP | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Response after Non-Final ActionA... | A... | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| PG-Pub Issue NotificationPG-ISSUE | PG-ISSUE | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| IFW TSS Processing by Tech Center CompleteTSSCOMP | TSSCOMP | |
| Application Return from OIPEWROIPE | WROIPE | |
| Application Return TO OIPEROIPE | ROIPE | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Application Is Now CompleteCOMP | COMP | |
| Cleared by OIPE CSRL194 | L194 | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Request for Foreign Priority (Priority Papers May Be Included)RQPR | RQPR | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Initial Exam Team nnIEXX | IEXX |
10 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Lapsed due to failure to pay maintenance feeLapsedFP | FP | |
| Lapse for failure to pay maintenance feesLapsedPATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYLAPS | LAPS | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Fee payment procedureMAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| Maintenance fee paymentMAFP | MAFP | |
| Fee paymentFPAY | FPAY | |
| Information on status: patent grantGrantedPATENTED CASESTCF | STCF | |
| Fee payment procedurePAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| AssignmentAS | AS | |
| AssignmentAS | AS |
Numbers
- Publication
- 7675763
- Application
- 11633467
Titles
- English
- Semiconductor power converter apparatus
Patent term adjustment
- A delay
- +25 daysthe office missed an examination deadline
- Applicant delay
- −25 days
- Net adjustment
- 0 days
Classification
- CPC, 8
- H02M7/538
- H02M1/32
- H03K17/0828
- H03K17/127
- H03K17/18
- H03K2017/0806
- H10W40/00
- H10W90/00
- IPC, 4
- H02M5 42
- H02M7 04
- H02M7 68
- H10W42 80