Multilayer capacitor

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the priority of Korean Patent Application No. 2007-98300 filed on Sep. 28, 2007 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a multilayer capacitor, and more particularly, to a decoupling multilayer capacitor in which a user can adjust equivalent series resistance (ESR) directly.

2. Description of the Related Art

In general, a multilayer chip capacitor (MLCC) has a structure such that inner electrodes of different polarities are laminated alternately while interposing a corresponding one of a plurality of dielectric layers. This multilayer chip capacitor can be miniaturized, performing with high capacity and mounted easily, and thus broadly used as parts of various electronic devices.

Notably, a power supply for a central processing unit (CPU) in a computer experiences voltage noise due to rapid change in a load current when supplying a low voltage. Accordingly, the multilayer chip capacitor is widely utilized in the power supply as a decoupling capacitor for suppressing such voltage noise.

The decoupling multilayer chip capacitor is required to have a lower equivalent series inductance (ESL) value with an increase in an operating frequency, and studies for reducing ESL have been vigorously conducted.

Also, in order to supply the power more stably, the decoupling multilayer capacitor should have adjustable ESR characteristics. The multilayer capacitor having ESR lower than a required level increases an impedance peak at a parallel resonant frequency due to the ESL of the capacitor and the plane capacitance of a micro-processor package while extremely lowering impedance at a serial resonant frequency.

Therefore, the decoupling multilayer capacitor may be configured to easily adjust ESR characteristics thereof so that a user can achieve flat impedance characteristics of a power distribution network.

As a method for adjusting ESR, a material with high electrical resistance may be utilized as outer and inner electrodes. Such a change in material advantageously ensures high ESR characteristics, while enabling ESL to be maintained at a low level as in the prior art.

However, the high resistant material, when used for outer electrodes, results in a localized heat spot due to current concentration caused by pin holes. Moreover, the high resistant material, when utilized for inner electrodes, needs to keep changing to match with a ceramic material, which is employed to allow for higher capacity.

As another method for improving ESR, U.S. Pat. No. 6,765,781 whose assignee is TDK, discloses a method of connecting inner electrodes in series to each other through a linkage electrode by disposing the linkage electrode outside the capacitor body.

Yet, this conventional method disadvantageously requires a manufacturer of the capacitor to adjust ESR. That is, the capacitor is designed or manufactured by improving an electrode structure so as to possess desired predetermined ESR according to the user's needs and application conditions. This problem also arises in the method involving a change in materials described above.

Therefore, in the conventional methods for adjusting ESR, the capacitor manufacturer needs to manufacture individual products satisfying various ESR characteristics according to the user's needs and application conditions. Moreover, the capacitor user should inconveniently select an individual product considering necessary ESR conditions.

SUMMARY OF THE INVENTION

An aspect of the present invention provides a multilayer capacitor of a novel structure in which a user can directly adjust ESR characteristics required under the conditions of use.

According to an aspect of the present invention, there is provided a multilayer capacitor including: a capacitor body having a plurality of dielectric layers laminated therein; a plurality of first and second inner electrodes alternately arranged to have different polarities opposing each other, while interposing a corresponding one of the dielectric layers, respectively; an inner connecting conductor of at least one polarity disposed adjacent to a corresponding one of the inner electrodes having opposite polarity, while interposing a corresponding one of the dielectric layers; a plurality of first and second outer electrodes formed on a surface of the body, wherein the inner connecting conductor is connected to a corresponding one of the outer electrodes having identical polarity, a corresponding one of the inner electrodes having identical polarity to the inner connecting conductor includes a plurality of groups each including at least one of the inner electrodes, wherein the inner electrodes of the respective groups are connected to the electrodes having identical polarity that are different from one another for each of the groups and electrically connected to the inner connecting conductor through the connected outer electrode.

The inner connecting conductor may include an inner connecting conductor of both polarities, respectively. That is, the inner connecting conductor of the at lest one polarity may include at least one first and second inner connecting conductors.

Out of the first and second outer electrodes, the outer electrode of at least one polarity may be connected to a corresponding one of the inner connecting conductors having identical polarity and not connected to a corresponding one of the inner electrodes having identical polarity.

The first and second inner electrodes are connected to the outer electrodes of an identical number. Out of the first and second inner electrodes, the inner electrode of at least one polarity may be connected to a plurality of corresponding ones of the outer electrodes having identical polarity.

The inner electrode of at least one of the groups may be additionally connected to the outer electrode having the inner electrode of another one of the groups connected thereto.

To improve ESL characteristics, the first and second outer electrodes may be arranged to have different polarities adjacent to each other.

The first and second outer electrodes may be formed on opposing side surfaces of the body, respectively, and the outer electrodes formed on the opposing side surfaces of the body may include an identical number, respectively. The first and second outer electrodes may be arranged to have different polarities disposed on the opposing side surfaces, respectively to ensure better ESL characteristics.

The body may be of a rectangular parallelepiped structure including opposing first and second main surfaces and four side surfaces disposed therebetween, the first and second outer electrodes may be formed along the four side surfaces and the outer electrodes may be formed on the opposing side surfaces in an identical number, respectively. The first and second outer electrodes may be arranged to have different polarities disposed at corresponding positions on the opposing side surfaces, respectively.

The first and second inner connecting conductors may have an overlapping area corresponding to an overlapping area between the first and second inner electrodes. Here, the inner connecting conductors can serve as a capacitor element similar to the inner electrode.

The multilayer capacitor of the present invention can be beneficially applied to both a conventional structure where the dielectric layers are laminated in a thickness direction and a structure where the dielectric layers are laminated in a width or length direction of the body.

The capacitor body may include first and second surfaces formed in a laminated direction of the plurality of dielectric layers to oppose each other, and side surfaces disposed therebetween, wherein one of the first and second surfaces provides a mounting surface, two of the plurality of first and second outer electrodes are formed on both opposing ones of the side surfaces formed in the laminated direction, respectively and at least another one of the outer electrodes is formed on the first and second surfaces, respectively, the outer electrodes formed on the one of the first and second surfaces as the mounting surface include the first and second outer electrodes formed of at least one pair with the outer electrodes formed on the side surfaces.

The capacitor body may include first and second surfaces formed in a laminated direction of the plurality of dielectric layers to oppose each other, and side surfaces disposed therebetween, wherein one of the first and second surfaces provides a mounting surface, the plurality of first and second outer electrodes include three outer electrodes, respectively, and the outer electrodes of different polarities are formed on the first and second surfaces in an identical number, respectively.

According to another aspect of the present invention, there is provided a multilayer capacitor in which ESR can be adjusted by improving the connection structure of inner electrodes without an additional inner connecting conductor. This multilayer capacitor can be applied to a six or more terminal structure.

The multilayer capacitor includes: a capacitor body having a plurality of dielectric layers laminated therein; a plurality of first and second inner electrodes arranged alternately to have different polarities opposing each other, while interposing a corresponding one of the dielectric layers, respectively; and m number of first and second outer electrodes formed on a surface of the body, where m≧3 wherein the inner electrode of at least one polarity includes a plurality of groups each including at least one of the inner electrodes, and the inner electrode of each of the groups is connected to n number of the outer electrodes, respectively, where 2≦n<m, at least one of the outer electrodes connected to the inner electrode belonging to a respective one of the groups is different from the outer electrodes connected to the inner electrode belonging to another one of the groups, and the inner electrode of one of the groups is commonly connected to the outer electrodes connected to the inner electrode of another one of the groups such that the inner electrodes of all of the groups are electrically connected to one another.

This structural improvement can be achieved only in the inner electrode of predetermined polarity, but the first and second inner electrodes of both polarities can be improved in structure.

In the specification, the term “an outer electrode for adjusting ESR” refers to an outer electrode in which a series connection structure of inner electrodes connected thereto is changed according to the direct connection with a power line when mounted to thereby adjust ESR within a predetermined range.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

<figref idref="DRAWINGS">FIG. 1</figref> is a perspective view illustrating a multilayer capacitor according to a first embodiment of the invention;

<figref idref="DRAWINGS">FIG. 2</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 1</figref>;

<figref idref="DRAWINGS">FIG. 3</figref> is a plan view illustrating first and second inner electrodes applicable along with the first and second inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 2</figref>;

<figref idref="DRAWINGS">FIGS. 4A and 4B</figref> are perspective views illustrating an outer electrode of the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 1</figref> connected to a power line of a printed circuit board according to an exemplary embodiment of the invention;

<figref idref="DRAWINGS">FIG. 5</figref> is a perspective view illustrating a multilayer capacitor according to a second embodiment of the invention;

<figref idref="DRAWINGS">FIG. 6</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 5</figref>;

<figref idref="DRAWINGS">FIG. 7</figref> is a plan view illustrating first and second inner electrodes applicable along with the first and second inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 6</figref>;

<figref idref="DRAWINGS">FIG. 8</figref> is a perspective view illustrating a multilayer capacitor according to a third embodiment of the invention;

<figref idref="DRAWINGS">FIG. 9</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 8</figref>;

<figref idref="DRAWINGS">FIG. 9</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 8</figref>;

<figref idref="DRAWINGS">FIGS. 10A and 10B</figref> are plan views illustrating first and second inner electrodes applicable along with the inner connecting conductors of <figref idref="DRAWINGS">FIG. 9</figref> in the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 8</figref>;

<figref idref="DRAWINGS">FIG. 11</figref> illustrates first and second inner electrodes (without inner connecting conductor) applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 8</figref>;

<figref idref="DRAWINGS">FIG. 12</figref> illustrates first and second inner electrodes (without inner connecting conductor) applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 8</figref>;

<figref idref="DRAWINGS">FIG. 13</figref> is a perspective view illustrating a multilayer capacitor according to a fourth embodiment of the invention;

<figref idref="DRAWINGS">FIG. 14</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 13</figref>;

<figref idref="DRAWINGS">FIG. 15</figref> is a plan view illustrating various examples of first and second inner electrodes applicable to the first and second inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 13</figref>;

<figref idref="DRAWINGS">FIG. 16</figref> is a plan view illustrating first and second inner electrodes applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 11</figref> according to an exemplary embodiment of the invention;

<figref idref="DRAWINGS">FIG. 17</figref> is a plan view illustrating first and second inner electrodes applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 11</figref> according to an exemplary embodiment of the invention;

<figref idref="DRAWINGS">FIG. 18</figref> is a perspective view illustrating a multilayer capacitor according to a fifth embodiment of the invention;

<figref idref="DRAWINGS">FIG. 19</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 18</figref>;

<figref idref="DRAWINGS">FIG. 20</figref> is a plan view illustrating first and second inner electrodes applicable along with the first and second inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 19</figref>;

<figref idref="DRAWINGS">FIG. 21</figref> is a plan view illustrating first and second inner electrodes applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 18</figref> according to an exemplary embodiment of the invention;

<figref idref="DRAWINGS">FIG. 22</figref> is a plan view illustrating first and second inner electrodes applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 18</figref> according to an exemplary embodiment of the invention;

<figref idref="DRAWINGS">FIG. 23</figref> is a plan view illustrating first and second inner electrodes applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 18</figref> according to an exemplary embodiment of the invention;

<figref idref="DRAWINGS">FIG. 24</figref> s a plan view illustrating first and second inner electrodes applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 18</figref> according to an exemplary embodiment of the invention;

<figref idref="DRAWINGS">FIG. 25</figref> is a perspective view illustrating a multilayer capacitor according to a sixth embodiment of the invention, which is formed of a four terminal structure having a laminated direction varied;

<figref idref="DRAWINGS">FIG. 26</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 25</figref>;

<figref idref="DRAWINGS">FIG. 27</figref> is a plan view illustrating first and second inner electrodes applicable along with the first and second inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 26</figref>;

<figref idref="DRAWINGS">FIGS. 28A and 28B</figref> are perspective views illustrating a multilayer capacitor according to an exemplary embodiment of the invention, which is formed of a six-terminal structure having a laminated direction varied;

<figref idref="DRAWINGS">FIG. 29</figref> is a plan view illustrating first and second inner connecting conductors applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIGS. 28A and 28B</figref>, respectively; and

<figref idref="DRAWINGS">FIG. 30</figref> is a plan view illustrating first and second inner electrodes applicable along with the first and second inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 29</figref>.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

<figref idref="DRAWINGS">FIG. 1</figref> illustrates a four-terminal multilayer capacitor according to a first embodiment of the invention.

Referring to <figref idref="DRAWINGS">FIG. 1</figref>, the multilayer capacitor <b>10</b> of the present embodiment includes a capacitor body <b>11</b> having a plurality of dielectric layers <b>11</b>′ laminated therein.

The multilayer capacitor <b>10</b> includes two first outer electrodes <b>18</b><i>a </i>and <b>18</b><i>b </i>and two second outer electrodes <b>19</b><i>a </i>and <b>19</b><i>b </i>formed on both opposing side surfaces to be electrically insulated from each other.

The first and second outer electrodes <b>18</b><i>a </i>and <b>18</b><i>b</i>; <b>19</b><i>a </i>and <b>19</b><i>b </i>may be arranged such that adjacent ones of the outer electrodes have opposite polarities to each other to reduce equivalent series inductance (ESL). In the present embodiment, the outer electrodes of different polarities are disposed at corresponding positions on the both opposing side surfaces. Accordingly, this allows for a reduction in ESL.

As shown in <figref idref="DRAWINGS">FIGS. 2 and 3</figref>, the multilayer capacitor <b>10</b> may include first and second inner connecting conductors <b>12</b> and <b>13</b> and first and second inner electrodes <b>14</b><i>a </i>and <b>14</b><i>b</i>; <b>15</b><i>a </i>and <b>15</b><i>b</i>, and a corresponding one of the inner connecting conductors <b>12</b> and <b>13</b> and the inner electrodes <b>14</b><i>a</i>, <b>14</b><i>b</i>, <b>15</b><i>a </i>and <b>15</b><i>b </i>is formed on each of the dielectric layers <b>11</b>′.

The plurality of first and second inner electrodes <b>14</b><i>a</i>, <b>15</b><i>a</i>, <b>14</b><i>b </i>and <b>15</b><i>b </i>and the first and second inner connecting conductors <b>12</b> and <b>13</b> are arranged such that corresponding ones of the inner electrodes <b>14</b><i>a</i>, <b>15</b><i>a</i>, <b>14</b><i>b </i>and <b>15</b><i>b </i>and the inner connecting conductors <b>12</b> and <b>13</b> having different polarities alternate with each other.

<figref idref="DRAWINGS">FIG. 2</figref> illustrates one pair of first and second inner connecting conductor <b>12</b> and <b>13</b> but the inner connecting conductor of at least one polarity may be formed of a plurality pairs.

In a similar manner, <figref idref="DRAWINGS">FIG. 3</figref> illustrates one pair of first and second inner electrodes of different polarities <b>14</b><i>a</i><b>15</b><i>a</i>, <b>14</b><i>b</i>, and <b>15</b><i>b</i>, respectively. However, in actual applications, the inner electrode in a predetermined group B<b>1</b>, B<b>2</b>, C<b>1</b> or C<b>2</b> may be formed of a plurality of pairs.

Meanwhile, the inner electrodes and the inner connecting conductors may be laminated according to the order of A<b>1</b>-A<b>2</b>-B<b>1</b>-B<b>2</b>-C<b>1</b>-C<b>2</b> shown in <figref idref="DRAWINGS">FIGS. 2 and 3</figref>. Alternatively, the inner electrodes and the inner connecting conductors may be laminated in various orders. For example, the inner connecting conductors <b>12</b> and <b>13</b> may be disposed between the inner electrodes in the order of e.g., B<b>1</b>-B<b>2</b>- . . . -C<b>1</b>-C<b>2</b>-A<b>1</b>-A<b>2</b>-B<b>1</b>-B<b>2</b>- . . . -C<b>1</b>-<b>2</b>. Also, the first and second inner connecting conductors <b>12</b> and <b>13</b> may be arranged at a distance from each other in the order of e.g., A<b>1</b>-B<b>1</b>-B<b>2</b>- . . . -C<b>1</b>-C<b>2</b>-A<b>2</b>-B<b>1</b>-B<b>2</b>- . . . -C<b>1</b>-C<b>2</b>. Particularly, the inner connecting conductors may be varied in arrangement position to adjust desired ESR characteristics more precisely.

The first inner connecting conductor <b>12</b> is connected to the first outer electrodes <b>18</b><i>a </i>and <b>18</b><i>b </i>through two leads L<b>1</b> and L<b>2</b>, respectively. Hereinafter, the leads located in the same positions will be denoted with the same reference numerals. Likewise, the second inner connecting conductor <b>13</b> is connected to the second outer electrodes <b>19</b><i>a </i>and <b>19</b><i>b </i>through two leads L<b>3</b> and L<b>4</b>, respectively.

As described above, the first and second inner connecting conductors <b>12</b> and <b>13</b> are formed of conductor patterns connected to all of the outer electrodes. But as in the present embodiment, the first and second inner connecting conductors <b>12</b> and <b>13</b> may have an overlapping area corresponding to an overlapping area between the first and second inner electrodes <b>14</b><i>a </i>and <b>14</b><i>b</i>; <b>15</b><i>a </i>and <b>15</b><i>b </i>to serve as a capacitor element similar to the other inner electrodes <b>14</b><i>a</i>, <b>14</b><i>b</i>, <b>15</b><i>a</i>, and <b>15</b><i>b. </i>

Meanwhile, the first inner electrodes <b>14</b><i>a </i>and <b>14</b><i>b </i>of the respective groups are connected to one of the first outer electrodes <b>18</b><i>a </i>and <b>18</b><i>b </i>that is different from one another for each of the groups, respectively. Also, the second inner electrodes <b>15</b><i>a </i>and <b>15</b><i>b </i>of the respective groups are connected to one of the second outer electrodes <b>19</b><i>a </i>and <b>19</b><i>b </i>that is different from one another for the each group, respectively.

That is, as shown in <figref idref="DRAWINGS">FIG. 3</figref>, the first and second inner electrodes <b>14</b><i>a</i>, <b>15</b><i>a</i>, <b>14</b><i>b</i>, and <b>15</b><i>b </i>of the respective groups are connected to one of the outer electrodes <b>18</b><i>a</i>, <b>18</b><i>b</i>, <b>19</b><i>a</i>, and <b>19</b><i>b </i>that is different from one another for the each group, through one of the leads L<b>1</b>, L<b>2</b>, L<b>3</b>, or L<b>4</b>, respectively.

By virtue of this connection, the first inner electrodes <b>14</b><i>a </i>and <b>14</b><i>b </i>of the respective groups are electrically connected to the first inner connecting conductor <b>12</b> through the first outer electrodes <b>18</b><i>a </i>and <b>18</b><i>b </i>that are different from one another for the each group. Also, such connection allows the second inner electrodes <b>15</b><i>a </i>and <b>15</b><i>b </i>of the respective groups to be electrically connected to the second inner connecting conductor <b>13</b> through the second outer electrodes <b>19</b><i>a </i>and <b>19</b><i>b </i>that are different from one another for the each group.

In the present embodiment, the two outer electrodes except for the one pair of first and second outer electrodes used as an outer terminal for connection with a power line may be construed to be utilized as an outer electrode for adjusting ESR.

However, the first and second outer electrodes used as an outer terminal may be arbitrarily selected to suit desired ESR characteristics. Thus, the outer electrodes for adjusting ESR are not limited. For example, in a case where respective corresponding ones <b>18</b><i>a </i>and <b>19</b><i>b </i>of the first and second outer electrodes are utilized as an outer terminal, the other two outer electrodes <b>18</b><i>b </i>and <b>19</b><i>a </i>may serve as an outer electrode for adjusting ESR. Alternatively, respective corresponding ones <b>18</b><i>b </i>and <b>19</b><i>a </i>of the first and second outer electrodes may be utilized as an outer terminal and the other two outer electrodes <b>18</b><i>a </i>and <b>19</b><i>b </i>may serve as an outer electrode for adjusting ESR. Furthermore, in a case where the outer electrodes of an identical number are utilized as an outer terminal, ESR may be finely changed according to a selected one of the outer electrodes.

<figref idref="DRAWINGS">FIGS. 4A and 4B</figref> are schematic views for explaining a method of adjusting ESR in the multilayer capacitor according to the first embodiment of the invention.

Referring to <figref idref="DRAWINGS">FIG. 4A</figref>, a printed circuit board <b>21</b> has the multilayer capacitor <b>10</b> of <figref idref="DRAWINGS">FIG. 1</figref> mounted thereon. Four mounting pads <b>22</b><i>a</i>, <b>22</b><i>b</i>, <b>23</b><i>a</i>, and <b>23</b><i>b </i>are provided on the board <b>21</b>.

The four mounting pads <b>22</b><i>a</i>, <b>22</b><i>b</i>, <b>23</b><i>a</i>, and <b>23</b><i>b </i>are soldered to be connected to the outer electrodes <b>18</b><i>a</i>, <b>18</b><i>b</i>, <b>19</b><i>a</i>, and <b>19</b><i>b </i>of the multilayer capacitor <b>10</b>, respectively. Here, power lines and the outer electrodes are connected depending on the connection between the power lines and the mounting pads.

Accordingly, this ensures the multilayer capacitor is supported stably and allows only a desired one of the outer electrodes to be selectively connected to the power line.

In the present embodiment, the two mounting pads <b>22</b><i>a </i>and <b>23</b><i>b </i>are connected to power lines <b>24</b> and <b>25</b>, and the other two mounting pads <b>22</b><i>b </i>and <b>23</b><i>a </i>are not connected to the power lines <b>24</b> and <b>25</b>. Therefore, in the multilayer capacitor <b>10</b>, only one pair of the first and second outer electrodes <b>18</b><i>a </i>and <b>19</b><i>b </i>can be directly connected to a power source through the power lines <b>24</b> and <b>25</b>.

In a similar manner, referring to <figref idref="DRAWINGS">FIG. 4B</figref>, the outer electrodes <b>18</b><i>a</i>, <b>18</b><i>b</i>, <b>19</b><i>a</i>, and <b>19</b><i>b </i>of the multilayer capacitor <b>10</b> are soldered to be connected to four mounting pads <b>32</b><i>a</i>, <b>32</b><i>b</i>, <b>33</b><i>a</i>, and <b>33</b><i>b </i>provided on a printed circuit board <b>31</b>. However, unlike the previous embodiment, the three mounting pads <b>32</b><i>a</i>, <b>33</b><i>b </i>and <b>33</b><i>a </i>are connected to power lines <b>34</b> and <b>35</b> and the other mounting pads <b>32</b><i>ba </i>are not connected to the power lines.

In this mounting position, in addition to one pair of the first and second outer electrodes <b>18</b><i>a </i>and <b>19</b><i>b </i>of the multilayer capacitor <b>10</b>, the second outer electrode <b>19</b><i>a </i>of the other pair may be directly supplied with a power source through the power line <b>35</b>.

As shown in <figref idref="DRAWINGS">FIG. 4A</figref>, in a case where the second outer electrode <b>19</b><i>b </i>is connected to the second power line <b>25</b> but the other second outer electrode <b>19</b><i>a </i>is not connected thereto, the second inner electrode <b>15</b><i>a </i>of group B<b>2</b> receives a power source through the second inner connecting conductor <b>13</b> and the second outer electrode <b>19</b><i>a</i>. Therefore, the second inner electrode <b>15</b><i>a </i>of the group B<b>2</b> is connected in series with the second inner connecting conductor <b>13</b> through the second outer electrode <b>19</b><i>a</i>. This series resistance leads to a relatively high ESR value (ESR<b>1</b>).

Meanwhile, as shown in <figref idref="DRAWINGS">FIG. 4B</figref>, in a case where the predetermined one <b>19</b><i>a </i>of the second outer electrodes is additionally connected to the second power line <b>35</b>, the second outer electrode <b>19</b><i>a </i>serves as an outer terminal to allow the second inner electrode <b>15</b><i>a </i>of group B<b>2</b> to be directly supplied with a power source. Therefore, the series-connected second inner electrode <b>15</b><i>a </i>of group B<b>2</b> in <figref idref="DRAWINGS">FIG. 4A</figref> is connected in parallel with the other inner electrode <b>15</b><i>b </i>and the second inner connecting conductor <b>13</b>, respectively. Accordingly, the multilayer capacitor connected as shown in <figref idref="DRAWINGS">FIG. 4B</figref> may have an ESR value (ESR<b>2</b>) lower than the ESR value obtained from the mounting configuration of <figref idref="DRAWINGS">FIG. 4A</figref>.

In addition, even though not illustrated, the other first outer electrode <b>18</b><i>b </i>may serve as an outer electrode for adjusting ESR. In a case where the first power line <b>31</b> is additionally connected to the other first outer electrode <b>18</b><i>b</i>, similarly to what has been described above, equivalent series resistance component generated by the series connection between the first inner connecting conductor <b>12</b> and the first inner electrode <b>14</b><i>a </i>of group A<b>1</b> through the ESR-adjusting first outer electrode <b>18</b><i>b </i>is eliminated. Accordingly, this ensures lower an ESR value (ESR<b>3</b>) than the ESR value obtained from the mounting configuration of <figref idref="DRAWINGS">FIG. 4B</figref>.

As described above, the embodiment shown in <figref idref="DRAWINGS">FIG. 1</figref> selectively employs another pair of the outer electrodes as an outer terminal, in addition to one pair of the outer electrodes. This allows the ESR value to be adjusted stepwise, as exemplified by ESR<b>3</b>&lt;ESR<b>2</b>&lt;ESR<b>1</b>.

Particularly, adjustment of ESR in this fashion can be made by a user in a process where the multilayer capacitor is mounted. A supplier may design a product to have various ESR values (three ESR values in the present embodiment) by selecting the number and location of inner connecting conductors appropriately. Then, a user may select a corresponding outer terminal to be connected to the power line in order to easily adjust ESR of the multilayer capacitor to a desired value.

<figref idref="DRAWINGS">FIG. 5</figref> illustrates a four-terminal multilayer capacitor according to a second embodiment of the invention. Unlike the first embodiment, the present embodiment employs a four terminal multilayer capacitor having outer electrodes located differently from the first embodiment.

Referring to <figref idref="DRAWINGS">FIG. 5</figref>, the multilayer capacitor <b>40</b> of the present embodiment includes a capacitor body <b>41</b> having a plurality of dielectric layers <b>41</b>′ laminated therein.

The capacitor body <b>41</b> of the present embodiment is of a rectangular parallelepiped structure having opposing first and second major surfaces and four side surfaces disposed therebetween. The first outer electrodes <b>48</b><i>a </i>and <b>48</b><i>b </i>and the second outer electrodes <b>49</b><i>a </i>and <b>49</b><i>b </i>are formed on the four side surfaces, respectively.

That is, as shown in <figref idref="DRAWINGS">FIG. 5</figref>, the first outer electrodes <b>48</b><i>a </i>and <b>48</b><i>b </i>are formed on opposing ones of the side surfaces of the body <b>41</b>, respectively. Also, the second outer electrodes <b>49</b><i>a </i>and <b>49</b><i>b </i>are formed on the other opposing side surfaces of the body <b>41</b>, respectively. As a result, the first and second outer electrodes <b>48</b><i>a </i>and <b>48</b><i>b</i>; <b>49</b><i>a </i>and <b>49</b><i>b </i>are arranged alternately to have opposite polarities along the four side surfaces.

In view of this arrangement of the outer electrodes, the multilayer capacitor <b>40</b> may include first and second inner connecting conductors <b>42</b> and <b>43</b> and first and second inner electrodes <b>45</b><i>a</i>, <b>46</b><i>a</i>, <b>45</b><i>b</i>, and <b>46</b><i>b </i>shown in <figref idref="DRAWINGS">FIGS. 6 and 7</figref>.

The plurality of first and second inner electrodes <b>45</b><i>a</i>, <b>46</b><i>a</i>, <b>45</b><i>b</i>, and <b>46</b><i>b </i>and the first and second inner connecting conductors <b>42</b> and <b>43</b> are arranged such that corresponding ones of the inner electrodes <b>45</b><i>a</i>, <b>46</b><i>a</i>, <b>45</b><i>b</i>, and <b>46</b><i>b </i>and the inner connecting conductors <b>42</b> and <b>43</b> having different polarities alternate with each other. The inner electrodes and inner connecting conductors can be laminated in various orders and numbers in the same manner as the first embodiment.

The first inner connecting conductor <b>42</b> is connected to the first outer electrodes <b>48</b><i>a </i>and <b>48</b><i>b </i>through two leads L<b>1</b> and L<b>2</b> extended to both side surfaces. Similarly, the second inner connecting conductor <b>43</b> is connected to the second outer electrodes <b>49</b><i>a </i>and <b>49</b><i>b </i>through two leads L<b>3</b> and L<b>4</b> extended to the other side surfaces.

Each of the first and second inner electrodes <b>45</b><i>a</i>, <b>46</b><i>a</i>, <b>45</b><i>b</i>, and <b>46</b><i>b </i>is selectively connected to a corresponding one of the outer electrodes <b>48</b><i>a</i>, <b>48</b><i>b </i>and <b>49</b><i>a</i>, <b>49</b><i>b </i>having identical polarity but different from each other.

For example, the first outer electrode <b>48</b><i>a </i>is connected to only the first inner electrode <b>44</b><i>a </i>of group B<b>1</b> which is different from the first inner electrode <b>45</b><i>b </i>of group C<b>1</b> having the other one <b>48</b><i>b </i>of the first outer electrodes connected thereto. In a similar manner, the second outer electrode <b>49</b><i>a </i>is connected to only the second inner electrode <b>46</b><i>b </i>of group C<b>2</b> which is different from the second inner electrode <b>46</b><i>a </i>of group B<b>2</b> having the other one <b>49</b><i>b </i>of the second outer electrodes connected thereto.

With this connection, the first and second inner electrodes <b>45</b><i>a</i>, <b>46</b><i>a</i>, <b>45</b><i>b</i>, and <b>46</b><i>b </i>can be electrically connected to corresponding ones of the inner connecting conductors <b>42</b> and <b>43</b> having identical polarity through the connected outer electrodes.

Also in the present embodiment, similarly to <figref idref="DRAWINGS">FIG. 1</figref>, in a case where a pair of outer electrodes <b>48</b><i>a </i>and <b>49</b><i>b </i>are directly connected to power lines, the other first and second outer electrodes <b>48</b><i>b </i>and <b>49</b><i>b </i>serve as outer connecting conductors which are not directly connected to the power lines but connected to the first inner electrode <b>45</b><i>b </i>of group C<b>1</b>, the second inner electrode <b>46</b><i>a </i>of group B<b>2</b> and the first and second inner connecting conductors <b>42</b> and <b>43</b>, respectively.

Therefore, the first inner electrode <b>45</b><i>b </i>of group C<b>1</b> is connected in series to the first inner connecting conductor <b>42</b> through the first outer electrode <b>48</b><i>bb </i>as the outer connecting conductor. In a similar manner, the second inner electrode <b>46</b><i>a </i>of group B<b>2</b> is connected in series to the second inner connecting conductor <b>43</b> through the outer electrodes <b>48</b><i>b </i>and <b>49</b><i>b </i>as the outer connecting conductor. This series connection brings in higher ESR.

Additionally, when at least one of the first and second outer electrodes <b>48</b><i>b </i>and <b>49</b><i>b </i>for adjusting ESR is connected to the power line, the series resistance does not occur and thus relatively low ESR is achieved.

As described above, the user the user's selection of the outer terminal enables desired different ESR values to be selected.

The present invention may be easily applicable to a six or more terminal structure other than a four terminal structure.

In a similar manner to the previous embodiment, in this six or more terminal structure, ESR can be adjusted by virtue of the inner connecting conductors. In addition, this embodiment does not require additional inner connecting conductors to be connected to all of the outer electrodes of identical polarity but allows ESR to be adjusted only by the inner electrodes according to selection of the outer electrode (see <figref idref="DRAWINGS">FIGS. 11</figref>, <b>12</b>, <b>16</b>, <b>17</b>, and <b>21</b> to <b>24</b>).

<figref idref="DRAWINGS">FIG. 8</figref> is a perspective illustrating a six terminal multilayer capacitor according to a third embodiment of the invention.

Referring to <figref idref="DRAWINGS">FIG. 8</figref>, the multilayer capacitor <b>60</b> includes a capacitor body <b>61</b> having a plurality of dielectric layers <b>61</b>′ laminated therein.

The multilayer capacitor <b>60</b> includes three first electrodes <b>68</b><i>a</i>, <b>68</b><i>b </i>and <b>68</b><i>c </i>and three second outer electrodes <b>69</b><i>a</i>, <b>69</b><i>b</i>, and <b>69</b><i>c </i>formed on both opposing side surfaces to be electrically insulated from each other. As in the present embodiment, the first and second outer electrodes may be arranged such that adjacent ones of the outer electrodes have different polarities.

According to a first aspect of the invention, the multilayer capacitor <b>60</b> is structured to adjust ESR using an inner connecting conductor.

In the present embodiment, as shown in <figref idref="DRAWINGS">FIG. 9</figref>, the multilayer capacitor <b>60</b> includes first and second inner connecting conductors <b>62</b> and <b>63</b> formed on the plurality of dielectric layers <b>61</b>′, respectively. The first inner connecting conductor <b>62</b> is connected to the three first outer electrodes <b>68</b><i>a</i>, <b>68</b><i>b</i>, and <b>68</b><i>c </i>through three leads L<b>1</b>, L<b>2</b>, and L<b>3</b>, respectively. Similarly, the second inner connecting conductor <b>63</b> is connected to the three second outer electrodes <b>69</b><i>a</i>, <b>69</b><i>b</i>, and <b>69</b><i>c </i>through three leads L<b>4</b>, L<b>5</b>, and L<b>6</b>.

The first and second inner electrodes applicable along with the first and second inner connecting conductors <b>62</b> and <b>63</b> may be formed in various patterns and combinations. Various examples of the first and second inner electrodes applicable to the present invention are shown in <figref idref="DRAWINGS">FIGS. 10A and 10B</figref>.

As shown in <figref idref="DRAWINGS">FIG. 10A</figref>, first and second inner electrodes <b>64</b><i>a</i>, <b>64</b><i>b</i>; <b>65</b><i>a</i>, <b>65</b><i>b </i>are divided into two groups B<b>1</b>, C<b>1</b>, B<b>2</b>, C<b>2</b>, respectively according to the structure of outer electrodes connected thereto (structure of leads). The first inner electrodes <b>64</b><i>a </i>and <b>64</b><i>b </i>of the respective groups are connected to the first outer electrodes <b>68</b><i>a </i>and <b>68</b><i>b </i>through one lead L<b>1</b> or L<b>2</b>, respectively. Similarly, the second inner electrodes <b>65</b><i>a </i>and <b>65</b><i>b </i>of the respective groups are connected to the second outer electrodes <b>69</b><i>a </i>and <b>69</b><i>b </i>by one lead L<b>3</b> or L<b>4</b>, respectively.

In a similar manner to the previous embodiment, the first and second inner electrodes <b>64</b><i>a </i>and <b>64</b><i>b</i>; <b>65</b><i>a </i>and <b>65</b><i>b </i>of the respective groups are connected to the outer electrodes that are different from one another for each of the groups.

As in the present embodiment, predetermined ones <b>68</b><i>c </i>and <b>69</b><i>c </i>of the first and second outer electrodes may not be connected to any of the inner electrodes but only the first and second inner connecting conductors <b>62</b> and <b>63</b>. Therefore, in a case where only the first and second outer electrodes <b>68</b><i>c </i>and <b>69</b><i>c </i>are connected to power lines, the other four outer electrodes <b>68</b><i>a</i>, <b>68</b><i>b</i>, <b>69</b><i>a</i>, and <b>69</b><i>b </i>are not connected to the power lines but act as outer connecting conductors for connecting the inner electrodes <b>64</b><i>a</i>, <b>64</b><i>b</i>, <b>65</b><i>a</i>, and <b>65</b><i>b </i>in series with the inner connecting conductors <b>68</b><i>a</i>, <b>69</b><i>b</i>, <b>68</b><i>b</i>, and <b>69</b><i>a </i>to have identical polarity to each other. This ensures relatively high ESR.

Also, in a case where one of the outer electrodes <b>68</b><i>a</i>, <b>68</b><i>b</i>, <b>69</b><i>a</i>, and <b>69</b><i>b </i>not connected to the power lines is connected to the power line, the inner electrode connected to the outer electrode is again connected in parallel with the inner connecting conductor <b>62</b> or <b>63</b> of identical polarity. This leads to lower ESR. As described above, the four outer electrodes <b>68</b><i>a</i>, <b>68</b><i>b</i>, <b>69</b><i>a</i>, and <b>69</b><i>b </i>may serve as a means for adjusting ESR. In the present embodiment, at least five ESR values may be selectively attained according to the number of the outer electrodes connected to the power lines.

First and second inner electrodes <b>74</b><i>a</i>, <b>74</b><i>b</i>, and <b>74</b><i>c</i>; <b>75</b><i>a</i>, <b>75</b><i>b</i>, and <b>75</b><i>c </i>shown in <figref idref="DRAWINGS">FIG. 10B</figref> are divided into three groups, respectively according to outer electrodes connected thereto. Similarly to <figref idref="DRAWINGS">FIG. 10A</figref>, the first inner electrodes <b>74</b><i>a</i>, <b>74</b><i>b</i>, and <b>74</b><i>c </i>of the respective groups are connected to first outer electrodes <b>68</b><i>a</i>, <b>68</b><i>b</i>, and <b>68</b><i>c </i>by one lead L<b>1</b>, L<b>2</b>, or L<b>3</b>. The second inner electrodes <b>75</b><i>a</i>, <b>75</b><i>b</i>, and <b>75</b><i>c </i>of the respective groups are connected to second outer electrodes <b>69</b><i>c</i>, <b>69</b><i>a</i>, and <b>69</b><i>b </i>by one lead L<b>6</b>, L<b>4</b>, or L<b>5</b>.

However, unlike the inner electrode shown in <figref idref="DRAWINGS">FIG. 10A</figref>, the first and second inner electrodes <b>74</b><i>c </i>and <b>75</b><i>c </i>of additional groups D<b>1</b> and D<b>2</b>, respectively are connected to the first and second outer electrodes <b>68</b><i>c </i>and <b>69</b><i>c </i>not connected to the inner electrodes in <figref idref="DRAWINGS">FIG. 10A</figref>. Accordingly, the inner electrodes of the different groups are connected to all of the outer electrodes.

In a case where an arbitrary pair of first and second outer electrodes <b>68</b><i>a </i>and <b>69</b><i>a </i>are selected as an outer terminal connected to the power line, the other four outer electrodes <b>68</b><i>b</i>, <b>68</b><i>c</i>, <b>69</b><i>b</i>, and <b>69</b><i>c </i>and act as outer connecting conductors for connecting the inner electrodes <b>74</b><i>b</i>, <b>74</b><i>c</i>, <b>75</b><i>c</i>, and <b>75</b><i>a </i>with the inner connecting conductors <b>62</b> and <b>63</b>, respectively to have identical polarity to each other. Also, the inner electrodes <b>74</b><i>b</i>, <b>74</b><i>c</i>, <b>75</b><i>c</i>, and <b>75</b><i>a </i>are connected in series with the inner connecting conductors <b>62</b> and <b>63</b> by each of the outer connecting conductors. Accordingly, this ensures high ESR.

Also in this case, the four outer electrodes may serve to adjust ESR, respectively. For example, five ESR values may be selected according to the number of the outer electrodes connected to the power lines.

The inner electrodes shown in <figref idref="DRAWINGS">FIGS. 10A and 10B</figref> are illustrated to be employed along with the inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 9</figref>. However, as in the present embodiment, a multi-terminal multilayer capacitor such as a six or more terminal may not employ the inner connecting conductors connected to all of the outer electrodes of identical polarity to achieve ESR adjustment

In a configuration where the inner connecting conductors are not employed, the inner electrodes of the each group are not connected to all of the outer electrodes but at least two of the outer electrodes. At least one of the outer electrodes connected to the inner electrodes belonging to a respective one of the groups is different from the outer electrodes connected to the inner electrodes belonging to another one of the groups. However, at least one of the outer electrodes connected to the inner electrodes of one of the groups is connected to the inner electrodes of another one of the groups such that the inner electrodes of all of the groups are connected together.

<figref idref="DRAWINGS">FIGS. 11 and 12</figref> illustrate various examples of first and second inner electrodes applicable to the multilayer capacitor shown in <figref idref="DRAWINGS">FIG. 8</figref>.

As shown in <figref idref="DRAWINGS">FIG. 11</figref>, first and second inner electrodes <b>84</b><i>a</i>, <b>84</b><i>b</i>, and <b>84</b><i>c</i>; <b>85</b><i>a</i>, <b>85</b><i>b</i>, and <b>85</b><i>c </i>are divided into three groups A<b>1</b>-B<b>1</b>-C<b>1</b>, A<b>2</b>-B<b>2</b>-C<b>2</b>, respectively according to outer electrodes connected thereto.

The first inner electrodes <b>84</b><i>a</i>, <b>84</b><i>b</i>, and <b>84</b><i>c </i>for the respective groups are connected to two of the first outer electrodes <b>68</b><i>a</i>, <b>68</b><i>b</i>, and <b>68</b><i>c </i>by two of leads L<b>1</b>, L<b>2</b>, and L<b>3</b>.

One of the two first outer electrodes connected to the first inner electrodes belonging to a respective one of the groups is different from outer electrodes connected to the first inner electrodes belonging to another one of the groups. Moreover, one of the outer electrodes connected to the inner electrodes of one of the groups is also connected to the inner electrodes of another one of the groups. This allows the first inner electrodes of the three groups to be electrically connected to one another.

For example, the first inner electrodes are electrically connected to one another in the order of group A<b>1</b>—the first outer electrode <b>68</b><i>b</i>—group B<b>1</b>—the first outer electrode <b>68</b><i>c</i>—group C<b>1</b>—the first outer electrode <b>68</b><i>a</i>—group A<b>1</b>.

In a similar manner, the second inner electrodes <b>85</b><i>a</i>, <b>85</b><i>b</i>, and <b>85</b><i>c </i>of a respective one of the groups are not connected to all of the second outer electrodes but only two of the second outer electrodes. Also, one of the second outer electrodes connected to the second inner electrodes <b>85</b><i>a</i>, <b>85</b><i>b</i>, and <b>85</b><i>c </i>belonging to a respective one of the groups is different from the second outer electrode connected to the second inner electrode connected to the second inner electrode belonging to another one of the groups. However, at least one of the second outer electrodes connected to the second inner electrode of one of the groups is connected to the second inner electrode of another one of the groups such that the second inner electrodes <b>85</b><i>a</i>, <b>85</b><i>b</i>, and <b>85</b><i>c </i>of all of the groups are electrically connected to one another.

In this connection configuration between the outer electrodes and the inner electrodes, the inner electrodes of a predetermined one of the groups may act as an inner connecting conductor depending on the connection between the outer electrodes and the power lines.

For example, when the power lines are connected to predetermined ones of the first and second outer electrodes <b>68</b><i>a </i>and <b>69</b><i>a</i>, the first inner electrodes of group A<b>1</b> and group C<b>1</b> are connected in series with the first inner electrodes of group B<b>1</b> through the other first outer electrodes <b>68</b><i>b </i>and <b>68</b><i>a</i>, respectively. Also, the second inner electrodes of group B<b>2</b> and group C<b>2</b> are connected in series with the second inner electrodes of group A<b>2</b> through the other second outer electrodes <b>69</b><i>c </i>and <b>69</b><i>c</i>, respectively.

Therefore, this series connection increases resistance and thus ensures high ESR.

Optionally, to attain lower ESR characteristics, a user may additionally connect the first and second outer electrodes <b>68</b><i>b </i>and <b>68</b><i>c</i>; <b>69</b><i>b </i>and <b>69</b><i>c </i>not connected to the power lines in the previous embodiment to the power lines. As described above, additional connection between the power lines and the outer electrodes prevents series resistance from occurring.

That is, in a case where the power line is additionally connected to at least one of the first outer electrodes <b>68</b><i>b </i>and <b>68</b><i>a</i>, the first inner electrode of group B<b>1</b> is directly connected to the power line and thus connected in parallel with the inner electrode of another group, thereby eliminating resistance component induced by series connection. Accordingly, this may lead to relatively lower ESR.

Referring to <figref idref="DRAWINGS">FIG. 12</figref>, only second inner electrodes <b>87</b><i>a</i>, <b>87</b><i>b</i>, and <b>87</b><i>c </i>are divided into three groups A<b>2</b>, B<b>2</b>, and C<b>2</b>, and first inner electrodes <b>86</b> are arranged with a general configuration, for example, connected to all of outer electrodes. The first inner electrodes <b>86</b> pair with the second inner electrodes <b>87</b><i>a</i>, <b>87</b><i>b</i>, and <b>87</b><i>c </i>of the respective groups.

The first inner electrodes <b>86</b> are connected to the first outer electrodes <b>68</b><i>a</i>, <b>68</b><i>b</i>, and <b>68</b><i>c </i>by three leads L<b>1</b>, L<b>2</b>, and L<b>3</b>, respectively. In a similar manner to <figref idref="DRAWINGS">FIG. 10C</figref>, the second inner electrodes <b>87</b><i>a</i>, <b>87</b><i>b</i>, and <b>87</b><i>c </i>are connected to two of the second outer electrodes <b>69</b><i>a</i>, <b>69</b><i>b</i>, and <b>69</b><i>c </i>that are different from one another for each of the groups, by two of the leads L<b>4</b>, L<b>5</b>, and L<b>6</b>, respectively.

In the present embodiment, selective connection of the second outer electrodes allows ESR characteristics to be adjusted, in a similar manner to <figref idref="DRAWINGS">FIG. 11</figref>.

<figref idref="DRAWINGS">FIG. 13</figref> is a perspective view illustrating a six terminal multilayer capacitor according to a fourth embodiment of the invention.

Referring to <figref idref="DRAWINGS">FIG. 13</figref>, the multilayer capacitor <b>90</b> of the present embodiment includes a capacitor body <b>91</b> where a plurality of dielectric layers <b>91</b> are laminated.

The capacitor body <b>91</b> is formed of a rectangular parallelepiped structure having opposing first and second main surfaces and four side surfaces interposed therebetween. The multilayer capacitor <b>90</b> includes respective three first and second outer electrodes <b>98</b><i>a</i>, <b>98</b><i>b</i>, and <b>98</b><i>c</i>; <b>99</b><i>a</i>, <b>99</b><i>b</i>, and <b>99</b><i>c </i>arranged to have different polarities alternating along the four side surfaces.

Moreover, as shown in <figref idref="DRAWINGS">FIG. 13</figref>, two first and second outer electrodes are formed on both opposing side surfaces (length direction) of the body <b>91</b>, respectively, and first and second outer electrodes are formed on the other opposing side surfaces (width direction), respectively.

As shown in <figref idref="DRAWINGS">FIG. 14</figref>, the multilayer capacitor <b>90</b> may include first and second inner connecting conductors <b>92</b> and <b>93</b> formed on each of the plurality of dielectric layers <b>91</b>′.

The first inner connecting conductor <b>92</b> is connected to the first outer electrodes <b>98</b><i>a</i>, <b>98</b><i>b</i>, and <b>98</b><i>c </i>through three leads L<b>1</b>, L<b>2</b>, and L<b>3</b>, respectively. Similarly, the second inner connecting conductor <b>93</b> is connected to the second outer electrodes <b>99</b><i>a</i>, <b>99</b><i>b</i>, and <b>99</b><i>c </i>through thee leads L<b>4</b>, L<b>5</b>, and L<b>6</b>, respectively.

The first and second inner electrodes applicable along with the first and second inner connecting conductors <b>92</b> and <b>93</b> shown in <figref idref="DRAWINGS">FIG. 14</figref> may be configured in various patterns and combinations. <figref idref="DRAWINGS">FIG. 15</figref> illustrates first and second inner electrodes applicable to the present embodiment.

First and second inner electrodes <b>94</b><i>a</i>, <b>94</b><i>b</i>, and <b>94</b><i>c</i>; <b>95</b><i>a</i>, <b>95</b><i>b</i>, and <b>95</b><i>c </i>shown in <figref idref="DRAWINGS">FIG. 15</figref> are divided into three groups, respectively according to outer electrodes connected thereto. The first inner electrodes <b>94</b><i>a</i>, <b>94</b><i>b</i>, and <b>94</b><i>c </i>of the respective groups are connected to the first outer electrodes <b>98</b><i>a</i>, <b>98</b><i>b</i>, and <b>98</b><i>c </i>by leads L<b>1</b>, L<b>2</b>, and L<b>3</b>, respectively. The second inner electrodes <b>95</b><i>a</i>, <b>95</b><i>b</i>, and <b>95</b><i>c </i>of the respective groups are connected to the second outer electrodes <b>99</b><i>c</i>, <b>99</b><i>a</i>, and <b>99</b><i>b </i>by leads L<b>6</b>, L<b>4</b>, and L<b>5</b>, respectively.

The first and second inner electrodes <b>94</b><i>a</i>, <b>94</b><i>b</i>, and <b>94</b><i>c</i>; <b>95</b><i>a</i>, <b>95</b><i>b</i>, and <b>95</b><i>c </i>are connected to the first and second outer electrodes <b>98</b><i>a</i>, <b>98</b><i>b</i>, and <b>98</b><i>c</i>; <b>99</b><i>c</i>, <b>99</b><i>a</i>, and <b>99</b><i>b </i>that are different from one another for each of the groups.

In the present embodiment, the first and second outer electrodes <b>98</b><i>a</i>, <b>98</b><i>b</i>, and <b>98</b><i>c</i>; <b>99</b><i>a</i>, <b>99</b><i>b</i>, and <b>99</b><i>c </i>are connected to the first and second inner connecting conductors <b>92</b> and <b>93</b> and the first and second inner electrodes of only the predetermined group, respectively but not connected to the first and second inner electrodes of the other groups.

In a case where a pair of first and second outer electrodes <b>98</b><i>a </i>and <b>99</b><i>a </i>are outer terminals connected to power lines, the other four outer electrodes <b>98</b><i>b</i>, <b>98</b><i>c</i>, <b>99</b><i>b</i>, and <b>99</b><i>c </i>act as an outer connecting conductor to add to series resistance, thereby achieving relatively high ESR. Here, the four outer electrodes <b>98</b><i>b</i>, <b>98</b><i>c</i>, <b>99</b><i>b</i>, and <b>99</b><i>c </i>may serve as ESR-adjusting outer terminals capable of changing ESR independently. Therefore, five ESRs can be attained selectively according to the connection between the four outer electrodes <b>98</b><i>b</i>, <b>98</b><i>c</i>, <b>99</b><i>b</i>, and <b>99</b><i>c </i>to the power lines.

First and second inner electrodes <b>104</b><i>a</i>, <b>104</b><i>b</i>, and <b>104</b><i>c</i>; <b>105</b><i>a</i>, <b>105</b><i>b</i>, and <b>105</b><i>c </i>shown in <figref idref="DRAWINGS">FIG. 16</figref> are divided into three groups, respectively according to outer electrodes connected thereto. The inner electrodes configured as shown in <figref idref="DRAWINGS">FIG. 16</figref> enable a multilayer capacitor for adjusting ESR without the inner connecting conductor shown in <figref idref="DRAWINGS">FIG. 14</figref>.

The first inner electrodes <b>104</b><i>a</i>, <b>104</b><i>b</i>, and <b>104</b><i>c </i>of the respective groups are connected to two of the first outer electrodes <b>98</b><i>a</i>, <b>98</b><i>b</i>, and <b>98</b><i>c </i>that are different from one another for each of the groups, by two of leads L<b>1</b>, L<b>2</b>, and L<b>3</b>. The second inner electrodes <b>105</b><i>a</i>, <b>105</b><i>b</i>, and <b>105</b><i>c </i>are connected to two of the second outer electrodes <b>99</b><i>a</i>, <b>99</b><i>b</i>, and <b>99</b><i>c </i>that are different from one another for each of the groups, by two of leads L<b>4</b>, L<b>5</b>, and L<b>6</b>.

The first inner electrodes <b>104</b><i>a</i>, <b>104</b><i>b</i>, and <b>104</b><i>c </i>are connected to two of the first outer electrodes <b>98</b><i>a</i>, <b>98</b><i>b</i>, and <b>98</b><i>c </i>that are different from one another for the each group, by two of the leads L<b>1</b>, L<b>2</b>, and L<b>3</b>. One of the two first outer electrodes connected to the first inner electrodes belonging to a respective one of the groups is different from the outer electrodes connected to the first inner electrodes belonging to another one of the groups. Also, one of the outer electrodes connected to the inner electrodes belonging to one of the groups is connected to the inner electrodes of another one of the groups. This allows the first inner electrodes of the three groups to be electrically connected to one another.

The adjustment of ESR in the present embodiment can be understood with reference to the related description in <figref idref="DRAWINGS">FIG. 11</figref>.

In the embodiment shown in <figref idref="DRAWINGS">FIG. 17</figref>, only the second inner electrodes <b>107</b><i>a</i>, <b>107</b><i>b</i>, and <b>107</b><i>c </i>are divided into three groups according to outer electrodes connected thereto. Also, the first inner electrodes <b>106</b> are formed in a similar pattern to the first inner connecting conductor <b>92</b> and pair with the second inner electrodes <b>107</b><i>a</i>, <b>107</b><i>b</i>, and <b>107</b><i>c </i>of the respective groups.

In the present embodiment, in a similar manner to a combined configuration of the inner electrodes shown in <figref idref="DRAWINGS">FIG. 12</figref>, only the second outer electrodes connected to the second inner electrodes are utilized to adjust ESR characteristics. Of course, contrarily, the first inner electrodes may be formed of patterns for adjusting ESR and the second inner electrodes may be configured similarly to general inner electrodes, i.e., in a similar pattern to the inner connecting conductors <b>93</b>.

The present invention is applicable to an eight terminal structure in a similar manner to the previous embodiment.

<figref idref="DRAWINGS">FIG. 18</figref> is a perspective view illustrating an example of an eight terminal multilayer capacitor according to an eighth embodiment of the invention.

Referring to <figref idref="DRAWINGS">FIG. 18</figref>, the multilayer capacitor <b>120</b> of the present embodiment includes a capacitor body <b>121</b> where a plurality of dielectric layers <b>121</b>′ are laminated.

The multilayer capacitor <b>120</b> includes respective four first and second outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d</i>; <b>129</b><i>a</i>, <b>129</b><i>b</i>, <b>129</b><i>c</i>, and <b>129</b><i>d </i>formed on two opposing surfaces thereof to be electrically insulated from each other. The outer electrodes may be arranged such that adjacent ones of the outer electrodes on each of the side surfaces have opposite polarities in order to reduce ESL.

As in the present embodiment, the outer electrodes of opposite polarities are arranged at corresponding positions on the opposing side surfaces. This allows currents on both side surfaces to flow in opposite directions, thereby canceling out magnetic flux.

As shown in <figref idref="DRAWINGS">FIG. 19</figref>, the multilayer capacitor <b>120</b> may include first and second inner connecting conductors <b>122</b> and <b>123</b> formed on each of the plurality of dielectric layers <b>121</b>′. The first inner connecting conductors <b>122</b> are connected to the first outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, and <b>128</b><i>c</i>, <b>128</b><i>d </i>through four leads L<b>1</b>, L<b>2</b>, L<b>3</b>, and L<b>4</b>, respectively. Similarly, the second inner connecting conductors <b>123</b> are connected to second outer electrodes <b>129</b><i>a</i>, <b>129</b><i>b</i>, <b>129</b><i>c</i>, and <b>129</b><i>d </i>through four leads L<b>4</b>, L<b>5</b>, L<b>6</b>, and L<b>7</b>, respectively.

The first and second inner electrodes applicable along with the first and second inner connecting conductors <b>122</b> and <b>123</b> shown in <figref idref="DRAWINGS">FIG. 19</figref> may be configured in various patterns and combinations. <figref idref="DRAWINGS">FIG. 20</figref> illustrates inner electrodes applicable along with the inner connecting conductors of <figref idref="DRAWINGS">FIG. 19</figref>.

First inner electrodes <b>124</b><i>a</i>, <b>124</b><i>b</i>, <b>124</b><i>c</i>, and <b>124</b><i>d </i>shown in <figref idref="DRAWINGS">FIG. 20</figref> and the second inner electrodes <b>125</b><i>a</i>, <b>125</b><i>b</i>, <b>125</b><i>c</i>, and <b>125</b> are divided into four groups, respectively according to outer electrodes connected thereto.

The first inner electrodes <b>124</b><i>a</i>, <b>124</b><i>b</i>, <b>124</b><i>c</i>, and <b>124</b><i>d </i>of the respective groups are connected to first outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d </i>by leads L<b>1</b>, L<b>2</b>, L<b>3</b>, and L<b>4</b>, respectively. Second inner electrodes <b>125</b><i>a</i>, <b>125</b><i>b</i>, <b>125</b><i>c</i>, and <b>125</b><i>d </i>of the respective groups are connected to the second outer electrodes <b>129</b><i>c</i>, <b>129</b><i>d</i>, <b>129</b><i>b</i>, and <b>129</b><i>a </i>by leads L<b>7</b>, L<b>8</b>, L<b>6</b>, and L<b>5</b>, respectively.

The first and second inner electrodes <b>124</b><i>a</i>, <b>124</b><i>b</i>, <b>124</b><i>c</i>, and <b>124</b><i>d</i>; <b>125</b><i>a</i>, <b>125</b><i>b</i>, <b>125</b><i>c</i>, and <b>125</b> may be connected to the first and second outer electrodes that are different from one another for each of the groups.

In the present embodiment, the first and second outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d</i>; <b>129</b><i>a</i>, <b>129</b><i>b</i>, <b>129</b><i>c</i>, and <b>129</b><i>d </i>are connected to the first and second inner connecting conductors <b>122</b> and <b>123</b> and the first and second inner electrodes of only the specific group, but not connected to the inner electrodes of the other groups.

However, the present invention is not limited thereto. In a case where at least two outer electrodes are connected to the inner electrodes of one group, the outer electrodes may be commonly connected to the outer electrodes of the other groups.

In the ESR-adjusting multilayer capacitor employing the inner electrodes shown in <figref idref="DRAWINGS">FIG. 20</figref> together with the inner connecting conductors shown in <figref idref="DRAWINGS">FIG. 19</figref>, when a pair of first and second outer electrodes <b>128</b><i>a </i>and <b>129</b><i>a </i>are connected to power lines, the other six outer electrodes <b>128</b><i>b</i>, <b>128</b><i>c</i>, <b>128</b><i>d</i>, <b>129</b><i>b</i>, <b>129</b><i>c</i>, and <b>129</b><i>d </i>may act as an outer connecting conductor to add to series resistance, thereby assuring relatively high ESR.

Particularly, the other six outer electrodes <b>128</b><i>b</i>, <b>128</b><i>c</i>, <b>128</b><i>d</i>, <b>129</b><i>b</i>, <b>129</b><i>c</i>, and <b>129</b><i>d </i>may be an ESR-adjusting outer terminal capable of adjusting ESR of the capacitor independently. Accordingly, seven ESR values may be selectively attained stepwise according to the number of the power lines connected thereto.

The inner electrodes configured as shown in <figref idref="DRAWINGS">FIG. 21</figref> enable realization of the multilayer capacitor for adjusting ESR without the inner connecting conductor shown in <figref idref="DRAWINGS">FIG. 19</figref>.

The first and second inner electrodes <b>126</b><i>a</i>, <b>126</b><i>b</i>, <b>126</b><i>c</i>, and <b>126</b><i>d</i>; <b>127</b><i>a</i>, <b>127</b><i>b</i>, <b>127</b><i>c</i>, and <b>127</b><i>d </i>shown in <figref idref="DRAWINGS">FIG. 21</figref> are divided into four groups, respectively according to outer electrodes connected thereto.

The first inner electrodes <b>126</b><i>a</i>, <b>126</b><i>b</i>, <b>126</b><i>c</i>, and <b>126</b><i>d </i>are connected to two of the first outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d </i>that are different from one another for each of the groups, by two of leads L<b>1</b>, L<b>2</b>, L<b>3</b>, and L<b>4</b>. The second inner electrodes <b>127</b><i>a</i>, <b>127</b><i>b</i>, <b>127</b><i>c</i>, and <b>127</b><i>d </i>are connected to two of the second outer electrodes <b>129</b><i>a</i>, <b>129</b><i>b</i>, <b>129</b><i>c</i>, and <b>129</b><i>d </i>that are different from one another for the each group, by two of leads L<b>5</b>, L<b>6</b>, L<b>7</b>, and L<b>8</b>.

The first inner electrodes <b>126</b><i>a</i>, <b>126</b><i>b</i>, <b>126</b><i>c</i>, and <b>126</b><i>d </i>of the respective groups are connected to two of first outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d </i>by two of the leads L<b>1</b>, L<b>2</b>, L<b>3</b>, and L<b>4</b>, respectively. One of the two first outer electrodes connected to the first inner electrodes belonging to a respective one of the groups is different from the outer electrodes connected to the first inner electrodes belonging to another one of the groups. Also, one of the outer electrodes connected to the inner electrodes belonging to one of the groups is connected to the inner electrodes belonging to another one of the groups. This allows the first inner electrodes of the three groups to be electrically connected to one another.

For example, the first inner electrodes are electrically connected to one another in the order of group A<b>1</b>—the first outer electrode <b>128</b><i>b</i>—group B<b>1</b>—the first outer electrode <b>128</b><i>d</i>—group C<b>1</b>—the first outer electrode <b>128</b><i>b</i>—group D<b>1</b>—the first outer electrode <b>128</b><i>c</i>—group A<b>1</b>.

In a similar manner, the second inner electrodes of the respective groups are not connected to all of the second outer electrodes but two of the second outer electrodes. One of the second outer electrodes connected to the second inner electrodes belonging to a respective one of the groups is different from the second outer electrodes connected to the second inner electrodes belonging to another one of the groups. However, at least one of the second outer electrodes connected to the second inner electrodes belonging to one of the groups is connected to the second inner electrodes of another one of the groups such that the second inner electrodes of all the groups are electrically connected to one another.

In this connection between the outer electrodes and the inner electrodes, the inner electrodes of the specific group may serve as an inner connecting conductor according to the connection between the outer electrodes and power lines. This allows the inner electrodes of one of the groups to be connected in series with the inner electrodes of another group to increase resistance component, thereby assuring relatively high ESR characteristics.

Optionally, to adjust ESR characteristics, a user may additionally connect other first and second outer electrodes than a pair of first and second outer electrodes basically connected to the power lines. With this additional connection between the power lines and the outer electrodes, series-connected resistance components are connected in parallel to one another to thereby reduce ESR characteristics.

First inner electrodes <b>134</b><i>a</i>, <b>134</b><i>b</i>, <b>134</b><i>c</i>, and <b>134</b><i>d </i>and the second inner electrodes <b>135</b><i>a</i>, <b>135</b><i>b</i>, <b>135</b><i>c</i>, and <b>135</b><i>d </i>shown in <figref idref="DRAWINGS">FIG. 22</figref> are divided into four groups, respectively according to outer electrodes connected thereto.

In the present embodiment, the first and second inner electrodes are connected to outer electrodes of a different number, respectively. More specifically, the first inner electrodes <b>134</b><i>a</i>, <b>134</b><i>b</i>, <b>134</b><i>c</i>, and <b>134</b><i>d </i>of the respective groups are connected to three of the first outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d </i>by three of leads L<b>1</b>, L<b>2</b>, L<b>3</b>, and L<b>4</b>, respectively. However, in a similar manner to the previous embodiment, the second inner electrodes of the respective groups are connected to two of the second outer electrodes <b>129</b><i>c</i>, <b>129</b><i>d</i>, <b>129</b><i>b</i>, and <b>129</b><i>a </i>by two of leads L<b>7</b>, L<b>8</b>, L<b>6</b>, and L<b>5</b>, respectively.

In the embodiment shown in <figref idref="DRAWINGS">FIG. 23</figref>, first and second inner electrodes <b>136</b><i>a</i>, <b>136</b><i>b</i>, <b>136</b><i>c</i>, and <b>136</b><i>d</i>; <b>137</b><i>a</i>, <b>137</b><i>b</i>, <b>137</b><i>c</i>, and <b>137</b><i>d </i>are divided into four groups, respectively according to outer electrodes connected thereto.

The first inner electrodes <b>136</b><i>a</i>, <b>136</b><i>b</i>, <b>136</b><i>c</i>, and <b>136</b><i>d </i>are connected to three of the first outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d </i>that are different from one another for each of the groups, by three of leads L<b>1</b>, L<b>2</b>, L<b>3</b>, and L<b>4</b>. The second inner electrodes <b>127</b><i>a</i>, <b>127</b><i>b</i>, <b>127</b><i>c</i>, and <b>127</b><i>d </i>are connected to three of the second outer electrodes <b>129</b><i>a</i>, <b>129</b><i>b</i>, <b>129</b><i>c</i>, and <b>129</b><i>d </i>that are different from one another for the each group, by three of leads L<b>5</b>, L<b>6</b>, L<b>7</b>, and L<b>8</b>.

In the embodiment shown in <figref idref="DRAWINGS">FIG. 24</figref>, only second inner electrodes <b>145</b><i>a</i>, <b>145</b><i>b</i>, <b>145</b><i>c</i>, and <b>145</b><i>d </i>are divided into four groups according to the outer electrode connected thereto. First inner electrodes <b>144</b> are formed of a similar pattern to the first inner connecting conductors <b>122</b>, and pair with the second inner electrodes <b>145</b><i>a</i>, <b>145</b><i>b</i>, <b>145</b><i>c</i>, and <b>145</b><i>d </i>of the respective groups.

That is, the first inner electrodes <b>144</b> are all connected to the first outer electrodes <b>128</b><i>a</i>, <b>128</b><i>b</i>, <b>128</b><i>c</i>, and <b>128</b><i>d </i>by four leads L<b>1</b>, L<b>2</b>, L<b>3</b>, and L<b>4</b>, respectively. Also, in a similar manner to <figref idref="DRAWINGS">FIG. 16D</figref>, the second inner electrodes <b>145</b><i>a</i>, <b>145</b><i>b</i>, <b>145</b><i>c</i>. and <b>145</b><i>d </i>are connected to two of the second outer electrodes <b>129</b><i>a</i>, <b>129</b><i>b</i>, <b>129</b><i>c </i>that are different from one another for the each group, by three of leads L<b>5</b>, L<b>6</b>, L<b>7</b>, and L<b>8</b>.

Similarly to <figref idref="DRAWINGS">FIG. 12</figref>, in this structure, only selective connection between the second outer electrodes connected to the second inner electrodes and power lines allows ESR characteristics of the multilayer capacitor to be adjusted.

The present invention is beneficially applicable to a multilayer capacitor structure in which a laminated direction is perpendicular to a mounting surface.

<figref idref="DRAWINGS">FIG. 25</figref> is a perspective view illustrating a multilayer capacitor according to a sixth embodiment of the invention, which is formed of a four terminal structure having a laminated direction varied.

As shown in <figref idref="DRAWINGS">FIG. 25</figref>, the multilayer capacitor <b>180</b> of the present embodiment includes a capacitor body <b>181</b> where a plurality of dielectric layers <b>181</b>′ are laminated. The body <b>181</b> is formed along a laminated direction and configured as a rectangular parallelepiped structure having opposing first and second surfaces <b>181</b><i>a </i>and <b>181</b><i>b </i>and four side surfaces interposed therebetween. In the multilayer capacitor <b>180</b>, one of the first and second surfaces <b>181</b><i>a </i>and <b>181</b><i>b </i>provides a mounting surface.

The first and second outer electrodes <b>188</b><i>a</i>, <b>188</b><i>b</i>; <b>189</b><i>a</i>, <b>189</b><i>b </i>are formed along the four side surfaces. That is, as shown, the first outer electrodes <b>188</b><i>a </i>and <b>188</b><i>b </i>are formed on two opposing ones of the side surfaces of the body <b>181</b>, respectively. Also, the second outer electrodes <b>189</b><i>a </i>and <b>189</b><i>b </i>are formed on the first and second surfaces <b>181</b><i>a </i>and <b>181</b><i>b </i>of the body <b>181</b>. Accordingly, the first and second outer electrodes <b>188</b><i>a</i>, <b>188</b><i>b</i>; <b>189</b><i>a</i>, <b>189</b><i>b </i>are arranged to have opposite polarities alternating along the four side surfaces.

To suit this arrangement of the outer electrodes, the multilayer capacitor <b>180</b> may include the first and second inner connecting conductors <b>182</b> and <b>183</b> shown in <figref idref="DRAWINGS">FIG. 26</figref> and the first and second inner electrodes <b>184</b><i>a</i>, <b>184</b><i>b</i>; <b>185</b><i>a</i>, <b>185</b><i>b </i>shown in <figref idref="DRAWINGS">FIG. 27</figref>.

The first inner connecting conductor <b>182</b> is connected to the first outer electrodes <b>188</b><i>a </i>and <b>188</b><i>b </i>through two leads L<b>1</b> and L<b>2</b> extended to both of the side surfaces. Similarly, the second inner connecting conductor <b>183</b> is connected to the second outer electrodes <b>199</b><i>a </i>and <b>199</b><i>b </i>disposed on the first and second surfaces <b>181</b><i>a </i>and <b>181</b><i>b </i>through two leads L<b>3</b> and L<b>4</b>, respectively.

The first and second inner electrodes <b>184</b><i>a </i>and <b>184</b><i>b </i>are connected to the first outer electrodes <b>188</b><i>a </i>and <b>188</b><i>b </i>through leads L<b>1</b> and L<b>2</b>, respectively. The second inner electrodes <b>185</b><i>a </i>and <b>185</b><i>b </i>are connected to the second outer electrodes <b>189</b><i>a </i>and <b>189</b><i>b </i>through leads L<b>3</b> and L<b>4</b>, respectively. This connection allows the first and second inner electrodes <b>184</b><i>a</i>, <b>184</b><i>b</i>; <b>185</b><i>a</i>, <b>185</b><i>b </i>to be electrically connected to the inner connecting conductors <b>182</b> and <b>183</b> of identical polarity, respectively.

In a case where the first surface <b>181</b><i>a </i>is a mounting surface and thus one pair of the first and second outer electrodes <b>188</b><i>a </i>and <b>189</b><i>b </i>and the first outer electrode <b>188</b><i>b </i>of the other pair are connected to power lines, the inner electrode <b>185</b><i>a </i>of group B<b>2</b> connected to the second outer electrode <b>189</b><i>b </i>of the other pair is not connected to a terminal. Therefore, the second outer electrode <b>189</b><i>b </i>of the other pair may serve as an outer electrode for adjusting ESR, and when additionally connected to the power line, further reduces ESR.

As in the present embodiment, the outer electrodes are formed on the both surfaces such that the electrodes are easily connected to each other on the mounting surface.

Also, at least one of the outer electrodes may be formed on the first and second surfaces of the body and thus at least an additional one of the outer electrodes may be provided on one mounting surface in addition to the pair of first and second outer electrodes. This outer electrode may be utilized to adjust ESR. The ESR-adjusting outer electrode is the one connected to the inner electrode not connected to the outer electrode connected to the power line. This additional connection between the outer electrode and the power line further reduces ESR.

Also, in the present embodiment, the multilayer capacitor is designed to be horizontally symmetrical about the first and second surfaces. This configuration advantageously allows the mounting surface to be selected freely. Whichever surface is selected as a mounting surface, the inner electrodes and inner connecting conductor may be formed in a horizontal symmetry to ensure identical ESR and ESL characteristics.

<figref idref="DRAWINGS">FIGS. 28A and 28B</figref> are perspective views illustrating a multilayer capacitor according to a seventh embodiment of the invention, which is formed of a six terminal structure having a laminated direction varied.

First, referring to <figref idref="DRAWINGS">FIG. 28A</figref>, the multilayer capacitor <b>190</b> includes a capacitor body <b>191</b> where a plurality of dielectric layers <b>191</b>′ are laminated. The capacitor body <b>191</b> includes opposing first and second surfaces formed in a laminated direction, and the first surface may provide a mounting surface.

The multilayer capacitor <b>190</b> of the present embodiment is formed of a six terminal structure including three first outer electrodes <b>198</b><i>a</i>, <b>198</b><i>b</i>, and <b>198</b><i>c </i>and three second outer electrodes <b>199</b><i>a</i>, <b>199</b><i>b</i>, and <b>199</b><i>c. </i>

<figref idref="DRAWINGS">FIG. 28B</figref> illustrates a multilayer capacitor <b>200</b> formed of a six terminal structure similar to <figref idref="DRAWINGS">FIG. 28A</figref>. Compared to <figref idref="DRAWINGS">FIG. 23A</figref>, out of the first and second outer electrodes <b>208</b><i>a</i>, <b>208</b><i>b</i>, and <b>208</b><i>c</i>; <b>209</b><i>a</i>, <b>209</b><i>b</i>, and <b>209</b><i>c</i>, the outer electrodes <b>208</b><i>a</i>, <b>208</b><i>b</i>, <b>209</b><i>a</i>, <b>209</b><i>b </i>formed on both edges are extended in a different manner. As described, the outer electrode structure applicable to the present invention may be varied as long as satisfying conditions in which one of the first and second surfaces provides a mounting surface.

<figref idref="DRAWINGS">FIGS. 29 and 30</figref> illustrate inner connecting conductors <b>192</b> and <b>193</b> and inner electrodes <b>194</b>, <b>195</b><i>a</i>, <b>195</b><i>b</i>, and <b>195</b><i>c </i>applicable to the structures shown in <figref idref="DRAWINGS">FIGS. 28A and 28B</figref>. Here, the inner connecting conductors and the inner electrodes are formed of one pair, respectively but may be formed of a plurality of pairs and varied in order.

As shown in <figref idref="DRAWINGS">FIG. 29</figref>, the first inner connecting conductor <b>192</b> is connected to the first outer electrodes <b>198</b><i>a </i>and <b>198</b><i>b </i>formed on the second surface and the first outer electrode <b>198</b><i>c </i>formed on the first surface by three leads L<b>1</b>, L<b>2</b>, and L<b>3</b>, respectively. Similarly, the second inner connecting conductor <b>193</b> is connected to the second outer electrodes <b>199</b><i>a </i>and <b>199</b><i>b </i>formed on the first surface and the first outer electrode <b>199</b><i>c </i>formed on the second surface through three leads L<b>4</b>, L<b>5</b>, and L<b>6</b>, respectively.

Referring to <figref idref="DRAWINGS">FIG. 30</figref>, only second inner electrodes <b>195</b><i>a</i>, <b>195</b><i>b</i>, and <b>195</b><i>c </i>are divided into three groups, and first inner electrodes <b>194</b> pair with the second inner electrodes <b>195</b><i>a</i>, <b>195</b><i>b</i>, and <b>195</b><i>c </i>of the respective groups in a similar pattern to the first inner connecting conductors <b>194</b>.

The first inner electrode <b>194</b> is all connected to the first outer electrodes <b>198</b><i>a</i>, <b>198</b><i>b</i>, and <b>198</b><i>c </i>by the three leads L<b>1</b>, L<b>2</b>, and L<b>3</b> formed on the second surface. The second inner electrodes <b>195</b><i>a</i>, <b>195</b><i>b</i>, and <b>195</b><i>c </i>are connected to two of the second outer electrodes <b>199</b><i>a</i>, <b>199</b><i>b</i>, and <b>199</b><i>c </i>that are different from one another for each of the groups, by two of the leads L<b>4</b>, L<b>5</b>, and L<b>6</b>.

In this structure, when the first surface provides a mounting surface and a pair of first and second outer electrodes <b>198</b><i>c </i>and <b>199</b><i>b </i>are connected to power lines, the second inner electrode <b>195</b><i>b </i>of group C<b>2</b> is not connected to the other first outer electrode <b>199</b><i>a </i>disposed on the first surface. Therefore, the first outer electrode <b>199</b><i>a </i>serves to adjust ESR and can be selectively connected to the power line to adjust ESR.

The multilayer capacitor of the present embodiment may be configured as at least eight or more terminals. Similarly to the present embodiment, as long as the outer electrodes formed on the first and second surfaces of the body are at least three in number, and at least one pair of the first and second outer electrodes are connected to the inner electrodes of the specific group capable of adjusting ESR, such configuration is beneficially applicable to a multilayer capacitor in which a surface formed in a laminated direction provides a mounting surface.

<figref idref="DRAWINGS">FIGS. 28A and 28B</figref> illustrate the multilayer capacitor employing only the inner connecting conductor (<figref idref="DRAWINGS">FIG. 29</figref>). However, the multilayer capacitor is a six or more terminal structure, and thus can be configured only with the inner electrodes without the inner connecting conductor (see <figref idref="DRAWINGS">FIGS. 11 and 12</figref>).

As set forth above, according to exemplary embodiments of the invention, in mounting a multilayer capacitor, outer electrodes are selectively connected to external power lines to vary ESR characteristics of the multilayer capacitor. Accordingly, a manufacturer can provide a multilayer capacitor capable of satisfying various ESR characteristics as a single chip. Also, a user can easily determine desired ESR characteristics easily only by connecting the outer electrodes with power lines.

While the present invention has been shown and described in connection with the exemplary embodiments, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit and scope of the invention as defined by the appended claims.