Injection-locked frequency divider

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan application serial no. 96138997, filed on Oct. 18, 2007. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to an injection-locked frequency divider, and more particularly, to an injection-locked frequency divider, based on a mixer and a voltage control oscillator, having a wide injection-locking range and a low phase noise.

2. Description of Related Art

The rapid development of wireless communication, not only drastically improves quality of human life, but also brings huge economic profit. Up to now, one may instantly communicate and share information with others simply by a notebook, a personal digital assistant, or a cellular phone. In a typical wireless communication system, a frequency synthesizer is a critical component for generating carrier wave signals. The frequency synthesizer usually includes a frequency divider for dividing a frequency of an input signal, so as to generate a signal with desired frequency. Such frequency dividers are also widely used in multiplexers, phase locked loops, and clock pulse generators.

Frequency dividers are often classified into digital frequency dividers and analog frequency dividers. Digital frequency dividers include common mode logic frequency dividers and dynamic logic frequency dividers. Analog frequency dividers include Miller dividers and injection-locked frequency dividers. Typically, a frequency divider often consumes much power when operating under a high frequency, so as to decrease the operation efficiency of the system. Comparatively, an injection-locked frequency divider, in an RF communication system, usually having a higher operation frequency and lower power consumption than other frequency dividers, is often selected.

<figref idrefs="DRAWINGS">FIG. 1</figref> is a circuit diagram illustrating a conventional injection-locked frequency divider. Referring to <figref idrefs="DRAWINGS">FIG. 1</figref>, there is shown a conventional injection-locked frequency divider <b>100</b> including a signal injection unit <b>110</b>, and an LC resonance tank <b>120</b>. The signal injection unit <b>110</b> includes a P type transistor P<b>1</b>, for receiving an injection signal Vinj having a frequency fi. The LC resonance tank <b>120</b> includes the inductances I<b>1</b>, I<b>2</b>, and the variable capacitors Cf<b>1</b>, Cf<b>2</b>. In the injection-locked frequency divider <b>100</b>, a signal Vtune is introduced to control voltage differences over the variable capacitors Cf<b>1</b> and Cf<b>2</b>, so as to adjust an oscillation frequency fo of a frequency dividing signal S<b>1</b>. When the oscillation frequency fo approximates to a half of the frequency fi of the injection signal Vinj, the injection-locked frequency divider <b>100</b> locks and outputs the frequency dividing signal S<b>1</b> with a frequency of fi/2 via nodes A and B. The injection-locked frequency divider <b>100</b> further includes P type transistors P<b>2</b> and P<b>3</b>. The P type transistors P<b>2</b> and P<b>3</b> are cross coupled to generate a negative resistance for eliminating an equivalent resistance generated by the LC resonance tank <b>120</b>.

However, when the oscillation frequency fo is too much different from a half of the injection signal (fi/2), the injection-locked frequency divider <b>100</b> is then incapable of locking the frequency of the frequency dividing signal S<b>1</b>. Generally, a ratio LR of a locking range is used for describing that a highest frequency f_IHthat can be locked minus a lowest frequency f_ILthat can be locked, and then is divided by two times of the oscillation frequency fo of the LC resonance tank <b>120</b>, which can be represented by an equation as LR=(f_IH−f_IL)/(2×fo). Although the conventional injection-locked frequency divider <b>100</b> is adapted for operation under a very high frequency, unfortunately its locking range is too narrow, so that the injection-locked frequency divider <b>100</b> has too narrow a range for frequency dividing. Even though the variable capacitors Cf<b>1</b>, Cf<b>2</b> are employed for adjusting the oscillation frequency, the locking range can not be effectively improved.

As such, to further modify the conventional injection-locked frequency divider and providing a solution of the narrow locking range thereof become an important concern of the research of injection-locked frequency dividers.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to an injection-locked frequency divider, which employs a voltage control oscillator (VCO) to generate an oscillation signal, and a mixer mixing the oscillation signal with an injection signal, so as to adjust and lock a frequency of the oscillation signal. The injection-locked frequency divider has advantages such as a wide locking range, and a low phase noise.

The present invention provides an injection-locked frequency divider. The injection-locked frequency divider includes a voltage control oscillator (VCO), and a mixer. The VCO includes an LC resonance tank and a negative resistance generator, for generating a differential oscillation signal including a first and a second oscillation signals. The LC resonance tank includes a first connection terminal and a second connection terminal, for adjusting a reactance thereof and resonating for generate the differential oscillation signal. The LC resonance tank outputs the first and the second oscillation signals respectively from the first and the second connection terminals. The negative resistance generator is coupled to the first and the second connection terminals, for eliminating an equivalent resistance generated by the LC resonance tank and maintaining the VCO to oscillate continuously. The mixer is coupled to the VCO, including a first and a second local input terminals respectively receiving a first and a second injection signals included in a differential injection signal, and a first and a second RF input terminals receiving the first and the second oscillation signals respectively, for mixing the differential signal with the differential oscillation signal, and thus adjusting and locking an output frequency of the differential oscillation signal.

According to an embodiment of the present invention, the foregoing LC resonance tank of the injection-locked frequency divider includes a first inductance and a second inductance, and a first variable capacitor and a second variable capacitor. The first inductance has a first terminal serving as the first connection terminal. The second inductance has a first terminal coupled to a second terminal of the first inductance, and a second terminal serving as the second connection terminal of the LC resonance tank. The first variable capacitor has a first terminal coupled to the first terminal of the first inductance, and a second terminal receiving a reactance control signal. The second variable capacitor has a first terminal coupled to the second terminal of the first variable capacitor, and a second terminal coupled to the second terminal of the second inductance. The LC resonance tank controls a reactance value thereof according to the reactance control signal.

According to an embodiment of the present invention, the foregoing LC resonance tank of the injection-locked frequency divider includes a first inductance and a second inductance, and a first variable capacitor and a second variable capacitor. The first inductance has a first terminal serving as the first connection terminal, and a second terminal coupled to a first voltage. The second inductance has a first terminal serving as the second connection terminal of the LC resonance tank, and a second terminal coupled to the first voltage. The first variable capacitor has a first terminal coupled to the first terminal of the first inductance, and a second terminal receiving a reactance control signal. The second variable capacitor has a first terminal coupled to a second terminal of the first variable capacitor, and a second terminal coupled to the first terminal of the second inductance. The LC resonance tank controls a reactance value thereof according to the reactance control signal.

According to an embodiment of the present invention, the foregoing mixer of the injection-locked frequency divider includes a first through sixth transistors. The first transistor has a gate receiving the first injection signal, a first source/drain coupled to the second connection terminal of the LC resonance tank. The second transistor has a gate and a first source/drain respectively coupled to the gate of the first transistor and the first connection terminal of the LC resonance tank. The third transistor has a gate receiving the second injection signal, a first source/drain and a second source/drain respectively coupled to the first connection terminal of the LC resonance tank and a second source/drain of the first transistor. The fourth transistor has a gate, a first source/drain and a second source/drain respectively coupled to the gate of the third transistor, the second connection terminal of the LC resonance, and a second source/drain of the second transistor. The fifth transistor has a gate receiving the first oscillation signal, and a first source/drain and a second source/drain respectively coupled to the second source/drain of the first transistor and the first voltage. The sixth transistor has a gate receiving the second oscillation signal, and a first source/drain and a second source/drain respectively coupled to the second source/drain of the second transistor and the first voltage. The gates of the first and the third transistors respectively serve as the first and second local input terminals, and the gates of the fifth and the sixth transistors respectively serve as the first and second RF input terminals.

According to an embodiment of the present invention, the foregoing negative resistance generator of the injection-locked frequency divider includes a first and a second switches. The first switch has a first terminal, a second terminal and a controller terminal, respectively coupled to the first voltage, the first connection terminal of the LC resonance tank, and the second connection terminal of the LC resonance tank. The second switch has a first terminal, a second terminal and a controller terminal, respectively coupled to the first voltage, the second connection terminal of the LC resonance tank, and the first connection terminal of the LC resonance tank.

The injection-locked frequency divider according to the present invention feedbacks a oscillation signal generated by a VCO to an RF input terminal of a mixer, so as to mix the oscillation signal with an injection signal of a local input terminal of the mixer, and thus adjusting and locking the output frequency of the oscillation signal. In such a way, the locking range of the injection-locked frequency divider can be enlarged, and the phase noise thereof can be decreased accordingly.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

<figref idrefs="DRAWINGS">FIG. 1</figref> is a circuit diagram illustrating a conventional injection-locked frequency divider.

<figref idrefs="DRAWINGS">FIG. 2</figref> illustrates a structural diagram of an injection-locked frequency divider according to an embodiment of the present invention.

<figref idrefs="DRAWINGS">FIG. 3</figref> is a circuit diagram illustrating the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref>.

<figref idrefs="DRAWINGS">FIG. 4A</figref> is a circuit diagram illustrating a VCO of the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref> according to an embodiment of the present invention.

<figref idrefs="DRAWINGS">FIG. 4B</figref> is a circuit diagram illustrating a VCO of the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref> according to another embodiment of the present invention.

<figref idrefs="DRAWINGS">FIG. 4C</figref> is a circuit diagram illustrating a VCO of the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref> according to a further embodiment of the present invention.

DESCRIPTION OF THE EMBODIMENTS

Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or similar parts.

<figref idrefs="DRAWINGS">FIG. 2</figref> illustrates a structural diagram of an injection-locked frequency divider according to an embodiment of the present invention. Referring to <figref idrefs="DRAWINGS">FIG. 2</figref>, there is shown an injection-locked frequency divider <b>200</b> including a voltage control oscillator (VCO) <b>210</b>, a mixer <b>220</b>, and buffers <b>231</b> and <b>232</b>. The VCO <b>210</b> includes an LC resonance tank <b>211</b>, and a negative resistance generator <b>212</b>. The VCO <b>210</b> generates a differential oscillation signal SO via a resonance of the LC resonance tank <b>211</b>. The differential oscillation signal SO includes a first oscillation signal SO₁, and a second oscillation signal SO₂. The first oscillation signal SO₁and the second oscillation signal SO₂are respectively outputted from a first connection terminal N<b>1</b> and a second connection terminal N<b>2</b> of the LC resonance tank <b>211</b> to a first and a second ratio frequency (RF) input terminals RF+, RF− of the mixer <b>220</b>. The mixer <b>220</b> includes a first and a second local input terminals LO+, LO−, respectively for receiving a first and a second injection signals SI₁, SI₂included in a differential injection signal SI. The mixer <b>220</b> mixes the differential injection signal SI with the differential oscillation signal SO, to adjust and lock an output frequency of the differential oscillation signal SO. According to an embodiment of the present invention, the differential injection signal SI is generated by another local VCO.

The buffers <b>231</b> and <b>232</b> are respectively coupled to the first and the second connection terminals N<b>1</b> and N<b>2</b> of the LC resonance tank <b>211</b>. When the injection-locked frequency divider <b>200</b> locks and outputs the first and the second oscillation signals SO₁and SO₂, the buffers <b>231</b> and <b>232</b> can be used for increasing signal transmission intensity of the first and the second oscillation signals SO₁and SO₂, and transmitting the same.

<figref idrefs="DRAWINGS">FIG. 3</figref> is a circuit diagram illustrating the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref>. Referring to <figref idrefs="DRAWINGS">FIG. 3</figref>, the VCO <b>210</b> includes an LC resonance tank <b>211</b> and a negative resistance generator <b>212</b>. The LC resonance tank <b>211</b> includes the inductances L<b>1</b> and L<b>2</b>, and the variable capacitors C<b>1</b> and C<b>2</b>. The inductance L<b>1</b> has a first terminal serving as a first connection terminal N<b>1</b> of the LC resonance tank <b>211</b>, and a second terminal coupled to a first terminal of the inductance L<b>2</b>. The inductance L<b>2</b> has a second terminal serving as a second connection terminal N<b>2</b> of the LC resonance tank <b>211</b>. The variable capacitor C<b>1</b> has a first terminal coupled to the first terminal of the inductance L<b>1</b>, and a second terminal receiving a reactance control signal CON. The variable capacitor C<b>2</b> has a first terminal coupled to the second terminal of the variable capacitor C<b>1</b>, and a second terminal coupled to the second terminal of the inductance L<b>2</b>. The LC resonance tank <b>211</b> resonates according to the mutual operation of the inductances L<b>1</b> and L<b>2</b> and the variable capacitors C<b>1</b> and C<b>2</b>, and generates the differential oscillation signal SO. The LC resonance tank <b>211</b> adjusts a reactance value of the differential oscillation signal SO via the reactance control signal CON, and thus adjusting the oscillation frequency of the differential oscillation signal SO.

As shown in <figref idrefs="DRAWINGS">FIG. 3</figref>, the negative resistance generator <b>212</b> includes switches S<b>1</b> and S<b>2</b>. According to an embodiment of the invention, the switches S<b>1</b> and S<b>2</b> are implemented by P type transistors. The switch S<b>1</b> has a first terminal, a second terminal and a control terminal respectively coupled to a first voltage, e.g., a power source voltage VDD, the first and second connection terminals N<b>1</b> and N<b>2</b> of the LC resonance tank <b>211</b>. The switch S<b>2</b> has a first terminal, a second terminal, and a control terminal, respectively coupled to the first voltage, the second and first connection terminals N<b>2</b> and N<b>1</b> of the LC resonance tank <b>211</b>. The switches S<b>1</b> and S<b>2</b> implemented by P type transistors are cross coupled within the negative resistance generator <b>212</b> so that the negative resistance generator <b>212</b> generates a negative resistance to eliminate an equivalent resistance generated by the LC resonance tank <b>211</b> and maintains the VCO <b>210</b> continuously oscillating.

As shown in <figref idrefs="DRAWINGS">FIG. 3</figref>, according to an aspect of the embodiment, the mixer <b>220</b> of the embodiment is a Gilbert cell mixer, which is adapted for effectively depressing the generation of even harmonics waves, by which dominant frequency signals can have better quality, and phase noises of the injection-locked frequency divider <b>200</b> can be decreased. However, the present invention is not restricted by the use of Gilbert mixer, while other kinds of mixers can also be selected. The mixer <b>220</b> includes transistors T<b>1</b> through T<b>6</b> and resistors R<b>1</b> and R<b>2</b>. The transistors T<b>1</b> through T<b>6</b> are N type transistors. The transistor T<b>1</b> has a gate serving as the first local input terminal LO+ of the mixer <b>220</b> and receiving the first injection signal SI₁, and has a first source/drain coupled to the second connection terminal N<b>2</b> of the LC resonance tank <b>211</b>. The transistor T<b>2</b> has a gate and a first source/drain respectively coupled to the gate of the transistor T<b>1</b> and the first connection terminal N<b>1</b> of the LC resonance tank <b>211</b>.

The transistor T<b>3</b> has a gate serving as the second local input terminal LO− of the mixer <b>220</b> and receiving the second injection signal SI₂. The transistor T<b>3</b> also has a first source/drain and a second source/drain respectively coupled to the first connection terminal N<b>1</b> of the LC resonance tank <b>211</b> and the second source/drain of the transistor T<b>1</b>. The transistor T<b>4</b> has a gate, a first source/drain and a second source/drain, respectively coupled to the gate of the transistor T<b>3</b>, the second connection terminal N<b>2</b> of the LC resonance tank <b>211</b>, and the second source/drain of the transistor T<b>2</b>. The transistor T<b>5</b> has a gate serving as a first RF input terminal RF+ and receiving the first oscillation signal SO₁, a first and a second source/drains respectively coupled to the second source/drain of the transistor T<b>1</b> and a second voltage, e.g., a ground voltage GND. The transistor T<b>6</b> has a gate serving as a second RF input terminal RF− and receiving the second oscillation signal SO₂, and has a first source/drain and a second source/drain coupled respectively to the second source/drain of the transistor T<b>2</b> and the second voltage. The resistor R<b>1</b> has a first terminal and a second terminal respectively coupled to the gate of the transistor T<b>1</b> and a bias voltage Vb. The resistor R<b>2</b> has a first terminal and a second terminal coupled respectively to the gate of the transistor T<b>3</b> and the bias voltage Vb.

The mixer <b>220</b> mainly includes two stages, i.e., transconductance stage and switch stage. The transconductance stage is composed of the transistors T<b>5</b> and T<b>6</b>, and is adapted to transform the differential oscillation signal SO from a voltage signal to a current signal. The transistors T<b>5</b> and T<b>6</b> also have functions of limiting current. Then the transformed differential oscillation signal SO is inputted to the switch stage composed of the transistors T<b>1</b> through T<b>4</b>, in which current is switched to mix the differential oscillation signal SO with the differential injection signal SI. The transistors T<b>1</b> and T<b>3</b> compose of a differential pair, and the transistors T<b>2</b> and T<b>4</b> compose of another differential pair. The VCO <b>210</b> is coupled to the mixer <b>220</b> serving as a load stage of the mixer <b>220</b>. The VCO <b>210</b> is adapted to convert the mixed signals into voltage signals and then outputs the first and second oscillation signals SO₁and SO₂respectively from the buffers <b>231</b> and <b>232</b>.

According to an embodiment of the present invention, the buffers <b>231</b> and <b>232</b> implemented by inverters. The buffer <b>231</b> is composed of the transistors T<b>7</b> and T<b>8</b>, while the buffer <b>232</b> is composed of the transistors T<b>9</b> and T<b>10</b>. According to an aspect of the embodiment, the transistors T<b>7</b> and T<b>9</b> are P type transistors, and the transistors T<b>8</b> and T<b>10</b> are N type transistors.

When the injection-locked frequency divider <b>200</b> according to the embodiment of the present invention is operated at a high frequency, the transistors T<b>1</b> through T<b>6</b> of the mixer <b>220</b> cause a parasitic capacitor effect. In such a way, after being mixed, the high frequency signals are filtered thereby while the low frequency signals are retained, by which the frequency is divided. The injection-locked frequency divider <b>200</b> according to the present invention accomplish a ½ frequency divider in this manner, in which a differential oscillation signal SO generated by a self-oscillation of the VCO <b>210</b> is mixed with an externally inputted differential injection signal SI. When a frequency of the differential oscillation signal SO approximates a half of a frequency of the differential injection signal SI, the injection-locked frequency divider <b>200</b> locks and outputs the differential oscillation signal SO. In such a way, the injection-locked frequency divider <b>200</b> according to the embodiment of the present invention receiving the differential injection signals SI via the mixer <b>220</b>, not only increases the locking range, but also decreases the phase noise. Further the injection-locked frequency divider <b>200</b> mixes the differential oscillation signal SO with the differential injection signal SI via the mixer <b>220</b>, so as to obtain a differential oscillation signal SO which frequency is a half of the frequency of the differential injection signal SI.

It should be noted that the injection-locked frequency divider <b>200</b> can be modified in accordance with the practical application within the scope of the present invention. For example, one of ordinary skill in the art may modify the switches S<b>1</b> and S<b>2</b> which are complied with P type transistors of the VCO <b>210</b> by substituting the P type transistors with N type transistors, or otherwise replacing the transistors T<b>1</b> through T<b>6</b> of the mixer with P type transistors.

<figref idrefs="DRAWINGS">FIG. 4A</figref> is a circuit diagram illustrating a VCO of the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref> according to an embodiment of the present invention. Referring to <figref idrefs="DRAWINGS">FIG. 4A</figref>, the VCO <b>210</b> includes an LC oscillation tank <b>211</b> and a negative resistance generator <b>212</b>. The LC resonance tank <b>211</b> includes the inductances L<b>3</b> through L<b>4</b>, and the variable capacitors C<b>3</b> through C<b>4</b>. The inductance L<b>3</b> has a first terminal serving as the first connection terminal N<b>1</b> of the LC resonance tank <b>211</b>, and a second terminal coupled to a first voltage, e.g., a power source voltage VDD. The inductance L<b>4</b> has a first terminal serving as the second connection terminal N<b>2</b> of the LC resonance tank <b>211</b>, and a second terminal coupled to the first voltage. The variable capacitor C<b>3</b> has a first terminal coupled to the first terminal of the inductance L<b>3</b>, and a second terminal receiving a reactance control signal CON. The variable capacitor C<b>4</b> has a first terminal coupled to the second terminal of the variable capacitor C<b>3</b>, and a second terminal coupled the first terminal of the inductance L<b>4</b>. The LC resonance tank <b>211</b> is adapted to adjust a reactance value thereof according to the reactance control signal CON, and therefore control the oscillation frequency of the differential oscillation signal SO.

The negative resistance generator includes the switches S<b>3</b> through S<b>4</b>. The switches S<b>3</b> and S<b>4</b> are implemented by N type transistors. The switch S<b>3</b> has a first terminal, a second terminal, and a control terminal, respectively coupled to a second voltage, e.g., a ground voltage GND, the first and second connection terminals N<b>1</b> and N<b>2</b> of the LC resonance tank <b>211</b>. The switch S<b>4</b> has a first terminal, a second terminal, and a control terminal, respectively coupled to the second voltage, the second and first connection terminals N<b>2</b> and N<b>1</b> of the LC resonance tank <b>211</b>.

<figref idrefs="DRAWINGS">FIG. 4B</figref> is a circuit diagram illustrating a VCO of the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref> according to another embodiment of the present invention. Referring to <figref idrefs="DRAWINGS">FIG. 4B</figref>, the VCO <b>210</b> includes an LC resonance tank <b>211</b> and a negative resistance generator <b>212</b>. According to an aspect of the embodiment, the VCO <b>210</b> is a Hartley VCO. Therefore, a half circuit of the injection-locked frequency divider <b>21</b> is a resonant circuit mainly composed of two inductances and one variable capacitor which are connected in parallel. The LC resonance tank <b>211</b> includes the capacitors CA<b>1</b> and CA<b>2</b>, the inductances L<b>5</b> through L<b>8</b>, the variable capacitors C<b>5</b> and C<b>6</b>, and the switches S<b>7</b> and S<b>8</b>. The switches S<b>7</b> through S<b>8</b> are implemented by P type transistors. The capacitor CA<b>1</b> has s first terminal serving as a first connection terminal N<b>1</b> of the LC resonance tank <b>211</b>. The capacitor CA<b>2</b> has a first terminal serving as a second connection terminal N<b>2</b> of the LC resonance tank <b>211</b>. The inductance L<b>5</b> has a first terminal coupled to a second terminal of the capacitor CA<b>1</b>. The inductance L<b>6</b> has a first terminal and a second terminal coupled respectively to a second terminal of the inductance L<b>5</b> and a bias voltage Vbias. The inductance L<b>7</b> has a first terminal and a second terminal respectively coupled to the second terminal of the inductance L<b>6</b> and a second terminal of the capacitor CA<b>2</b>. The inductance L<b>8</b> has a first terminal coupled to the second terminal of the inductance L<b>7</b>.

The variable capacitor C<b>5</b> has a first terminal coupled to the second terminal of the inductance L<b>5</b>, and a second terminal receiving the reactance control signal CON. The variable capacitor C<b>6</b> has a first terminal coupled to the second terminal of the variable capacitor C<b>5</b>, and a second terminal coupled to the second terminal of the inductance L<b>8</b>. The switch S<b>7</b> has a first terminal, a second terminal, and a control terminal, respectively coupled to the first terminal of the capacitor CA<b>1</b> and the second voltage, e.g., a ground voltage GND, and the second terminal of the inductance L<b>5</b>. The switch S<b>8</b> has a first terminal, a second terminal, and a control terminal, respectively coupled to the first terminal of the capacitor CA<b>2</b>, the second voltage, and the second terminal of the inductance L<b>8</b>. The LC resonance tank <b>211</b> is adapted to adjust the reactance value thereof according to the reactance control signal CON, and thus controlling the oscillation frequency of the differential oscillation signal SO. Further, the negative resistance generator <b>212</b> according to the present invention is structurally and functionally similar with that shown in the embodiment of <figref idrefs="DRAWINGS">FIG. 3</figref>, and is not to be iterated hereby.

<figref idrefs="DRAWINGS">FIG. 4C</figref> is a circuit diagram illustrating a VCO of the injection-locked frequency divider of <figref idrefs="DRAWINGS">FIG. 2</figref> according to another embodiment of the present invention. Referring to <figref idrefs="DRAWINGS">FIG. 4C</figref>, the VCO <b>210</b> includes an LC resonance tank <b>211</b> and a negative resistance generator <b>212</b>. According to an aspect of the embodiment, the VCO <b>210</b> is a Colpitts VCO. Therefore, the LC resonance tank <b>211</b> is a resonant circuit mainly composed of an equivalent inductance and two variable capacitors. The LC resonance tank <b>211</b> includes the inductances L<b>9</b> and L<b>10</b>, the variable capacitors C<b>7</b> and C<b>8</b>, the capacitors CA<b>3</b> through CA<b>5</b>, and the switches S<b>9</b> and S<b>10</b>. The switches S<b>9</b> and S<b>10</b> are implemented by N type transistors. A first terminal of the inductance L<b>9</b> and a first terminal of the inductance L<b>10</b> are coupled to a first voltage, e.g., a power source voltage VDD. The variable capacitor C<b>7</b> has a first terminal coupled to a second terminal of the inductance L<b>9</b>, and a second terminal receiving the reactance control signal CON. The variable capacitor C<b>8</b> has a first terminal coupled to the second terminal of the variable capacitor C<b>7</b>, and a second terminal coupled to the second terminal of the inductance L<b>10</b>.

The capacitor CA<b>3</b> has a first terminal coupled to the second terminal of the inductance L<b>9</b>, and a second terminal serving as the first connection terminal N<b>1</b> of the LC resonance tank <b>211</b>. The capacitor CA<b>4</b> has a first terminal coupled to the second terminal of the inductance L<b>10</b>, and a second terminal serving as a second connection terminal N<b>2</b> of the LC resonance tank <b>211</b>. The capacitor CA<b>5</b> has a first terminal and a second terminal respectively coupled to the second terminal of the capacitor CA<b>3</b> and the second terminal of the capacitor CA<b>4</b>. The switch S<b>9</b> has a first terminal, a second terminal, and a control terminal respectively coupled to the second terminal of the inductance L<b>9</b>, the second terminal of the capacitor CA<b>3</b>, and a bias voltage Vbias. The switch S<b>10</b> has a first terminal, a second terminal, and a control terminal, respectively coupled to the second terminal of the inductance L<b>10</b>, the second terminal of the capacitor CA<b>4</b>, and the bias voltage Vbias. The LC resonance tank <b>211</b> is adapted to adjust a reactance thereof according to the reactance control signal CON, and thus controlling the oscillation frequency of the differential oscillation signal SO. Further, the negative resistance generator <b>212</b> is functionally and structurally similar with that described in the embodiment of <figref idrefs="DRAWINGS">FIG. 4A</figref>, and is not to be iterated hereby.

In summary, the injection-locked frequency divider <b>200</b> utilizes the mixer <b>220</b> to mix the differential oscillation signals SO generated by the VCO <b>210</b> with externally inputted differential injection signals SI, so as to lock an output frequency of the differential oscillation signal SO. When operating at a high frequency, a parasitic capacitance effect is generated in the mixer <b>220</b>. The parasitic capacitor is adapted for filtering the high frequency signals while the low frequency signals are retained, by which the frequency is divided. In such a way, the injection-locked frequency divider <b>200</b> according to the embodiment of the present invention receiving the differential injection signal SI via the mixer <b>220</b>, not only increases the locking range, but also decreases the phase noise.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention covers modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.