Organic electro-luminescent display of dual-panel type and method for manufacturing the same
Summary by NHIP
Dual-panel organic electro-luminescent display
The display comprises two facing transparent substrates separated by a spacer, with a transistor on the first substrate and a first electrode on the second. A projecting part of the first electrode extends toward the first substrate through openings between neighboring organic electro-luminescent layers and second electrodes to connect to the transistor.
Claim Score by NHIP
Abstract
An organic electro-luminescent display and a method for manufacturing the same are disclosed. The organic electro-luminescent display includes a first transparent substrate and a second transparent substrate which are arranged to face each other while being spaced apart from each other by a predetermined distance, a transistor formed on the first transparent substrate, a spacer formed on the second transparent substrate, a first electrode formed on surfaces of the second transparent substrate and the spacer, and electrically connected to the transistor, an organic electro-luminescent layer formed on the first electrode, and a second electrode formed on the organic electro-luminescent layer, wherein the first electrode has a projecting part projected with the spacer toward the first substrate, exposed between neighboring organic electro-luminescent layers and between neighboring second electrodes so as to connect to the transistor.

Term
0.2 yearsleft in the term
Expires 13 December 2026, including 552 days of term adjustment.
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18 claims: 3 independent, 15 dependent
- 1Broadest claimClaim Score 62, broad(NHIP)An organic electro-luminescent display comprising:a first transparent substrate and a second transparent substrate which are arranged to face each other while being spaced apart from each other by a predetermined distance;a transistor formed on the first transparent substrate;a spacer formed on the second transparent substrate;a first electrode formed on surfaces of the second transparent substrate and the spacer, and electrically connected to the transistor;an organic electro-luminescent layer formed on the first electrode;and a second electrode formed on the organic electro-luminescent layer, wherein the first electrode between the second transparent substrate and the organic electro-luminescent layer has a projecting part projected with the spacer toward the first substrate, exposed through an opening part between neighboring organic electro-luminescent layers and between neighboring second electrodes so as to connect to the transistor.
- 7An organic electro-luminescent display comprising:a first transparent substrate and a second transparent substrate which are arranged to face each other while being spaced apart from each other by a predetermined distance;a transistor formed on the first transparent substrate;a spacer formed around a light emitting region on the second transparent substrate;a first electrode formed on surfaces of the second transparent substrate and the spacer such that the first electrode has a portion formed on the light emitting region of the surface of the first transparent substrate, and a portion formed on the surface of the spacer, the first electrode portion formed on the spacer being electrically connected to the transistor;a barrier formed around the spacer, wherein the barrier and the spacer are formed on the second transparent substrate;an organic electro-luminescent layer formed on the first electrode portion formed on the light emitting region of the second transparent substrate, except for the spacer;and a second electrode formed on the organic electro-luminescent layer, wherein the first electrode portion, between the second transparent substrate and the organic electro-luminescent layer, on the spacer is exposed through an opening part between neighboring organic electro-luminescent layers and between neighboring second electrodes so as to connect to the transistor.
- 14A method for manufacturing an organic electro-luminescent display, comprising the steps of:manufacturing a lower substrate of the organic electro-luminescent display, the lower substrate manufacturing step comprising the steps of preparing a first transparent substrate, and forming a transistor on the first transparent substrate;manufacturing an upper substrate of the organic electro-luminescent display, the upper substrate manufacturing step comprising the steps of preparing a second transparent substrate, forming a spacer around a light emitting region on a surface of the second transparent substrate, forming a first electrode on the surfaces of the second transparent substrate and the spacer, forming a barrier around the spacer, forming an organic electro-luminescent layer on a portion of the first electrode formed on the light emitting region of the second transparent substrate, except for the spacer, and forming a-second electrode on the organic electro-luminescent layer;and bonding the upper and lower plates of the organic electro-luminescent display such that a portion of the first electrode formed on the spacer in the upper substrate is electrically connected with an electrode of the transistor in the lower substrate, wherein the first electrode between the second transparent substrate and the organic electro-luminescent layer has a projecting part projected with the spacer toward the first substrate, exposed through an opening part between neighboring organic electro-luminescent layers and between neighboring second electrodes so as to connect to the transistor, and wherein the barrier and the spacer are formed on the second transparent substrate.
Independent claims3
75 paragraphs in 4 sections, as filed
0001This application claims the benefit of Korean Patent Application No. 10-2004-0042635, filed on Jun. 10, 2004, which is hereby incorporated by reference as if fully set forth herein.
BACKGROUND OF THE INVENTION
00021. Field of the Invention
0003The present invention relates to an organic electro-luminescent (EL) display, and more particularly, to a dual-panel type organic EL display and a method for manufacturing the same.
00042. Discussion of the Related Art
0005Generally, dual-panel type organic EL displays include a lower substrate, on which pixel switching elements and pixel driving elements are formed, and an upper substrate, on which an organic material is laminated. The upper and lower substrates are bonded to be electrically connected, for implementation of a display.
0006Hereinafter, a conventional method for manufacturing such a dual-panel type organic EL display will be described.
0007The lower substrate of a dual-panel type organic EL display mainly includes, for each pixel region thereof, a switching thin film transistor (typically, a polysilicon thin film transistor) for switching of a pixel corresponding to the pixel region, a driving thin film transistor for driving of the pixel, a storage capacitor, and a pixel electrode.
0008<figref idref="DRAWINGS">FIG. 1A</figref> is a sectional view illustrating a conventional process for manufacturing a lower substrate of a dual-panel type organic EL display. The following description will be given only in conjunction with one thin film transistor included in one pixel of the dual-panel type organic EL display.
0009In accordance with the conventional process, first, a semiconductor layer <b>2</b> made of, for example, polysilicon, is formed over a transparent substrate <b>1</b>, as shown in <figref idref="DRAWINGS">FIG. 1A</figref>. The semiconductor <b>2</b> is then patterned such that the semiconductor <b>2</b> remains only in a region where a thin film transistor is to be formed.
0010Thereafter, a gate insulating film <b>3</b> and a conductive film for formation of a gate electrode are sequentially formed over the entire surface of the resulting structure. The conductive film is then patterned to form a gate electrode <b>4</b>.
0011Using the gate electrode <b>4</b> as a mask, impurity ions such as phosphorous (P) ions are then implanted into the semiconductor layer <b>2</b> which is, in turn, annealed to form source and drain regions <b>2</b><i>a </i>and <b>2</b><i>c </i>of the thin film transistor. Thus, an NMOS thin film transistor is completely formed.
0012The portion of the semiconductor layer <b>2</b>, into which the impurity ions are not implanted, forms a channel region <b>2</b><i>b </i>of the NMOS thin film transistor.
0013Next, an interlayer insulating film <b>5</b> is formed over the entire surface of the resulting structure. Subsequently, the interlayer insulating film <b>5</b> and gate insulating film <b>3</b> are selectively removed such that the source and drain regions <b>2</b><i>a </i>and <b>2</b><i>c </i>of the NMOS thin film transistor are exposed.
0014An electrode line <b>6</b> and a pixel electrode <b>6</b>′ are then formed on the exposed source and drain regions <b>2</b><i>a </i>and <b>2</b><i>c </i>such that the electrode line <b>6</b> and pixel electrode <b>6</b>′ are electrically connected to the source and drain regions <b>2</b><i>a </i>and <b>2</b><i>c, </i>respectively. Thus, the lower substrate is completely formed.
0015<figref idref="DRAWINGS">FIG. 2</figref> is a plan view illustrating an upper substrate of the dual-panel type organic EL display manufactured in accordance with a conventional process. <figref idref="DRAWINGS">FIG. 1B</figref> is a cross-sectional view taken along the line I-I of <figref idref="DRAWINGS">FIG. 2</figref>.
0016In accordance with the conventional process, as shown in <figref idref="DRAWINGS">FIGS. 1B and 2</figref>, an anode <b>8</b> is formed on a transparent substrate <b>7</b>. The anode <b>8</b> is made of a transparent conductive material having a high work function, such as indium tin oxide (ITO) or indium zinc oxide (IZO).
0017Thereafter, an insulating film <b>9</b> is formed on a portion of the anode <b>8</b>, using an insulating material such as polyimide. A barrier <b>10</b> is then formed on the insulating film <b>9</b>.
0018Next, an island-shaped spacer <b>11</b> is formed on the anode <b>8</b> at a pixel region, using another insulating material.
0019Subsequently, organic materials for a hole injection layer <b>12</b>, a hole transfer layer <b>13</b>, a light-emitting layer <b>14</b>, an electron transfer layer <b>15</b>, and an electron injection layer <b>16</b> are sequentially deposited over the entire surface of the resulting structure including the spacer <b>11</b>.
0020A cathode <b>17</b>, which is made of a conductive material having a low work function, such as aluminum, is then deposited over the electron injection layer <b>16</b>. Thus, the upper substrate is completely formed.
0021<figref idref="DRAWINGS">FIG. 1C</figref> is a sectional view illustrating a process for bonding the lower substrate of <figref idref="DRAWINGS">FIG. 1A</figref> and the upper substrate of <figref idref="DRAWINGS">FIG. 1B</figref>.
0022As shown in <figref idref="DRAWINGS">FIG. 1C</figref>, the lower substrate of <figref idref="DRAWINGS">FIG. 1A</figref> and the upper substrate of <figref idref="DRAWINGS">FIG. 1B</figref> are bonded such that the cathode <b>17</b> formed on the spacer <b>11</b> in the upper substrate comes into contact with the pixel electrode <b>6</b>′ to be electrically connected.
0023<figref idref="DRAWINGS">FIG. 1D</figref> is a sectional view illustrating a process for sealing the organic EL display in which the upper and lower substrates are bonded. As shown in <figref idref="DRAWINGS">FIG. 1D</figref>, vacuum is formed in a space defined between the bonded upper and lower substrates. Thereafter, the space between the upper and lower substrates is sealed, using a sealant <b>18</b>.
0024In the conventional organic EL display manufactured in the above-mentioned manner, NMOS thin film transistors must be used because each cathode in the upper substrate and the drain region of the corresponding driving thin film transistor in the lower substrate are electrically connected.
0025However, the above-mentioned conventional EL display has a problem in that it is difficult to use a low-temperature polysilicon thin film transistor manufacturing process using a laser annealing method. This is because the low-temperature polysilicon thin film transistor is of a PMOS type.
0026For this reason, the conventional organic EL display cannot use PMOS thin film transistors which are more stable than NMOS thin film transistors.
SUMMARY OF THE INVENTION
0027Accordingly, the present invention is directed to an organic EL display and a method for manufacturing the same that substantially obviate one or more problems due to limitations and disadvantages of the related art.
0028An object of the present invention is to provide an organic EL display which can use PMOS thin film transistors, and a method for manufacturing the organic EL display.
0029Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
0030To achieve these objects and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, an organic electro-luminescent display comprises: a first transparent substrate and a second transparent substrate which are arranged to face each other while being spaced apart from each other by a predetermined distance; a transistor formed on the first transparent substrate; an anode formed on the second transparent substrate, and electrically connected to the transistor; an organic electro-luminescent layer formed on the anode; and a cathode formed on the organic electro-luminescent layer.
0031The transistor may be a PMOS thin film transistor. The organic electro-luminescent display may further comprise a spacer formed around a light emitting region on the second transparent substrate, and a barrier formed around the spacer.
0032The barrier may surround the spacer. Alternatively, the barrier may comprise stripe-shaped barriers respectively formed at opposite sides of the spacer such that the spacer is interposed between the stripe-shaped barriers.
0033The spacer may be protruded to a level higher than the barrier.
0034In another aspect of the present invention, an organic electro-luminescent display comprises: a first transparent substrate and a second transparent substrate which are arranged to face each other while being spaced apart from each other by a predetermined distance; a transistor formed on the first transparent substrate; a spacer formed around a light emitting region on the second transparent substrate; an anode formed on the light emitting region of the second transparent substrate and the spacer such that the anode has a portion formed on the light emitting region, and a portion formed on the spacer, the anode portion formed on the spacer being electrically connected to the transistor; a barrier formed around the spacer; an organic electro-luminescent layer formed on the anode portion formed on the light emitting region of the second transparent substrate, except for the spacer; and a cathode formed on the organic electro-luminescent layer.
0035The barrier may comprise a first barrier formed in a stripe on the anode at one side of the spacer, and a second barrier formed in a stripe on the second transparent substrate at the other side of the spacer.
0036In another aspect of the present invention, a method for manufacturing an organic electro-luminescent display comprises the steps of: manufacturing a lower substrate of the organic electro-luminescent display, the lower substrate manufacturing step comprising the steps of preparing a first transparent substrate, and forming a transistor on the first transparent substrate; manufacturing an upper substrate of the organic electro-luminescent display, the upper substrate manufacturing step comprising the steps of preparing a second transparent substrate, forming a spacer around a light emitting region on the second transparent substrate, forming an anode on the light emitting region of the second transparent substrate and the spacer, forming a barrier around the spacer, forming an organic electro-luminescent layer on a portion of the anode formed on the light emitting region of the second transparent substrate, except for the spacer, and forming a cathode on the organic electro-luminescent layer; and bonding the upper and lower plates of the organic electro-luminescent display such that a portion of the anode formed on the spacer in the upper substrate is electrically connected with an electrode of the transistor in the lower substrate.
0037The step of forming the barrier around the spacer may comprise the steps of: forming an insulating film over an entire surface of the second transparent substrate including the anode, and patterning the insulating film such that the insulating film remains only around the spacer to surround the spacer; and forming a barrier on the remaining insulating film.
0038The step of forming the barrier around the spacer may comprise the steps of: forming an insulating film over an entire surface of the second transparent substrate including the anode, and patterning the insulating film such that the insulating film remains to have stripe-shaped portions respectively arranged in parallel at opposite sides of the spacer to cause the spacer to be interposed between the stripe-shaped portions; and forming barriers on the remaining stripe-shaped insulating film portions.
0039It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
BRIEF DESCRIPTION OF THE DRAWINGS
0040The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention. In the drawings:
0041<figref idref="DRAWINGS">FIGS. 1A to 1D</figref> are sectional views illustrating a conventional method for manufacturing an organic EL display having a conventional structure;
0042<figref idref="DRAWINGS">FIG. 2</figref> is a plan view illustrating an upper substrate of the convention organic EL display.
0043<figref idref="DRAWINGS">FIGS. 3A to 3D</figref> are sectional views illustrating a method for manufacturing a dual-panel type organic EL display in accordance with the present invention; and
0044<figref idref="DRAWINGS">FIGS. 4A and 4B</figref> are plan views illustrating upper substrates having different structures, which are used in the organic EL display according to the present invention, respectively.
DETAILED DESCRIPTION OF THE INVENTION
0045Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.
0046The present invention proposes a dual-panel type organic EL display having a structure capable of using PMOS thin film transistors, and a method for manufacturing the same.
0047That is, in accordance with the present invention, a PMOS thin film transistor is formed on one substrate of the dual-panel type organic EL display, as a device for driving of a pixel. Also, an organic EL element is formed on the other substrate. The substrates are then bonded such that an anode of the organic EL element and a pixel electrode of the PMOS thin film transistor are electrically connected.
0048<figref idref="DRAWINGS">FIGS. 3A to 3E</figref> are sectional views illustrating sequential processing steps of a method for manufacturing a dual-panel type EL display in accordance with the present invention. The following description will be given only in conjunction with one thin film transistor included in one pixel of the organic EL display.
0049<figref idref="DRAWINGS">FIG. 3A</figref> is a sectional view illustrating a process for manufacturing a lower substrate of the dual-panel type EL display. This process may be carried out in a conventional manner. In accordance with this process, first, a semiconductor layer <b>22</b> made of, for example, polysilicon, is formed over a first transparent substrate <b>21</b>, as shown in <figref idref="DRAWINGS">FIG. 3A</figref>. The semiconductor layer <b>22</b> is then patterned to remain only in a region where a thin film transistor is to be formed.
0050Thereafter, a gate insulating film <b>23</b> and a conductive film for formation of a gate electrode are sequentially formed over the entire surface of the resulting structure. The conductive film is then patterned to form a gate electrode <b>24</b>.
0051Using the gate electrode <b>24</b> as a mask, impurity ions such as boron (B) ions are then implanted into the semiconductor layer <b>22</b> which is, in turn, annealed to form source and drain regions <b>22</b><i>a </i>and <b>22</b><i>c </i>of the thin film transistor. Thus, a PMOS thin film transistor is completely formed.
0052The portion of the semiconductor layer <b>22</b>, into which the impurity ions are not implanted, forms a channel region <b>22</b><i>b </i>of the PMOS thin film transistor.
0053Next, an interlayer insulating film <b>25</b> is formed over the entire surface of the resulting structure. The interlayer insulating film <b>25</b> and gate insulating film <b>23</b> are then selectively removed to expose the source and drain regions <b>22</b><i>a </i>and <b>22</b><i>c </i>of the PMOS thin film transistor.
0054Thereafter, an electrode line <b>26</b> and a pixel electrode <b>26</b>′ are formed on the resulting structure such that the electrode line <b>26</b> and pixel electrode <b>26</b>′ are electrically connected to the source and drain regions <b>22</b><i>a </i>and <b>22</b><i>c, </i>respectively. Thus, a lower substrate is completely formed.
0055<figref idref="DRAWINGS">FIGS. 4A and 4B</figref> are plan views illustrating an upper substrate of the dual-panel type organic EL display manufactured in accordance with the present invention. <figref idref="DRAWINGS">FIG. 3B</figref> is a cross-sectional view taken along the line II-II of <figref idref="DRAWINGS">FIG. 4A</figref> and the line III-III of <figref idref="DRAWINGS">FIG. 4B</figref>, illustrating an upper substrate manufacturing process according to the present invention.
0056In accordance with the upper substrate manufacturing process, an island-shaped spacer <b>28</b> is first formed on a second transparent substrate <b>27</b>, using an insulating material, as shown in <figref idref="DRAWINGS">FIG. 3B</figref>.
0057The spacer <b>28</b> is arranged around a light emitting region. The spacer <b>28</b> is also shaped such that the lower portion of the spacer <b>28</b> is wider than the upper portion of the spacer <b>28</b>.
0058Thereafter, an anode (that is, a first electrode) <b>29</b> is formed on the second transparent substrate <b>27</b> including the spacer <b>28</b>. The anode <b>29</b> is made of a transparent conductive material having a high work function, such as indium tin oxide (ITO) or indium zinc oxide (IZO).
0059The anode <b>29</b> is formed only on the spacer <b>28</b> and the light emitting region of the second transparent substrate <b>27</b>.
0060Subsequently, an insulating film <b>30</b> is formed on a peripheral portion of the anode <b>29</b> and a region around the spacer <b>28</b>, using an insulating material such as polyimide. A barrier <b>31</b> is then formed on the insulating film <b>30</b>.
0061The insulating film <b>30</b> and barrier <b>31</b> may be formed using one of two methods.
0062In accordance with the first method, the insulating film <b>30</b> is first formed over the entire surface of the structure including the anode <b>29</b>, is then patterned such that the insulating film <b>30</b> remains only around the spacer <b>28</b> to surround the spacer <b>28</b>. The barrier <b>31</b> is then formed on the remaining insulating film <b>30</b> such that the barrier <b>31</b> surrounds the spacer <b>28</b>.
0063In accordance with the second method, the insulating film <b>30</b> is first formed over the entire surface of the structure including the anode <b>29</b>, is then patterned such that the insulating film <b>30</b> remains to have stripe-shaped portions respectively arranged in parallel at opposite sides of the spacer <b>28</b>. The barrier <b>31</b> is then formed on the remaining insulating film <b>30</b>.
0064In the latter case, the barrier <b>31</b> includes a first barrier formed in a stripe at one side of the spacer <b>28</b>, and a second barrier formed in a stripe at the other side of the spacer <b>28</b>. The first and second barriers are arranged in parallel in the form of parallel stripes at the opposite sides of the spacer <b>28</b>, respectively, such that the spacer <b>28</b> is interposed between the first and second barriers.
0065Thereafter, organic materials for a hole injection layer <b>32</b>, a hole transfer layer <b>33</b>, a light-emitting layer <b>34</b>, an electron transfer layer <b>35</b>, and an electron injection layer <b>36</b> are sequentially deposited over a portion of the anode <b>29</b> corresponding to the light emitting region of the second transparent substrate <b>27</b>, except for the spacer <b>28</b>. Thus, an organic EL layer is formed.
0066In the organic EL layer forming process, a shadow mask is used in order to prevent the organic EL layer from being formed on the spacer <b>28</b>.
0067A cathode (that is, a second electrode) <b>37</b>, which is made of a conductive material having a low work function, such as aluminum, is then deposited over the electron injection layer <b>36</b>. Thus, an upper substrate is completely formed.
0068Where the barrier <b>31</b> has the structure of <figref idref="DRAWINGS">FIG. 4A</figref>, the cathode <b>37</b> can be formed without using a shadow mask. However, where the barrier <b>31</b> has the structure of <figref idref="DRAWINGS">FIG. 4B</figref>, a shadow mask is used in the process of forming the cathode <b>37</b>, so as to prevent the cathode <b>37</b> from being formed on a region where no organic EL layer is formed between the stripe-shaped barriers.
0069That is, in the latter case, it is necessary to expose the anode <b>29</b> formed on the spacer <b>28</b>, so as to enable the anode <b>29</b> to come into electrical contact with the pixel electrode <b>26</b>′ of the first transparent substrate <b>21</b>.
0070<figref idref="DRAWINGS">FIG. 3C</figref> is a sectional view illustrating a process for bonding the lower substrate of <figref idref="DRAWINGS">FIG. 3A</figref> and the upper substrate of <figref idref="DRAWINGS">FIG. 3B</figref>.
0071As shown in <figref idref="DRAWINGS">FIG. 3C</figref>, the lower substrate of <figref idref="DRAWINGS">FIG. 3A</figref> and the upper substrate of <figref idref="DRAWINGS">FIG. 3B</figref> are bonded such that the anode <b>29</b> formed on the spacer <b>28</b> in the upper substrate comes into contact with the pixel electrode <b>26</b>′ of the lower substrate to be electrically connected.
0072<figref idref="DRAWINGS">FIG. 3D</figref> is a sectional view illustrating a process for sealing the organic EL display in which the upper and lower substrates are bonded. As shown in <figref idref="DRAWINGS">FIG. 3D</figref>, a vacuum is formed in a space defined between the bonded upper and lower substrates. Thereafter, the space between the upper and lower substrates is sealed, using a sealant <b>38</b>.
0073As apparent from the above description, the organic EL display of the present invention can use PMOS thin film transistors because the drain region of each driving thin film transistor formed on the lower substrate is electrically connected with the corresponding anode formed on the upper substrate.
0074That is, in accordance with the present invention, it is possible to manufacture a dual-panel type organic EL display having an enhanced reliability and a prolonged life, by virtue of use of PMOS thin film transistors which are more stable than NMOS thin film transistors.
0075It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the inventions. Thus, it is intended that the present invention covers the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
Contents4
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Every citation, both ways
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| DE102005020939A1 | Cites | Germany | Applicant |
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| CN1697578A | Cites | China | Applicant |
| US2002195961A1 | Cites | United States of America | Applicant |
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| US7005677B2 | Cites | United States of America | Search report |
| US20020195961A1 | Cites | United States of America | Third party observation |
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11 members in 5 offices
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 1020040042635 | Republic of Korea | – | |
| 20040042635 | Republic of Korea | A |
Members11
| Document | Office | Kind | |
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| CN1708200A | China | A | |
| EP1605516A2 | European Patent Office (EPO) | A2 | |
| KR20050117344A | Republic of Korea | A | |
| US2005275344A1 | United States of America | A1 | |
| JP2005353600A | Japan | A | |
| KR100747569B1 | Republic of Korea | B1 | |
| EP1605516A3 | European Patent Office (EPO) | A3 | |
| CN100456519C | China | C | |
| US7586255B2This record | United States of America | B2 | |
| JP4925081B2 | Japan | B2 | |
| EP1605516B1 | European Patent Office (EPO) | B1 |
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| Information Disclosure Statement consideredIDSC | IDSC | |
| Reference capture on IDSRCAP | RCAP | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Request for Continued Examination (RCE)RCEX | RCEX | |
| Request for Extension of Time - GrantedXT/G | XT/G | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Workflow - Request for RCE - BeginBRCE | BRCE | |
| Mail Final Rejection (PTOL - 326)Final rejectionMCTFR | MCTFR | |
| Final RejectionFinal rejectionCTFR | CTFR | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Change in Power of Attorney (May Include Associate POA)PA.. | PA.. | |
| Correspondence Address ChangeC.AD | C.AD | |
| Response after Non-Final ActionA... | A... | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| IFW TSS Processing by Tech Center CompleteTSSCOMP | TSSCOMP | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Application Is Now CompleteCOMP | COMP | |
| Application Return from OIPEWROIPE | WROIPE | |
| Application Return TO OIPEROIPE | ROIPE | |
| Application Is Now CompleteCOMP | COMP | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Cleared by OIPE CSRL194 | L194 | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Request for Foreign Priority (Priority Papers May Be Included)RQPR | RQPR | |
| Initial Exam Team nnIEXX | IEXX |
10 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Maintenance fee paymentMAFP | MAFP | |
| Fee paymentFPAY | FPAY | |
| Fee paymentFPAY | FPAY | |
| Fee payment procedurePAYER NUMBER DE-ASSIGNED (ORIGINAL EVENT CODE: RMPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| Fee payment procedurePAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| Fee payment procedurePAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| Information on status: patent grantGrantedPATENTED CASESTCF | STCF | |
| AssignmentAS | AS | |
| AssignmentAS | AS | |
| AssignmentAS | AS |
Numbers
- Publication
- 7586255
- Application
- 11148253
Titles
- English
- Organic electro-luminescent display of dual-panel type and method for manufacturing the same
Patent term adjustment
- A delay
- +583 daysthe office missed an examination deadline
- Applicant delay
- −31 days
- Net adjustment
- 552 days
Classification
- CPC, 7
- H10K59/127
- H05B33/00
- H10K59/122
- H10K71/40
- H05B33/26
- H05B33/04
- H10K71/00
- IPC, 11
- H01L51 00
- H05B33 00
- H05B33 02
- H05B33 12
- G09F9 30
- H10K99 00
- H05B33 04
- H05B33 10
- H05B33 22
- H05B33 26
- H10K71 40