Micro-displays and their manufacture
Summary by NHIP
Micro-display capacitor formation
The method forms a micro-display by creating a partially reflecting layer, a reflective plate, and two sacrificial layers to define a gap. Removing the sacrificial layers separates the reflective plate from the partially reflecting layer and the second substrate, with optional electrical connections or flexures.
Claim Score by NHIP
Abstract
A method of forming a micro-display includes forming a device that includes forming a partially reflecting layer on a first substrate and forming a plate overlying the partially reflecting layer, and adhering the device to a second substrate.

Term
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Expired 3 August 2025, 1.1 years ago.
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23 claims: 5 independent, 18 dependent
- 1A method of forming a micro-display, comprising:forming a device, wherein forming the device comprises: forming a partially reflecting layer on a cover of the micro-display, the cover being transparent to visible light, wherein the partially reflecting layer forms a first capacitor plate of the device;forming a first sacrificial layer overlying and in direct contact with the partially reflecting layer;forming a reflective second capacitor plate overlying and in direct contact with the first sacrificial layer so that the first sacrificial layer is interposed between the second capacitor plate and the partially reflecting layer;forming a second sacrificial layer overlying and in direct contact with the second capacitor plate;removing the first sacrificial layer to form a first portion of a gap that is interposed between the partially reflecting layer and the second capacitor plate;and removing the second sacrificial layer to form a second portion of the gap overlying the second capacitor plate;and adhering the device to a second substrate.
- 14A method of forming a micro-display, comprising:forming a device, wherein forming the device comprises: forming a transparent layer on a cover of the micro-display so that the transparent layer is in direct contact with the transparent cover of the micro-display, the cover being transparent to visible light;forming a partially reflecting layer overlying and in direct contact with the transparent layer, wherein the partially reflecting layer forms a first capacitor plate of the device;forming a sacrificial layer overlying and in direct contact with the first capacitor plate;forming a reflective plate overlying and in direct contact with the sacrificial layer, wherein the reflective plate forms a second capacitor plate of the device, wherein the sacrificial layer is interposed between the reflective plate and the partially reflecting layer;removing the sacrificial layer to form a first gap portion interposed between the reflective plate and the partially reflecting layer;forming a protective layer overlying the reflective plate having one or more signal contacts that extend through the protective layer;forming a second gap portion between the reflective plate and the protective layer;and disposing one or more flexures within the second gap portion and physically and electrically connecting the one or more flexures between the one or more signal contacts and the reflective plate;and adhering the device to a driver so that the one or more signal contacts are connected to a signal line of a driver circuit of the semiconductor driver wafer.
- 18A micro-display comprising:a device, comprising: a cover that is transparent to visible light;a transparent layer underlying and direct contact with the cover;a partially reflecting layer underlying and direct contact with the transparent layer, wherein the partially reflecting layer forms a first capacitor plate of the device;a protective layer underlying the transparent layer and separated therefrom by a gap;a reflective plate suspended within the gap by a flexure, wherein the reflective plate forms a second capacitor plate of the device;and a semiconductor substrate bonded to the device;wherein the reflective plate is configured to reflect light from the partially reflecting layer back to the partially reflecting layer.
- 21Broadest claimClaim Score 72, broad(NHIP)A micro-display comprising:a device, comprising: a transparent glass cover that can pass visible light therethrough;a partially reflecting layer formed on the cover;a protective layer underlying the transparent layer and separated therefrom by a gap;a reflective plate suspended within the gap by a flexure;and a semiconductor substrate bonded to the device;wherein the flexure is electrically connected between a driver circuit of the substrate and the plate and the partially reflecting layer is electrically connected to a ground line of the semiconductor driver wafer;and wherein the reflective plate is configured to reflect light from the partially reflecting layer back to the partially reflecting layer.
- 22A micro-display comprising:a means for passing and reflecting light formed directly on a transparent cover of the micro-display;a means for reflecting the light from the light passing and reflecting means back to the light passing and reflecting means so that the light passing and reflecting means can pass a portion of the light through the cover and reflect another portion of the light back to the light reflecting means to produce multiple reflections between the light passing and reflecting means and the light reflecting means, wherein the multiple reflections between the light passing and reflecting means and the light reflecting means produce an optical interference;and a means for electrically driving the light reflecting means, the electrically driving means bonded to the light passing and reflecting means, wherein electrically driving the light reflecting means acts to tune the optical interference;wherein the light passing and reflecting means is electrically coupled to the electrical driving means and the light reflecting means is electrically coupled to the electrical driving means.
Independent claims5
26 paragraphs in 5 sections, as filed
CLAIM OF PRIORITY
0001This application claims the benefit of U.S. Provisional Application No. 60/621,176, filed on Oct. 21, 2004, entitled MICRO-DISPLAYS AND THEIR MANUFACTURE, and having express mail label number EL871865948 US.
BACKGROUND
0002Digital projectors often include micro-displays that include arrays of pixels (e.g., 1280×1024, etc.) Each pixel usually includes a micro-electromechanical system (MEMS) device, such as a micro-mirror, liquid crystal on silicon (LcoS) device, interference-based modulator, etc. A micro-display is used with a light source and projection lens of the digital projector. The micro-display receives light from the light source. When the pixels of the micro-display are ON, the pixels direct the light to the projection lens. When the pixels are OFF, they direct the light from the light source away from the projection lens. The projection lens images and magnifies the micro-display.
0003Micro-displays are usually formed using semiconductor-processing methods that include forming electronic driver circuits on a semiconductor substrate for driving the MEMS devices of the pixels. The electronic driver circuits are often Complementary Metal Oxide Semiconductor (CMOS) devices. After forming the electronic driver circuits, the MEMS devices are formed overlying the electronic driver circuits and a transparent, e.g., glass, cover is formed overlying the MEMS devices for packaging, e.g., sealing and/or protecting, the MEMS devices and the electronic driver circuits.
DESCRIPTION OF THE DRAWINGS
0004<figref idref="DRAWINGS">FIG. 1</figref> is a schematic of an embodiment of a micro-display, according to an embodiment of the disclosure.
0005<figref idref="DRAWINGS">FIGS. 2A-2L</figref> are cross-sections of a portion of an embodiment of a micro display at various stages of fabrication, according to another embodiment of the disclosure.
DETAILED DESCRIPTION
0006In the following detailed description of the present embodiments, reference is made to the accompanying drawings that form a part hereof, and in which is shown by way of illustration specific embodiments that may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice disclosed subject matter, and it is to be understood that other embodiments may be utilized and that process, electrical or mechanical changes may be made without departing from the scope of the claimed subject matter. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the claimed subject matter is defined only by the appended claims and equivalents thereof.
0007<figref idref="DRAWINGS">FIG. 1</figref> is a schematic of a micro-display <b>100</b>, e.g., as a portion of a digital projector, according to an embodiment. For one embodiment, micro-display <b>100</b> functions as a light modulator of the digital projector. For another embodiment, micro-display <b>100</b> includes a device <b>102</b> and a driver <b>104</b>. For some embodiments, device <b>102</b> includes one or more micro-electromechanical system (MEMS) devices <b>111</b>, such as micro-mirrors, liquid crystal on silicon (LcoS) devices, interference-based modulators, etc. For other embodiments, device <b>102</b> and driver <b>104</b> are formed separately and are subsequently bonded together.
0008For one embodiment, device <b>102</b> includes a substrate <b>106</b>, such as a transparent cover, e.g., of glass. For another embodiment, a transparent layer <b>108</b>, e.g., of TEOS (tetraethylorthosilicate) oxide, silicon oxide, etc., is formed on substrate <b>106</b>. A partially reflecting layer <b>110</b>, e.g., a tantalum-aluminum (TaAl) layer, is formed on transparent layer <b>108</b>. For other embodiments, partially reflecting layer <b>110</b> may be formed directly on substrate <b>106</b>. For other embodiments, partially reflecting layer <b>110</b> forms a first capacitor plate of device <b>102</b>.
0009Device <b>102</b> also includes pixel plates <b>112</b>, e.g., as a portion of the MEMS devices <b>111</b>, that are suspended by flexures <b>120</b> within a gap <b>114</b> located between partially reflecting layer <b>110</b> and a protective layer <b>116</b>, e.g., of TEOS (tetraethylorthosilicate) oxide, silicon oxide, etc. Specifically, a first gap portion <b>114</b>, of gap <b>114</b> separates a pixel plate <b>112</b> from partially reflecting layer <b>110</b>, and a second gap portion <b>114</b><sub>2 </sub>of gap <b>114</b> separates a pixel plate <b>112</b> from protective layer <b>116</b>. For one embodiment, pixel plates <b>112</b> form second capacitor plates of device <b>102</b>.
0010Flexures <b>120</b> electrically connect their respective pixel plates to one or more signal posts <b>122</b> that terminate at signal contacts <b>124</b> formed on protective layer <b>116</b>. For one embodiment, pixel plates <b>112</b> are of a aluminum-copper (AlCu) alloy that acts like a mirror. For another embodiment, pixel plates <b>112</b> include a layer of TaAl formed on a layer of AlCu, where the AlCu layer faces partially reflecting layer <b>110</b>.
0011For one embodiment, a bond ring <b>126</b> is electrically connected to partially reflecting layer <b>110</b> and terminates at ground contacts <b>128</b> formed on protective layer <b>116</b>. For some embodiments, bond ring <b>126</b> also provides support between substrate <b>106</b> and protective layer <b>116</b>. For another embodiment, ground posts <b>127</b> are also electrically connected to partially reflecting layer <b>110</b> and terminate at ground contacts <b>129</b> formed on protective layer <b>116</b>. Ground posts <b>127</b> may also provide support between substrate <b>106</b> and protective layer <b>116</b>, for some embodiments.
0012For one embodiment, driver <b>104</b> is Complementary Metal Oxide Semiconductor (CMOS) substrate. Driver <b>104</b> can be formed using semiconductor-processing methods known to those skilled in the art. Driver <b>104</b> includes driver circuits <b>130</b> adapted to respectively control the positions of pixel plates <b>112</b> and thus the corresponding gaps <b>114</b>. Each of driver circuits <b>130</b> is connected between a signal supply line <b>132</b> and a ground line <b>136</b>. Signal supply line <b>132</b> terminates at a signal contact <b>134</b> formed in a protective layer <b>135</b>, e.g., of TEOS (tetraethylorthosilicate) oxide, silicon oxide, etc. Ground line <b>136</b> is connected between a main ground line <b>137</b> and a ground contact <b>138</b> formed in protective layer <b>135</b>.
0013Driver <b>104</b> is electrically connected to device <b>102</b>, for one embodiment, by bonding ground contacts <b>129</b> to ground contacts <b>138</b> to connect ground posts <b>127</b>, and thus partially reflecting layer <b>110</b>, to ground, and by bonding signal contacts <b>124</b> to signal contacts <b>134</b> to connect driver circuits <b>130</b> to signal posts <b>122</b> and thus to pixel plates <b>112</b>. For another embodiment, main ground line <b>137</b> may also be separately connected to ground contacts <b>128</b> by bonding ground contacts <b>128</b> to ground contacts <b>140</b> formed in protective layer <b>135</b> and connected to main ground line <b>137</b>. This connects seal ring <b>126</b>, and thus further connects partially reflecting layer <b>110</b>, to ground. For another embodiment, the contacts may be soldered together. For other embodiments, protective layers <b>116</b> and <b>135</b> are bonded together using plasma-enhanced bonding so that the contacts abut each other.
0014For another embodiment, ground posts <b>127</b> and/or bond ring <b>126</b>, signal posts <b>122</b>, pixel plates <b>112</b>, and flexures <b>120</b> are formed as a part of driver <b>104</b> using semiconductor-processing methods. For this embodiment, partially reflecting layer <b>110</b> is formed on substrate <b>106</b>, e.g., by chemical vapor deposition. Partially reflecting layer <b>110</b> is then bonded, e.g., by gluing, plasma-enhanced bonding, or the like, to ground posts <b>127</b> and/or bond ring <b>126</b>. This acts to reduce the number of processing steps compared to where transparent layer <b>108</b> is disposed on the substrate <b>106</b> prior to partially reflecting layer <b>110</b>, as discussed above and shown in <figref idref="DRAWINGS">FIG. 1</figref>.
0015In operation, driver circuits <b>130</b> respectively send signals via signal lines <b>132</b>, signal posts <b>122</b>, and flexures <b>120</b> to pixel plates <b>112</b>. This creates potentials between partially reflecting layer <b>110</b> and the respective pixel plates <b>112</b> that deflect the respective pixel plates <b>112</b> and thus change the corresponding gap portions <b>114</b><sub>1</sub>.
0016Light, e.g., from a light source of a projector, passes through substrate <b>106</b> and through transparent layer <b>108</b>. Partially reflecting plate <b>110</b> passes a portion of the light onto pixel plates <b>112</b> and reflects a portion of the light back through transparent layer <b>108</b> and substrate <b>106</b>. The pixel plates <b>112</b> reflect the light back to partially reflecting plate <b>110</b>, which passes some of the light through transparent layer <b>108</b> and substrate <b>106</b> and reflects a portion of the light back to pixel plates <b>112</b> and the process repeats. That is, multiple reflections occur between the pixel plates <b>112</b> and partially reflecting layer <b>110</b>, with some of the reflected light passing through partially reflecting layer <b>110</b> and through substrate <b>106</b>. This produces optical interference that can be tuned using the gap portions <b>114</b><sub>1</sub>.
0017<figref idref="DRAWINGS">FIGS. 2A-2L</figref> are cross-sections of a portion of a device <b>200</b> at various stages of fabrication, according to another embodiment. The device <b>200</b> includes a first substrate <b>206</b>, such as an insulator, transparent cover, e.g., of glass, etc., as shown in <figref idref="DRAWINGS">FIG. 2A</figref>. For one embodiment, a transparent layer <b>208</b> is formed on first substrate <b>206</b> and a partially reflecting layer <b>210</b> is formed on transparent layer <b>208</b> and is patterned and etched to expose portions of transparent layer <b>208</b>. For another embodiment, partially reflecting layer <b>210</b> is formed directly on first substrate <b>206</b>. In <figref idref="DRAWINGS">FIG. 2B</figref>, a first sacrificial layer <b>211</b> (distinguished by cross-hatching) is formed on partially reflecting layer <b>210</b> and for one embodiment is patterned and etched to expose the exposed portions of transparent layer <b>208</b> and portions of partially reflecting layer <b>210</b>. For one embodiment, the first sacrificial layer <b>211</b> may be smoothed and/or flattened prior to patterning and etching using chemical mechanical polishing (CMP). The first sacrificial layer <b>211</b> will form a portion of a gap, such as a gap portion <b>114</b><sub>1 </sub>of <figref idref="DRAWINGS">FIG. 1</figref>, between a pixel plate, such as a pixel plate <b>112</b> of <figref idref="DRAWINGS">FIG. 1</figref>, and partially reflecting layer <b>210</b>.
0018A first metal layer <b>213</b>, e.g., a layer of TaAl or a layer of TaAl formed on a layer of AlCu is formed on the first sacrificial layer <b>211</b> and on the exposed portions of transparent layer <b>208</b> and partially reflecting layer <b>210</b> in <figref idref="DRAWINGS">FIG. 2C</figref>. The first metal layer <b>213</b> is patterned and etched to define a pixel plate <b>212</b>, first portions of ground posts <b>227</b>, and signal posts <b>222</b> and to expose portions of the first sacrificial layer <b>211</b> in <figref idref="DRAWINGS">FIG. 2D</figref>. Note that the pixel plate <b>212</b> contacts the sacrificial layer <b>211</b>, the ground posts <b>227</b> contact the exposed portions of partially reflecting layer <b>210</b>, and the signal posts <b>222</b> contact transparent layer <b>208</b>, or for embodiments without transparent layer <b>208</b>, first substrate <b>206</b>.
0019A second sacrificial layer <b>231</b> (distinguished by cross-hatching) is formed on the first metal layer <b>213</b>, i.e., on pixel plate <b>212</b>, ground posts <b>227</b>, and signal posts <b>222</b>, and on the exposed portions of the first sacrificial layer <b>211</b> in <figref idref="DRAWINGS">FIG. 2E</figref>. The second sacrificial layer <b>231</b> is patterned and etched to expose portions of pixel plate <b>212</b> and to expose ground posts <b>227</b> and signal posts <b>222</b>. For one embodiment, the second sacrificial layer <b>231</b> may be smoothed and/or flattened prior to patterning and etching using CMP.
0020A second metal layer <b>233</b>, e.g., of TaAl, is formed on the second sacrificial layer <b>231</b>, on the exposed portions of pixel plate <b>212</b>, and on the exposed ground posts <b>227</b> and signal posts <b>222</b> in <figref idref="DRAWINGS">FIG. 2F</figref>. The second metal layer <b>233</b> is patterned and etched to form flexures <b>220</b> and second portions of ground posts <b>227</b> and to expose portions of the second sacrificial layer <b>231</b> in <figref idref="DRAWINGS">FIG. 2G</figref>. Note that flexures <b>220</b> electrically and physically connect signal posts <b>222</b> to the exposed portions of pixel plate <b>212</b>. Note further that flexures <b>220</b> directly overlie pixel plate <b>212</b>, meaning that when the device <b>200</b> is inverted and connected to a second substrate, such as driver <b>104</b>, as shown in <figref idref="DRAWINGS">FIG. 1</figref>, flexures <b>220</b> will be located under the pixel plate <b>212</b>. That is, flexures <b>220</b> are aligned behind pixel plate <b>212</b> so that pixel plate <b>212</b> obstructs flexures <b>220</b> from being viewed through cover <b>206</b>. This helps to conserve device real estate.
0021A third sacrificial layer <b>261</b> (distinguished by cross-hatching) is formed on flexures <b>220</b>, ground posts <b>227</b>, and the exposed portions of the second sacrificial layer <b>231</b> and is patterned and etched to expose portions of flexures <b>220</b> and ground posts <b>227</b> in <figref idref="DRAWINGS">FIG. 2H</figref>. For one embodiment, the third sacrificial layer <b>261</b> may be smoothed and/or flattened prior to patterning and etching using CMP. A third metal layer <b>264</b>, e.g., AlCu, TaAl, or the like, is formed on the third sacrificial layer <b>261</b> and on the exposed portions of flexures <b>220</b> and on ground posts <b>227</b> in <figref idref="DRAWINGS">FIG. 2I</figref>. The third metal layer <b>264</b> is patterned and etched to form ground contacts <b>229</b> in physical and electrical contact with ground posts <b>227</b> and signal contacts <b>224</b> in physical and electrical contact with flexures <b>220</b> and to expose portions of the third sacrificial layer <b>261</b> in <figref idref="DRAWINGS">FIG. 2J</figref>. Alternatively, for another embodiment, CMP forms the ground contacts <b>229</b>.
0022A protective layer <b>216</b>, e.g., of TEOS (tetraethylorthosilicate) oxide, silicon oxide, etc., is formed on the exposed portions of the third sacrificial layer <b>261</b> and on ground contacts <b>229</b> and signal contacts <b>224</b> and is patterned and etched to expose portions of the third sacrificial layer <b>261</b> and ground contacts <b>229</b> and signal contacts <b>224</b> in <figref idref="DRAWINGS">FIG. 2K</figref>. For one embodiment, CMP follows patterning and etching to smooth and flatten protective layer <b>216</b> and ground contacts <b>229</b> and signal contacts <b>224</b> so that ground contacts <b>229</b> and signal contacts <b>224</b> are substantially flush with protective layer <b>216</b>. For another embodiment, CMP may be used to expose the portions of the third sacrificial layer <b>261</b> and ground contacts <b>229</b> and signal contacts <b>224</b>.
0023The first sacrificial layer <b>211</b>, the second sacrificial layer <b>231</b>, and the third sacrificial layer <b>261</b> are removed in <figref idref="DRAWINGS">FIG. 2L</figref> to form the portion of the device <b>200</b> that includes a gap <b>214</b>, as indicated by removal of the cross-hatching. Gap <b>214</b> contains pixel plate <b>212</b> and flexures <b>220</b>. Note that removal of the first sacrificial layer <b>211</b> forms a first gap portion <b>214</b><sub>1 </sub>between pixel plate <b>212</b> and partially reflecting layer <b>210</b>. Removal of the second sacrificial layer <b>231</b> and the third sacrificial layer <b>261</b> forms a second gap portion <b>214</b><sub>2 </sub>between pixel plate <b>212</b> and protective layer <b>216</b>. Note that flexures <b>220</b> are contained within the second gap portion <b>214</b><sub>2</sub>. Flexures <b>220</b> support pixel plate <b>212</b> within gap <b>214</b> and provide a restoring force against which pixel plate <b>212</b> returns from an electrostatic actuation driving force applied to pixel plate <b>212</b> for some embodiments.
0024The device is inverted and bonded to the second substrate, such as driver <b>104</b> of <figref idref="DRAWINGS">FIG. 1</figref>. This electrically connects signal contacts <b>224</b> to a signal line of the second substrate, such as a signal line <b>132</b> of a driver circuit <b>130</b> of driver <b>104</b>. Ground contacts <b>229</b> are connected to a ground line of the second substrate, such as ground line <b>136</b> of driver <b>104</b>. Note that partially reflecting layer <b>210</b> is at a ground state and acts as a first capacitor plate. When electrical signals are applied to pixel plate <b>212</b>, via signal contacts <b>224</b> and flexures <b>220</b>, pixel plate <b>212</b> acts as a second capacitor plate and moves within gap <b>214</b> against the restoring force provided by flexures <b>220</b>. This regulates the size of gap portion <b>214</b><sub>1</sub>.
0025It will be appreciated that the bond ring <b>126</b> of device <b>102</b> of <figref idref="DRAWINGS">FIG. 1</figref> may be formed, for one embodiment, as described above for ground posts <b>227</b>.
CONCLUSION
0026Although specific embodiments have been illustrated and described herein it is manifestly intended that the scope of the claimed subject matter be limited only by the following claims and equivalents thereof.
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Numbers
- Publication
- 7320899
- Application
- 10977278
Titles
- English
- Micro-displays and their manufacture
Patent term adjustment
- A delay
- +278 daysthe office missed an examination deadline
- Net adjustment
- 278 days
Classification
- CPC, 1
- G02B26/001
- IPC, 3
- H01L21 00
- G02B26 08
- H10P95 00