Recording apparatus and recording method for recording data to a rewritable recording medium, and rewritable recording medium

BACKGROUND OF THE INVENTION

00011. Field of the Invention

0002The present invention relates to a recording apparatus and a recording method for recording data to a rewritable recording medium, and a rewritable recording medium.

00032. Description of the Related Art

0004Recently, various types of digital recording mediums have been developed. Conventional digital recording mediums include, for example, rewritable optical discs such as DVD-RW discs. DVD-RW discs usually allow data to be rewritten about 1000 times, and are used for recording video and audio and data for computer use.

0005DVD-RW discs adopt 8/16 modulation as a modulation rule for recording data. According to the 8/16 modulation, an 8-bit data symbol is converted into a 16-bit code word. There are a plurality of code words usable for one data symbol. In consideration of state information and a DSV (Digital Sum Value), it is determined which one of the plurality of code words is to be selected.

0006The DSV is obtained as follows. Each selected code word is converted by an NRZI (Non Return to Zero Inverted) system. Based on the resultant code, a CDS (Code Word Digital Sum) is obtained for each selected code word. The CDS's are added together to obtained the DSV.

0007The code word is selected also in consideration of the DSV of a code word subsequent to the code word which is now to be selected (current code word).

0008Demodulation is performed by converting the current code word (16 bits) into an 8-bit data symbol, referring to state information (2-bits) represented by the code word immediately subsequent to the current code word. For starting recording of data, the initial value of the state information is set to a prescribed fixed value, and the initial value of the DSV is set to 0.

0009The above-described technology has the following inconvenience. When the same data is recorded at the same position of an optical disc repeatedly, marks of the same pattern are recorded at the same position of the optical disc. Then, a portion of a recording thin film of the optical disc is melted and solidified a plurality of times by the marks being recorded, and another portion thereof is not melted or solidified by no mark being recorded. At a border area between the portion which is melted and solidified a plurality of times and the portion which is not melted or solidified, the recording thin film is likely to have defects. As a result of such defects being spread forward and rearward from the marks, the quality of a reproduction signal is deteriorated and thus the number of rewritable times of the optical disc decreases.

SUMMARY OF THE INVENTION

0010According to one aspect of the invention, a recording apparatus for recording modulated data on a rewritable recording medium includes a data modulation section for modulating data in accordance with a prescribed modulation rule; a parameter value changing section for changing at least one parameter value of the prescribed modulation rule; and a recording section for recording the data modulated in accordance with the prescribed modulation rule on the recording medium.

0011In one embodiment of the invention, the prescribed modulation rule is a state-type modulation rule, and the at least one parameter value is an initial value of a state.

0012In one embodiment of the invention, the prescribed modulation rule uses a digital sum value, and the at least one parameter value is an initial value of the digital sum value.

0013In one embodiment of the invention, the parameter value changing section changes the at least one parameter value randomly.

0014In one embodiment of the invention, the parameter value changing section changes the at least one parameter value in a prescribed order.

0015In one embodiment of the invention, the recording apparatus further includes a storage section for storing a previously used parameter value, wherein the parameter value changing section randomly selects a parameter value to be set from parameter values which are different from the previously used parameter value.

0016According to another aspect of the invention, a recording method for recording modulated data on a rewritable recording medium includes the steps of modulating data in accordance with a prescribed modulation rule; changing at least one parameter value of the prescribed modulation rule; and recording the data modulated in accordance with the prescribed modulation rule on the recording medium.

0017According to still another aspect of the invention, a rewritable recording medium having modulated data recorded thereon is provided. The modulated data is obtained by modulating data in accordance with a prescribed modulation rule, and at least one parameter value of the prescribed modulation rule is changeable.

0018According to still another aspect of the invention, a recording apparatus for starting to record data based on a termination position of data which has been recorded on a rewritable recording medium is provided. The recording apparatus includes a parameter value changing section for changing a parameter value representing a target value of an offset amount of a data recording position from a prescribed reference position; an offset amount changing section for changing the offset amount of the data recording position from the prescribed reference position such that as data recording proceeds, the offset amount of the data recording position from the prescribed reference position approaches the target value; and a recording section for recording the data on the recording medium at the data recording position.

0019In one embodiment of the invention, the parameter value changing section changes the parameter value randomly.

0020In one embodiment of the invention, the parameter value changing section changes the parameter value in a prescribed order.

0021In one embodiment of the invention, the recording apparatus further includes a storage section for storing a previously used parameter value, wherein the parameter value changing section randomly selects a parameter value to be set from parameter values which are different from the previously used parameter value.

0022According to still another aspect of the invention, a recording method for starting to record data based on a termination position of data which has been recorded on a rewritable recording medium is provided. The recording method includes the steps of changing a parameter value representing a target value of an offset amount of a data recording position from a prescribed reference position; changing the offset amount of the data recording position from the prescribed reference position such that as data recording proceeds, the offset amount of the data recording position from a prescribed reference position approaches the target value; and recording the data on the recording medium at the data recording position.

0023According to still another aspect of the invention, a rewritable recording medium having data recorded thereon is provided. A recording start position of data is determined based on a termination position of data which has been recorded thereon. A recording position of the data is determined such that as data recording proceeds, an offset amount of the data recording position from a prescribed reference position approaches a target value. A parameter value representing the target value is changeable.

0024Thus, the invention described herein makes possible the advantages of providing a recording apparatus, a recording method and a recording medium for suppressing the decrease in the number of rewritable times of an optical disc even when the same data is recorded at the same position repeatedly.

0025These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.

BRIEF DESCRIPTION OF THE DRAWINGS

0026<figref idref="DRAWINGS">FIG. 1</figref> shows a structure of an optical disc conforming to the DVD-RW Standards;

0027<figref idref="DRAWINGS">FIG. 2</figref> shows an LPP code conversion table;

0028<figref idref="DRAWINGS">FIG. 3</figref> shows a table illustrating a structure of LPP information;

0029<figref idref="DRAWINGS">FIG. 4</figref> is a timing diagram illustrating a linking operation;

0030<figref idref="DRAWINGS">FIG. 5A</figref> shows an example of a data discontinuity as a result of a gap being generated between previously recorded data and newly recorded data;

0031<figref idref="DRAWINGS">FIG. 5B</figref> shows an example of a data discontinuity as a result of previously recorded data being overwritten by newly recorded data;

0032<figref idref="DRAWINGS">FIG. 6</figref> is a block diagram illustrating a schematic structure of an optical disc apparatus <b>101</b> according to a first example of the present invention;

0033<figref idref="DRAWINGS">FIG. 7</figref> is a block diagram illustrating a structure of the optical disc apparatus <b>101</b> shown in <figref idref="DRAWINGS">FIG. 6</figref>;

0034<figref idref="DRAWINGS">FIG. 8</figref> is a block diagram illustrating a schematic structure of a system control section <b>115</b> of the optical disc apparatus <b>101</b> shown in <figref idref="DRAWINGS">FIG. 7</figref>;

0035<figref idref="DRAWINGS">FIG. 9A</figref> shows an example of a main conversion table;

0036<figref idref="DRAWINGS">FIG. 9B</figref> shows an example of a sub conversion table;

0037<figref idref="DRAWINGS">FIG. 10A</figref> shows an example of a table showing the correspondence between the frame number and the sync number;

0038<figref idref="DRAWINGS">FIG. 10B</figref> shows an example of a main conversion table;

0039<figref idref="DRAWINGS">FIG. 10C</figref> shows an example of a sub conversion table;

0040<figref idref="DRAWINGS">FIG. 11</figref> is a flowchart illustrating the 8/16 modulation processing performed by the optical disc apparatus <b>101</b> shown in <figref idref="DRAWINGS">FIG. 7</figref>;

0041<figref idref="DRAWINGS">FIG. 12</figref> is a block diagram illustrating a schematic structure of an optical disc apparatus <b>201</b> according to a second example of the present invention;

0042<figref idref="DRAWINGS">FIG. 13</figref> is a block diagram illustrating a structure of the optical disc apparatus <b>201</b> shown in <figref idref="DRAWINGS">FIG. 12</figref>;

0043<figref idref="DRAWINGS">FIG. 14</figref> is a block diagram illustrating a schematic structure of a system control section <b>232</b> of the optical disc apparatus <b>201</b> shown in <figref idref="DRAWINGS">FIG. 13</figref>;

0044<figref idref="DRAWINGS">FIG. 15</figref> is a block diagram illustrating an exemplary structure of a PLL circuit <b>240</b> of the optical disc apparatus <b>201</b> shown in <figref idref="DRAWINGS">FIG. 13</figref>;

0045<figref idref="DRAWINGS">FIG. 16</figref> is a graph illustrating the manner by which the offset amount from the position at which the data should be recorded (the prescribed reference position) is changed as the data recording proceeds;

0046<figref idref="DRAWINGS">FIG. 17A</figref> is a timing diagram illustrating an operation of a first timing signal generator <b>236</b> shown in <figref idref="DRAWINGS">FIG. 13</figref>;

0047<figref idref="DRAWINGS">FIG. 17B</figref> is a timing diagram illustrating an operation of a second timing signal generator <b>237</b> shown in <figref idref="DRAWINGS">FIG. 13</figref>;

0048<figref idref="DRAWINGS">FIG. 18</figref> is a timing diagram illustrating the timing to start a data recording operation; and

0049<figref idref="DRAWINGS">FIG. 19</figref> is a block diagram illustrating a structure of an optical disc apparatus <b>301</b> according a third example of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

0050Hereinafter, the present invention will be described by way of illustrative examples with reference to the accompanying drawings.

EXAMPLE 1

0051As an exemplary optical disc on and from which data is to be recorded and reproduced by an optical disc apparatus according to a first example of the present invention, a disc conforming to the DVD-RW (Digital Versatile Disc-Rewritable) Standards will be described. First, DVD-RW will be described.

(DVD-RW)

0052<figref idref="DRAWINGS">FIG. 1</figref> shows a structure of an optical disc conforming to the DVD-RW Standards. This optical disc has a spiral recording groove (groove track). Data is recorded on the optical disc by directing a light beam to the groove track so as to change the optical characteristics of a recording film formed of a phase change material or the like to form a recording mark.

0053Data to be recorded is formed of an ECC (Error Correction Code) block, which is the minimum unit for error correction. An ECC block includes 16 sectors, and each sector includes 26 frames. Each frame includes a code obtained by performing the 8/16 modulation of a 2-byte synchronous signal and 91-byte data (i.e., a code of 1448T in total, which is the sum of a 32T sync section (SY) and a 1456T data section (DATA)). Here, “1T” represents a unit time length of a recording mark, and corresponds to 38.2 ns (1/(26.16 MHz)) at the standard speed of the DVD-RW.

0054The sync section includes a code including “a recording mark having a length of 14T and a space having a length of 4T (an area sandwiched between two recording marks) or “a space having a length of 14T and a recording having a length of 4T”. A leading frame (frame <b>0</b>) of each sector includes 4-byte address information referred to as a “data ID”, and a 2-byte ID error detection code referred to as an “IED” (ID Error Detection Code). The groove track has wobbles at a prescribed frequency. The frequency of the wobbles is about 140.6 kHz at the standard speed. A clock signal having a unit time length of the recording mark can be obtained by multiplying the frequency of the wobbles by 186 (140.6 kHz×186=26.16 MHz). Namely, 1 wobble has a length of 186T, and 1 frame (1488T) includes 8 wobbles.

0055The optical disc has a pit referred to as a “land pre-pit” (LPP) formed during the production process. The land pre-pit is concaved from the surface irradiated with light and is provided in a land track sandwiched by two groove tracks. The land pre-pit represents a reference position for recording and physical address information. The land pre-pit is associated with the groove track immediately inside that groove track, and is positioned at the vertex of a wobble.

0056Among the 26 frames included in one sector, even numbered frames are referred to as “EVEN frames”, and odd numbered frames are referred to as “ODD frames”. Frame <b>0</b> is referred to as an “EVEN sync frame”, and frame <b>1</b> is referred to as an “ODD sync frame”. Basically, a 3-bit LPP code is located at the vertexes of the first 3 wobbles, among the 8 wobbles included in each EVEN frame.

0057<figref idref="DRAWINGS">FIG. 2</figref> shows the meaning of LPP codes (LPP code conversion table). Where the LPP code immediately inside a given groove track and the LPP code immediately outside that given groove track are overlapping in a radial direction, the LPP code immediately outside the groove track is shifted to the ODD frame in order to prevent crosstalk from occurring between the two LPP codes. 13 LPP codes are defined for one sector. Thus, a 1-bit sync code and 12-bit LPP information can be obtained for one sector by performing reverse conversion using Table 2.

0058<figref idref="DRAWINGS">FIG. 3</figref> shows a structure of LPP information. One piece of LPP information includes one ECC block (16 sectors). Among the 12-bit LPP information obtained for each sector, the first 4 bits (bit <b>1</b> through bit <b>4</b>) are referred to as “RA” (Relative Address) and represent sector numbers in the ECC block. The remaining 8 bits (bit <b>5</b> through bit <b>12</b>) are referred to as “DATA” and represent 2 pairs of error correction codes (parities) and 2 pairs of physical address information (address of the ECC block).

0059<figref idref="DRAWINGS">FIG. 4</figref> is a timing diagram illustrating a linking operation. For recording data to an optical disc, data is recorded at a circumferential position such that the first land pre-pits in each frame overlap a 14T long recording mark or space included in the sync section of the recording data. Recording is performed using an ECC block as the minimum unit, and is started and terminated at the 18th byte of the leading frame of the leading sector of an ECC block. “Linking” means to combine new data to be recorded with data which is previously recorded. When linking results in a failure, a data discontinuity occurs. <figref idref="DRAWINGS">FIG. 5A</figref> shows an example of the data discontinuity as a result of a gap being generated between previously recorded data and newly recorded data. <figref idref="DRAWINGS">FIG. 5B</figref> shows an example of the data discontinuity as a result of previously recorded data being overwritten by newly recorded data. In order to avoid generation of such a data discontinuity, linking is desired to be performed with high precision.

0000(Optical Disc Apparatus)

0060<figref idref="DRAWINGS">FIG. 6</figref> is a block diagram illustrating a schematic structure of an optical disc apparatus <b>101</b> according to the first example of the present invention.

0061The optical disc apparatus <b>101</b> includes a modulation section <b>105</b> for modulating data in accordance with a prescribed modulation rule (for example, 8/16 modulation), a parameter value changing section <b>102</b> for changing at least one parameter value of the prescribed modulation rule, and a recording section <b>127</b> for recording data which has been modulated in accordance with the prescribed modulation rule on an optical disc <b>100</b>. Thus, the optical disc apparatus <b>101</b> acts as a recording apparatus for recording modulated data on the optical disc <b>100</b>.

0062For example, the parameter value changing section <b>102</b> changes at least one parameter value each time new data is to be recorded on the optical disc <b>100</b>. The parameter value changing section <b>102</b> may change at least one parameter value randomly or in a prescribed order. Changing at least one parameter allows the same data to be converted into different modulated data. Therefore, when the same data is requested to be recorded at the same position repeatedly, different modulated data is recorded at the same position, instead of exactly the same data being recorded at the same position. As a result, the deterioration of the recording thin film of the optical disc <b>100</b> is suppressed, and thus the decrease in the number of rewritable times of the optical disc <b>100</b> can be suppressed.

0063As a parameter value, any value which, when changed, allows the same data to be converted into different modulated data is usable. When, for example, the prescribed modulation rule is state-type modulation, the parameter value may be the initial value of the state. Alternatively, when the prescribed modulation rule uses a DSV (Digital Sum Value), the parameter value may be the initial value of the DSV or the target value of the DSV. Still alternatively, as at least one parameter value, a combination of the initial value of the state and the initial value (or the target value) of the DSV may be used.

0064Now, the structure of the optical disc apparatus <b>101</b> will be described in more detail.

0065<figref idref="DRAWINGS">FIG. 7</figref> is a block diagram illustrating a detailed structure of the optical disc apparatus <b>101</b>.

0066The optical disc apparatus <b>101</b> includes a head <b>112</b>, a reproduction section <b>113</b>, a demodulation section <b>114</b>, a system control section <b>115</b>, a main conversion section <b>116</b>, a sub conversion section <b>117</b>, NRZI conversion sections <b>118</b> and <b>119</b>, CDS operation sections <b>120</b> and <b>121</b>, a DSV comparison section <b>122</b>, a run length determination section <b>123</b>, a state selector <b>124</b>, a code word selector <b>125</b>, a parallel-serial (P/S) conversion section <b>126</b>, and the recording section <b>127</b>.

0067The optical disc apparatus <b>101</b> records data having the format shown in <figref idref="DRAWINGS">FIG. 1</figref> on the optical disc <b>100</b>. The optical disc apparatus <b>101</b> also reproduces data recorded on the optical disc <b>100</b>.

0068The head <b>112</b> directs a light beam to the optical disc <b>100</b> and detects light reflected by the optical disc <b>100</b>, and thus outputs the data recorded on the optical disc <b>100</b> as an analog modulation signal. The reproduction section <b>113</b> performs analog-digital conversion of the analog modulation signal which is output from the head <b>112</b> so as to output a reproduction signal. The demodulation section <b>114</b> demodulates the reproduction signal which is output from the reproduction section <b>113</b> so as to output a demodulation signal. The demodulation signal is output to the system control section <b>115</b>. The system control section <b>115</b> outputs a control signal for controlling data pattern generation processing (for example, a sync gate signal, a data gate signal, etc.). The sync gate signal and the data gate signal are output both to the main conversion section <b>116</b> and the sub conversion section <b>117</b>.

0069<figref idref="DRAWINGS">FIG. 8</figref> is a block diagram illustrating a schematic structure of the system control section <b>115</b>.

0070The system control section <b>115</b> includes a DSV initial value changing section <b>103</b> for changing the initial value of a DSV, and a state initial value changing section <b>104</b> for changing the initial value of a state. For example, the DSV initial value changing section <b>103</b> may set the initial value of the DSV randomly each time new data is to be recorded on the optical disc <b>100</b>. The DSV initial value changing section <b>103</b> may randomly select one value from prescribed number of candidate values including, for example, 0, 1, and −1, or may calculate the initial value of the DSV in accordance with a prescribed calculation equation. The state initial value changing section <b>104</b> may select one of a plurality of states randomly each time new data is to be recorded on the optical disc <b>100</b>.

0071Returning to <figref idref="DRAWINGS">FIG. 7</figref>, the main conversion section <b>116</b> and the sub conversion section <b>117</b> will be described.

0072The main conversion section <b>116</b> has a plurality of conversion tables therein. The plurality of tables include a main conversion table shown in <figref idref="DRAWINGS">FIG. 9A</figref> and a main conversion table shown in <figref idref="DRAWINGS">FIG. 10B</figref>.

0073The sub conversion section <b>117</b> has a plurality of conversion tables therein. The plurality of tables include a sub conversion table shown in <figref idref="DRAWINGS">FIG. 9B</figref> and a sub conversion table shown in <figref idref="DRAWINGS">FIG. 10C</figref>.

0074When a sync gate signal which is output from the system control section <b>115</b> is “enable”, the main conversion section <b>116</b> uses the main conversion table shown in <figref idref="DRAWINGS">FIG. 10B</figref> to convert the sync number into a sync code, and the sub conversion section <b>117</b> uses the sub conversion table shown in <figref idref="DRAWINGS">FIG. 10C</figref> to convert the sync number into a sync code.

0075When a data gate signal which is output from the system control section <b>115</b> is “enable”, the main conversion section <b>116</b> uses the main conversion table shown in <figref idref="DRAWINGS">FIG. 9A</figref> to convert the data symbol into a code word and a next state code, and the sub conversion section <b>117</b> uses the sub conversion table shown in <figref idref="DRAWINGS">FIG. 9B</figref> to convert the data symbol into a code word and a next state code.

0076<figref idref="DRAWINGS">FIG. 9A</figref> shows a structure of a main conversion table for the 8/16 modulation as an exemplary main conversion table for the data section. <figref idref="DRAWINGS">FIG. 9B</figref> shows a structure of a sub conversion table for the 8/16 modulation as an exemplary sub conversion table for the data section.

0077The main conversion table (<figref idref="DRAWINGS">FIG. 9A</figref>) and the sub conversion table (<figref idref="DRAWINGS">FIG. 9B</figref>) each include four sub tables respectively showing state <b>1</b> through state <b>4</b>. The four sub tables each include a code word and a next state for each data symbol. The code word represents the code word which is to be selected when the current data symbol is converted. The next state represents the state which is to be selected when the next data symbol is converted. The next state is used for maintaining the run length restriction of the code word connection point and also used for specifying the state information bits used for demodulation.

0078In the 8/16 modulation, the sub conversion table is prepared only for the data symbols <b>0</b> through <b>87</b>. For the data symbols <b>88</b> et seq., the sub table for state <b>4</b> of the main conversion table is used instead of the sub table for state <b>1</b> of the sub conversion table. The sub table for state <b>2</b> of the main conversion table is used instead of the sub table for state <b>2</b> of the sub conversion table. The sub table for state <b>3</b> of the main conversion table is used instead of the sub table for state <b>3</b> of the sub conversion table. The sub table for state <b>1</b> of the main conversion table is used instead of the sub table for state <b>4</b> of the sub conversion table. Accordingly, when the sub conversion table is selected, the run length restriction may not be fulfilled. Here, the “run length restriction” means the restriction on the number of bits “<b>0</b>” existing between a bit “<b>1</b>” and the next bit “<b>1</b>”. The number of bits “<b>0</b>” is restricted so as to be the minimum polarity inversion interval or more but the maximum polarity inversion interval or less.

0079Each code word includes state information bits based on the state of the conversion table used. The state information bits are referred to for demodulating data. In the examples shown in <figref idref="DRAWINGS">FIGS. 9A and 9B</figref>, the 0th bit and the 12th bit of the code word correspond to the state information bits. For state <b>1</b> or state <b>4</b>, the state information bits are “<b>0</b>,<b>0</b>”, “<b>0</b>,<b>1</b>”, “<b>1</b>,<b>0</b>” or “<b>1</b>,<b>1</b>”. Namely, in this case, the state information bits are “don't care”. For state <b>2</b>, the state information bits are “<b>0</b>,<b>0</b>”. For state <b>3</b>, the state information bits are “<b>0</b>,<b>1</b>”, “<b>1</b>,<b>0</b>” or “<b>1</b>,<b>1</b>”.

0080In <figref idref="DRAWINGS">FIGS. 9A and 9B</figref>, the code words corresponding to the next state <b>1</b> or <b>4</b> each have only one corresponding data symbol. The tables are structured such that the data symbol can be specified without referring to the state information bits. The code words corresponding to the next state of 2 or 3 may have a plurality of corresponding data symbols. In this case, the data symbol (8 bits) is specified based on the code word (16 bits) and the state information bits (2 bits) included in the next code word. Namely, the data symbol corresponding to a given code word can be obtained by referring to the state information bits included in the next code word.

0081<figref idref="DRAWINGS">FIG. 10A</figref> shows a structure of a table illustrating the correspondence between the frame number and the sync number. <figref idref="DRAWINGS">FIG. 10B</figref> shows a structure of an exemplary main conversion table for the sync section. <figref idref="DRAWINGS">FIG. 10C</figref> shows a structure of an exemplary sub conversion table for the sync section.

0082The sync code is selected using the sync number which is specified for each frame number shown in <figref idref="DRAWINGS">FIG. 10A</figref>. The main conversion table (<figref idref="DRAWINGS">FIG. 10B</figref>) and the sub conversion table (<figref idref="DRAWINGS">FIG. 10C</figref>) each include a sub table showing state <b>1</b>/state <b>2</b>, and a sub table showing state <b>3</b>/state <b>4</b>. Namely, state <b>1</b> and state <b>2</b> use the same sub table. Similarly, state <b>3</b> and state <b>4</b> use the same sub table. The state of the next code word of the sync section (i.e., the next state) is always <b>1</b>.

0083Each sync code includes state information bits. The state information bits are referred to for demodulating data. In the examples shown in <figref idref="DRAWINGS">FIGS. 10B and 10C</figref>, the 0th bit and the 12th bit of the sync code correspond to the state information bits. For state <b>1</b> or state <b>2</b>, the state information bits are “<b>0</b>,<b>0</b>”. For state <b>3</b> or state <b>4</b>, the state information bits are “<b>1</b>,<b>0</b>”. The relationship between the state and the state information bits of the sync section is the same as the relationship between the state and the state information bits of the data section.

0084Thus, the optical disc apparatus <b>101</b> is structured so as to be able to change the initial value of the state. Therefore, each time a new data symbol is to be recorded on the optical disc <b>100</b>, the manner of state transition can be changed. As a result, even when the same data is required to be recorded at the same position of the optical disc <b>100</b>, the data can be recorded with different recording patterns at the same position.

0085Returning to <figref idref="DRAWINGS">FIG. 7</figref>, the optical disc apparatus <b>101</b> will be further described. In the following description, the sync code and the code word which are output from the main conversion section <b>116</b> will both be referred to as the “main conversion code”, and the next state which is output from the main conversion section <b>116</b> will be referred to as the “main conversion state”, for the sake of convenience. Similarly, the sync code and the code word which are output from the sub conversion section <b>117</b> will both be referred to as the “sub conversion code”, and the next state which is output from the sub conversion section <b>117</b> will be referred to as the “sub conversion state”, for the sake of convenience.

0086The NRZI conversion section <b>118</b> performs NRZI conversion of the main conversion code. The NRZI conversion section <b>119</b> performs NRZI conversion of the sub conversion code.

0087The CDS operation section <b>120</b> calculates a CDS based on the output from the NRZI conversion section <b>118</b>, and outputs the calculation result a CDS_main. The CDS operation section <b>121</b> calculates a CDS based on the output from the NRZI conversion section <b>119</b>, and outputs the calculation result a CDS_sub.

0088The run length determination section <b>123</b> determines whether or not the run length of the data connection point fulfills the run length restriction of the minimum polarity inversion interval of 10 bits, based on the output from the NRZI conversion section <b>119</b> and the output from the code word selector <b>125</b>. When the run length is determined to fulfill the run length restriction, the run length determination section <b>123</b> outputs “H” (high level signal). When the run length is determined not to fulfill the run length restriction, the run length determination section <b>123</b> outputs “L” (low level signal).

0089The DSV comparison section <b>122</b> sets the current sum of the DSVs as DSV_total. When the output from the run length determination section <b>123</b> is “L”, the DSV comparison section <b>122</b> outputs “L” and also substitutes (DSV_total+CDS_main) into DSV_total. When the output from the run length determination section <b>123</b> is “H”, the DSV comparison section <b>122</b> outputs “L” and also substitutes (DSV_total+CDS_main) into DSV_totalonly when the absolute value of the (DSV_total+CDS_main) is equal to or less than the absolute value of (DSV_total+CDS_sub). Otherwise, the DSV comparison section <b>122</b> outputs “H” and also substitutes (DSV_total+CDS_sub) into DSV_total. The value of DSV_totalis reset by the DSV initial value changing section <b>103</b>. The value of DSV_totalis reset when, for example, new data is to be recorded on the optical disc <b>100</b>. The value of DSV_totalis reset to, for example, a random value.

0090Thus, the optical disc apparatus <b>101</b> is structured so as to be able to change the initial value of the DSV (to which DSV_totalis reset). Therefore, each time a new data symbol is to be recorded on the optical disc <b>100</b>, the manner of selecting the main conversion table and the sub conversion table can be changed. As a result, even when the same data is required to be recorded at the same position of the optical disc <b>100</b>, the data can be recorded with different recording patterns at the same position. However, when the absolute value of the initial value of the DSV is excessively large, only the same recording pattern is selected for the same data symbol, since DSV control acts to decrease the absolute value of the DSV. Therefore, the initial value of the DSV is preferably within the range of ±4 (−4 or greater but +4 or less).

0091When the output from the DSV comparison section <b>122</b> is “L”, the state selector <b>124</b> outputs the main conversion state as the next state. When the output from the DSV comparison section <b>122</b> is “H”, the state selector <b>124</b> outputs the sub conversion state as the next state. The next state which is output from the state selector <b>124</b> is input to each of the main conversion section <b>116</b> and the sub conversion section <b>117</b>, and is used for selecting the next conversion table.

0092When the output from the DSV comparison section <b>122</b> is “L”, the code word selector <b>125</b> selectively outputs the output from the NRZI conversion section <b>118</b>. When the output from the DSV comparison section <b>122</b> is “H”, the code word selector <b>125</b> selectively outputs the output from the NRZI conversion section <b>119</b>.

0093Namely, the code word selector <b>125</b> outputs a sync code or a code word which is converted by the conversion table which provides a smaller absolute value of the DSV. Thus, the DC component of the NRZI signal can be suppressed.

0094The parallel-serial conversion section <b>126</b> converts parallel data from the code word selector <b>125</b> into serial data, and outputs the serial data to the recording section <b>127</b>. The recording section <b>127</b> generates an optical conversion signal corresponding to the serial data which is output from the parallel-serial conversion section <b>126</b>, and records the optical conversion signal via the head <b>112</b> on the optical disc <b>100</b>.

0095As can be appreciated from the above, the main conversion section <b>116</b>, the sub conversion section <b>117</b>, the NRZI conversion sections <b>118</b> and <b>119</b>, the CDS operation sections <b>120</b> and <b>121</b>, the DSV comparison section <b>122</b>, the run length determination section <b>123</b>, the state selector <b>124</b>, the code word selector <b>125</b>, and the parallel-serial (P/S) conversion section <b>126</b> act together as a modulation section <b>105</b> (<figref idref="DRAWINGS">FIG. 6</figref>) for modulating data in accordance with a prescribed modulation rule (for example, 8/16 modulation). The system control section <b>115</b> acts as the parameter value changing section <b>102</b> (<figref idref="DRAWINGS">FIG. 6</figref>) for changing at least one parameter value of the prescribed modulation rule.

0096Next, an operation of the optical disc apparatus <b>101</b> will be described with reference to a flowchart. In the 8/16 modulation of the data section and the sync section, the main conversion table and the sub conversion table are appropriately used such that the value of the DSV is a prescribed value.

0097<figref idref="DRAWINGS">FIG. 11</figref> is a flowchart illustrating the operation of the optical disc apparatus <b>101</b> for the 8/16 modulation. First, the initial value of the DSV and the initial value of the state are randomly set (step S<b>1</b>). Thus, even when the same data is recorded repeatedly at the same position, the data can be recorded with different recording patterns at the same position and thus the decrease in the number of rewritable times can be suppressed.

0098Next, a sync code to be recorded in the sync section or a code word to be recorded in the data section is generated using the main conversion table and the sub conversion table (step S<b>3</b>). Specifically, for recording a sync code in the sync section, the main conversion table shown in <figref idref="DRAWINGS">FIG. 10B</figref> and the sub conversion table shown in <figref idref="DRAWINGS">FIG. 10C</figref> are used to convert the sync number corresponding to the frame number shown in <figref idref="DRAWINGS">FIG. 10A</figref> into a sync code. For recording a code word in the data section, the main conversion table shown in <figref idref="DRAWINGS">FIG. 9A</figref> and the sub conversion table shown in <figref idref="DRAWINGS">FIG. 9B</figref> are used to convert the data symbol into a code word.

0099In either case, the state is to be used is determined based on the next state which is determined at the immediately previous conversion.

0100In step S<b>4</b>, the sync code or the code word obtained by the conversion performed using the main conversion table is further processed by the NRZI conversion. A CDS is calculated based on the result of the NRZI conversion. The result is output as the CDS_main. The sync code or the code word obtained by the conversion performed using the sub conversion table is further processed by the NRZI conversion. The CDS is calculated based on the result of the NRZI conversion. The result is output as the CDS_sub.

0101In step S<b>5</b>, the run length of the connection point, in which the sync code or the code word obtained by the conversion performed using the sub conversion table is connected to the sync code or the code word previously processed is calculated, and it is determined whether or not the run length fulfills the prescribed run length restriction (step S<b>5</b>). When the run length is determined to fulfill the prescribed run length restriction, the processing goes to step S<b>6</b>. When the run length is determined not to fulfill the prescribed run length restriction, the processing goes to step S<b>7</b>. The reason why it is determined whether or not the run length fulfills the prescribed run length restriction only regarding the sync code or the code word obtained by the conversion performed using the sub conversion table is as follows: The run length restriction is always fulfilled by the conversion performed using the main conversion table, whereas the run length restriction sometimes is not fulfilled by the conversion performed using the sub conversion table.

0102When the run length restriction is determined not to be fulfilled, the conversion is performed using the main conversion table. Thus, the run length restriction for the 8/16 modulation can be fulfilled with certainty. In step S<b>6</b>, the absolute value of the sum of the current (latest) DSV and CDS_mainis compared with the absolute value of the sum of the current DSV and CDS_sub. When the former is equal to or less than the latter, the processing goes to step <b>7</b>. When the former is greater than the latter, the processing goes to step S<b>9</b>.

0103In step S<b>7</b>, the sum of the current DSV and CDS_mainis newly set as a DSV. Then, the sync code or the code word obtained by the conversion performed using the main conversion table is selected as the code to be recorded (step S<b>8</b>).

0104In step S<b>9</b>, the sum of the current DSV and CDS_subis newly set as a DSV. Then, the sync code or the code word obtained by the conversion performed using the sub conversion table is selected as the code to be recorded (step S<b>10</b>).

0105As described above, it is determined whether or not all the data has been recorded (step S<b>11</b>). When all the data has been recorded, the processing is terminated. When all the data has not been recorded, the processing returns to step S<b>3</b>.

0106Thus, according to the first example of the present invention, each time new data is to be recorded on the optical disc, the initial value of the DSV and the initial value of the state can be randomly changed. Therefore, even when the same data needs to be recorded at the same position repeatedly, the data can be recorded with different recording patterns at the same position. As a result, the decrease in the number of rewriting times can be suppressed.

EXAMPLE 2

0107<figref idref="DRAWINGS">FIG. 12</figref> is a block diagram illustrating a schematic structure of an optical disc apparatus <b>201</b> according to a second example of the present invention.

0108The optical disc apparatus <b>201</b> includes a parameter value changing section <b>203</b> for changing a target value of an offset amount of the data recording position with respect to a prescribed reference position, an offset amount changing section <b>202</b> for changing the offset amount of the data recording position with respect to the prescribed reference position such that the offset amount approaches the target value as the recording of data proceeds, and a recording section <b>204</b> for recording the data at the data recording position of the optical disc <b>100</b>. The optical disc apparatus <b>201</b> acts as a recording apparatus for starting recording of the data based on a terminal position of data which has been recorded on the optical disc <b>100</b>.

0109For example, the parameter value changing section <b>203</b> changes a parameter value each time new data is to be recorded on the optical disc <b>100</b>. The parameter value changing section <b>203</b> may change the parameter value randomly or in a prescribed order. By changing the parameter value, the same data is allowed to be recorded at slightly different positions. Therefore, when the same data is requested to be recorded at the same position repeatedly, the data is recorded at slightly different positions, instead of the same data being recorded at exactly the same position. As a result, the deterioration of the recording thin film of the optical disc <b>100</b> is suppressed, and thus the decrease in the number of rewritable times of the optical disc <b>100</b> can be suppressed.

0110Now, the structure of the optical disc apparatus <b>201</b> will be described in more detail.

0111<figref idref="DRAWINGS">FIG. 13</figref> is a block diagram illustrating a detailed structure of the optical disc apparatus <b>201</b>.

0112The optical disc apparatus <b>201</b> includes a spindle motor <b>212</b>, a pickup <b>213</b>, a motor driver <b>214</b>, a power control circuit <b>215</b>, a light beam driving circuit <b>216</b>, a reproduction amplifier <b>217</b>, a pre-pit reproduction circuit <b>218</b>, a wobble reproduction circuit <b>219</b>, a data reproduction circuit <b>220</b>, a reproduction clock generation circuit <b>221</b>, a pre-pit window protection circuit <b>222</b>, a pre-pit sync detection circuit <b>223</b>, a pre-pit demodulation circuit <b>224</b>, a pre-pit address extraction circuit <b>225</b>, a data sync detection circuit <b>226</b>, a data sync window protection circuit <b>227</b>, an 8/16 demodulation circuit <b>228</b>, an data ID extraction circuit <b>229</b>, a recording clock generation circuit <b>230</b>, a lock detection circuit <b>231</b>, a system control section <b>232</b>, a recording control circuit <b>233</b>, an error correction circuit <b>234</b>, and an 8/16 modulation circuit <b>235</b>.

0113The spindle motor <b>212</b> rotates the optical disc <b>100</b> at a prescribed rotation frequency. The spindle motor <b>212</b> is driven by the motor driver <b>214</b>.

0114The pickup <b>213</b> directs a light beam having a prescribed reproduction power to the optical disc <b>100</b>. The light beam which is output from the pickup <b>213</b> is controlled based on a driving signal which is output from the light beam driving circuit <b>216</b>. The light beam driving circuit <b>216</b> is controlled based on a reproduction power control signal which is output from the power control circuit <b>215</b>. The light reflected by the optical disc <b>100</b> represents the optical characteristics and physical characteristics of a portion of a recording film of the optical disc <b>100</b> irradiated with the light beam. The light reflected by the optical disc <b>100</b> is incident on the pickup <b>213</b>.

0115The pickup <b>213</b> includes a plurality of light receiving circuits (not shown). The plurality of light receiving circuits each convert an amount of the light reflected by the optical disc <b>100</b> into an electric signal.

0116The reproduction amplifier <b>217</b> generates a sum signal (RF signal or radio frequency signal) by adding the electric signals which are output from the plurality of light receiving circuits, and also generates a differential signal (push-pull signal) from an amplified RF signal and electric signals which are output from the light receiving circuits which are separated from each other along a line substantially parallel to the track of the optical disc <b>100</b>. The RF signal is output to the data reproduction circuit <b>220</b>. The push-pull signal is output to the pre-pit reproduction circuit <b>218</b> and the wobble reproduction circuit <b>219</b>.

0117The pre-pit reproduction circuit <b>218</b> includes a comparator (not shown) for comparing the level of the push-pull signal with a slice level (substantially an intermediate value between (i) the maximum level of the land pre-pit and (ii) the maximum level of the waveform of the wobble). When the level of the push-pull signal is higher than the slice level, the pre-pit reproduction circuit <b>218</b> outputs an “H” level pre-pit signal. When the level of the push-pull signal is lower than the slice level, the pre-pit reproduction circuit <b>218</b> outputs an “L” level pre-pit signal.

0118The wobble reproduction circuit <b>219</b> includes a BPF (Band Pass Filter) for allowing the wobble frequency components (140.6 kHz and the vicinity thereof at the standard speed) to pass therethrough, and a comparator (not shown) for comparing the level of the signal output from the BPF with a slice level (substantially an intermediate value of the amplitude of the wobbles). By causing the push-pull signal to pass through the BPF, the push-pull signal can be deprived of noise components and land pre-pit components. When the level of the signal output from the BPF is higher than the slice level, the wobble reproduction circuit <b>219</b> outputs an “H” level wobble signal. When the level of the signal output from the BPF is lower than the slice level, the wobble reproduction circuit <b>219</b> outputs an “L” level wobble signal.

0119The data reproduction circuit <b>220</b> includes a comparator (not shown) for comparing the level of the RF signal with a slice level (the value at which the latest total of the levels of the “H” signals in a prescribed zone is substantially equal to the latest total of the levels of the “L” signals in the prescribed zone). When the level of the RF signal is higher than the slice level, the data reproduction circuit <b>220</b> outputs an “H” level data reproduction signal. When the level of the RF signal is lower than the slice level, the data reproduction circuit <b>220</b> outputs an “L” level data reproduction signal.

0120The reproduction clock generation circuit <b>221</b> controls the frequency of the reproduction clock, such that the shortest length of the “H” level portion or the “L” level portion of the data reproduction signal (3T) corresponds to 3 cycles of the reproduction clock and further such that the longest length of the “H” level portion or the “L” level portion of the data reproduction signal (14T) corresponds to 14 cycles of the reproduction clock. Thus, the reproduction clock generation circuit <b>221</b> generates a reproduction clock having a frequency of 1T.

0121The pre-pit window protection circuit <b>222</b> predicts the position of the pre-pit signal to be detected next, based on the position of the previously detected pre-pit signal, and removes pre-pit signals which are detected at the positions other than the predicted position. Thus, erroneous detection of pre-pits can be reduced.

0122The pre-pit sync detection circuit <b>223</b> extracts a pre-pit sync signal corresponding to the first land pre-pit of the LPP code, from the pre-pit signal which is output from the pre-pit window protection circuit <b>222</b>.

0123The pre-pit demodulation circuit <b>224</b> is synchronized with the pre-pit sync signal and converts the pre-pit signal into pre-pit information in accordance with the table shown in <figref idref="DRAWINGS">FIG. 2</figref>.

0124The pre-pit address extraction circuit <b>225</b> is synchronized with the EVEN sync frame or the ODD sync frame of the pre-pit information, obtains RA And LPP information, stores the LPP information in a memory based on the RA, performs prescribed error correction, and extracts a pre-pit address.

0125The data sync detection circuit <b>226</b> synchronizes the data reproduction signals at a timing of the reproduction clock, detects a sync code including a 14T long recording mark and a 4T long space or a 14T long space and a 4T long recording mark, and outputs a data sync detection signal.

0126The data sync window protection circuit <b>227</b> predicts the position of the data sync detection signal to be detected next, based on the position of the previously detected data sync detection signal, and removes data sync detection signals detected at positions other than the predicted position. Thus, erroneous detection of data sync can be reduced.

0127The 8/16 demodulation circuit <b>228</b> performs 8/16 demodulation based on the data sync detection signal which is output from the data sync window protection circuit <b>227</b>, and output the demodulated data.

0128The data ID extraction circuit <b>229</b> extracts a data ID from the demodulated data.

0129The recording clock generation circuit <b>230</b> generates a recording clock. The frequency of the recording clock is controlled by the wobble signal and the pre-pit signal. The structure of the recording clock generation circuit <b>230</b> will be described later.

0130The lock detection circuit <b>231</b> detects that the recording clock is stable within a prescribed frequency range, and outputs a lock signal.

0131The system control section <b>232</b> refers to the extracted pre-pit address or data ID for detecting the lock signal which indicates that the pickup <b>213</b> has reached the address at which the data is to be recorded and the recording clock is stabilized. When such a lock signal is detected, the system control section <b>232</b> instructs the recording control circuit <b>233</b> to start a recording operation.

0132<figref idref="DRAWINGS">FIG. 14</figref> is a block diagram illustrating a schematic structure of the system control section <b>232</b>.

0133The system control section <b>232</b> includes the parameter value changing section <b>203</b> for changing the target value of an offset amount of the data recording position with respect to a prescribed reference position. For example, the parameter value changing section <b>203</b> may randomly change the parameter value each time new data is to be recorded on the optical disc <b>100</b>. The parameter value which is set by the parameter value changing section <b>203</b> is output to the recording clock generation circuit <b>230</b>.

0134Returning to <figref idref="DRAWINGS">FIG. 13</figref>, the recording control circuit <b>233</b> determines whether or not data is recorded in a portion of the optical disc <b>100</b> immediately before the point at which recording is to be started, in response to the instruction from the system control section <b>232</b> to start the recording operation. When no data is recorded immediately before the point at which recording is to be started, the recording control circuit <b>233</b> determines a recording start point based on the pre-pit signal and generates a recording gate signal. When data is recorded immediately before the point at which recording is to be started, the recording control circuit <b>233</b> determines a recording start point based on the data sync detection signal and generates a recording gate signal.

0135The error correction circuit <b>234</b> adds an error correction code to the data to be recorded in response to the recording gate signal.

0136The 8/16 modulation circuit <b>235</b> generates a modulation signal by performing the 8/16 modulation on the output from the error correction circuit <b>234</b>, synchronizes the modulation signal to the recording clock, and outputs the resultant signal.

0137The power control circuit <b>215</b> outputs a recording power control signal to the light beam driving circuit <b>216</b>, in response to the recording gate signal.

0138The light beam driving circuit <b>216</b> forms the modulation signal into a multi-pulse signal based on a prescribed write strategy, and outputs a driving signal in accordance with the recording power control signal.

0139The pickup <b>213</b> converts the driving signal into a light beam, and directs the light beam to the recording film of the optical disc <b>100</b>. The optical characteristics of the portion of the recording film irradiated with the light beam are changed. As a result, a recording mark is formed on the recording film.

0140The recording clock generation circuit <b>230</b> includes a first timing signal generator <b>236</b>, a second timing signal generator <b>237</b>, a phase difference detector <b>238</b>, a filter <b>239</b>, and a PLL (Phase Locked Loop) circuit <b>240</b>.

0141The first timing signal generator <b>236</b> outputs a first rectangular wave. The first timing signal generator <b>236</b> includes a counter (not shown) for counting the number of edges of the recording clock (rising edges or falling edges) and a matching detection circuit (not shown) for outputting an “H” level signal when the count value of the counter reaches prescribed value (B) and outputting an “L” level signal when the count value of the counter reaches prescribed value (C). The count value of the counter is preset to prescribed value (A) in response to the pre-pit sync signal. When the pre-pit sync signal is not input to the first timing signal generator <b>236</b>, the first timing signal generator <b>236</b> resets the count value of the counter to “0” after the count value reaches prescribed value (D). The counter is preset in response to the pre-pit sync signal regardless of whether data is recorded (the recording gate signal is output) or not (the recording gate signal is not output).

0142The second timing signal generator <b>237</b> outputs a second rectangular wave. The second timing signal generator <b>237</b> includes a counter (not shown) for counting the number of edges of the recording clock (rising edges or falling edges) and a matching detection circuit (not shown) for outputting an “H” level signal when the count value of the counter reaches prescribed value (B) and outputting an “L” level signal when the count value of the counter reaches prescribed value (C). The count value of the counter is preset to prescribed value (E) in response to the data sync detection signal. When the data sync detection signal is not input to the second timing signal generator <b>237</b>, the second timing signal generator <b>237</b> resets the count value of the counter to 0” after the count value reaches prescribed value (D). The counter is preset in response to the data sync detection signal regardless of whether data is recorded (the recording gate signal is output) or not (the recording gate signal is not output).

0143Prescribed values (A) and (E) are designed such that when the land pre-pit and the center of the 14T long recording mark or space of the sync section of the data are recorded in an overlapping state, the difference between the phase of the first rectangular wave and the phase of the second rectangular wave is 0. Prescribed value (D) is a multiple of the length of one cycle of wobble.

0144The phase difference detector <b>238</b> operates only in the case of recording (the recording gate signal is output), and outputs a first phase differential signal indicating the difference between the phase of the first rectangular wave and the phase of the second rectangular wave.

0145The filter <b>239</b> outputs a correction amount signal, which is obtained by limiting the time-axis change amount of the first phase differential signal. The filter <b>239</b> is realized by using, for example, an LPF (Low Pass Filter). The time-axis change amount of the first phase differential signal is limited such that the response speed of the data reproduction PLL of an apparatus for reproducing data which has been recorded on an optical disc by the optical disc apparatus in this example can be sufficiently tracked by generation of the reproduction clock.

0146Usually, the response speed of the PLL is desirably 9 kHz or higher. When the rate at which the offset amount of the recording position from the recording start position is changed, namely, the rate at which the recording position is offset from the recording start position is changed, is too high, the PLL may not be able to track the time-axis change of the recording signal during the data reproduction. This results in a reproduction error. On the other hand, in order to improve the effect of preventing the same data from being written at the same position, the rate at which the offset amount of the recording position from the recording start position is changed is desirably as high as possible. Therefore, the rate at which the offset amount of the recording position is changed is desirably 9 kHz or less, which does not exceed the response speed of the reproduction PLL.

0147The PLL circuit <b>240</b> controls the frequency of the recording clock based on the pre-pit signal and the wobble signal. The PLL circuit <b>240</b> also controls the frequency of the recording clock such that the correction amount signal from the filter <b>239</b> (i.e., the phase difference between the first rectangular wave and the second rectangular wave) approaches the parameter value from the system control section <b>232</b>.

0148<figref idref="DRAWINGS">FIG. 15</figref> is a block diagram illustrating an exemplary structure of the PLL circuit <b>240</b>.

0149The PLL circuit <b>240</b> includes, for example, a noise filter <b>241</b>, a phase comparator <b>242</b>, a charge pump <b>243</b>, a first LPF <b>244</b>, a VCO <b>245</b>, a frequency divider <b>246</b>, a phase difference detector <b>247</b>, an adder <b>248</b>, a second LPF <b>249</b>, and a phase shifter <b>250</b>.

0150The noise filter <b>241</b> removes “H” level pulses and “L” level pulses which are equal to or less than a prescribed level from wobble signals as noise.

0151The phase comparator <b>242</b> compares the phase of the wobble signal deprived of noise by the noise filter <b>241</b> with the phase of the phase shift frequency-divided clock which is output from the phase shifter <b>250</b>, and outputs a second phase differential signal representing the result of the comparison.

0152The charge pump <b>243</b> converts the second phase differential signal output from the phase comparator <b>242</b> into a voltage level signal.

0153The first LPF <b>244</b> removes a high region component from the voltage level signal output from the charge pump <b>243</b>.

0154The VCO <b>245</b> oscillates at the frequency in accordance with the voltage level signal deprived of the high region component by the first LPF <b>244</b>, and outputs a recording clock.

0155The frequency divider <b>246</b> divides the frequency of the recording clock by 186 to output a frequency-divided clock.

0156The phase difference detector <b>247</b> detects the difference between the phase of the pre-pit signal and the phase of the wobble signal each time the pre-pit signal is input, and outputs a third phase differential signal representing the result of the detection.

0157The second LPF <b>249</b> removes a high region component from the third phase differential signal which is output from the phase difference detector <b>247</b>, and outputs a signal which is obtained by limiting the time-axis change amount of the third phase differential signal.

0158The adder <b>248</b> adds the signal which is output from the second LPF <b>249</b>, the correction amount signal, and the parameter value which has passed through an inverter, and generates an addition correction amount signal.

0159The phase shifter <b>250</b> shifts the phase of the frequency-divided clock in accordance with the addition correction amount signal, and outputs a phase shift frequency-divided clock.

0160As can be appreciated from the above, the system control section <b>232</b> acts as the parameter value changing section <b>203</b> (<figref idref="DRAWINGS">FIG. 12</figref>) for changing the parameter value which represents the target value of the offset amount of the recording position from the prescribed reference position. The recording clock generation circuit <b>230</b> acts as the offset amount changing section <b>202</b> (<figref idref="DRAWINGS">FIG. 12</figref>) for changing the offset amount of the data recording position with respect to the prescribed reference position such that the offset amount approaches the target value as the recording of data proceeds. The power control circuit <b>215</b> and the light beam driving circuit <b>216</b> act together as the recording section <b>204</b> (<figref idref="DRAWINGS">FIG. 12</figref>) for recording the data at the data recording position of the optical disc <b>100</b>.

0161The optical disc apparatus <b>201</b> synchronizes the frequency or phase of the recording clock to the frequency or phase of the reproduction clock which is obtained based on the data recorded on the optical disc <b>100</b>. After the data recording is started, the optical disc apparatus <b>201</b> changes the frequency or phase of the recording clock at a prescribed time constant. Thus, the position at which the data is actually recorded can be offset with respect to the position at which the data should be recorded (the prescribed reference position). As the recording proceeds, the offset amount from the position at which the data should be recorded (the prescribed reference position) can be changed. The position at which the data should be recorded (the prescribed reference position) is, for example, the position where the land pre-pit overlaps the center of the 14T long recording mark or space. The maximum tolerable offset amount from the position at which the data should be recorded (the prescribed reference position) is, for example, 2T.

0162<figref idref="DRAWINGS">FIG. 16</figref> is a graph illustrating the manner by which the offset amount from the position at which the data should be recorded (the prescribed reference position) is changed as the data recording proceeds. The final offset amount (target value of the offset amount) is set by the parameter value changing section <b>203</b> to be within the maximum tolerable offset amount from the position at which the data should be recorded (the prescribed reference position), for example, 2T.

0163The final offset amount (target value of the offset amount) may be selected from a prescribed number of candidate values including, for example, 2T, T, 0, −T and −2T, randomly or in a prescribed order. Alternatively, the final offset amount (target value of the offset amount) may be calculated based on a prescribed equation.

0164In <figref idref="DRAWINGS">FIG. 16</figref>, solid line A shows how the offset amount changes when the target value of the offset amount is set to 2T. Solid line B shows how the offset amount changes when the target value of the offset amount is set to T. Solid line C shows how the offset amount changes when the target value of the offset amount is set to −T. Solid line D shows how the offset amount changes when the target value of the offset amount is set to −2T.

0165<figref idref="DRAWINGS">FIG. 17A</figref> is a timing diagram illustrating an operation of the first timing signal generator <b>236</b> (<figref idref="DRAWINGS">FIG. 13</figref>).

0166In response to the pre-pit sync signal which is output from the pre-pit sync detection circuit <b>223</b>, the count value of the counter built in the first timing signal generator <b>236</b> is preset to “24”. The counter counts the number of edges (rising edges or falling edges) of the recording clock. When the count value of the counter reaches “46”, the first timing signal generator <b>236</b> outputs an “L” level signal. When the count value of the counter reaches “139”, the first timing signal generator <b>236</b> outputs an “H” level signal. When the count value of the counter reaches “185”, the count value is reset to “0”. In this manner, the first timing signal generator <b>236</b> outputs the first rectangular wave having the “H” level and the “L” level alternately. The first rectangular wave has a cycle of 186T.

0167<figref idref="DRAWINGS">FIG. 17B</figref> is a timing diagram illustrating an operation of the second timing signal generator <b>237</b> (<figref idref="DRAWINGS">FIG. 13</figref>).

0168In response to the data sync detection signal which is output from the data sync detection circuit <b>226</b>, the count value of the counter built in the second timing signal generator <b>237</b> is preset to “32”. The counter counts the number of edges (rising edges or falling edges) of the recording clock. When the count value of the counter reaches “46”, the second timing signal generator <b>237</b> outputs an “L” level signal. When the count value of the counter reaches “139”, the second timing signal generator <b>237</b> outputs an “H” level signal. When the count value of the counter reaches “185”, the count value is reset to “0”. In this manner, the second timing signal generator <b>237</b> outputs the second rectangular wave having the “H” level and the “L” level alternately. The second rectangular wave has a cycle of 186T.

0169The first rectangular wave and the second rectangular wave are adjusted such that the phase difference therebetween is “0” unless the data recording position is offset. Accordingly, when the data recording position is offset forward, the second rectangular wave has a phase forward with respect to that of the first rectangular wave. When the data recording position is offset rearward, the second rectangular wave has a phase rearward with respect to that of the first rectangular wave.

0170<figref idref="DRAWINGS">FIG. 18</figref> is a timing diagram illustrating the timing at which the recording operation of data is started.

0171Upon receiving the instruction from the system control section <b>232</b> to start the recording operation, the recording control circuit <b>233</b> operates in accordance with a timer (not shown) which operates in response to the recording clock. The recording control circuit <b>233</b> outputs a recording gate signal (rising) in response to a data sync detection signal.

0172When the recording gate signal is output, each of the circuits of the optical disc apparatus <b>201</b> starts the recording operation, and the count value of the counter built in the second timing signal generator <b>237</b> is prohibited from being preset.

0173When the data recording position is offset forward, the second rectangular wave having a phase forward with respect to that of the first rectangular wave immediately after the data recording operation is started is output. When the data recording position is offset rearward, the second rectangular wave having a phase rearward with respect to that of the first rectangular wave immediately after the data recording operation is started is output. After the data recording operation is started, the phase of the first rectangular wave and the phase of the second rectangular wave change in accordance with the control on the recording offset. The phase difference detector <b>238</b> detects the difference between the phase of the first rectangular wave and the phase of the second rectangular wave, and outputs the first phase differential signal representing the result of the detection. The filter <b>239</b> outputs a correction amount signal, which is obtained by limiting the time-axis change amount of the first phase differential signal.

0174Before the data recording operation is started, the PLL circuit <b>240</b> is in the state of controlling the recording clock in accordance with the pre-pit signal and the wobble signal. After the data recording operation is started, the correction amount signal and the parameter value are added to the loop of the PLL circuit <b>240</b> so as to control the frequency of the recording clock. Specifically, when the data recording position is to be offset rearward, the frequency of the recording clock is decreased such that the phase of the second rectangular wave is offset rearward with respect to the phase of the first rectangular wave. When the data recording position is to be offset forward, the frequency of the recording clock is increased such that the phase of the second rectangular wave is offset forward with respect to the phase of the first rectangular wave.

0175The above-described operation is performed immediately after the data recording operation is started and repeated until the offset amount with respect to the position at which the data should be recorded (the prescribed reference position) reaches the target value of the offset amount (parameter value). When the offset amount reaches the target value of the offset amount (parameter value), the PLL circuit <b>240</b> is switched to the state of controlling the frequency of the recording clock in accordance with the pre-pit signal and the wobble signal. Thus, at the connection point of the previously recorded data and the newly recorded data, the data is recorded based on the data sync detection signal. Therefore, a data continuity is obtained, and also the offset amount of the data recording position can be changed as the data recording proceeds.

0176In the above description, the PLL circuit <b>240</b> has a structure of controlling a recording clock in accordance with the pre-pit signal and the wobble signal. The structure of the PLL circuit <b>240</b> is not limited to this, and may have another structure. The parameter value may be subtracted in advance from the correction amount signal or the first phase differential signal.

0177For example, in the above description, the phase shift frequency-divided clock, which is one input to the phase difference comparator <b>242</b>, is further shifted in accordance with the correction amount signal and the parameter value. Alternatively, the wobble signal which has passed through the noise filter <b>241</b>, which is the other input to the phase difference comparator <b>242</b>, may be further shifted. Still alternatively, the parameter value which has passed through the inverter and the correction amount signal may be converted into a voltage level signal, and then the voltage level signal may be added to the output from the charge pump <b>243</b> in an analog manner. Substantially the same effect is provided.

0178As described above, according to the second example of the present invention, recording of new data is started based on the termination position of data which has been recorded on the optical disc, and the offset amount of the data recording position can be changed such that the offset amount approaches the target value of the offset amount as the data recording operation proceeds. Each time new data is to be recorded on the optical disc, the target value of the offset amount can be changed. Thus, even when the same data is required to be recorded at the same position of the optical disc, the same data can be recorded at slightly different positions. As a result, the decrease in the number of rewritable times of the optical disc can be suppressed.

EXAMPLE 3

0179<figref idref="DRAWINGS">FIG. 19</figref> is a block diagram illustrating a schematic structure of an optical disc apparatus <b>301</b> according to a third example of the present invention. In <figref idref="DRAWINGS">FIG. 19</figref>, elements identical to those of <figref idref="DRAWINGS">FIG. 13</figref> (Example 2) bear identical reference numerals thereto.

0180The optical disc apparatus <b>301</b> includes a spindle motor <b>212</b>, a pickup <b>213</b>, a motor driver <b>214</b>, a power control circuit <b>215</b>, a light beam driving circuit <b>216</b>, a reproduction amplifier <b>217</b>, a pre-pit reproduction circuit <b>218</b>, a wobble reproduction circuit <b>219</b>, a data reproduction circuit <b>220</b>, a reproduction clock generation circuit <b>221</b>, a pre-pit window protection circuit <b>222</b>, a pre-pit sync detection circuit <b>223</b>, a pre-pit demodulation circuit <b>224</b>, a pre-pit address extraction circuit <b>225</b>, a data sync detection circuit <b>226</b>, a data sync window protection circuit <b>227</b>, an 8/16 demodulation circuit <b>228</b>, an data ID extraction circuit <b>229</b>, a recording clock generation circuit <b>250</b>, a lock detection circuit <b>231</b>, a system control section <b>232</b>, a recording control circuit <b>233</b>, an error correction circuit <b>234</b>, and an 8/16 modulation circuit <b>235</b>.

0181The recording clock generation circuit <b>250</b> includes a PLL circuit <b>240</b>, a first timer <b>251</b>, a second timer <b>252</b>, a subtractor <b>253</b>, and a filter <b>239</b>.

0182The first timer <b>251</b> includes a counter (not shown) for counting the number of edges of a time clock (rising edges or falling edges) and outputting the count value as a first timer value. The count value of the counter is preset to a prescribed value in response to the pre-pit sync signal. When the pre-pit sync signal is not input to the first timer <b>251</b>, the first timer <b>251</b> resets the count value of the counter to “0” every frame (1488 counts). The timer is preset in response to the pre-pit sync signal regardless of whether data is recorded (the recording gate signal is output) or not (the recording gate signal is not output).

0183The second timer <b>252</b> includes a counter (not shown) for counting the number of edges of a time clock (rising edges or falling edges) and outputting the count value as a second timer value. The count value of the counter is preset to a prescribed value in response to the data sync detection signal. When the data sync detection signal is not input to the second timer <b>252</b>, the second timer <b>252</b> resets the count value of the counter to “0” every frame (1488 counts). The timer is preset in response to the data sync detection signal only in the case of non-recording (the recording gate signal is not output).

0184In this example, the recording clock is used also as the time clock.

0185The preset values of the first timer <b>251</b> and the second timer <b>252</b> are designed such that when the land pre-pit and the center of the 14T long recording mark or space of the sync section of the data are recorded in an overlapping state, the difference between the first timer value and the second timer value is 0.

0186The subtractor <b>253</b> operates only in the case of recording (the recording gate signal is output), and outputs a differential signal indicating the difference between the first timer value and the second timer value.

0187The filter <b>239</b> outputs a correction amount signal, which is obtained by limiting the time-axis change amount of the differential signal which is output from the subtractor <b>253</b>. The filter <b>239</b> is realized by using, for example, an LPF (Low Pass Filter). The time-axis change amount of the differential signal is limited such that the response speed of the data reproduction PLL of an apparatus for reproducing data which has been recorded on an optical disc by the optical disc apparatus in this example can be sufficiently tracked by generation of the reproduction clock.

0188The PLL circuit <b>240</b> controls the frequency of the recording clock based on the pre-pit signal and the wobble signal. The PLL circuit <b>240</b> also controls the frequency of the recording clock such that the correction amount signal from the filter <b>239</b> (i.e., the difference between the first timer value and the second timer value) approaches the parameter value from the system control section <b>232</b>.

0189For example, the PLL circuit <b>240</b> may have substantially the same structure as that of the PLL circuit <b>240</b> (<figref idref="DRAWINGS">FIG. 15</figref>) described in the second example. Thus, at the connection point of the previously recorded data and the newly recorded data, the data is recorded based on the data sync detection signal. Therefore, a data continuity is obtained, and also the offset amount of the data recording position can be changed as the data recording proceeds.

0190The correction amount can be derived by finding the timer values. Therefore, the recording clock generation circuit <b>250</b> can advantageously be fabricated with only a digital circuit. The operations of the subtractor <b>253</b>, the filter <b>239</b> and the like can be implemented by software. In this way, the circuit scale of the recording clock generation circuit <b>250</b> can be reduced, and the filter characteristics can be easily changed.

0191As described above, according to the second and third examples of the present invention, where data has been recorded before the position at which new data is to be recorded, the data recording is performed based on a data sync detection signal. Therefore, the recording start point is not offset with respect to the previously recorded data. After the data recording operation is started, the data recording position is offset at a prescribed time constant. On this feature, the recording method of the second and third examples of the present invention are different from the conventional SPS (Start Position Shift) method by which the recording start point itself is offset. According to the SPS method, the recording start point itself is offset, and therefore a data discontinuity occurs as a result of linking. By contrast, according to the recording method of the second and third examples of the present invention, the recording start point is not offset. Therefore, a data discontinuity by linking can be prevented. Still, the recording method of the second and third examples of the present invention, by which the data recording position is finally shifted, provides the same effect as that of the SPS method.

OTHER EXAMPLES

0192In the above examples, DVD-RW discs are used as an exemplary recording medium. The present invention is applicable to other rewritable optical discs and recording mediums other than the optical discs, as well as DVD-RW discs. Instead of the 8/16 modulation, other modulation rules may be used. A storage section for storing previously used parameter values may be provided, such that the parameter value changing sections <b>102</b>, <b>203</b>, the DSV initial value changing section <b>103</b>, and the state initial value changing section <b>104</b> may randomly select the parameter value to be set from the parameter values which are different from the previously used parameter values.

0193The parameter value changing sections <b>102</b>, <b>203</b>, the DSV initial value changing section <b>103</b>, and the state initial value changing section <b>104</b> may store a prescribed order (for example, state <b>1</b>, then state <b>3</b>, then state <b>2</b>; or DSV=0, then DSV=1, then DSV=−1; or offset amount 0, then offset amount 2T, then offset amount −T), such that the parameters can be switched in such a prescribed order each time new data is to be recorded. Either the DSV initial value changing section <b>103</b> or the state initial value changing section <b>104</b> may be omitted.

0194The first example may be combined with the second example or the third example. For example, the parameter value changing section <b>102</b> in the first example may be provided in the optical disc apparatus <b>201</b> in the second example or in the optical disc apparatus <b>301</b> in the third example. The DSV initial value changing section <b>103</b> or the state initial value changing section <b>104</b> may be provided in the system control section <b>232</b> of the second example or the third example, such that the initial value of the DSV or the initial value of the state may be changed. In this case, the pattern to be recorded may be changed as well as the recording position. Thus, the decrease in the number of rewritable times of an optical disc can be further suppressed.

0195According to the present invention, even when the same data is recorded at the same position repeatedly, the same data can be recorded with different patterns at the same position or the same data can be recorded at slightly different positions. As a result, the deterioration of the recording thin film of a recording medium is suppressed, and thus the decrease in the number of rewritable times of the recording medium can be suppressed. Therefore, the present invention is useful for, for example, a recording apparatus and a recording method for recording data on a rewritable recording medium and for a rewritable recording medium.

0196Various other modifications will be apparent to and can be readily made by those skilled in the art without departing from the scope and spirit of this invention. Accordingly, it is not intended that the scope of the claims appended hereto be limited to the description as set forth herein, but rather that the claims be broadly construed.