Method of verifying preamplifier circuit functions, and magnetic record regeneration apparatus using the same

CROSS-REFERENCE TO RELATED APPLICATIONS

0001This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2005-89657, filed on Mar. 25, 2005, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

00021. Field of the Invention

0003The present invention relates generally to a magnetic record regeneration apparatus and, more particularly, to a method of verifying whether writing (write) and readout (read) functions of a preamplifier circuit operate properly or not, and to a magnetic record regeneration apparatus using the method.

00042. Description of the Related Art

0005Recently, along with sophistication of information processing, ensuring credibility of data is becoming an important element. Especially, in magnetic record regeneration apparatus, the most important function is to verify whether data has been able to be recorded on a recording medium or not.

0006In fact, when writing, data are recorded onto the recording medium by write currents inverted along with inversion of write data, passing through a magnetic head. A detection circuit in a preamplifier circuit can detect disconnection in circuit wiring of a system for writing and disconnection on the head side.

0007In other words, as verification means of the write system, the own error detection function of the preamplifier can determine defects of other than the preamplifier (such as defective connections).

0008However, for failures of the preamplifier itself, for example, output current values, verification means does not exist until now and, therefore, it is problematic that functional decline cannot be detected if write currents is reduced by damages of circuit parts due to ESD (electrostatic destruction) of the preamplifier circuit.

0009For example, as a characteristic of write currents, in order to perform writing sufficiently, a rising portion of a waveform has an overshoot. Therefore, if the write current is reduced such that this overshoot cannot be obtained due to ESD (electrostatic destruction), this reduction can not be detected.

0010Therefore, conventionally, by providing verification (verifying readout) processing after write operation, the write operation is guaranteed. As a method of the guarantee, some propositions have been made. For example, in Japanese Patent Application Laid-Open Publication No. 1993-41041, a method is described for deciding whether data are correctly written into a recording medium or not by comparing the write data with the read data.

0011Also, in Japanese Patent Application Laid-Open Publication No. 1999-16129, a method is described for comparing and deciding read waveforms.

0012Further, in Japanese Patent Application Laid-Open Publication No. 1993-41041, a method is described for knowing failures beforehand by deliberately deteriorating a read signal processing system for failure prediction.

0013Further, in Japanese Patent Application Laid-Open Publication No. 1986-10577, a method is disclosed for banning writing beforehand if Write-unsafe is detected when writing is performed in an idle state.

0014However, all of these methods decrease own access performances of apparatuses and are unrealistic methods which are hardly used.

0015Further, although Japanese Patent Application Laid-Open Publication No. 2003-15751 discloses an invention for verifying a function of a head amplifier for readout in a magnetic head, descriptions are not made for verifying a write function, i.e., verifying whether data is recorded into the recording medium or not, which is most important function, in first place.

SUMMARY OF THE INVENTION

0016Thus, in consideration of the problems of inventions in above conventional propositions, the object of the present invention is to provide a method of certainly verifying a write function in a short period of time, as a function verification method of a preamplifier circuit, and to provide a magnetic record regeneration apparatus using this method.

0017In addition to the above method of verifying the write function, the present invention provides a method of verifying a read function, as a function verification method of a preamplifier circuit, and provides a magnetic record regeneration apparatus using this method.

0018Therefore, the feature of the present invention is to accurately monitor write currents by directly connecting final output of write current output to a dummy load to confirm normality of current waveforms.

0019In order to achieve the above object, according to a first aspect of the present invention there is provided a preamplifier circuit of a magnetic record regeneration apparatus with a write system which sends write currents corresponding to write data to a magnetic head performing writing and readout of data into and from a recording medium and a read system which receives readout currents of the magnetic head, comprising, in the write system, a write driver; a current-voltage conversion circuit for converting the write current from the write driver into a corresponding voltage; a waveform shaping circuit for converting the output voltage from the current-voltage conversion circuit into a full-wave rectified waveform; a peak-hold circuit for holding a peak value of the output from the waveform shaping circuit; a filter circuit for outputting an average voltage of the output from the waveform shaping circuit; and a determination circuit for determining that the write driver is abnormal based on each output status of the peak-hold circuit and the filter circuit.

0020Preferably, the determination circuit determines that the write driver is abnormal when an AND logic does not approved between the outputs of the peak-hold circuit and the filter circuit. Preferably, the determination circuit has first comparative detection means for outputting an error if the output of the peak-hold circuit deviates from a range relative to a first reference voltage, and second comparative detection means for outputting an error if the average voltage output of the filter circuit deviates from a range relative to a second reference voltage, and it is preferably determined that the write driver is abnormal when either the first comparative detection means or the second comparative detection means output an error. The preamplifier circuit of a magnetic record regeneration apparatus may further comprise a changeover switch provided on the input side of the write driver; means for converting the write data into an analog signal and returning the write data to the read system when the changeover switch prevents the write data from being input to the write driver; and a determination circuit for determining whether the read system is normal or abnormal from the returned analog signal, the determination circuit comprising: a circuit for obtaining an envelope curve of the returned analog signal; and a comparison circuit for comparing the level of the obtained envelope curve with a predetermined reference value, wherein it is determined from the comparison in the comparison circuit that the read system is abnormal when the level of the envelope curve is smaller than the reference value.

0021To attain the above object, according to a second aspect of the present invention there is provided a magnetic record regeneration apparatus, comprising a magnetic head for performing writing and readout of data into and from a recording medium; and a preamplifier circuit with a write system which sends write currents corresponding to write data to the magnetic head and a read system which receives readout currents of the magnetic head, the preamplifier circuit comprising, in the write system, a write driver; a current-voltage conversion circuit for converting the write current from the write driver into a corresponding voltage; a waveform shaping circuit for converting the output voltage from the current-voltage conversion circuit into a full-wave rectified waveform; a peak-hold circuit for holding a peak value of the output from the waveform shaping circuit; a filter circuit for outputting an average voltage of the output from the waveform shaping circuit; and a determination circuit for determining that the write driver is abnormal based on each output status of the peak-hold circuit and the filter circuit.

0022In order to achieve the above object, according to a third aspect of the present invention there is provided a method of verifying normality of a preamplifier circuit in a magnetic record regeneration apparatus having a write system which sends write currents corresponding to write data to a magnetic head performing writing and readout of data into and from a recording medium and a read system which receives readout currents of the magnetic head, the method comprising the steps of converting the write current from the write driver in the write system into a corresponding voltage; converting the converted voltage into a full-wave rectified waveform; holding a peak value of the converted full-wave rectified waveform; outputting an average voltage of the converted full-wave rectified waveform; and determining that the write system is abnormal based on the peak value and the average voltage.

0023By using the present invention, one can certainly know reduction in peak currents and steady-state current values of write current wave forms due to performance deterioration of preamplifier circuits, in a short period of time.

BRIEF DESCRIPTION OF THE DRAWINGS

0024The above and other objects, aspects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings, in which:

0025<figref idref="DRAWINGS">FIG. 1</figref> is a preamplifier circuit of a magnetic record regeneration apparatus to which the present invention is applied;

0026<figref idref="DRAWINGS">FIG. 2</figref> is a diagram showing a structure example of the dummy load and determination circuit <b>13</b> of <figref idref="DRAWINGS">FIG. 1</figref>;

0027<figref idref="DRAWINGS">FIGS. 3A to 3I</figref> are diagrams showing signals in each unit of the dummy load and determination circuit <b>13</b>;

0028<figref idref="DRAWINGS">FIG. 4</figref> is a block diagram of an embodiment of a preamplifier circuit according to the present invention, which is configured such that the operation verification of the preamplifier circuit is performed for a read system in addition to a write system;

0029<figref idref="DRAWINGS">FIG. 5</figref> is a diagram showing a specific example of a signal generator <b>15</b>;

0030<figref idref="DRAWINGS">FIG. 6</figref> is a diagram shows a structure example of a determination circuit <b>20</b>; and

0031<figref idref="DRAWINGS">FIG. 7</figref> is a diagram describing the determination operation of the determination circuit <b>20</b> of <figref idref="DRAWINGS">FIG. 6</figref>.

DESCRIPTION OF THE PREFERRED EMBODIMENT

0032An embodiment of the present invention will now be described with reference to the drawings. The embodiment is intended for the purpose of understanding the present invention, and the technical scope of the present invention is not limited thereto.

0033<figref idref="DRAWINGS">FIG. 1</figref> is a preamplifier circuit of a magnetic record regeneration apparatus to which the present invention is applied. In <figref idref="DRAWINGS">FIG. 1</figref>, the circuit has a plural number n of write drivers <b>101</b> to <b>10</b><i>n, </i>which are respectively connected through a multiplexer switch unit <b>11</b> to n magnetic heads (MR heads) not shown to supply write currents.

0034In order to apply the present invention, a multiplexer switch unit <b>12</b> and a dummy load and determination circuit unit <b>13</b> are added. The write drivers <b>101</b> to <b>10</b><i>n </i>and the multiplexer switch units <b>11</b> and <b>12</b> are controlled by a chip control unit <b>14</b>.

0035In other words, the chip control unit <b>14</b> selects and activates or deactivates each of the write drivers <b>101</b> to <b>10</b><i>n. </i>When verifying the preamplifier circuit, output currents from the write driver selected from the write drivers <b>101</b> to <b>10</b><i>n </i>are output from the multiplexer switch unit <b>12</b> and are input into the dummy load and determination <b>13</b>.

0036A structure example of the dummy load and determination circuit <b>13</b> is shown in <figref idref="DRAWINGS">FIG. 2</figref>. Further, <figref idref="DRAWINGS">FIGS. 3A to 3I</figref> are diagrams showing signals in each unit of the dummy load and determination circuit <b>13</b>. <figref idref="DRAWINGS">FIG. 3A</figref> to <figref idref="DRAWINGS">FIG. 3E</figref> are waveforms at corresponding positions with alphabets of <figref idref="DRAWINGS">FIG. 2</figref>.

0037When one (1) write driver <b>10</b><i>i </i>is selected, the write driver <b>10</b><i>i </i>outputs a test signal corresponding to a write signal shown in <figref idref="DRAWINGS">FIG. 3A</figref>.

0038At this point, the chip control unit <b>14</b> controls the multiplexer switch units <b>11</b> and <b>12</b> such that the test signal from the write driver <b>10</b><i>i </i>is returned within the preamplifier circuit. The test signal returned by the multiplexer switch unit <b>12</b> is input into the dummy load and determination circuit <b>13</b>.

0039As shown in <figref idref="DRAWINGS">FIG. 2</figref>, the dummy load and determination circuit <b>13</b> has a dummy load <b>130</b> on the input side. The dummy load <b>130</b> is configured to have a parallel resistance <b>130</b><i>a </i>and a buffer amplifier <b>130</b><i>b. </i>At this point, impedance of the dummy load <b>130</b> has a resistance value equal to impedance of the magnetic head (MR head) (about 70Ω).

0040By this parallel resistance <b>130</b><i>a, </i>the test signal current (see <figref idref="DRAWINGS">FIG. 3A</figref>) is converted to a corresponding voltage and amplified by an amplifier <b>131</b> to a predefined level (see <figref idref="DRAWINGS">FIG. 3B</figref>). Then, full-wave rectification is performed by a full-wave rectification circuit <b>132</b> (see <figref idref="DRAWINGS">FIG. 3C</figref>).

0041The output of the full-wave rectification circuit <b>132</b> is supplied to a peak-hold circuit <b>133</b> and a low pass filter <b>134</b>. The peak-hold circuit <b>133</b> holds an output peak value of the full-wave rectification circuit <b>132</b> (see <figref idref="DRAWINGS">FIG. 3D</figref>). On the other hand, the low pass filter <b>134</b> shapes the output from the full-wave rectification circuit <b>132</b> into a signal indicating an average value with high-frequency components of an overshoot portion removed (see <figref idref="DRAWINGS">FIG. 3E</figref>).

0042Then, outputs from the peak-hold circuit <b>133</b> and the low pass filter <b>134</b> are input into a determination circuit <b>135</b>.

0043The determination circuit <b>135</b> determines normality of write operation of the preamplifier circuit based on the outputs from the peak-hold circuit <b>133</b> and the low pass filter <b>134</b>. As one method of the determination, an AND logic of the outputs of the peak-hold circuit <b>133</b> and the low pass filter <b>134</b> is picked up, and if the AND logic is approved, a logic “1” signal is output, and it is determined that the write operation of the preamplifier circuit is normal (see <figref idref="DRAWINGS">FIG. 3F</figref>).

0044Further, <figref idref="DRAWINGS">FIG. 3G</figref> to <figref idref="DRAWINGS">FIG. 3I</figref> are diagrams showing cases that partial changes occur between a normal status and an abnormal status.

0045In first halves of <figref idref="DRAWINGS">FIG. 3G</figref> to <figref idref="DRAWINGS">FIG. 3I</figref>, since the output level of the peak-hold circuit <b>133</b> is reduced, the AND logic to the output of the low pass filter <b>134</b> is no longer approved, resulting in a change from the normal status to the abnormal status. On the other hand, in second halves of <figref idref="DRAWINGS">FIG. 3G</figref> to <figref idref="DRAWINGS">FIG. 3I</figref>, since the output level of the peak-hold circuit <b>133</b> is increased, the AND logic to the output of the low pass filter <b>134</b> makes the transition from the not-approved state to the approved state, and therefore, the abnormal status changes into the normal status.

0046In this way, if the AND logic cannot be picked up between the outputs of the peak-hold circuit <b>133</b> and the low pass filter <b>134</b>, it means that a predetermined write current is not in a predetermined level range. In such a case, the determination circuit <b>13</b> sends an alert signal to the chip control unit <b>14</b>. Then, the chip control unit <b>14</b> converts the corresponding write driver into an inactive state, performs processing for banning the write operation, for example, and at the same time, displays to the user accordingly.

0047In this way, inconveniences can be avoided, which occurs because, when performing readout of data, the data has not been stored since the data was deficiently written, for example.

0048Also, the method of the determination in the determination circuit <b>135</b> can be configured as follows.

0049The determination circuit <b>135</b> is provided with first comparative detection means for outputting an error if the output level of the peak-hold circuit <b>133</b> deviates from a range relative to a first reference voltage, and second comparative detection means for outputting an error if the average voltage output of the filter circuit deviates from a range relative to a second reference voltage.

0050When either the first comparative detection means or the second comparative detection means output an error, it is determined that the write driver is abnormal. By doing this way, the magnetic head can be supplied with write currents optimal for both the maximum value and the average value of the output of the write driver in the preamplifier circuit.

0051<figref idref="DRAWINGS">FIG. 4</figref> is a block diagram of an embodiment of a preamplifier circuit according to the present invention, which is configured such that the operation verification of the preamplifier circuit is performed for a read system in addition to a write system.

0052For the operation verification of the read system, a signal generator <b>15</b> and a multiplexer switch unit <b>16</b> are provided, and a determination circuit <b>20</b> is provided in a post amplifier unit <b>19</b>. In <figref idref="DRAWINGS">FIG. 4</figref>, the additional function unit for verifying the write system operation shown in <figref idref="DRAWINGS">FIG. 1</figref> is not shown.

0053For <figref idref="DRAWINGS">FIG. 4</figref>, a specific example of the signal generator <b>15</b> is shown in <figref idref="DRAWINGS">FIG. 5</figref>.

0054At the time of the verification of the read system operation, a changeover switch <b>17</b> is controlled by the chip control unit <b>14</b> such that write data (WDX, WDY) are not directed to the write driver <b>101</b> to <b>10</b><i>n </i>and are input into the filter side <b>151</b> of the signal generator <b>15</b>.

0055At this point, the signal generator <b>15</b> is activated by the chip control unit <b>14</b>. Since the write data (WDX, WDY) input into a filter <b>151</b> of the signal generator <b>15</b> are rectangular waves as shown in <figref idref="DRAWINGS">FIG. 3A</figref>, the write data is output as a sine-wave output by removing high-frequency components with the low pass function of the filter <b>151</b>. The output of the filter <b>151</b> is amplified by an amplifier <b>152</b> and output as a reader input. A buffer memory is provided for impedance matching with the multiplexer switch unit <b>16</b>.

0056Such an output from the signal generator <b>15</b> is returned and guided to a multiplexing unit <b>191</b> through the multiplexer switch unit <b>16</b> selected and controlled by the chip control unit <b>14</b> and through a read amplifier selected from read amplifiers <b>181</b> to <b>18</b><i>n </i>corresponding to the channel.

0057The output of the multiplexing unit <b>191</b> is input into the determination circuit <b>20</b> through a filter <b>192</b> and an output amplifier <b>193</b>.

0058<figref idref="DRAWINGS">FIG. 6</figref> shows a structure example of the determination circuit <b>20</b>. The determination circuit <b>20</b> received the input. The determination circuit is configured to have an envelope curve detection unit <b>201</b> and comparator <b>202</b>. As shown in <figref idref="DRAWINGS">FIG. 7</figref>, the envelope curve detection unit <b>201</b> obtains envelope amplitude of the output of the multiplexing unit <b>191</b> and the comparator <b>202</b> compares the obtained envelope amplitude with a reference level Vref.

0059Since the region of the envelope amplitude A exceeds the reference level Vref, it is determined that the read system operation is normal (Safe). On the other hand, since the region of the envelope amplitude B is smaller than the reference level Vref, it is decided that the read system operation is not operated normally in this case (Fault).

0060In this way, the information indicating that the operation is normal (Safe) or not operated normally (Fault) is determined by the determination circuit <b>20</b> and guided to the chip control unit <b>14</b> to give a predefined display to an operator.

0061As set forth hereinabove, the present invention provides a method of verifying a write performance and read function in a preamplifier circuit by returning write data within the preamplifier circuit and can detect whether a write system and a read system are normal or abnormal. Therefore, a credible magnetic record apparatus can be provided.

0062While the illustrative and presently preferred embodiment of the present invention has been described in detail herein, it is to be understood that the inventive concepts may be otherwise variously embodied and employed and that the appended claims are intended to be construed to include such variations except insofar as limited by the prior art.