Method of manufacturing an IC coil mounted in an information carrier
Summary by NHIP
IC coil manufacturing method
The method manufactures an IC element by forming a metal-sputtered or metal-evaporated layer on a wafer's surface passivation film, followed by a photoresist layer. A precision electroforming method creates a metal-plated layer on exposed portions before etching the underlying conductor pattern for contactless communication.
Claim Score by NHIP
Abstract
An information carrier in which an IC element formed integrally with a coil is mounted and which has an extended communication range and a method of manufacturing the same and a structure of the IC element appropriately suited for this sort of information carrier and a method of manufacturing the same. In the IC element, a conductor constituting the coil 3 is implemented in a multilayer structure including a metal-sputtered layer or alternatively a metal-evaporated layer 6 and a metal-plated layer 7. In the method of manufacturing the IC element, a precision electroforming method is employed as a means for forming the metal-plated layer 7. The information carrier is implemented in such a structure in which the IC element 1 is disposed at a center portion in a planar direction of a substrate 21. In a method of manufacturing the information carrier, strip material or materials 41 to 45 a given one of which has mounted thereon desired parts inclusive of the IC elements are manufactured, whereon desired information carriers 20a, . . . , 20h are formed by punching the strip material(s).

Term
Term ended
Expired 23 February 2020, 6.6 years ago.
- Priority
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5 claims: 3 independent, 2 dependent
- 1A method of manufacturing an IC element, characterized in that said method comprises a step of forming uniformly a metal-sputtered layer or alternatively a metal-evaporated layer on a surface passivation film of a finished wafer manufactured through a predetermined process, a step of forming uniformly a photoresist layer on said metal-sputtered layer or alternatively on said metal-evaporated layer, a step of forming in said photoresist layer a predetermined pattern inclusive of a coil for contactless data communication with external equipment through light exposure and development to thereby expose said metal-sputtered layer or alternatively said metal-evaporated layer through said predetermined pattern, a step of laminating a metal-plated layer on exposed portions of said metal-sputtered layer or alternatively said metal-evaporated layer through an electroless plating method or alternatively an electroplating method or alternatively a precision electroforming method, a step of eliminating the photoresist layer deposited on said finished wafer, a step of forming a predetermined conductor pattern corresponding to said predetermined pattern by etching said metal-sputtered layer or alternatively said metal-evaporated layer exposed through said metal-plated layer, and a step of obtaining concerned IC elements each formed integrally with a coil by scribing said finished wafer.
- 2A method of manufacturing an IC element, characterized in that said method comprises a step of forming uniformly a photoresist layer on a surface passivation film of a finished wafer manufactured through a predetermined process, a step of forming in said photoresist layer a predetermined pattern inclusive of a coil for contactless data communication with external equipment through light exposure and development to thereby expose said surface passivation film in said predetermined pattern, a step of mounting the finished wafer undergone a development processing on a sputtering apparatus or alternatively a vacuum evaporation apparatus and forming a metal-sputtered layer or alternatively a metal-evaporated layer on exposed portions of said surface protection film, a step of eliminating the photoresist layer deposited on said finished wafer, a step of forming a metal-plated layer on said metal-sputtered layer or alternatively on said metal-evaporated layer by resorting to an electroless plating method or alternatively an electroplating method, and a step of obtaining concerned IC elements each formed integrally with a coil by scribing said finished wafer.
- 3Broadest claimClaim Score 71, broad(NHIP)A method for manufacturing an IC element in which antenna for wireless communication is uniformly formed, said method comprising at least steps of:forming uniformly a conductive pattern at least including plurality of antenna for wireless communication over a surface protection film of a finished wafer formed by a predetermined process;and obtaining an IC element in which at least one antenna is uniformly formed by way of a scriber wafer on which said conductive pattern is formed.
Independent claims3
101 paragraphs in 5 sections, as filed
0001This application is a Divisional of application Ser. No. 09/914,077 filed on Aug. 23, 2001 now abandoned, and for which priority is claimed under 35 U.S.C. § 120. application Ser. No. 09/914,077 is the national phase of PCT International Application No. PCT/JP00/01029 filed on Feb. 23, 2000, under 35 U.S.C. § 371. The entire contents of each of the above-identified applications are hereby incorporated by reference. This application also claims priority of Application Nos. 11-046545 and 11-059753 filed in Japan on Feb. 24, 1999, and Mar. 8, 1999, respectively, under 35 U.S.C. § 119.
BACKGROUND OF THE INVENTION
00021. Field of the Invention
0003The present invention relates to AN IC element formed integrally with a coil on a chip, a method of manufacturing the IC element, an information carrier incorporating the IC element and a method of manufacturing the information carrier.
00042. Description of Related Art
0005Heretofore, such a contactless type information carrier has been known which includes an IC element mounted internally of a substrate having a predetermined shape and an antenna coil electrically connected to the terminals of the IC element for effectuating in a noncontacting or contactless manner reception of electric power from a reader/writer and a signal transmission/reception with the reader/writer through the medium of the electromagnetic wave. As the information carriers of this species, there may be mentioned those referred to as the card-like information carriers, the coin-like information carriers, the button-like information carriers and the like named after the external appearance.
0006As the information carriers of the types mentioned above, the information carrier having an antenna coil patterned on a substrate or the information carrier having an antenna coil composed of a coil carried on a substrate has heretofore been employed. However, in recent years, there has been proposed an information carrier in which the IC element formed integrally with the antenna coil is mounted on the substrate and which features the capability of being manufactured inexpensively without need for the protection processing of the interconnection points between the antenna coil and the IC element and the moisture-proof treatment and additionally the excellent durability owing to insusceptibility to breakage of coil conductor regardless of stresses induced upon bending, torsion or the like of the substrate.
0007As a method of forming the antenna coil on the information carrier, a sputtering method is adopted. Thus, the electric conductor of the antenna coil formed integrally with the IC element is implemented in the form of an aluminum-sputtered film.
0008In this conjunction, it is however noted that when the antenna coil is formed integrally on the IC element, not only the winding diameter and the conductor width of the coil become smaller when compared with the case where the antenna coil composed of the winding is carried on the substrate, but also the number of turns of the coil is naturally limited, making it difficult to increase the range or distance for communication with the reader/writer or rendering it even impossible to ensure the communication range.
0009The present invention has been made with a view to disposing of the deficiencies of the hitherto known techniques such as mentioned above and hence it is contemplated with the present invention as a technical object to provide an information carrier incorporating an IC element formed integrally with an antenna coil and capable of ensuring an extended communication range or distance and a method of manufacturing the information carrier as well as a structure of the IC element formed integrally with the antenna coil and advantageously suited for employment in the information carrier of this sort and a method of manufacturing the IC element.
SUMMARY OF THE INVENTION
0010For accomplishing the object mentioned above, the present invention provides an IC element formed integrally with a coil, wherein a conductor constituting the above-mentioned coil is implemented in a multilayer structure including a metal-sputtered layer or alternatively a metal-evaporated layer and a metal-plated layer.
0011Since the metal-plated layer has an electric resistance value smaller than the metal-sputtered layer or alternatively the metal-evaporated layer, loss of the electromagnetic energy can be diminished by implementing the electric conductor of the coil in a multilayer structure composed of the metal-sputtered layer or alternatively the metal-evaporated layer and the metal-plated layer when compared with the coil conductor constituted solely by the metal-sputtered layer or alternatively the metal-evaporated layer, whereby the distance or range for communication with the reader/writer can be increased.
0000<IC Element Manufacturing Method>
0012For achieving the object mentioned previously, there is provided according to a first aspect of the present invention an IC element manufacturing method which includes a step of forming uniformly a metal-sputtered layer or alternatively a metal-evaporated layer on a surface passivation film of a finished wafer manufactured through a predetermined process, a step of forming uniformly a photoresist layer on said metal-sputtered layer or alternatively on said metal-evaporated layer, a step of exposing said photoresist layer to light illumination in a predetermined pattern inclusive of a coil for thereby exposing said metal-sputtered layer or alternatively said metal-evaporated layer in said predetermined pattern after development, a step of laminating a metal-plated layer on exposed portions of said metal-sputtered layer or alternatively said metal-evaporated layer through an electroless plating method or alternatively an electroplating method or alternatively through a precision electroforming method, a step of eliminating the photoresist layer deposited on said finished wafer, a step of forming a predetermined conductor pattern corresponding to said predetermined pattern by etching said metal-sputtered layer or alternatively said metal-evaporated layer exposed through said metal-plated layer, and a step of obtaining a concerned IC element formed integrally with the coil by scribing said finished wafer.
0013Further, according to a second aspect of the present invention, there is provided a method which includes a step of forming uniformly a photoresist layer on a surface passivation film of a finished wafer manufactured through a predetermined process, a step of exposing in said photoresist layer to light illumination in a predetermined pattern inclusive of a coil for thereby exposing said surface passivation film in said predetermined pattern after develop-ment, a step of mounting the finished wafer undergone the development processing on a sputtering apparatus or a vacuum evaporation apparatus for forming a metal-sputtered layer or alternatively a metal-evaporated layer on exposed portion of said surface passivation film, a step of eliminating the photoresist layer deposited on said finished wafer, a step of laminating a metal-plated layer on said metal-sputtered layer or alternatively said metal-evaporated layer through an electroless plating method or alternatively through an electroplating method, and a step of obtaining a concerned IC element formed integrally with a coil by scribing said finished wafer.
0014As is apparent from the above, by forming the required electric conductive pattern inclusive of the coil on the finished wafer to thereby obtain the concerned IC element by scribing the finished wafer, the IC element formed integrally with the coil can be manufactured with high efficiency when compared with the case where each of the individual IC elements are formed with a coil, whereby the manufacturing cost can be reduced. Furthermore, it is possible to implement the coils of a uniform thickness with high precision for all the IC elements formed on the wafer, whereby variance or dispersion of the communication characteristics can be suppressed.
0015Furthermore, it is noted that when the coil is formed for each of the individual IC elements by using the sputtering method or alternatively the vacuum evaporation method and the plating method, there arises a problem concerning the insulation quality of the IC element due to deposition of unnecessary conductors on an outer peripheral portion of the IC element. Of course, when the required electric conductive pattern inclusive of the coil is formed on the finished wafer, the unnecessary conductors may be deposited on the outer peripheral portion of the finished wafer upon sputtering or the like process. However, the outer peripheral portion mentioned just above is intrinsically to be disposed of as the unnecessary portion. Accordingly, there will arise no problem in respect to the insulation quality of the individual IC elements.
0000<IC>
0016For achieving the object mentioned previously, the present invention provides an information carrier including a substrate having mounted thereon an IC element formed integrally with an antenna coil, wherein said IC element is disposed at a center portion of said substrate in a planar direction perpendicular to a plane of said substrate.
0017By disposing the IC element on the substrate at the center portion as viewed in the planar direction of the substrate as mentioned above, the center of the coil formed integrally with the IC element and that of the antenna coil for the reader/writer can be easily aligned to each other. Thus, the coefficient of the electromagnetic coupling between both coils can be increased, whereby the electric power supply to the information carrier from the reader/writer as well as the signal transmission/reception between the reader/writer and the information carrier can be carried out with enhanced reliability. In particular, when the substrate which constitutes the information carrier is shaped in a square shape, a regular-polygonal shape or the like which exhibits no or less directivity relative to the reader/writer, the center of the coil formed integrally on the IC element can be aligned more easily with that of the antenna coil provided for the reader/writer, which allows the information carrier to be handled more facilitatively.
0018For achieving the object mentioned previously, an IC manufacturing method provided according to a first aspect of the present invention includes a step of bonding together a first strip material having regularly formed therein a number of through-holes in which IC elements can be inserted, respectively, and a second strip material formed with no through-hole, a step of placing and fixing the IC elements each formed integrally with a coil in said through-holes, respectively, a step of bonding together said first strip material and a third strip material having no through-hole, and a step of punching said first to third integrally bonded strip materials to thereby obtain the concerned information carriers each incorporating said IC element.
0019Further, an IC manufacturing method provided according to a second aspect of the present invention includes a step of placing and fixing coils formed discretely independent of IC elements, respectively, in a number of ring-like recesses formed in a first strip material concentrically around through-holes, which are formed regularly in said first strip material and in which said IC elements can be inserted, respectively, a step of bonding a second strip material having no through-hole onto one surface of said first strip material, a step of placing fixedly said IC elements each formed integrally with a coil in said through-holes, respectively, a step of bonding together said first strip material and a third strip material having no through-hole, and a step of punching said first to third strip materials bonded integrally, to thereby obtain desired information carriers each including the IC element and the coil formed discretely independent of said IC element.
0020As is apparent from the above, the strip lamination in which the required IC elements (or alternatively the IC elements and the coils) are embedded is manufactured, whereon the concerned or desired information carriers are formed by punching the strip lamination. Thus, the identical information carriers can be manufactured with high efficiency, whereby the cost involved in manufacturing the desired information carriers can be reduced.
0021Incidentally, in the manufacturing methods according to the first and second aspects described above, the substrate of the information carrier is formed of three members (i.e., the first to third strip members), it is equally possible to implement the substrate for the information carrier with two members by forming the recesses for accommodating the IC elements, respectively, in the first strip material instead of adopting the structure in which the through-holes for accommodating the IC elements, respectively, are formed in the first strip material.
0022Furthermore, in the manufacturing methods according to the first and second aspects described above, the IC elements (or the IC elements and the coils) are completely embedded internally of the strip materials. However, it is also possible to make the IC elements (or the IC elements and the coils) be exposed exteriorly from one surface of the strip material by sealing off the through-holes or the recesses formed in the strip material with a resin after having placed the IC elements (or the IC elements and the coils) in the through-holes or the recesses, respectively.
0023Besides, when the IC elements (or the IC elements and the coils) is to be exposed externally of the one surface of the strip material, the substrate of the information carrier can be formed by a single member by forming the recesses for accommodating the respective IC elements (or the IC elements and the coils) in the strip material.
BRIEF DESCRIPTION OF THE DRAWINGS
0024<figref idref="DRAWINGS">FIGS. 1A</figref>, <b>1</b>B and <b>1</b>C are plan views showing IC elements according to exemplary embodiments, respectively.
0025<figref idref="DRAWINGS">FIGS. 2A and 2B</figref> are sectional views showing major portions of IC elements according to exemplary embodiments, respectively.
0026<figref idref="DRAWINGS">FIG. 3</figref> is a plan view showing a finished wafer.
0027<figref idref="DRAWINGS">FIGS. 4A</figref>, <b>4</b>B, <b>4</b>C, <b>4</b>D, <b>4</b>E and <b>4</b>F are views for illustrating stepwise a first example of an IC element manufacturing method according to the present invention.
0028<figref idref="DRAWINGS">FIGS. 5A</figref>, <b>5</b>B, <b>5</b>C, <b>5</b>D and <b>5</b>E are views for illustrating stepwise a second example of the IC element manufacturing method according to the present invention.
0029<figref idref="DRAWINGS">FIG. 6</figref> is a plan view showing a finished wafer having formed thereon a required electric conductive pattern inclusive of an antenna coil.
0030<figref idref="DRAWINGS">FIG. 7</figref> is a partially broken plan view of an information carrier according to a first exemplary embodiment.
0031<figref idref="DRAWINGS">FIG. 8</figref> is a developed perspective view showing the information carrier according to the first exemplary embodiment.
0032<figref idref="DRAWINGS">FIG. 9</figref> is a sectional view of the information carrier according to the first exemplary embodiment.
0033<figref idref="DRAWINGS">FIG. 10</figref> is a view illustrating the information carrier according to the first exemplary embodiment in the state being used.
0034<figref idref="DRAWINGS">FIG. 11</figref> is a sectional view of an information carrier according to a second exemplary embodiment.
0035<figref idref="DRAWINGS">FIG. 12</figref> is a sectional view of an information carrier according to a third exemplary embodiment.
0036<figref idref="DRAWINGS">FIG. 13</figref> is a sectional view of an information carrier according to a fourth exemplary embodiment.
0037<figref idref="DRAWINGS">FIG. 14</figref> is a sectional view of an information carrier according to a fifth exemplary embodiment.
0038<figref idref="DRAWINGS">FIG. 15</figref> is a sectional view of an information carrier according to a sixth exemplary embodiment.
0039<figref idref="DRAWINGS">FIG. 16</figref> is a sectional view of an information carrier according to a seventh exemplary embodiment.
0040<figref idref="DRAWINGS">FIG. 17</figref> is a sectional view of an information carrier according to an eighth exemplary embodiment.
0041<figref idref="DRAWINGS">FIG. 18</figref> is a fragmental perspective view showing a first example of a strip material.
0042<figref idref="DRAWINGS">FIG. 19</figref> is a fragmental perspective view showing a second example of the strip material.
0043<figref idref="DRAWINGS">FIG. 20</figref> is a fragmental perspective view showing a third example of the strip material.
0044<figref idref="DRAWINGS">FIG. 21</figref> is a fragmental perspective view showing a fourth example of the strip material.
0045<figref idref="DRAWINGS">FIG. 22</figref> is a fragmental perspective view showing a fifth example of the strip material.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
0000<IC Element>
0046In the following, description will be made of IC elements according to exemplary embodiments of the present invention by reference to <figref idref="DRAWINGS">FIGS. 1A</figref>, <b>1</b>B and <b>1</b>C together with <figref idref="DRAWINGS">FIGS. 2A and 2B</figref>, wherein <figref idref="DRAWINGS">FIGS. 1A</figref>, <b>1</b>B and <b>1</b>C are plan views showing the IC elements according to the exemplary embodiments, respectively, of the invention and <figref idref="DRAWINGS">FIGS. 2A and 2B</figref> are sectional views showing major portions of the IC elements according to the exemplary embodiments, respectively, of the invention.
0047As is shown in <figref idref="DRAWINGS">FIGS. 1A</figref>, <b>1</b>B and <b>1</b>C and <figref idref="DRAWINGS">FIGS. 2A and 2B</figref>, in each of the IC elements according to the instant exemplary embodiments, an antenna coil <b>3</b> of a rectangular spiral pattern is formed integrally on a surface of the IC element <b>1</b> in which input/output terminals la thereof are formed through the medium of an electrically insulative surface passivation film <b>2</b> such as a silicon oxide film, a resin film or the like.
0048In the case of the IC element <b>1</b> shown in <figref idref="DRAWINGS">FIG. 1A</figref>, the antenna coil <b>3</b> is formed only in an outer peripheral portion exclusive of a circuit forming portion <b>4</b>. By virtue of this structure, appearance of stray capacitance between the circuit formed in the IC element <b>1</b> and the antenna coil <b>3</b> can be prevented, whereby the efficiency of electric power reception from a reader/writer as well as the efficiency of signal transmission/reception with the reader/writer can be enhanced.
0049In the case of the IC element <b>1</b> shown in <figref idref="DRAWINGS">FIG. 1B</figref>, the antenna coil <b>3</b> is so formed as to extend over the circuit forming portion <b>4</b>. With this structure, the number of turns of the antenna coil can be increased, whereby the efficiency of power reception from the reader/writer as well as the efficiency of signal transmission/reception with the reader/writer can be much enhanced.
0050Incidentally, in the case of the exemplary embodiment shown in <figref idref="DRAWINGS">FIG. 1B</figref>, the antenna coil is overlaid partially on the circuit forming portion <b>4</b>. However, it is equally possible to form the antenna coil over the whole circuit forming portion <b>4</b> with a view to implementing the IC element in a miniature size at low cost.
0051In the IC element <b>1</b> shown in <figref idref="DRAWINGS">FIG. 1C</figref>, corner portions of the antenna coil <b>3</b> formed in a rectangular spiral pattern are chamfered obliquely. Owing to this feature, current concentration in the corner portions can be prevented with the resistance value of the antenna coil <b>3</b> being thereby decreased, as a result of which the efficiency of power reception from the reader/writer as well as the efficiency of signal transmission/reception with the reader/writer can be much more enhanced. The corner portion may be chamfered arcuately substantially to the same effect. Furthermore, although it is preferred to chamfer both the inner and outer peripheral edge portions of the individual turns, only the outer peripheral edge portions may be chamfered substantially to the similar effect.
0052In any cases of the antenna coils <b>3</b> described above, the line width of the antenna coil <b>3</b> should preferably be greater than 7 μm inclusive, the inter-turn distance should preferably be shorter than 5 μm inclusive and the number of turns should preferably be greater than 20 turns inclusive in order to ensure that sufficient electric power can be fed to the antenna coil while realizing desirable characteristics for the communication with the reader/writer in practical applications.
0053Interconnection of the input/output terminals <b>1</b><i>a </i>of the IC element <b>1</b> and the antenna coil <b>3</b> are made through-holes <b>5</b> opened in the surface passivation film <b>2</b>. In that case, the diameter or width of the through-hole <b>5</b> should preferably be sized smaller than the line width of the antenna coil <b>3</b>, as can be seen in <figref idref="DRAWINGS">FIGS. 2A and 2B</figref>, so that the input/output terminal <b>1</b><i>a </i>and the antenna coil <b>3</b> can be interconnected without fail even in the case the position at which the antenna coil <b>3</b> is formed deviated more or less from that of the antenna coil.
0054The conductor constituting the antenna coil <b>3</b> is implemented in a multilayer structure which includes a metal-sputtered layer or alternatively a metal-evaporated layer <b>6</b> and a metal-plated layer <b>7</b>, as shown in <figref idref="DRAWINGS">FIGS. 2A and 2B</figref>. In the case of the example shown in <figref idref="DRAWINGS">FIG. 2A</figref>, the metal-plated layer <b>7</b> is formed only on the top surface of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b>. On the other hand, in the case of the example shown in <figref idref="DRAWINGS">FIG. 2B</figref>, the metal-plated layer <b>7</b> is so formed as to cover the whole surface of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b>. The metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> and the metal-plated layer <b>7</b> can be formed of a given electrically conductive metal or metals. However, it is preferred to form the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> of aluminum or nickel or copper or chromium because of relatively low cost and high electric conductivity. Further, the antenna coil can be formed in a single layer or in a laminated structure including a combination of plural layers, as can be seen in <figref idref="DRAWINGS">FIGS. 2A and 2B</figref>. The metal-plated layer <b>7</b> should preferably be formed of copper by resorting to a non-electrolytic plating method or an electroplating method or a precision electroforming method.
0000<IC Element Manufacturing Method>
0055Next, description will be made of exemplary embodiments of the IC element manufacturing method according to the present invention by reference to <figref idref="DRAWINGS">FIGS. 3</figref> to <figref idref="DRAWINGS">FIG. 6</figref>, wherein <figref idref="DRAWINGS">FIG. 3</figref> is a plan view of a so-called finished wafer which has been completed through predetermined treatment processes, <figref idref="DRAWINGS">FIGS. 4A</figref>, <b>4</b>B, <b>4</b>C, <b>4</b>D, <b>4</b>E and <b>4</b>F are views for illustrating stepwise a first example of the IC element manufacturing method according to the present invention, <figref idref="DRAWINGS">FIGS. 5A</figref>, <b>5</b>B, <b>5</b>C, <b>5</b>D and <b>5</b>E are views for illustrating stepwise a second example of the IC element manufacturing method according to the present invention, and <figref idref="DRAWINGS">FIG. 6</figref> is a plan view of a finished wafer having formed thereon a required conductive pattern inclusive of the antenna coil.
0056As shown in <figref idref="DRAWINGS">FIG. 3</figref>, a large number of circuits <b>10</b> for the IC element are formed with equidistance in an inner portion exclusive of the outermost peripheral portion, wherein the surface passivation film <b>2</b> is formed over the surface on which the circuit for the IC element are formed (see <figref idref="DRAWINGS">FIGS. 4 and 5</figref>).
0057In the IC element manufacturing method according to a first exemplary embodiment shown in <figref idref="DRAWINGS">FIGS. 4A</figref>, <b>4</b>B, <b>4</b>C, <b>4</b>D, <b>4</b>E and <b>4</b>F, the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> is formed uniformly on the surface passivation film <b>2</b> deposited on the circuit-formed surface of the finished wafer <b>11</b> by using aluminum or an aluminum alloy or alternatively copper or a copper alloy, as shown in <figref idref="DRAWINGS">FIG. 4A</figref>. Subsequently, a photoresist layer <b>12</b> is uniformly formed on the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> and then the photoresist layer as formed is covered with a mask <b>13</b> of a required pattern inclusive of the coils, whereon the photoresist layer <b>12</b> is exposed to illumination of light rays <b>14</b> of a predetermined wavelength externally of the mask <b>13</b>, as is shown in <figref idref="DRAWINGS">FIG. 4B</figref>. Thereafter, the photoresist layer <b>12</b> undergone the light exposure is subjected to a developing process, whereby the light-exposed portions of the photoresist layer <b>12</b> are removed, as a result of which the portions of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> which correspond to the above-mentioned light exposure pattern is exposed outwardly, as is shown in <figref idref="DRAWINGS">FIG. 4C</figref>. The exposure pattern of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> includes a ring-shaped electrode portion <b>15</b>, the antenna coils <b>3</b> formed on the portions opposite to the aforementioned circuits <b>10</b>, respectively, and lead portions <b>16</b> for connecting the individual antenna coils <b>3</b> and the electrode portion <b>15</b>, as is shown in <figref idref="DRAWINGS">FIG. 6</figref>. In succession, by making use of the above-mentioned electrode portion <b>15</b> as one electrode, electroplating or precision electroforming process is performed on the exposed portions of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b>, or thereby laminate the metal-plated layers <b>7</b> on the exposed portions of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b>, as shown in <figref idref="DRAWINGS">FIG. 4D</figref>. Subsequently, the photoresist layer <b>12</b> deposited on the surface of the finished wafer <b>11</b> is removed through an ashing or the like process to thereby obtain the finished wafer <b>11</b> formed with the metal-plated <b>7</b> including the electrode portion <b>15</b>, the antenna coils <b>3</b> and the lead portions <b>16</b> deposited on the uniform metal-sputtered layer on alternatively metal-evaporated layer <b>6</b>, as shown in <figref idref="DRAWINGS">FIG. 4E</figref>. In succession, the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> exposed through the metal-plated layer <b>7</b> is selectively etched to thereby remove the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> exposed externally through the metal-plated layer <b>7</b>, as is shown in <figref idref="DRAWINGS">FIG. 4F</figref>. Thus, there is obtained the finished wafer <b>11</b> on which both the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> and the metal plated layer <b>7</b> are formed in the required conductive pattern shown in <figref idref="DRAWINGS">FIG. 6</figref>. Finally, the finished after <b>11</b> mentioned just above is scribed to obtain the desired IC elements <b>1</b> shown in <figref idref="DRAWINGS">FIG. 1</figref>.
0058Incidentally, in the exemplary embodiment described above, the electroplating method or precision electroforming method is adopted as the process for forming the metal-plated layer <b>7</b>. It should however be understood that instead of these methods, an electroless plating method may be resorted to for forming the metal-plated layer <b>7</b> mentioned above. In that case, since no electrode is required for forming the metal-plated layer <b>7</b>, it is unnecessary to form the electrode portion <b>15</b> and the lead portions <b>16</b> upon exposure of the photoresist layer <b>12</b> to light illumination.
0059The electroless plating method is also referred to as the chemical plating and destined for deposition of metal ions by immersing a substrate metal in a bath containing a metallic salt solution of plating metal. The electroless plating method features that a metal-plated layer which exhibits high adhesion and having a uniform and adequate thickness can be formed with relatively simple equipment. The metallic salt mentioned above serves as a supply source of metal ions to be deposited. For plating with copper, a solution of copper sulfate, cupric chloride, copper nitrate or the like is used as the plating solution. The metal ions such as copper ions or the like ions are deposited only on the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> serving as the substrate and not deposited on the electrically insulative surface passivation film <b>2</b> (or passivation film). The substrate is required to exhibit less ionization tendency for the plating metal ions and exhibit a catalytic action for deposition of the plating metal ions. Such being the circumstances, when the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> formed of aluminum is to be plated with copper, it is preferred to carry out a pretreatment of forming a nickel film of several m or less in thickness on the surface of the aluminum layer for substituting nickel for zinc by immersing in a zinc nitrate solution for several seconds.
0060On the other hand, in the electroplating method and the precision electroforming method, the finished wafer <b>11</b> having the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> formed thereon and an electrode made of a plating metal are immersed in a plating bath containing plating metal ions, whereon a voltage is applied across the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> formed on the finished wafer <b>11</b> and serving as the cathode and the electrode immersed in the plating bath and serving as the anode, to thereby deposit the metal ions contained in the plating bath on the surface of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b>. In the electroplating method or the precision electroforming method, a solution of copper sulfate, cupric chloride, copper nitrate or the like is employed as the plating solution for plating with copper.
0061The IC element manufacturing method according to the instant exemplary embodiment is so arranged that the required conductive pattern inclusive of coils is first formed on the finished wafer <b>11</b>, whereon the finished wafer <b>11</b> is scribed to thereby obtain the desired IC element <b>1</b>. Thus, the IC elements each formed integrally with the coil can be manufactured with high efficiency at lower manufacturing cost when compared with the case where the individual coils are each formed on the individual IC elements, respectively. Besides, it is possible to form the coils in a uniform thickness, respectively, for all the IC elements formed on the wafer with high precision, as a result of which dispersion or variance of the communication characteristics can be diminished. Furthermore, if the coil is formed for each of the individual IC elements by using the sputtering method or alternatively the vacuum evaporation method and the plating method, unwanted electrical conductor materials will be deposited on the outer peripheral portion of the IC element, giving rise to a problem in respect to the insulation quality of the IC element. Similarly, in the case the required conductive pattern inclusive of the coil is formed on the finished wafer <b>11</b>, unwanted conductive materials may be deposited on the outer peripheral portion of the finished wafer <b>11</b> upon sputtering or the like process. However, since the outer peripheral portion mentioned above is intrinsically destined to be disposed of as the unwanted portion, adverse influence to the insulation quality of the individual IC elements can be avoided. Additionally, in the IC element manufacturing method according to the instant example, the metal-plated layer <b>7</b> is formed in the state where the photoresist layer <b>12</b> has been deposited, and thereafter the portions of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> where the metal-plated layer <b>7</b> is not laminated are removed by etching. Thus, the metal-plated layer <b>7</b> is laminated only on the top surface of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> without spreading widthwise. Owing to these features, the antenna coil <b>3</b> can be formed with high accuracy or precision, which in turn means that the antenna coil <b>3</b> having an increased number of turns can be formed within a narrow space.
0062On the other hand, in the case of the IC element manufacturing method according to a second exemplary embodiment shown in <figref idref="DRAWINGS">FIG. 5</figref>, a photoresist layer <b>12</b> is uniformly formed over the surface passivation film <b>2</b> formed on the finished wafer <b>11</b> and then the photoresist layer <b>12</b> as formed is covered with a mask <b>13</b> of a required pattern inclusive of coils, whereon the photoresist layer <b>12</b> is exposed to illumination of light rays <b>14</b> of a predetermined wavelength externally of the mask <b>13</b>, as is shown in <figref idref="DRAWINGS">FIG. 5A</figref>. Thereafter, the photoresist layer <b>12</b> exposed undergoes a developing process, whereby the light-exposed portions of the photoresist layer <b>12</b> are removed so that the portions of the surface passivation film <b>2</b> which correspond to the above-mentioned light exposure pattern are exposed externally as is shown in <figref idref="DRAWINGS">FIG. 5B</figref>. The light exposure pattern for the photoresist layer <b>12</b> can be so formed as to include an electrode portion <b>15</b>, antenna coils <b>3</b> and lead portions <b>16</b>, as is shown in <figref idref="DRAWINGS">FIG. 6</figref>. Subsequently, the finished wafer <b>11</b> undergone the developing process is mounted on a sputtering apparatus or a vacuum evaporation apparatus and then the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b> is formed on the exposed portions of the surface passivation film <b>2</b> mentioned above, as is shown in <figref idref="DRAWINGS">FIG. 5C</figref>. In succession, the photoresist layer <b>12</b> remaining deposited on the finished wafer <b>11</b> is removed through the ashing or like process, as is shown in <figref idref="DRAWINGS">FIG. 5D</figref>. Thereafter, by employing the above-mentioned electrode portion <b>15</b> as one electrode, electroplating is performed on the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b>, to thereby laminate the metal-plated layer <b>7</b> on the exposed portions of the metal-sputtered layer or alternatively metal-evaporated layer <b>6</b>, as is shown in <figref idref="DRAWINGS">FIG. 5E</figref>. Finally, the finished wafer <b>11</b> mentioned above is scribed for thereby obtaining the desired IC element <b>1</b> shown in <figref idref="DRAWINGS">FIG. 1</figref>.
0063Incidentally, in the exemplary embodiments described above, the electroplating method is adopted as the means for forming the metal-plated layer <b>7</b>. It should however be understood that instead of such method, an electroless plating method may be adopted for forming the metal-plated layer <b>7</b> mentioned above. In that case, since no electrode is required for forming the metal-plated layer <b>7</b>, it is unnecessary to form the electrode portion <b>15</b> and the lead portions <b>16</b> upon exposure of the photoresist layer <b>12</b> to the light rays.
0064The IC element manufacturing method according to the instant example can assure the similar advantageous effects as those of the IC element manufacturing method according to the first exemplary embodiment and additionally allows the number of the steps of forming the conductor pattern on the finished wafer <b>11</b> to be decreased, whereby the IC element formed integrally with the antenna coil can be manufactured at higher efficiency.
0000<Information Carrier>
0065In the following, description will be made of information carriers according to exemplary embodiments of the present invention by reference to <figref idref="DRAWINGS">FIGS. 7 to 17</figref>. <figref idref="DRAWINGS">FIG. 7</figref> is a plan view of an information carrier according to a first exemplary embodiment with a portion being broken away, <figref idref="DRAWINGS">FIG. 8</figref> is a developed perspective view showing the information carrier according to the first exemplary embodiment, <figref idref="DRAWINGS">FIG. 9</figref> is a sectional view of the information carrier according to the first exemplary embodiment, <figref idref="DRAWINGS">FIG. 10</figref> is a view showing the information carrier according to the first exemplary embodiment in the state being used, <figref idref="DRAWINGS">FIG. 11</figref> is a sectional view of an information carrier according to a second exemplary embodiment, <figref idref="DRAWINGS">FIG. 12</figref> is a sectional view of an information carrier according to a third exemplary embodiment, <figref idref="DRAWINGS">FIG. 13</figref> is a sectional view of an information carrier according to a fourth exemplary embodiment, <figref idref="DRAWINGS">FIG. 14</figref> is a sectional view of an information carrier according to a fifth exemplary embodiment, <figref idref="DRAWINGS">FIG. 15</figref> is a sectional view of an information carrier according to a sixth exemplary embodiment, <figref idref="DRAWINGS">FIG. 16</figref> is a sectional view of an information carrier according to a seventh exemplary embodiment, and <figref idref="DRAWINGS">FIG. 17</figref> is a sectional view of an information carrier according to an eighth exemplary embodiment.
0066An information carrier <b>20</b><i>a </i>according to the first exemplary embodiment is comprised of a coin-like substrate <b>21</b> formed circularly in the planar shape and an IC element <b>1</b> mounted on the substrate <b>21</b> at a center portion as viewed planewise and thicknesswise of the substrate, as is shown in <figref idref="DRAWINGS">FIGS. 7 to 9</figref>. As the IC element <b>1</b>, the IC element which is formed integrally with the antenna coil, as shown in <figref idref="DRAWINGS">FIG. 1</figref> and <figref idref="DRAWINGS">FIG. 2</figref>, is employed.
0067The substrate <b>21</b> is composed of a top member <b>22</b>, an intermediate member <b>23</b> and a bottom member <b>24</b> which are integrally bonded together through interposed adhesive layers <b>25</b>, respectively, as is shown in <figref idref="DRAWINGS">FIG. 8</figref> and <figref idref="DRAWINGS">FIG. 9</figref>. Each of individual members <b>22</b>, <b>23</b> and <b>24</b> constituting the substrate <b>21</b> may be formed of a paper sheet or a plastics sheet. However, it is preferred above all to form these members of paper sheets, respectively, in consideration of their susceptibility to the spontaneous decomposition after having been scrapped, less generation of harmful gases in incineration and inexpensiveness. Of course, it is possible to form one or two of the members <b>22</b>, <b>23</b> and <b>24</b> of a paper sheet with the other one or two members being formed of a plastics sheet.
0068Formed in the intermediate member <b>23</b> at a center portion thereof is a through-hole <b>27</b> into which the IC element <b>1</b> can be inserted. Thus, by bonding together the members <b>22</b>, <b>23</b> and <b>24</b>, a chamber in which the IC element <b>1</b> can be accommodated is formed. Incidentally, the IC element <b>1</b> should preferably be bonded fixedly to the bottom member <b>24</b> with a view to protecting the IC element from quaking upon handling of the information carrier. In that case, it is preferred from the standpoint of the manufacturing cost to form uniformly the adhesive layer <b>25</b> over one surface of the bottom member <b>24</b> so that bonding of the intermediate member <b>23</b> and the bottom member <b>24</b> on one hand and the bonding of the bottom member <b>24</b> and the IC element <b>1</b> on the other hand can be realized by making use of the adhesive layer <b>25</b>. Further, the planar shape of the through-hole <b>27</b> may be selected arbitrarily. However, it is preferred from the manufacturing viewpoint to form the through-hole <b>27</b> in a circular shape, as shown in <figref idref="DRAWINGS">FIG. 7</figref> and <figref idref="DRAWINGS">FIG. 8</figref>, because in that case there arises no necessity for precise alignment of orientation of the IC element <b>1</b> in the rotational direction with a recess which is formed by bonding together the intermediate member <b>23</b> and the bottom member <b>24</b>, when the IC element is placed in that recess.
0069By virtue of such arrangement that the IC element <b>1</b> is disposed at a center portion of the substrate <b>21</b> formed in a circular form as viewed in the planar direction, i.e., perpendicularly to the plane of the substrate, in the case of the information carrier <b>20</b><i>a </i>according to the instant exemplary embodiment, the information carrier <b>20</b> can be placed within a slot <b>101</b> formed substantially semicircularly in a reader/writer <b>100</b> equipped with an antenna coil <b>102</b> for contactless communication and disposed at a center of an arcuate portion of the slot <b>101</b>. In that case, the antenna coil <b>3</b> formed integrally with the IC element <b>1</b> can automatically be centered or aligned with the antenna coil <b>102</b> of the reader/writer <b>100</b>, as can be seen in <figref idref="DRAWINGS">FIG. 10</figref>, whereby the electromagnetic coupling between both the coils <b>3</b> and <b>102</b> can be increased, as a result of which electric power supply to the information carrier <b>20</b> from the reader/writer <b>100</b> as well as signal transmission/reception between the reader/writer <b>100</b> and the information carrier <b>20</b> can be carried out with high reliability. Furthermore, because the information carrier <b>20</b><i>a </i>is shaped in a circular form as viewed in the planar direction, i.e., perpendicularly to the plane of the information carrier, the information carrier exhibits no directivity relative to the slot <b>101</b> formed substantially semicircularly, whereby excellent handleability of the information carrier can be ensured. Besides, because the IC element <b>1</b> is completely embedded within the substrate <b>21</b>, not only high protection effectivity and excellent durability but also good aesthetic appearance owing to invisibility of the IC element <b>1</b> can be ensured for the information carrier.
0070Referring to <figref idref="DRAWINGS">FIG. 11</figref>, an information carrier <b>20</b><i>b </i>according to the second embodiment includes a substrate <b>21</b> constituted by a top member <b>22</b>, an intermediate member <b>23</b> and a bottom member <b>24</b> and features disposition of a booster coil <b>28</b> in a concentric circular array around the IC element <b>1</b>. In the figure, reference numeral <b>29</b> denotes a recess for accommodating therein the booster coil <b>28</b>, wherein the recess is formed in a ring-like shape around a through-hole <b>27</b> of the intermediate member <b>23</b>. In the other respects, the structure of the information carrier according to the second exemplary embodiment is identical with that of the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment. Accordingly, repeated description thereof is omitted. The information carrier <b>20</b><i>b </i>according to the instant exemplary embodiment presents similar advantageous effects as those of the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment. In addition, by virtue of the concentric circular disposition of the booster coil <b>28</b> aground the IC element <b>1</b>, the electromagnetic coupling between the antenna coil <b>3</b> formed integrally with the IC element <b>1</b> and the antenna coil <b>102</b> of the reader/writer <b>100</b> can be increased owing to interposition of the booster coil <b>28</b>, whereby stabilization of the electric power as well as stabilization of the signal transmission/reception can further be enhanced with the communication range being also increased.
0071Referring to <figref idref="DRAWINGS">FIG. 12</figref>, an information carrier <b>20</b><i>c </i>according to the third exemplary embodiment includes a substrate <b>21</b> which is constituted by two members, i.e., a top member <b>22</b> and a bottom member <b>24</b>, and features a recess <b>30</b> formed in the bottom member <b>24</b> for accommodating therein the IC element <b>1</b>. In the other respects, the structure of the information carrier <b>20</b><i>c </i>according to the third exemplary embodiment is identical with that of the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment. Accordingly, repeated description thereof is omitted. The information carrier <b>20</b><i>c </i>according to the instant exemplary embodiment presents similar advantageous effects as those of the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment. Besides, because the number of the parts constituting the information carrier is small, more inexpensive implementation of the information carrier can be realized.
0072Referring to <figref idref="DRAWINGS">FIG. 13</figref>, the information carrier <b>20</b><i>d </i>according to the fourth exemplary embodiment includes a substrate <b>21</b> which is constituted by two members, i.e., a top member <b>22</b> and a bottom member <b>24</b>, and features a first recess <b>30</b> formed in the bottom member <b>24</b> for accommodating therein the IC element <b>1</b> and a second recess <b>29</b> formed for accommodating therein a booster coil <b>28</b>. In the other respects, the structure of the information carrier <b>20</b><i>d </i>according to the third exemplary embodiment is identical with that of the information carrier <b>20</b><i>c </i>according to the third exemplary embodiment. Accordingly, repeated description thereof is omitted. The information carrier <b>20</b><i>c </i>according to the instant exemplary embodiment presents similar advantageous effects as those of the information carrier <b>20</b><i>b </i>according to the second exemplary embodiment. Besides, because the number of the parts constituting the information carrier is small, more inexpensive implementation of the information carrier can be realized.
0073Referring to <figref idref="DRAWINGS">FIG. 14</figref>, the information carrier <b>20</b><i>e </i>according to the fifth exemplary embodiment includes a substrate <b>21</b> which is constituted by two members, i.e., a top member <b>22</b> in which a through-hole <b>27</b> for accommodating therein the IC element and a bottom member <b>24</b> in which no through-hole <b>27</b> is formed, and features that the IC element <b>1</b> is accommodated within a recess formed by bonding together the top member <b>22</b> and the bottom member <b>24</b> with the interior of the recess being sealed off by filling a potting resin <b>31</b>. In the other respects, the structure of the information carrier <b>20</b><i>e </i>according to the fifth exemplary embodiment is identical with that of the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment. Accordingly, repeated description thereof is omitted. The information carrier <b>20</b><i>e </i>according to the instant exemplary embodiment exhibits similar advantageous effects as those of the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment except that the IC element <b>1</b> is not covered with the substrate.
0074Referring to <figref idref="DRAWINGS">FIG. 15</figref>, the information carrier <b>20</b><i>f </i>according to the sixth exemplary embodiment features a substrate <b>21</b> constituted by two members, i.e., a top member <b>22</b> in which a through-hole <b>27</b> for accommodating therein the IC element and a recess <b>29</b> for accommodating a booster coil are concentrically formed around a through-hole <b>27</b> and a bottom member <b>24</b> which has neither the through-hole <b>27</b> nor the recess <b>29</b>, wherein the booster coil <b>28</b> is placed within the recess <b>29</b> with the recess <b>29</b> being sealed off with a potting resin <b>31</b> while the IC element <b>1</b> is accommodated within a recess formed by bonding together the top member <b>22</b> and the bottom member <b>24</b> with that recess also being sealed off with the potting resin <b>31</b>. In the other respects, the structure of the information carrier <b>20</b><i>f </i>according to the sixth exemplary embodiment is identical with that of the information carrier <b>20</b><i>e </i>according to the fifth exemplary embodiment.
0075Accordingly, repeated description thereof is omitted. The information carrier <b>20</b><i>f </i>according to the instant exemplary embodiment exhibits similar advantageous effects as those of the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment except that the IC element <b>1</b> is not covered with the substrate.
0076Referring to <figref idref="DRAWINGS">FIG. 16</figref>, the information carrier <b>20</b><i>g </i>according to the seventh exemplary embodiment features a substrate <b>21</b> constituted by a single member having one surface formed with a recess <b>30</b> for accommodating the IC element <b>1</b>, which recess is sealed off with a potting resin <b>31</b> after the IC element <b>1</b> has been disposed therein. In the other respects, the structure of the information carrier <b>20</b><i>g </i>according to the seventh exemplary embodiment is identical with that of the information carrier <b>20</b><i>e </i>according to the fifth exemplary embodiment. Accordingly, repeated description thereof is omitted. The information carrier <b>20</b><i>g </i>according to the instant exemplary embodiment presents similar advantageous effects as those of the information carrier <b>20</b><i>e </i>according to the fifth exemplary embodiment. Besides, because the number of the parts constituting the information carrier is small, more inexpensive implementation of the information carrier can be realized.
0077Referring to <figref idref="DRAWINGS">FIG. 17</figref>, the information carrier <b>20</b><i>h </i>according to the eighth exemplary embodiment features a substrate <b>21</b> constituted by a single member which has one surface formed with a first recess <b>30</b> for accommodating therein the IC element <b>1</b> and a second recess <b>29</b> for accommodating therein a booster coil <b>28</b>, wherein the IC element <b>1</b> is disposed within the first recess <b>30</b> mentioned above with this recess being sealed off with a potting resin <b>31</b> while the booster coil <b>28</b> is accommodated within the second recess <b>29</b> mentioned above with this recess being also sealed off with the potting resin <b>31</b>. In the other respects, the structure of the information carrier <b>20</b><i>h </i>according to the eighth exemplary embodiment is identical with that of the information carrier <b>20</b><i>g </i>according to the seventh exemplary embodiment. Accordingly, repeated description thereof is omitted. The information carrier <b>20</b><i>h </i>according to the instant exemplary embodiment presents similar advantageous effects as those of the information carrier <b>20</b><i>f </i>according to the sixth exemplary embodiment. Besides, because the number of the parts constituting the information carrier is small, more inexpensive implementation of the information carrier can be realized.
0078At this juncture, it is to be mentioned that in the exemplary embodiments described above, the substrate <b>21</b> is formed circularly as viewed in the planar direction, i.e., perpendicularly to the plane of the substrate. It should however be appreciated that the substrate may be formed in other appropriate shapes such as square, rectangle, triangle or polygon, etc.
0079Further, in the case of the information carriers according to the second, fourth sixth and eighth exemplary embodiments, the discrete booster coil <b>28</b> is disposed in the through-hole and the recess formed in the substrate <b>21</b>. It should however be understood that the booster coil <b>28</b> can directly be formed on the member constituting the substrate <b>21</b> by printing, plating, sputtering or the like process.
0080Furthermore, by implementing the booster coil <b>28</b> with a first coil for performing contactless communication with the IC element and a second coil of a greater capacity than the first coil for performing communication with an external reader/writer with and interconnecting the first and second coils in series to each other, the communication range or coverage can be extended.
0000<Method of Manufacturing the Information Carrier>
0081Next, exemplary embodiments of the information carrier manufacturing method according to the present invention will be described by reference to <figref idref="DRAWINGS">FIG. 18</figref> to <figref idref="DRAWINGS">FIG. 22</figref>. <figref idref="DRAWINGS">FIG. 18</figref> is a fragmental perspective view showing a first example of a strip material employed in manufacturing an information carrier according to the present invention, <figref idref="DRAWINGS">FIG. 19</figref> is a fragmental perspective view showing a second example of the strip material, <figref idref="DRAWINGS">FIG. 20</figref> is a fragmental perspective view showing a third example of the strip material, <figref idref="DRAWINGS">FIG. 21</figref> is a fragmental perspective view showing a fourth example of the strip material, and <figref idref="DRAWINGS">FIG. 22</figref> is a fragmental perspective view showing a fifth example of the strip material.
0082In the information carrier manufacturing method according to the present invention, required parts to be mounted inclusive of the IC element <b>1</b> are disposed fixedly on a raw material (strip material) for implementing a unitary substrate formed in a strip-like shape, whereon other strip material or materials is bonded onto one or both surfaces of the strip material, as the case may be, or alternatively potting for the parts to be mounted are carried out, and thereafter the concerned information carriers are punched by die-cutting from the single or the unitary bonded strip. For carrying out the information carrier manufacturing method according to the present invention, there may be selectively employed a strip material <b>41</b> in which through-holes <b>27</b> for accommodating the IC elements <b>1</b>, respectively, are formed with a constant interspace, as shown in <figref idref="DRAWINGS">FIG. 18</figref>, a strip material <b>42</b> in which through-holes <b>27</b> are formed with a constant interspace for accommodating the IC elements <b>1</b>, respectively, and in which ring-shaped recesses <b>29</b> destined for accommodating booster coils <b>28</b>, respectively, are formed concentrically around the through-holes <b>27</b> with adhesive layers <b>32</b> being applied onto bottom surfaces of the ring-shaped recesses <b>29</b>, respectively, as shown in <figref idref="DRAWINGS">FIG. 19</figref>, a strip material <b>43</b> in which recesses <b>30</b> are formed with a constant interspace for accommodating therein the IC elements <b>1</b>, respectively, with an adhesive layer <b>32</b> being applied onto a bottom surface of each of the recesses <b>30</b>, as shown in <figref idref="DRAWINGS">FIG. 20</figref>, a strip material <b>44</b> in which first recesses <b>30</b> are formed with a constant interspace for accommodating therein the IC elements <b>1</b>, respectively, and in which second recesses <b>29</b> each of a ring-like shape are concentrically formed around the first recesses <b>30</b>, respectively, with adhesive layers <b>32</b> being applied onto the bottom surfaces of the recesses <b>29</b> and <b>30</b>, respectively, as shown in <figref idref="DRAWINGS">FIG. 21</figref>, or a strip material <b>45</b> on which neither through-holes nor recesses are formed but an adhesive layer <b>25</b> is uniformly applied over one surface of the strip material, as shown in <figref idref="DRAWINGS">FIG. 22</figref>.
0083A first example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>a </i>according to the first exemplary embodiment by using one sheet of strip material <b>41</b> shown in <figref idref="DRAWINGS">FIG. 18</figref> and two sheets of strip materials <b>45</b> shown in <figref idref="DRAWINGS">FIG. 22</figref>. At first, one of the strip materials <b>45</b> is bonded to one surface of the strip material <b>41</b> with the adhesive layer <b>25</b> being interposed therebetween to thereby obtain a unitary bonded strip composed of the strip materials <b>41</b> and <b>45</b> having spaces within which the IC elements <b>1</b> can be accommodated, respectively. Subsequently, the IC elements <b>1</b> are positioned to be placed within the spaces mentioned above, respectively, whereon the IC elements <b>1</b> are bonded to the strip material <b>45</b> by using the adhesive layers <b>25</b>, respectively. In succession, the other strip material <b>45</b> is bonded to the other surface of the strip material <b>41</b> with the adhesive layer <b>25</b> interposed therebetween to thereby realize a unitary bonded strip composed of the strip materials <b>41</b> and <b>45</b> and having the IC elements <b>1</b> accommodated within the internal spaces, respectively. Finally, the unitary bonded strip is cut into segments each of a predetermined shape to obtain the information carriers <b>20</b><i>a </i>according to the first embodiment. With the information carrier manufacturing method according to the instant exemplary embodiment, a large number of the IC elements <b>1</b> are encased internally of the strip materials <b>41</b> and <b>45</b> and then the concerned information carriers are formed by punching from the bonded strip materials <b>41</b> and <b>45</b>. Thus, the identical information carriers can be manufactured with high efficiency and hence the manufacturing cost of the information carrier can be reduced.
0084A second example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>b </i>according to the second exemplary embodiment by using one sheet of the strip material <b>42</b> shown in <figref idref="DRAWINGS">FIG. 19</figref> and two sheets of the strip materials <b>45</b> shown in <figref idref="DRAWINGS">FIG. 22</figref>. At first, the booster coils <b>28</b> are placed within ring-like recesses <b>29</b> formed in the strip material <b>42</b> and then the booster coil <b>28</b> are bonded to the bottom surfaces of the recesses <b>29</b> by using adhesive layers <b>32</b>, respectively. Subsequently, the strip material <b>45</b> is bonded to one of the surfaces of the strip material <b>42</b> by using the adhesive layer <b>25</b> interposed therebetween to thereby obtain a unitary bonded strip composed of the strip materials <b>42</b> and <b>45</b> bonded together and having spaces within which the IC elements <b>1</b> can be accommodated, respectively. In succession, the IC elements <b>1</b> are positioned to be placed within the above-mentioned spaces and bonded to the strip material <b>45</b> with the adhesive layer <b>25</b>. Thereafter, the other sheet of strip material <b>45</b> is bonded to the other surface of the strip material <b>41</b> with the adhesive layer <b>25</b> interposed therebetween to thereby obtain the bonded strip constituted by the strip materials <b>42</b> and <b>45</b> and having the IC elements <b>1</b> accommodated within the internal spaces, respectively. Next, the space within which the IC element <b>1</b> has been accommodated is filled with a potting resin <b>31</b> to obtain the unitary bonded strip composed of the strip materials <b>41</b> and <b>45</b> and having the IC elements <b>1</b> fixedly embedded therein. Finally, the unitary bonded strip is cut into segments each of a predetermined shape to obtain the information carriers <b>20</b><i>e </i>according to the fifth exemplary embodiment. The instant example of the information carrier manufacturing method presents similar advantageous effects as those of the information carrier manufacturing method according to the first embodiment.
0085A third example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>c </i>according to the third exemplary embodiment by using a single sheet of the strip material <b>43</b> shown in <figref idref="DRAWINGS">FIG. 20</figref> and a single sheet of the strip material <b>45</b> shown in <figref idref="DRAWINGS">FIG. 22</figref>. At first, the IC elements <b>1</b> are positioned to be placed within the recesses <b>30</b>, respectively, which are formed in the strip material <b>43</b> and then the IC elements are bonded to the bottom surfaces of the recesses <b>30</b> by using the adhesive layers <b>32</b>, respectively. Subsequently, the strip material <b>45</b> is bonded to the surface of the strip material <b>43</b> formed with the recesses by using the adhesive layer <b>25</b> interposed therebetween to thereby obtain a unitary bonded strip which is composed of the strip materials <b>43</b> and <b>45</b> bonded together and having the IC elements <b>1</b> embedded therein. Finally, the unitary bonded strip is cut into segments each of a predetermined shape to thereby obtain the information carriers <b>20</b><i>c </i>according to the third exemplary embodiment. The instant example of the information carrier manufacturing method presents similar advantageous effects as those of the information carrier manufacturing method according to the first embodiment.
0086A fourth example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>d </i>according to the fourth exemplary embodiment by using a single sheet of the strip material <b>44</b> shown in <figref idref="DRAWINGS">FIG. 21</figref> and a single sheet of the strip material <b>45</b> shown in <figref idref="DRAWINGS">FIG. 22</figref>. At first, the IC elements <b>1</b> are positioned to be placed within the first recesses <b>30</b>, respectively, which are formed in the strip material <b>44</b>, and then the IC elements are bonded to the bottom surfaces of the above-mentioned recesses <b>30</b> by using the adhesive layers <b>32</b>, respectively, while the booster coils <b>28</b> are accommodated within the second ring-like recesses <b>29</b>, respectively, which are formed in the strip material <b>44</b> and bonded to the bottom surfaces of the above-mentioned recesses <b>29</b>, respectively, by using the adhesive layers <b>32</b> interposed therebetween. Subsequently, the strip material <b>45</b> is bonded to the surface of the strip material <b>44</b> having the recesses by using the adhesive layer <b>25</b> interposed therebetween to thereby obtain a unitary bonded strip which is composed of the strip materials <b>44</b> and <b>45</b> bonded together and having internal spaces within which the IC elements <b>1</b> have been accommodated, respectively. Finally, the unitary bonded strip is cut into segments each of a predetermined shape to obtain the information carriers <b>20</b><i>c </i>according to the third exemplary embodiment. The instant example of the information carrier manufacturing method presents similar advantageous effects as those of the information carrier manufacturing method according to the first embodiment.
0087A fifth example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>e </i>according to the fifth exemplary embodiment by using a single strip material <b>41</b> shown in <figref idref="DRAWINGS">FIG. 18</figref> and a single sheet of strip material <b>45</b> shown in <figref idref="DRAWINGS">FIG. 22</figref>. At first, the strip material <b>45</b> is bonded to one surface of the strip material <b>41</b> with the adhesive layer <b>25</b> being interposed therebetween to thereby obtain a bonded strip composed of the strip materials <b>41</b> and <b>45</b> and having the spaces within which the IC elements <b>1</b> can be accommodated, respectively. Subsequently, the IC elements <b>1</b> are positioned to be placed within the above-mentioned spaces, respectively, whereon the IC elements are bonded to the strip material <b>45</b> by using the adhesive layer <b>25</b> interposed therebetween. In succession, the spaces in which the above-mentioned IC elements <b>1</b> are accommodated, respectively, are each filled with the potting resin <b>31</b> to thereby obtain the unitary bonded strip constituted by the strip materials <b>41</b> and <b>45</b> and having the IC elements <b>1</b> embedded therein. Finally, the unitary bonded strip is cut into segments each of a predetermined shape to obtain the information carriers <b>20</b><i>e </i>according to the fifth exemplary embodiment. The instant example of the information carrier manufacturing method equally presents similar advantageous effects as those of the information carrier manufacturing method according to the first embodiment.
0088A sixth example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>f </i>according to the sixth exemplary embodiment by using one sheet of the strip material <b>42</b> shown in <figref idref="DRAWINGS">FIG. 19</figref> and a single sheet of the strip material <b>45</b> shown in <figref idref="DRAWINGS">FIG. 22</figref>. At first, the booster coils <b>28</b> are placed within the ring-like recesses <b>29</b>, respectively, which are formed in the strip material <b>42</b>, and then the booster coils <b>28</b> are bonded to the bottom surfaces of the recesses <b>29</b> by using the adhesive layers <b>32</b>, respectively. Subsequently, the strip material <b>45</b> is bonded to one of the surfaces of the strip material <b>42</b> by using the adhesive layer <b>25</b> interposed therebetween to thereby obtain a bonded strip composed of the strip materials <b>42</b> and <b>45</b> bonded together and having the spaces within which the IC elements <b>1</b> can be accommodated, respectively. In succession, the IC elements <b>1</b> are positioned to be placed within the above-mentioned spaces, respectively, and bonded to the strip material <b>45</b> with the adhesive layer <b>25</b> interposed therebetween. In succession, the recesses <b>29</b> in which the above-mentioned booster coils <b>28</b> are accommodated and the spaces in which the above-mentioned IC elements <b>1</b> are accommodated are each filled with the potting resin <b>31</b> to thereby obtain the unitary bonded strip constituted by the strip materials <b>42</b> and <b>45</b> and having the IC elements <b>1</b> and the booster coils <b>28</b> which are embedded therein. Finally, the unitary bonded strip is cut into segments each of a predetermined shape to obtain the information carriers <b>20</b><i>f </i>according to the sixth exemplary embodiment. The instant example of the information carrier manufacturing method equally presents similar advantageous effects as those of the information carrier manufacturing method according to the first embodiment.
0089A seventh example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>g </i>according to the seventh exemplary embodiment by using a single sheet of the strip material <b>43</b> shown in <figref idref="DRAWINGS">FIG. 20</figref>. At first, the IC elements <b>1</b> are positioned to be accommodated within recesses <b>30</b>, respectively, which are formed in the strip material <b>43</b> and then the IC elements are bonded to the bottom surfaces of the recesses <b>30</b>, respectively, by using the adhesive layers <b>32</b>, respectively. In succession, the recesses <b>30</b> in which the above-mentioned IC elements <b>1</b> are accommodated are each filled with the potting resin <b>31</b> to thereby obtain the strip material <b>43</b> having the IC elements <b>1</b> embedded therein. Finally, this strip material <b>43</b> is cut into segments each of a predetermined shape to obtain the information carriers <b>20</b><i>g </i>according to the seventh exemplary embodiment. The instant example of the information carrier manufacturing method equally presents similar advantageous effects as those of the information carrier manufacturing method according to the first embodiment.
0090An eighth example of the information carrier manufacturing method according to the present invention is destined for manufacturing the information carrier <b>20</b><i>h </i>according to the eighth exemplary embodiment by using a single sheet of the strip material <b>44</b> shown in <figref idref="DRAWINGS">FIG. 21</figref>. At first, the IC elements <b>1</b> are positioned to be accommodated within the first recesses <b>30</b>, respectively, which are formed in the strip material <b>43</b> and then the IC elements are bonded to the bottom surfaces of the recesses <b>30</b>, respectively, by using the adhesive layers <b>32</b>, respectively, while the booster coils <b>28</b> are accommodated within the second ring-like recesses <b>29</b>, respectively, which are formed in the strip material <b>44</b> and then the booster coils are bonded to the bottom surfaces of the recesses <b>29</b> by using the adhesive layers <b>32</b>, respectively. In succession, the first recesses <b>30</b> in which the above-mentioned IC elements <b>1</b> are accommodated and the second recesses <b>29</b> in which the above-mentioned booster coils <b>28</b> are accommodated are each filled with the potting resin <b>31</b> to thereby obtain the strip material <b>43</b> having the IC elements <b>1</b> and the booster coils <b>28</b> embedded therein. Finally, this strip is cut into segments each of a predetermined shape to obtain the information carriers <b>20</b><i>h </i>according to the eighth exemplary embodiment. The instant example of the information carrier manufacturing method equally presents similar advantageous effects as those of the information carrier manufacturing method according to the first embodiment.
0091Incidentally, in the second, fourth, sixth and eighth exemplary embodiments described above, the booster coil <b>28</b> is formed separately or independently from the substrate <b>21</b>, the booster coil <b>28</b> may be formed by printing on any one of the strip materials constituting the substrate <b>21</b>.
INDUSTRIAL APPLICABILITY
0092As is apparent from the foregoing description, in the IC element according to the present invention, the electric conductor of the coil formed integrally with the IC element is implemented in a multilayer structure including the metal-sputtered layer or alternatively metal-evaporated layer and the metal-plated layer. Thus, when compared with the IC element in which the electric conductor is formed only of the metal-sputtered layer or alternatively metal-evaporated layer, loss of the electromagnetic energy can be reduced, which can contribute to stabilization of electric power reception from the reader/writer, stabilization of communication with the reader/writer and extension of the communication range relative to the reader/writer.
0093In the IC element manufacturing method according to the present invention, a large number of coils corresponding to the individual IC elements, respectively, can simultaneously be formed in the finished wafer instead of forming the coil in each of the IC elements. Thus, the IC element formed internally with the coil can be manufactured with high efficiency, as a result of which this sort of IC element can be manufactured at low cost.
0094In the information carrier according to the present invention, the IC element formed integrally with the coil is disposed at a center portion of the substrate as viewed in the planar direction, i.e., perpendicularly to the plane of the substrate. Thus, the center of the coil formed integrally with the IC element and that of the antenna coil of the reader/writer can easily be aligned with each other, which means that the electromagnetic coupling coefficient between both the coils is increased, whereby the electric power supply to the information carrier from the reader/writer as well as the signal transmission/reception between the reader/writer and the information carrier can be stabilized.
0095In the information carrier manufacturing method according to the present invention, the unitary strip in which the required parts to be mounted inclusive of the IC elements are mounted on the strip material is manufactured, whereon the concerned information carriers are formed by punching the unitary strip. Thus, the identical information carriers can be manufactured with high efficiency, whereby the cost involved in manufacturing the information carriers each incorporating the IC element can be reduced.
Contents5
12 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US8392011B2 | Cited by | United States of America | Search report |
| US2016078998A1 | Cited by | United States of America | Pre-grant |
| US7566010B2 | Cited by | United States of America | Applicant |
| US2008309581A1 | Cited by | United States of America | Pre-grant |
| US9935363B2 | Cited by | United States of America | Applicant |
| US7632721B2 | Cited by | United States of America | Search report |
| US2010270868A1 | Cited by | United States of America | Pre-grant |
| US2011212575A1 | Cited by | United States of America | Pre-grant |
| US2007162175A1 | Cited by | United States of America | Pre-grant |
| US7857229B2 | Cited by | United States of America | Applicant |
| US2008252531A1 | Cited by | United States of America | Pre-grant |
| US2005146006A1 | Cited by | United States of America | Pre-grant |
| US7566640B2 | Cited by | United States of America | Applicant |
| US2011089427A1 | Cited by | United States of America | Pre-grant |
| US8202238B2 | Cited by | United States of America | Applicant |
| US8174349B2 | Cited by | United States of America | Search report |
| US8698697B2 | Cited by | United States of America | Applicant |
| US7750852B2 | Cited by | United States of America | Applicant |
| US2005148121A1 | Cited by | United States of America | Pre-grant |
| US2011068385A1 | Cited by | United States of America | Pre-grant |
| US2010059748A1 | Cited by | United States of America | Pre-grant |
| US7271076B2 | Cited by | United States of America | Applicant |
| US8662402B2 | Cited by | United States of America | Applicant |
| US2007161159A1 | Cited by | United States of America | Pre-grant |
| US8083153B2 | Cited by | United States of America | Applicant |
| US7465647B2 | Cited by | United States of America | Applicant |
| US8227851B2 | Cited by | United States of America | Search report |
| US2015145736A1 | Cited by | United States of America | Pre-grant |
| US2017110237A1 | Cited by | United States of America | Search report |
| US2008009125A1 | Cited by | United States of America | Pre-grant |
| US2010157565A1 | Cited by | United States of America | Pre-grant |
| US9543651B2 | Cited by | United States of America | Search report |
| US11024454B2 | Cited by | United States of America | Search report |
| US8685835B2 | Cited by | United States of America | Applicant |
| US8384601B2 | Cited by | United States of America | Applicant |
| US8111198B2 | Cited by | United States of America | Applicant |
| EP0977145A2 | Cites | European Patent Office (EPO) | Applicant |
| US2001002874A1 | Cites | United States of America | Applicant |
| US2001044013A1 | Cites | United States of America | Applicant |
| DE3721822C1 | Cites | Germany | Applicant |
| US4483067A | Cites | United States of America | Applicant |
| US4960983A | Cites | United States of America | Search report |
| US5048179A | Cites | United States of America | Applicant |
| US5308967A | Cites | United States of America | Applicant |
| US5399847A | Cites | United States of America | Applicant |
| US5424527A | Cites | United States of America | Applicant |
| US5598032A | Cites | United States of America | Applicant |
| US5710458A | Cites | United States of America | Applicant |
| US5837992A | Cites | United States of America | Applicant |
| US5852289A | Cites | United States of America | Applicant |
| US5856662A | Cites | United States of America | Applicant |
| US6049461A | Cites | United States of America | Applicant |
| US6160526A | Cites | United States of America | Applicant |
| US6176010B1 | Cites | United States of America | Applicant |
| US6392297B2 | Cites | United States of America | Search report |
| WO9208209A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9208209A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9826939A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9826939A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9833142A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9833142A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9852772A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9852772A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9859318A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| WO9859318A1 | Cites | World Intellectual Property Organization (WIPO) | Applicant |
| JPH07161935A | Cites | Japan | Applicant |
| JPH08222695A | Cites | Japan | Search report |
| JPH10203061A | Cites | Japan | Applicant |
| JPH10302040A | Cites | Japan | Applicant |
| JPH10320519A | Cites | Japan | Applicant |
| JPH1117443A | Cites | Japan | Applicant |
| JPH1117443A | Cites | Japan | Applicant |
| US6392297B1 | Cites | United States of America | Search report |
| US20010002874A1 | Cites | United States of America | Third party observation |
| US20010044013A1 | Cites | United States of America | Third party observation |
| DE3721822C1 | Cites | Germany | Third party observation |
| EP977145A2 | Cites | European Patent Office (EPO) | Third party observation |
| JP7161935A | Cites | Japan | Third party observation |
| JP8222695 | Cites | Japan | Search report |
| JP10203061 | Cites | Japan | Third party observation |
| JP10302040 | Cites | Japan | Third party observation |
| JP10320519 | Cites | Japan | Third party observation |
| JP1117443 | Cites | Japan | Third party observation |
| JP1117443A | Cites | Japan | Third party observation |
| WO9208209A | Cites | World Intellectual Property Organization (WIPO) | Third party observation |
| WO9826939A1 | Cites | World Intellectual Property Organization (WIPO) | Third party observation |
| WO9833142A1 | Cites | World Intellectual Property Organization (WIPO) | Third party observation |
| WO9852772A1 | Cites | World Intellectual Property Organization (WIPO) | Third party observation |
| WO9859318A1 | Cites | World Intellectual Property Organization (WIPO) | Third party observation |
| Patent Abstracts of Japan, vol. 1996, No. 12, Dec. 26, 1996. | Non-patent | – | Third party observation |
| Patent Abstracts of Japan, vol. 1998, No. 11, Sep. 30, 1998. | Non-patent | – | Third party observation |
| Patent Abstracts of Japan, No. 08222695, (Aug. 30, 1996). | Non-patent | – | Third party observation |
| Patent Abstracts of Japan, No. 61094339, (May 13, 1986). | Non-patent | – | Third party observation |
| Patent Abstracts of Japan, No. 61016591, (Jan. 24, 1986). | Non-patent | – | Third party observation |
| Merriam-Webster Online Dictionary, www.m-w.com. | Non-patent | – | Third party observation |
| Patent Abstracts of Japan, vol. 1996, No. 12, Dec. 26, 1996. | Non-patent | – | Applicant |
| Patent Abstracts of Japan, vol. 1998, No. 11, Sep. 30, 1998. | Non-patent | – | Applicant |
| Patent Abstracts of Japan, No. 08222695, (Aug. 30, 1996). | Non-patent | – | Applicant |
| Patent Abstracts of Japan, No. 61094339, (May 13, 1986). | Non-patent | – | Applicant |
| Patent Abstracts of Japan, No. 61016591, (Jan. 24, 1986). | Non-patent | – | Applicant |
23 members in 8 offices
Priority claims6
| Document | Office | Kind | Date |
|---|---|---|---|
| 11046545 | Japan | – | |
| 4654599 | Japan | A | |
| 11059753 | Japan | – | |
| 5975399 | Japan | A | |
| 0001029 | Japan | W | |
| 91407701 | United States of America | A |
Members23
| Document | Office | Kind | |
|---|---|---|---|
| WO0051181A1 | World Intellectual Property Organization (WIPO) | A1 | |
| AU2690400A | Australia | A | |
| JP2000323643A | Japan | A | |
| KR20020005596A | Republic of Korea | A | |
| EP1193759A1 | European Patent Office (EPO) | A1 | |
| JP2002319012A | Japan | A | |
| JP2002324890A | Japan | A | |
| JP3347138B2 | Japan | B2 | |
| JP2002343877A | Japan | A | |
| EP1193759A4 | European Patent Office (EPO) | A4 | |
| CN1520612A | China | A | |
| EP1455302A1 | European Patent Office (EPO) | A1 | |
| EP1193759B1 | European Patent Office (EPO) | B1 | |
| DE60014377D1 | Germany | D1 | |
| US2005051872A1 | United States of America | A1 | |
| DE60014377T2 | Germany | T2 | |
| US7129145B2This record | United States of America | B2 | |
| KR100694561B1 | Republic of Korea | B1 | |
| EP1455302B1 | European Patent Office (EPO) | B1 | |
| DE60036496D1 | Germany | D1 | |
| DE60036496T2 | Germany | T2 | |
| JP4363735B2 | Japan | B2 | |
| CN102254865A | China | A |
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| Expire PatentEXP. | EXP. | |
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| Post Issue Communication - Certificate of CorrectionN423 | N423 | |
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| Issue Fee Payment VerifiedN084 | N084 | |
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| Mail Miscellaneous Communication to ApplicantMM327 | MM327 | |
| Miscellaneous Communication to Applicant - No Action CountM327 | M327 | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Mail Notice of AllowanceAllowedMN/=. | MN/=. | |
| Notice of Allowance Data Verification CompletedAllowedN/=. | N/=. | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Non-Final ActionA... | A... | |
| Request for Extension of Time - GrantedXT/G | XT/G | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Transfer Inquiry to GAUTI1050 | TI1050 | |
| Preliminary AmendmentA.PE | A.PE | |
| Workflow incoming amendment IFWWAMD | WAMD | |
| Mail Non-Compliant Preliminary AmendmentMNPRL | MNPRL | |
| IFW TSS Processing by Tech Center CompleteTSSCOMP | TSSCOMP | |
| Non-Compliant Preliminary AmendmentNPRL | NPRL | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Application Return from OIPEWROIPE | WROIPE | |
| Application Return TO OIPEROIPE | ROIPE | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Application Is Now CompleteCOMP | COMP | |
| Cleared by OIPE CSRL194 | L194 | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Reference capture on IDSRCAP | RCAP | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Preliminary AmendmentA.PE | A.PE | |
| Initial Exam Team nnIEXX | IEXX |
8 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Lapsed due to failure to pay maintenance feeLapsedFP | FP | |
| Lapse for failure to pay maintenance feesLapsedPATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYLAPS | LAPS | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Fee payment procedureMAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.)FEPP | FEPP | |
| Fee paymentFPAY | FPAY | |
| Fee paymentFPAY | FPAY | |
| Fee payment procedurePAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
| Certificate of correctionCC | CC |
Numbers
- Publication
- 7129145
- Application
- 10969902
Titles
- English
- Method of manufacturing an IC coil mounted in an information carrier
Patent term adjustment
- Applicant delay
- −139 days
- Net adjustment
- 0 days
Classification
- CPC, 5
- G06K19/07749
- G06K19/07775
- G06K19/07779
- H10W70/699
- H10W20/497
- IPC, 5
- H01L21 20
- G06K19 077
- H01L23 498
- H01L23 522
- H10D89 00