Semiconductor apparatus with misalignment mounting detection
Summary by NHIP
Semiconductor misalignment detection
The apparatus detects mounting misalignment by establishing an electrical path through contact terminals when a semiconductor device sits correctly on a substrate. Distinctive features include detection terminals spaced apart on either the device surface or substrate, creating a conductive route through multiple contact terminal pairs.
Claim Score by NHIP
Abstract
A semiconductor apparatus includes a wiring substrate and a semiconductor device to be mounted at a proper mounting position on the wiring substrate. The wiring substrate has two contact terminals in electrical contact with each other. The semiconductor device has two contact terminals in electrical contact with each other and two detection-utility terminals respectively in electrical contact with the contact terminals of the semiconductor device. The contact terminals of the wiring substrate are located at positions so that they come in electrical contact with the corresponding contacts of the semiconductor device.

Term
Term ended
Expired 25 October 2021, 4.9 years ago.
- Priority
- Filed
- Granted
- Expired
- Today
9 claims: 3 independent, 6 dependent
- 1A semiconductor apparatus comprising:a semiconductor device having a wiring substrate on which said semiconductor device is mounted, said semiconductor device having opposed first and second surfaces;a first pair of contact terminals on said second surface of said semiconductor device and a second pair of contact terminals on said wiring substrate, said first and second pairs of contact terminals being positioned to come into electrical contact with each other;and a pair of spaced apart detection terminals on one of said first surface of said semiconductor device and said wiring substrate, wherein said first and second contact terminal pairs are in contact with each other when said semiconductor device is in a regular mounting position on said wiring substrate and an electrically conductive path is established between said detection terminals through said first and second pairs of contact terminals.
- 4A semiconductor apparatus comprising:a semiconductor device having a wiring substrate on which said semiconductor device is mounted, said semiconductor device having opposed first and second surfaces;a first pair of contact terminals on said second surface of said semiconductor device and a second pair of contact terminals on said wiring substrate, said first and second pairs of contact terminals being positioned to come into electrical contact with each other;and a pair of spaced apart detection terminals on said first surface of said semiconductor device, wherein said first and second contact terminal pairs are in contact with each other when said semiconductor device is in a regular mounting position on said wiring substrate and an electrically conductive path is established between said detection terminals through said first and second pairs of contact terminals.
- 7Broadest claimClaim Score 55, average(NHIP)A semiconductor apparatus comprising:a semiconductor device having a wiring substrate on which said semiconductor device is mounted, said semiconductor device having opposed first and second surfaces;a first pair of contact terminals on said second surface of said semiconductor device and a second pair of contact terminals on said wiring substrate, said first and second pairs of contact terminals being positioned to come into electrical contact with each other;and a pair of spaced apart detection terminals on said wiring substrate, wherein said first and second contact terminal pairs are in contact with each other when said semiconductor device is in a regular mounting position on said wiring substrate and an electrically conductive path is established between said detection terminals through said first and second pairs of contact terminals.
Independent claims3
45 paragraphs in 5 sections, as filed
FIELD OF THE INVENTION
The present invention relates to a semiconductor apparatus comprising a semiconductor device mounted on a wiring substrate. Moreover, this invention relates to a method of and apparatus for mounting a semiconductor-device.
BACKGROUND OF THE INVENTION
When mounting a semiconductor device such as a flip chip or a BGA (Ball Grid Array) onto a wiring substrate, it is difficult to position the device against the wiring substrate while visually checking. The reason for this is that the functional electrode sections, such as bumps and conductor pads on the surface of the wiring substrate, which are to be connected to each other, are both hidden. If the semiconductor device is mounted on the wiring substrate in a misaligned position, the desired functioning cannot be expected from the semiconductor device and extensive repairs involving replacement will be required.
The following methods are known conventionally that try to solve the above problem. This is, a method wherein positioning slots (i.e., slots used when positioning is performed) or positioning projections (i.e., projections used when positioning is performed) are provided on the conductor pads of the wiring substrate, a method wherein the functional electrodes of the semiconductor device has special shapes, and a method wherein the misalignment is detected by placing a through-hole in the semiconductor device. However, these methods require separate manufacturing processes and different equipment for manufacturing the conductor pads plus the functional electrode section and for configuring the through-holes, causing the manufacturing costs to increase remarkably. Moreover, in the latter method, because the manufacturing process for making the through-holes differs from that for configuring the functional electrode sections of the semiconductor devices, misalignment of the through-holes and the functional electrode section is caused, with a possibility of decreasing the mounting accuracy of the semiconductor device.
Conventionally, there is also known a semiconductor device comprising misalignment-detection electrodes (i.e., electrodes used for detection of misalignment) near the functional electrode sections (see, for example, Japanese Laid Open Patent Application No. 10-335401). The misalignment of the misalignment-detection electrodes and the functional electrode sections is detected by determining whether there is electrical conductivity between the misalignment-detection electrodes and the conductor pads of the wiring substrate. In this method, there are advantages that the production cost does not increase or the mounting accuracy does not decrease due to misalignment of the functional electrodes and the misalignment-detection electrodes because the misalignment-detection electrodes can be configured with the same manufacturing process as that of the functional electrode section of the semiconductor device.
In the conventional art, when there is electrical conductivity between the misalignment-detection electrodes on the semiconductor device and the conductor pads on the wiring substrate, it is determined that there is misalignment in the semiconductor device and the wiring substrate. Conversely, when there is no electrical conductivity between the misalignment-detection electrodes on the semiconductor device and the conductor pads on the wiring substrate, it is determined that there is proper alignment between the semiconductor device and the wiring substrate. Obviously, misalignment cannot be detected when, for example, there is a loose connection between the misalignment-detection electrodes and the conductor pads. Moreover, a wrong detection determination that the semiconductor device and wiring substrate are positioned accurately can be made even when the connection is not loose, if, for example, the mounting position of the semiconductor device against the wiring substrate is misaligned greatly. As a result, even when there is misalignment in the semiconductor device and the wiring substrate, it cannot be corrected and repairs involving replacement will be required.
SUMMARY OF THE INVENTION
It is an object of this invention to provide a semiconductor apparatus, a method of and apparatus for mounting a semiconductor-device in which accurate and infallible detection as well as correction of misalignment in the semiconductor device and the wiring substrate can be made.
The semiconductor apparatus according to a one aspect of this invention comprises a wiring substrate and a semiconductor device to be mounted on the wiring substrate. Moreover, a pair of contact terminals provided in between the semiconductor device and the wiring substrate, which can come in electrical contact with each other. In addition, a pair of detection terminals on one of the semiconductor device and the wiring substrate in such a manner that they are spaced apart, or a pair of detection terminals placed separately on the semiconductor device and the wiring substrate. The contact terminal pairs are made to come in contact with each other when the semiconductor device is in line with the regular mounting position on the wiring substrate and there is an electrical conductivity between the detection terminals of the pair through these contact terminal pairs.
In the method of mounting a semiconductor-device on a wiring substrate according to another aspect of this invention, the semiconductor-device and the wiring substrate have a pair of contact terminals that come in electrical contact with each other when the semiconductor-device is mounted on a regular mounting position on the wiring substrate. The method comprises the step of positioning the semiconductor device on the wiring substrate according to the electrical conductivity between the pair of contact terminals due to a mutual contact between the pair of contact terminals.
In the apparatus for mounting a semiconductor-device on a wiring substrate according to still another aspect of this invention, the semiconductor-device and the wiring substrate have a pair of contact terminals that come in electrical contact with each other when the semiconductor-device is mounted on a regular mounting position on the wiring substrate. This apparatus comprises a determination unit which determines whether there is an electrical conductivity between the pair of contact terminals; a relative-position shifting-unit which alters the relative positions of the semiconductor-device and the wiring substrate; and a control unit which controls the relative-position shifting-unit to alter the relative positions of the semiconductor-device and the wiring substrate until the determination unit determine establishment of electrical conductivity between the pair of contact terminals.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows a configuration of a semiconductor apparatus according to a first embodiment of the present invention, and in particular, the top part in this figure shows a conceptual diagram of the reverse side of a semiconductor device, and the bottom part shows a conceptual diagram of the top surface of a wiring substrate.
FIG. 2A to FIG. 2D show the method of mounting the semiconductor device against the wiring substrate in the semiconductor apparatus shown in FIG. 1, and, in particular, FIG. 2A shows a conceptual profile of a state just before mounting, FIG. 2B shows a conceptual profile of a state of mounting in a regular mounting position, FIG. 2C shows a conceptual profile of a state in which misalignment is caused, and FIG. 2D shows an alternative to the arrangement of FIG. <b>2</b>B.
FIG. 3A to FIG. 3D show a configuration of a semiconductor apparatus according to a second embodiment of the present invention and, in particular, FIG. 3A shows a conceptual diagram of the surface of a semiconductor device, FIG. 3B shows a conceptual diagram of the reverse side of the semiconductor device, FIG. 3C shows a conceptual diagram of the top surface of a wiring substrate, and FIG. 3D shows a conceptual profile of a state of mounting in a regular mounting position.
FIG. 4 is a table that shows the relationship between the state of a detection circuit and the mounting position.
FIG. 5A shows a conceptual diagram of a configuration of a semiconductor-device mounting-apparatus <b>30</b> according to a third embodiment of the present invention, FIG. 5B shows a conceptual diagram of a state just before mounting, FIG. 5C shows a conceptual diagram of a state of mounting in a regular mounting position.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Embodiments of a semiconductor apparatus, a method of and apparatus for mounting a semiconductor-device according to the present invention will be explained in detail while referring to accompanying drawings.
FIG. 1 shows a configuration of a semiconductor apparatus according to a first embodiment of the present invention. FIG. 2A to FIG. 2C show a mounting method of a semiconductor device against a wiring substrate in the semiconductor apparatus shown in FIG. <b>1</b>. The semiconductor apparatus exemplified here is configured so that desired functions are provided, comprising a flip chip or BGA semiconductor device <b>20</b> mounted in a mounting position on the wiring substrate <b>10</b>, and a functional electrodes <b>21</b> of the semiconductor device <b>20</b> electrically connected to respective conductor pads <b>11</b> of the wiring substrate <b>10</b>. As shown in FIG. <b>1</b> and FIG. 2A, while the semiconductor device <b>20</b> comprises a pair of detection terminals <b>22</b> and <b>23</b> and device contact terminals <b>24</b> and <b>25</b>, the wiring substrate <b>10</b> comprises substrate contact terminals <b>12</b> and <b>13</b>.
The detection terminals <b>22</b> and <b>23</b> are spaced apart on the surface of the semiconductor device <b>20</b> and laid out protruded in positions parallel to each other. The device terminals <b>24</b> and <b>25</b> are laid out protruded in positions surrounding the functional electrodes <b>21</b> on the reverse side of the semiconductor device <b>20</b>. In the first embodiment, the device terminals <b>24</b> and <b>25</b> are provided in two positions that lie on a diagonal line of the semiconductor device <b>20</b>. Although the detection terminal <b>22</b> and the device terminal <b>24</b> are individually provided here, the configuration is not necessarily restricted to this example, that is, one of these terminals may be provided so that it perforates through the semiconductor device <b>20</b>, wherein the perforated end will function as the other one of these terminals.
On the other hand, substrate contact terminals <b>12</b> and <b>13</b> are provided in the mounting position of the wiring substrate <b>10</b>, protruded in positions surrounding the conductor pad <b>11</b>. In the first embodiment, the substrate contact terminals <b>12</b> and <b>13</b> are provided in two positions where they are able to come in contact with the device terminals <b>24</b> and <b>25</b> of the semiconductor device <b>20</b> when the semiconductor device <b>20</b> is in line with the regular mounting position, that is, when the all the functional electrodes <b>21</b> match the corresponding conductor pads <b>11</b> on the wiring substrate <b>10</b>.
In the semiconductor apparatus, the semiconductor device <b>20</b> and the wiring substrate <b>10</b> comprise detection wirings <b>26</b> and <b>14</b> respectively. These detection wirings <b>26</b> and <b>14</b> are configured in the semiconductor device <b>20</b> and the wiring substrate <b>10</b>, so that they constitute a detection circuit <b>130</b> (see FIG. 2B) wherein there is an electrical conductivity between the single pair of detection terminals <b>22</b> and <b>23</b> through the device contact terminals <b>24</b> and <b>25</b> and the substrate contact terminals <b>12</b> and <b>13</b> when the semiconductor device <b>20</b> is in line with the regular mounting position of the wiring substrate <b>10</b>.
In the semiconductor apparatus configured as above, when the semiconductor device <b>20</b> is in line with the regular mounting position against the wiring substrate <b>10</b>, there is an electrical conductivity between the single pair of detection terminals <b>22</b> and <b>23</b> on the semiconductor device <b>20</b> through device terminals <b>24</b> and <b>25</b>, substrate contact terminals <b>12</b> and <b>13</b>, and the detection wirings <b>26</b> and <b>14</b> which come in contact with each other. Thus, accurate positioning of the semiconductor device <b>20</b> and the wiring substrate <b>10</b> will be possible as shown in FIG. 2B, by performing a continuity test between the single pair of detection terminals <b>22</b> and <b>23</b>, without performing any function tests on the semiconductor apparatus.
Moreover, it becomes electrically conductive between the pair of detection terminals <b>22</b> and <b>23</b> only when all the functional electrodes <b>21</b> and the corresponding conductor pads <b>11</b> on the wiring substrate <b>10</b> match each other. For example, when either of the device terminals <b>24</b> and <b>25</b>, the substrate contact terminals <b>12</b> and <b>13</b> and the detection terminals <b>22</b> and <b>23</b> has a loose connection, or when the mounting position of the semiconductor device <b>20</b> against the wiring substrate <b>10</b> is misaligned greatly as shown in FIG. 2C, electricity is not able to conduct between the single pair of detection terminals <b>22</b> and <b>23</b>. Therefore, in the above situations, a wrong detection, detecting that they are accurately positioned, will not be made and accurate and infallible detection of misalignment will be achieved.
The detection terminal <b>22</b> and <b>23</b> on the semiconductor device <b>20</b>, the device terminals <b>24</b>, <b>25</b> and the detection wiring <b>26</b> can all be manufactured by the same process as that of the functional electrodes <b>21</b> and its wiring. In addition, the substrate contact terminals <b>12</b> and <b>13</b> on the wiring substrate <b>10</b> and the detection wiring <b>14</b> can all be manufactured by the same process as that of the conductor pads <b>11</b> and its wiring. As a result, there is no possibility of problems of production costs nor problems such as decrease in mounting accuracy due to misalignment in the functional electrodes <b>21</b> and the device terminals <b>24</b> and <b>25</b> and misalignment in the conductor pad <b>11</b> and the substrate contact terminals <b>12</b> and <b>13</b>.
In the first embodiment, although the single pair of detection terminals <b>22</b> and <b>23</b> are placed only on the semiconductor device <b>20</b>, similar effects can be expected even when the single pair of detection terminals are provided only on the wiring substrate <b>10</b> as shown FIG. 2D, or are on each of the semiconductor device <b>20</b> and the wiring substrate <b>10</b>.
A second embodiment of the present invention will now be explained. In the first embodiment, one detection circuit <b>130</b> is provided amongst the semiconductor device <b>20</b> and the wiring substrate <b>10</b>. However, in the second embodiment, two detection circuits will be provided amongst a semiconductor device and a wiring substrate.
FIG. 3A to FIG. 3D are conceptual diagrams showing the configuration of a semiconductor apparatus according to the second embodiment of the present invention. The semiconductor apparatus exemplified here, like the first embodiment, comprises a flip chip or BGA semiconductor device <b>120</b> mounted in a mounting position on a wiring substrate <b>110</b> wherein desired functions are provided, comprising conductor pads <b>111</b> on the wiring substrate <b>110</b> which are electrically connected to functional electrodes <b>121</b> of the semiconductor device <b>120</b> respectively. While the semiconductor device <b>120</b> comprises detection terminal <b>122</b>, <b>123</b>, and <b>124</b>, and device contact terminals <b>125</b>, <b>126</b> and <b>127</b>, the wiring substrate <b>110</b> comprises substrate contact terminals <b>112</b>, <b>113</b> and <b>114</b>.
The detection terminals <b>122</b>, <b>123</b> and <b>124</b> are spaced apart on the surface of the semiconductor device <b>120</b>, and are laid out protruded in positions parallel to each other. The device contact terminals <b>125</b>, <b>126</b> and <b>127</b> are laid out protruded in positions surrounding the functional electrodes <b>121</b> on the reverse side of the semiconductor device <b>120</b>. In the second embodiment, the device contact terminals <b>125</b>, <b>126</b> and <b>127</b> are provided respectively in total of three positions, a position corresponding to the detection terminal <b>122</b> in the center and positions that are in the corners away from the detection terminal <b>122</b>. Although the detection terminal <b>122</b> and the device terminals <b>125</b> are provided individually here, the configuration is not necessarily restricted to this example, that is, one of these terminals may be provided so that it perforates through the semiconductor device <b>120</b>, wherein the perforated end will function as the other one of these terminals.
On the other hand, the substrate contact terminals <b>112</b>, <b>113</b> and <b>114</b> are laid out protruded in positions surrounding the conductor pads <b>111</b> in the mounting position on the wiring substrate <b>110</b>. In the second embodiment, the substrate contact terminals <b>112</b>, <b>113</b> and <b>114</b> are provided in three positions where they are able to come in electrical contact with the device contact terminals <b>125</b>, <b>126</b> and <b>127</b> on the semiconductor device <b>120</b> when the semiconductor device <b>120</b> is in line with the regular mounting position, that is, when all the functional electrodes <b>121</b> respectively matches the corresponding conductor pads <b>111</b> on the wiring substrate <b>110</b>.
In the semiconductor apparatus, the semiconductor device <b>120</b> and the wiring substrate <b>110</b> comprise detection wiring <b>128</b>, <b>129</b> and <b>115</b> respectively. As shown in FIG. 3D, the detection wiring <b>128</b>, <b>129</b>, and <b>115</b> are configured on the semiconductor device <b>120</b> and the wiring substrate <b>110</b> so that the following detection circuits are provided when the semiconductor device <b>120</b> is in line with the regular mounting position of the wiring substrate <b>110</b>. In the first detection circuit, there is an electrical conductivity between the detection terminal <b>122</b> in the center and the detection terminal <b>123</b> on one side of it through the two pairs of the device contact terminals <b>125</b> and <b>126</b> and the substrate contact terminals <b>112</b> and <b>113</b>. In the second detection circuit <b>132</b>, there is an electrical conductivity between the detection terminal <b>122</b> in the center and the detection terminal <b>124</b> on the other side of it through the two pairs of the device contact terminals <b>125</b> and <b>127</b> and the substrate contact terminals <b>112</b> and <b>114</b>.
According to the semiconductor apparatus configured as above, there is an electrical conductivity between the detection terminals in pairs when the semiconductor device <b>120</b> is mounted in line with the regular mounting position against the wiring substrate <b>110</b>. There is an electrical conductivity between the detection terminal <b>122</b> in the center of the semiconductor device <b>120</b> and the detection terminal <b>123</b> on one side of it through the device contact terminals <b>125</b> and <b>126</b>, the substrate contact terminals <b>112</b> and <b>113</b> as well as the detection wirings <b>128</b> and <b>115</b> which are respectively in contact with each other. There is also an electrical conductivity between the detection terminal <b>122</b> in the center and the detection terminal <b>124</b> on the other side of it through the device contact terminals <b>125</b> and <b>127</b>, the substrate contact terminals <b>112</b> and <b>114</b> as well as the detection wiring <b>129</b> and <b>115</b> which are respectively in contact with each other. Therefore, accurate positioning of the semiconductor device <b>120</b> and the wiring substrate <b>110</b> will be possible by performing a continuity test between the detection terminals <b>122</b> and <b>123</b> as well as <b>122</b> and <b>124</b>, without performing any function tests on the semiconductor apparatus.
In this case, the positioning can be done even more accurately than in the first embodiment because the electrical conductivity amongst the 2 detection terminal pairs, between the detection terminals <b>122</b> and <b>123</b> as well as <b>122</b> and <b>124</b>, is tested. Moreover, multi-step positioning becomes possible when, for example, the sizes (outside diameters) of the device contact terminals <b>125</b>, <b>126</b> and <b>127</b> as well as the substrate contact terminals <b>112</b>, <b>113</b> and <b>114</b> are made smaller than the functional electrodes <b>121</b> and further, the sizes (outside diameters) of the device contact terminal <b>127</b> and the substrate contact terminals <b>114</b> which are placed in one corner are made smaller than the device contact terminal <b>125</b> and the substrate contact terminal <b>112</b> which are in position corresponding to the detection terminal <b>122</b> in the center, as well as the device contact terminal <b>126</b> and the substrate contact terminal <b>113</b> which are in the other corner. In other words, as shown in FIG. 4, an approximate positioning can be done according to the electrical conductivity between the detection terminal <b>122</b> in the center and the detection terminal <b>123</b> on one side of it, followed by a highly accurate positioning which can be done according to the electrical conductivity between the detection terminal <b>122</b> in the center and the detection terminal <b>124</b> on the other side of it.
Moreover, there is electrical conductivity between the detection terminals <b>122</b> and <b>123</b> as well as <b>122</b> and <b>124</b> respectively only when all the functional electrodes <b>121</b> match the corresponding conductor pads <b>111</b> on the wiring substrate <b>110</b>. For example, when there is loose connection in any one of the device contact terminals <b>125</b>, <b>126</b> and <b>127</b>, the substrate contact terminals <b>112</b>, <b>113</b> and <b>114</b>, and the detection terminals <b>122</b>, <b>123</b> and <b>124</b>, or when the mounting position of the semiconductor device <b>120</b> against the wiring substrate <b>110</b> is misaligned greatly, there is no electrical conductivity between the detection terminals <b>122</b> and <b>123</b> as well as <b>122</b> and <b>124</b>. Therefore, in the above situations, there is no possibility of a wrong detection, determining that they are accurately positioned, and thus accurate and infallible detection of misalignment in the semiconductor device <b>120</b> and the wiring substrate <b>110</b> will be achieved.
In addition, the detection terminals <b>122</b>, <b>123</b> and <b>124</b> on the semiconductor device <b>120</b>, the device contact terminals <b>125</b>, <b>126</b> and <b>127</b> as well as the detection wirings <b>128</b>, <b>129</b> and <b>115</b> can be all manufactured by the same process as that of the functional electrodes <b>121</b> and its wiring. The substrate contact terminals <b>112</b>, <b>113</b> and <b>114</b> on the wiring substrate <b>110</b> and the detection wirings <b>128</b>, <b>129</b> and <b>115</b> can be all made by the same manufacturing process as that of the conductor pad <b>111</b> and its wiring. As a result, there is no possibility of problems of production costs nor problems such as decrease in mounting accuracy due to misalignment in the functional electrodes <b>121</b> and the device contact terminals <b>125</b>, <b>126</b> and <b>127</b> as well as misalignment in the conductor pad <b>111</b> and the substrate contact terminals <b>112</b>, <b>113</b> and <b>114</b>.
In the second embodiment, although the detection terminals <b>122</b>, <b>123</b> and <b>124</b> are provided only on the semiconductor device <b>120</b>, similar effects can be expected even when it is provided on the wiring substrate <b>110</b> instead, or on both the semiconductor device <b>120</b> as well as the wiring substrate <b>110</b>.
FIG. 5A to FIG. 5C show conceptually the configuration of a semiconductor-device mounting-apparatus according to a third embodiment of the present invention. The semiconductor-device mounting-apparatus <b>30</b> exemplified here is applicable to the semiconductor apparatuses according to the first and the second embodiments. The apparatus is used for mounting the semiconductor devices <b>20</b> and <b>120</b> in an attached state, into mounting positions of the wiring substrates <b>10</b> and <b>110</b>. The following explanation will be made on its application to the semiconductor apparatus shown in the first embodiment.
As shown in FIG. 5A, when the semiconductor-device mounting-apparatus <b>30</b> comprises of detection probes <b>31</b> and <b>32</b>, a determination circuit <b>33</b>, an actuator <b>34</b> and a controller <b>35</b>.
As shown in FIG. 5B, when detection probes <b>31</b> and <b>32</b> are attached to the semiconductor device <b>20</b>, the probes come in electrical contact with detection terminals <b>22</b> and <b>23</b> on the semiconductor device <b>20</b>. The determination circuit <b>33</b> determines through the detection probes <b>31</b> and <b>32</b> whether there is electrical conductivity between the detection terminals <b>22</b> and <b>23</b> on the semiconductor device <b>20</b>. The actuator <b>34</b> shifts accordingly the relative position of the semiconductor device <b>20</b> in relation to the wiring substrate <b>10</b>. The controller <b>35</b> controls the driving of the actuator <b>34</b>, and shifts the position of the semiconductor device <b>20</b> in relation to the wiring substrate <b>10</b> so that the determination circuit <b>33</b> will determine that there is electrical conductivity.
As shown in FIG. 5C, according to the semiconductor-device mounting-apparatus <b>30</b> configured as above, the position of the semiconductor device <b>20</b> in relation to the wiring substrate <b>10</b> is altered so that there is always an electrical conductivity between the detection terminals <b>22</b> and <b>23</b>, that is, so that the device contact terminals <b>24</b> and <b>25</b> on the semiconductor device <b>20</b> and the substrate contact terminals <b>12</b> and <b>13</b> on the wiring substrate <b>10</b> are respectively in contact with each other and all the functional electrodes <b>21</b> match the corresponding conductor pads <b>11</b> on the wiring substrate <b>10</b> respectively. In other words, when positions of the device contact terminals <b>24</b> and <b>25</b> and the substrate contact terminals <b>12</b> and <b>13</b> are misaligned from each other and the determination circuit <b>33</b> does not determine that there is an electrical conductivity between the detection terminals <b>22</b> and <b>23</b>, the actuator <b>34</b> is driven according to the control signal from the controller <b>35</b> and the position of the semiconductor device <b>20</b> in relation to the wiring substrate <b>10</b> is altered so that the determination circuit will determine that determine that there is an electrical conductivity between detection terminals <b>22</b> and <b>23</b>. Therefore, the misalignment in the mounting process of the semiconductor device <b>20</b> onto the wiring substrate <b>10</b> can be accurately and infallibly detected and corrected.
When the mounting apparatus is applied to the semiconductor apparatus of the second embodiment, three detection probes are to be provided.
As explained above, according to the present invention, electrical conductivity is established between the pair of detection terminals through the contact terminal pairs only when the semiconductor device and the wiring substrate are accurately positioned. Therefore, there is no possibility of a wrong detection, determining that they are accurately positioned, and accurate and infallible detection of misalignment of the semiconductor device and the wiring substrate will be achieved when, for example, there is loose connection in the contact terminals or the detection terminals, or when the mounting position of the semiconductor device against the wiring substrate is misaligned greatly. Further, because the contact terminal pairs and the detection terminals can be manufactured by the same process as that of the functional electrodes of the semiconductor device, there is no possibility of problems of manufacturing costs nor problems such as decrease in mounting accuracy due to misalignment in the functional electrode section and the contact terminal pairs.
Moreover, the positioning of the semiconductor device and the wiring substrate can be accurately done because electrical conductivity is established amongst the pair of detection terminals only when all the plural contact terminal pairs are in contact.
According to yet another aspect of the present invention, multi-step positioning becomes possible wherein an approximate positioning is done according to the electrical conductivity amongst one of the detection terminal pairs followed by a highly accurate positioning which is done according to the electrical conductivity amongst the other detection terminal pair. This is possible because electrical conductivity is established between the detection terminals in each pair plurally provided only when the positioning of the semiconductor device and the wiring substrate is made accurately.
According to yet another aspect of the present invention, there is no possibility of a wrong detection, determining that the semiconductor device and the wiring substrate are accurately positioned, even when, for example, there is a loose connection in the contact terminal pairs or the detection terminals, or when the semiconductor device is greatly misaligned from the mounting position in relation to the wiring substrate and thus accurate and infallible detection of the misalignment will be achieved as electrical conductivity is established according to the mutual contact between the contact terminal pairs only when the semiconductor device and the wiring substrate are accurately positioned.
According to still another aspect of the present invention, misalignment in the mounting process can be accurately and infallibly detected and corrected because the relative positions of the semiconductor device and the wiring substrate are altered to make it electrically conductive between the contact terminal pairs.
Although the invention has been described with respect to a specific embodiment for a complete and clear disclosure, the appended claims are not to be thus limited but are to be construed as embodying all modifications and alternative constructions that may occur to one skilled in the art which fairly fall within the basic teaching herein set forth.
Contents5
7 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US8535955B2 | Cited by | United States of America | Applicant |
| US2006202359A1 | Cited by | United States of America | Pre-grant |
| US2007187844A1 | Cited by | United States of America | Pre-grant |
| US7525201B2 | Cited by | United States of America | Search report |
| US2011223695A1 | Cited by | United States of America | Pre-grant |
| US7915141B2 | Cited by | United States of America | Applicant |
| US2011121293A1 | Cited by | United States of America | Pre-grant |
| US2006180928A1 | Cited by | United States of America | Pre-grant |
| US2011119906A1 | Cited by | United States of America | Pre-grant |
| US2011222253A1 | Cited by | United States of America | Pre-grant |
| GB2448959B | Cited by | United Kingdom | Search report |
| US8344376B2 | Cited by | United States of America | Applicant |
| US2011210329A1 | Cited by | United States of America | Pre-grant |
| US2011164951A1 | Cited by | United States of America | Pre-grant |
| US8674523B2 | Cited by | United States of America | Applicant |
| US2011222252A1 | Cited by | United States of America | Pre-grant |
| US2003042626A1 | Cited by | United States of America | Pre-grant |
| US2010003806A1 | Cited by | United States of America | Pre-grant |
| US2007126445A1 | Cited by | United States of America | Pre-grant |
| US8530248B2 | Cited by | United States of America | Applicant |
| US2011212549A1 | Cited by | United States of America | Pre-grant |
| WO2014116585A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US7608932B2 | Cited by | United States of America | Search report |
| US2005229735A1 | Cited by | United States of America | Pre-grant |
| US2006076663A1 | Cited by | United States of America | Pre-grant |
| US7928591B2 | Cited by | United States of America | Applicant |
| US2011119907A1 | Cited by | United States of America | Pre-grant |
| US6858453B1 | Cited by | United States of America | Applicant |
| US9253894B2 | Cited by | United States of America | Applicant |
| US2011121841A1 | Cited by | United States of America | Pre-grant |
| US2011228506A1 | Cited by | United States of America | Pre-grant |
| US8822238B2 | Cited by | United States of America | Applicant |
| US8350393B2 | Cited by | United States of America | Applicant |
| US2003094706A1 | Cited by | United States of America | Pre-grant |
| US8536572B2 | Cited by | United States of America | Applicant |
| US4994735A | Cites | United States of America | Search report |
| US5691210A | Cites | United States of America | Search report |
| US6392251B1 | Cites | United States of America | Search report |
| JPH0595030A | Cites | Japan | Applicant |
| JPH10335401A | Cites | Japan | Applicant |
4 members in 3 offices; this record represents the family
Priority claims1
| Document | Office | Kind | Date |
|---|---|---|---|
| 2001191691 | Japan | A |
Members4
| Document | Office | Kind | |
|---|---|---|---|
| US2002195706A1 | United States of America | A1 | |
| JP2003007778A | Japan | A | |
| TW521371B | Taiwan Province of China | B | |
| US6548827B2This record | United States of America | B2 |
37 transactions on the USPTO file
Allowed after 1 non-final rejection.
- Non-final rejections
- 1
- Final rejections
- 0
- RCEs
- 0
- Appeals
- 0
Over time
Point at a mark for the transactionTransactions
| Event | Code | |
|---|---|---|
| Expire PatentEXP. | EXP. | |
| Recordation of Patent Grant MailedPGM/ | PGM/ | |
| Patent Issue Date Used in PTA CalculationAllowedPTAC | PTAC | |
| Issue Notification MailedAllowedWPIR | WPIR | |
| Receipt into PubsR1021 | R1021 | |
| Application Is Considered Ready for IssuePILS | PILS | |
| Issue Fee Payment VerifiedN084 | N084 | |
| Workflow - Drawings FinishedDRWF | DRWF | |
| Workflow - Drawings Matched with File at ContractorDRWM | DRWM | |
| Workflow - Drawings Received at ContractorDRWI | DRWI | |
| Workflow - Drawings Sent to ContractorDRWR | DRWR | |
| Issue Fee Payment ReceivedIFEE | IFEE | |
| Receipt into PubsR1021 | R1021 | |
| Workflow - File Sent to ContractorSENT | SENT | |
| Receipt into PubsR1021 | R1021 | |
| Dispatch to PublicationsD1220 | D1220 | |
| Mail Notice of AllowanceAllowedMN/=. | MN/=. | |
| Notice of Allowance Data Verification CompletedAllowedN/=. | N/=. | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Non-Final ActionA... | A... | |
| New or Additional Drawing FiledC614 | C614 | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response to Election / Restriction FiledELC. | ELC. | |
| Mail Restriction RequirementMCTRS | MCTRS | |
| Restriction/Election RequirementCTRS | CTRS | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Correspondence Address ChangeC.AD | C.AD | |
| IFW Scan & PACR Auto Security Review | – | |
| Preliminary AmendmentA.PE | A.PE | |
| Information Disclosure Statement (IDS) Filed | – | |
| Information Disclosure Statement (IDS) Filed | – | |
| Request for Foreign Priority (Priority Papers May Be Included)RQPR | RQPR | |
| Initial Exam Team nnIEXX | IEXX |
11 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Lapsed due to failure to pay maintenance feeLapsedFP | FP | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Lapse for failure to pay maintenance feesLapsedLAPS | LAPS | |
| Maintenance fee reminder mailedREMI | REMI | |
| AssignmentAS | AS | |
| Fee paymentFPAY | FPAY | |
| Surcharge for late paymentSULP | SULP | |
| Maintenance fee reminder mailedREMI | REMI | |
| Fee paymentFPAY | FPAY | |
| AssignmentAS | AS |
Numbers
- Application
- 98370801
Titles
- English
- Semiconductor apparatus with misalignment mounting detection
Patent term adjustment
- Applicant delay
- −51 days
- Net adjustment
- 0 days
Classification
- CPC, 10
- H10P74/277
- H05K1/0268
- H05K3/303
- H05K2201/10734
- H05K2203/166
- Y02P70/50
- H10W46/00
- H10W72/07223
- H10W72/07236
- H10W46/403
- IPC, 3
- H01L21 60
- H05K1 02
- H05K3 30