Structure for electrically connecting a first body of semiconductor material overlaid by a second body of semiconductor material composite structure using electric connection structure
Summary by NHIP
Monocrystalline Plug Connection
The structure connects a first semiconductor body to a second body using a silicon plug extending through the second body. A low-temperature heat treatment chemically bonds this monocrystalline plug to a metal region on the second wafer.
Claim Score by NHIP
Abstract
An electric connection structure connecting a first silicon body to conductive regions provided on the surface of a second silicon body arranged on the first body. The electric connection structure includes at least one plug region of silicon, which extends through the second body; at least one insulation region laterally surrounding the plug region; and at least one conductive electromechanical connection region arranged between the first body and the second body, and in electrical contact with the plug region and with conductive regions of the first body. To form the plug region, trenches are dug in a first wafer and are filled, at least partially, with insulating material. The plug region is fixed to a metal region provided on a second wafer, by performing a low-temperature heat treatment which causes a chemical reaction between the metal and the silicon. The first wafer is thinned until the trenches and electrical connections are formed on the free face of the first wafer.

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Term ended
Expired 27 April 2021, 5.4 years ago.
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26 claims: 6 independent, 20 dependent
- 1Broadest claimClaim Score 66, broad(NHIP)An electric connecting structure for connecting a first body of semiconductor material overlaid by a second body of semiconductor material, the connecting structure comprising:a plug region extending through a portion of said second body and made of monocrystalline semiconductor material;an insulation region surrounding laterally said plug region;and a first electromechanical connection region of electrically conductive material arranged between said first body and said second body and in electrical contact with said plug region and with conductive regions of said first body.
- 11An electric connecting structure for connecting a first body of semiconductor material overlaid by a second body of semiconductor material comprising a substrate region and an epitaxial region arranged on each other and partially insulated from one another by insulating regions, the connecting structure comprising:a plug region extending through a portion of said second body and made of semiconductor material;an insulation region surrounding laterally said plug region;and a first electromechanical connection region of electrically conductive material arranged between said first body and said second body and in electrical contact with said plug region and with conductive regions of said first body, wherein: said plug region further comprises a first plug portion extending throughout the thickness of said substrate region, and a second plug portion formed inside said epitaxial region, said second plug portion being aligned and in direct electrical contact with said first plug portion;said insulation region further comprises a first insulation portion laterally surrounding said first plug portion, and a second insulation portion laterally surrounding said second plug portion;a contact region of electrically conducting material extends on a free face of said substrate region in electrical contact with said first plug portion;and said second plug portion faces and is in direct electrical contact with said first electromechanical connection region.
- 14An electric connecting structure for connecting a first body of semiconductor material overlaid by a second body of semiconductor material comprising a substrate region and an epitaxial region arranged on one another and reciprocally insulated by insulating regions, the connection structure comprising:a plug region extending through a portion of said second body and made of semiconductor material;an insulation region surrounding laterally said plug region;and a first electromechanical connection region of electrically conductive material arranged between said first body and said second body and in electrical contact with said plug region and with conductive regions of said first body, wherein said substrate region has a smaller area than said epitaxial region, said plug region extends throughout the thickness of said epitaxial region, and has a first face and a second face, said first face being in contact with said first electromechanical connection region, and said second face being in direct contact with at least one electric connection region of electrically conducting material.
- 17A composite structure comprising:a first body of semiconductor material;a second body of semiconductor material arranged on said first body);and an electric connection structure, including: a plug region extending through a portion of said second body and made of monocrystalline semiconductor material, an insulation region laterally surrounding said plug region, and a first electromechanical connection region of electrically conductive material arranged between said first body and said second body and in electrical contact with said plug region and with conductive regions of said first body.
- 25A composite structure comprising:a first body of semiconductor material;a second body of semiconductor material arranged on said first body and comprising a an epitaxial region housing a micro-electromechanical device having a fixed part and a mobile part separated from one another by a delimitation trench extending through said epitaxial region and a substrate region forming a cap region and arranged over the mobile part of said epitaxial region, said epitaxial region and said substrate region being arranged on each other and partially insulated from one another by first and second insulating regions;and an electric connection structure, including: a first plug portion formed of semiconductor material and extending throughout the thickness of said substrate region, a second plug portion formed of semiconductor material and formed inside said epitaxial region, said second plug portion being aligned and in direct electrical contact with said first plug portion and further facing and in direct electrical contact with a first electromechanical connection region, said first electromechanical connection region being formed of electrically conductive material arranged between said first body and said second body and in electrical contact with conductive regions of said first body, said first insulation portion laterally surrounding said first plug portion, and said second insulation portion laterally surrounding said second plug portion;and a contact region of electrically conducting material extending on a free face of said substrate region in electrical contact with said first plug portion.
- 26A composite structure comprising:a first body of semiconductor material;a second body of semiconductor material arranged on said first body and comprising an epitaxial region housing a micro-electromechanical device comprising a fixed part and a mobile part separated from one another by at least one delimitation trench extending through said epitaxial region and a substrate region forming a cap region which has larger dimensions than said mobile part and is fixed to said fixed part, said epitaxial region and said substrate region overlaid to each other and reciprocally insulated from one another by insulating regions;and an electric connection structure, including: a plug region extending throughout the thickness of said epitaxial region of said second body and made of semiconductor material, said plug region having a first face and a second face, said first face being in contact with a first electromechanical connection region, and said second face being in direct contact with at least one electric connection region of electrically conducting material, said first electromechanical connection region of electrically conductive material arranged between said first body and said second body and in electrical contact with said plug region and with conductive regions of said first body, and an insulation region laterally surrounding said plug region.
Independent claims6
56 paragraphs in 5 sections, as filed
TECHNICAL FIELD
The present invention regards a structure for electrically connecting a first body of semiconductor material overlaid by a second body of semiconductor material, a composite structure using the electric connection structure and a manufacturing process.
BACKGROUND OF THE INVENTION
In particular, the invention can be used for electrically connecting a first silicon wafer incorporating electronic components to a second silicon wafer incorporating a micromechanical structure and/or to the outside. The invention can likewise be used for electrically connecting the first wafer to a third body carried by the second wafer, as well as for connecting the first wafer to the outside when the first wafer is covered by a protection structure, and thus is not directly accessible. An example of a particular application is represented by a micro-electromechanical system including a first wafer incorporating a circuit for controlling the parameters defining the state of a micro-electromechanical structure (for example, the position of a microactuator); a second wafer incorporating the micro-electromechanical structure; and a third wafer forming a cap for protecting the micro-electromechanical structure.
Various techniques are known for mechanically connecting two semiconductor material bodies (see, for example, Martin A. Schmidt, “Wafer-to-Wafer Bonding for Microstructure Formation”, Proceedings of the IEEE, Vol. 86, No. 8, August 1998). However, such techniques do not enable two or three wafers to be electrically connected, in addition to be mechanically connected, or covered components of one of the wafers to be electrically accessed.
SUMMARY OF THE INVENTION
An embodiment of the present invention provides a connection structure that enables semiconductor material bodies made on different substrates to be overlaid and to be connected mechanically and electrically together and to the outside.
According to embodiments of the present invention, an electric connection structure, a composite structure, and a process for manufacturing a composite structure are provided. The electric connection structure connects a first silicon body to conductive regions provided on the surface of a second silicon body arranged on the first body. The electric connection structure includes at least one plug region of silicon, which extends through the second body; at least one insulation region laterally surrounding the plug region; and at least one conductive electromechanical connection region arranged between the first body and the second body, and in electrical contact with the plug region and with conductive regions of the first body. To form the plug region, trenches are dug in a first wafer and are filled, at least partially, with insulating material. The plug region is fixed to a metal region provided on a second wafer, by performing a low-temperature heat treatment which causes a chemical reaction between the metal and the silicon. The first wafer is thinned until the trenches and electrical connections are formed on the free face of the first wafer.
BRIEF DESCRIPTION OF THE DRAWINGS
For a better understanding of the present invention, preferred embodiments thereof are now described, merely to provide non-limiting examples, with reference to the attached drawings, wherein:
FIGS. 1 and 2 are cross-sections through a semiconductor material wafer, in two successive manufacture steps, according to a first embodiment of the invention;
FIG. 3 shows a cross-section through the wafer of FIG. 2, after bonding to a second semiconductor material wafer;
FIGS. 4-6 show cross-sections of the multiwafer structure of FIG. 3, in successive manufacture steps;
FIG. 7 is a perspective view of the left-hand half of the multiwafer structure of FIG. 6;
FIG. 8 shows a cross-section of the multiwafer structure of FIG. 6, in a final manufacture step;
FIGS. 9-11 show cross-sections of a micro-electromechanical system according to a second embodiment of the invention;
FIG. 12 shows a cross-section of a composite structure formed starting from three semiconductor material substrates, according to a third embodiment of the invention;
FIGS. 13 and 14 show cross-sections of a semiconductor material wafer, in two successive manufacture steps according to a fourth embodiment of the invention;
FIG. 15 shows a cross-section of the wafer of FIG. 14 after bonding to a second semiconductor material wafer;
FIG. 16 shows a cross-section of a composite structure obtained from the double wafer of FIG. 15, in a subsequent manufacture step;
FIG. 17 shows a cross-section of a composite wafer, according to a fifth embodiment of the invention; and
FIGS. 18 and 19 show cross-sections of a composite wafer, according to a sixth embodiment of the invention, in two successive manufacture steps.
DETAILED DESCRIPTION OF THE INVENTION
FIGS. 1-8 show a first embodiment of a process for manufacturing a micro-electromechanical system, including a control and sensing circuitry and a micro-electromechanical sensor, for example an acceleration sensor.
Initially, as illustrated in FIG. 1, a first wafer <b>1</b> of semiconductor material, typically P<sup>++</sup> or N<sup>++</sup> doped monocrystalline silicon, illustrated as sectioned along two parallel half-planes so as to show different areas in the left-hand half and in the right-hand half, is masked and etched to form first deep trenches <b>2</b><i>a. </i>For example, the first wafer <b>1</b> may have a conductivity of between 5 and 15 mΩ/cm, preferably 10 mΩ/cm. As shown in FIG. 2, the first trenches <b>2</b><i>a </i>have a closed shape and enclose monocrystalline silicon plug regions <b>3</b> intended to form through connections, as explained more clearly hereinafter.
Subsequently, the first trenches <b>2</b><i>a </i>are filled, either completely or partially, with insulating material <b>6</b>, for example silicon dioxide. To this end, a silicon dioxide layer is deposited or grown, and is subsequently removed from a first surface <b>7</b> of the first wafer <b>1</b>, to obtain the structure shown in FIG. <b>2</b>.
Next, as illustrated in FIG. 3, the first wafer <b>1</b> is bonded to a second wafer <b>10</b> formed of a monocrystalline silicon substrate <b>11</b> and an insulation and/or passivation layer <b>12</b>. In particular, the substrate <b>11</b> houses conductive and/or insulating regions forming electronic components for biasing the acceleration sensor <b>8</b> and for detecting and processing electrical signals generated by the acceleration sensor <b>8</b>. As an example, FIG. 3 shows conductive regions <b>15</b>-<b>16</b> of the N/P-type belonging to an electronic circuit <b>40</b>, which is shown only schematically. In addition, the insulation and/or passivation layer <b>12</b> houses metal regions <b>13</b>, <b>18</b>, which terminate, at one or both of their ends, with pad regions <b>19</b> facing the surface <b>22</b> of the second wafer <b>10</b>.
Connection regions <b>23</b> are provided on the surface <b>22</b> of the second wafer <b>10</b>, on top of the pad regions <b>19</b>, and are of a metal that is able to react at a low temperature with the silicon of the first wafer <b>1</b> to form a gold/silicon eutectic or a metallic silicide. Typically, the connection regions <b>23</b> are made of gold, in the case where the aim is to obtain a eutectic, or of a metal chosen from among the group comprising palladium, titanium, and nickel, in the case where the aim is to obtain a silicide. Bonding regions <b>24</b> are also provided on the surface <b>22</b> and are preferably formed at the same time as the connection regions <b>23</b>.
For bonding the first wafer <b>1</b> to the second wafer <b>10</b>, the first wafer <b>1</b> is turned upside down so that the first surface <b>7</b> of the first wafer <b>1</b> faces the second wafer <b>10</b>. The plug regions <b>3</b> of the first wafer <b>1</b> are brought into contact with the connection regions <b>23</b> of the second wafer <b>10</b>, and subsequently a heat treatment at low temperature, for example 350-450° C., is carried out for a period of 30-45 minutes, so that the metal of the connection regions <b>23</b> of the second wafer <b>10</b> react with the silicon of the plug regions <b>3</b> and form a metallic silicide which bonds the first and the second wafers <b>1</b>, <b>10</b>. Thereby, a double wafer <b>25</b> is obtained, as shown in FIG. <b>3</b>.
Subsequently, as illustrated in FIG. 4, the first wafer <b>1</b> is thinned from the back mechanically, for example by grinding, preferably so as to obtain a thickness of 30-40 μm. The first wafer <b>1</b> then has a second surface <b>26</b> opposite to the first surface <b>7</b>.
Next, as illustrated in FIG. 5, a metal layer, for example, an aluminum layer, is deposited and defined, so as to form metal regions <b>27</b> extending above the plug regions <b>3</b> and in direct electrical contact with the latter.
Subsequently, the first wafer <b>1</b> is masked and etched so as to form second trenches <b>2</b><i>b </i>defining an acceleration sensor <b>8</b>. In particular, as may be seen in FIGS. 6 and 7, the second trenches <b>2</b><i>b </i>separate a mobile region, forming a rotor <b>4</b>, and a fixed region, forming a stator <b>5</b>, from the rest of the wafer <b>1</b> and from one another. The rotor <b>4</b> is connected, through elastic-connection regions, also referred to as springs <b>31</b>, to fixed biasing regions <b>32</b>, which are set in areas corresponding to respective connection regions <b>23</b>, connected, through the metallic regions <b>13</b>, to the plug regions <b>3</b>.
Next, as illustrated in FIG. 8, a cap element <b>34</b> is fixed to the wafer <b>1</b> through adhesive regions <b>36</b>, in a per se known manner, and then the double wafer <b>25</b> is cut into individual dice. Finally, the metal region <b>27</b> is contacted applying the usual wire-bonding technique.
Thereby, the connection regions <b>23</b> ensure mechanical connection between the monocrystalline silicon wafers <b>1</b> and <b>10</b> and electrical connection between the surface <b>22</b> of the second wafer <b>10</b> and the plug regions <b>3</b>. In turn, the plug regions <b>3</b> allow the second wafer <b>10</b> to be contacted from above. In particular, some plug regions <b>3</b> enable the second wafer <b>10</b>, not directly accessible from the front, to be connected to the outside, without requiring costly processes to be carried out from the back. In addition, as is shown in the left-hand half of FIG. 8, this solution also enables connection of regions formed in the first wafer <b>1</b> to the outside. Here the rotor <b>4</b> is connected to the outside through a first connection region <b>23</b> (beneath the biasing region <b>32</b>), a metal region <b>13</b>, a second connection region <b>23</b> (beneath the plug region <b>3</b>), and the plug region <b>3</b>. The plug regions <b>3</b> are insulated by insulation regions formed by the insulating material <b>6</b> and possibly by the air present in the first deep trenches <b>2</b><i>a, </i>and are thus electrically insulated from the rest of the first wafer <b>1</b>, except, obviously, for the regions connected to them via electric connection lines <b>30</b>, shown in FIG. <b>10</b>.
With the solution of FIGS. 1-8 a pressure sensor, instead of an acceleration sensor, may be formed.
FIGS. 9-11 show a second embodiment of the invention regarding a unit for micrometric regulation of the read/write head of a hard-disk driver. In detail, initially the same steps are carried out as described previously with reference to FIGS. 1-4. After thinning the first wafer <b>1</b>, an oxide layer <b>35</b> is deposited and removed selectively at the plug regions <b>3</b> to form openings <b>28</b>. The second trenches <b>2</b><i>b </i>are then formed through the oxide layer <b>35</b> and through the wafer <b>1</b>.
Subsequently, as illustrated in FIG. 10, an insulating layer <b>38</b> is deposited, for example a stick foil which does not enter the second trenches <b>2</b><i>b. </i>The insulating layer is removed from above the openings <b>28</b>, and metal connection regions are formed by depositing and defining a metal layer. In particular, in the illustrated example the metal layer fills the openings <b>28</b>, where it forms contacts <b>29</b>. In addition, an electric connection line <b>30</b> is formed and extends from the contact <b>29</b> arranged above the plug region <b>3</b> furthest to the right, up to above the rotor <b>4</b>.
Subsequently, the composite wafer <b>25</b> is cut into dice, the insulating layer <b>38</b> is removed in oxygen plasma, and a ceramic body, referred to as slider <b>41</b>, is bonded to the rotor <b>4</b> in a per se known manner (FIG. <b>11</b>). The slider <b>41</b> carries a transducer <b>42</b> for data reading/writing on a hard disk (not shown). The transducer <b>42</b> is electrically contacted through connection regions <b>43</b>, one of which may be seen in FIG. 11, which are formed directly on one side of the slider <b>41</b>. Each connection region <b>43</b> extends from the transducer <b>42</b> as far as a pad <b>44</b> in electrical contact with an electric connection line <b>30</b>.
Thereby, the plug region <b>3</b> furthest to the right enables electrical connection between the transducer <b>42</b> on the slider <b>41</b> and the electrical circuit <b>40</b>, which can thus transmit to the transducer <b>42</b> the data to be written, or process the signal picked up by the transducer <b>42</b>. In addition, in a known manner, the electrical circuit <b>40</b> controls movement of the rotor <b>4</b>, and consequently of the slider <b>41</b>. Finally, a connection via an intermediate plug region (not shown) enables connection of the electrical circuit <b>40</b> to the outside, in a way similar to that illustrated in the right-hand part of FIG. <b>8</b>.
Consequently, also in this case the plug regions <b>3</b> enable connection of non-accessible regions of the second wafer <b>10</b> to elements arranged above them (here, the transducer <b>42</b>), as well as to the outside.
FIG. 12 shows a third embodiment regarding the manufacture of circuits or structures to be kept in vacuum conditions. In the illustrated example, the wafer <b>1</b>, after forming the plug regions <b>3</b> by digging the first trenches <b>2</b><i>a </i>and filling them with insulating material <b>6</b>, has been bonded to a second wafer <b>10</b>, wherein a filter <b>48</b> has been previously made, for example of the band-pass type for high frequencies. The first wafer <b>1</b> is bonded to the second wafer <b>10</b>, not only through the connection regions <b>23</b>, but also through a sealing region <b>49</b> which extends between the first wafer <b>1</b> and the second wafer <b>10</b>, and completely surrounds the area in which the filter <b>48</b> is formed, as well as the plug regions <b>3</b>. The sealing region <b>49</b> is, for example, made using a low-melting temperature glass and has a closed shape. If bonding of the first wafer <b>1</b> and second wafer <b>10</b> is carried out in a low-pressure environment, the filter <b>48</b> remains vacuum encapsulated.
Next, the first wafer <b>1</b> is thinned as described above, and the double wafer <b>1</b>, <b>10</b> is cut into dice <b>50</b>. The dice <b>50</b> are then bonded to a third wafer <b>51</b> which houses a circuit <b>52</b> and which has previously been provided with connection regions <b>23</b><i>a </i>similar to the connection regions <b>23</b>. The thinned side of the first wafer <b>1</b> faces the third wafer <b>51</b>, and the plug regions <b>3</b> must be aligned to the connection regions <b>23</b><i>a. </i>
In this case, the first wafer <b>1</b>, in addition to protecting and isolating the filter <b>48</b> from the outside environment and maintaining it in vacuum conditions, enables its electrical connection with the circuit <b>52</b> incorporated in the third wafer <b>51</b>. In addition, it is possible to carry out electrical testing of the circuit <b>52</b> connected to the filter <b>48</b> at the wafer level (EWS-Electric Wafer Sort test).
FIGS. 13-16 show a fourth embodiment of the invention. According to FIG. 13, initially the first wafer <b>1</b> comprises a substrate <b>53</b> accommodating first trenches <b>72</b><i>a, </i>and the first trenches <b>72</b><i>a </i>are filled with insulating material <b>76</b> to insulate first plug portions <b>73</b>, in a way similar to that described with reference to FIG. 1 for the plug regions <b>3</b>. Then a sacrificial layer <b>54</b>, for example of silicon dioxide, is deposited or grown, then is masked and etched so as to form openings <b>55</b> on top of the first plug portions <b>73</b> and in areas where anchorages with the structure on top are to be made, as described hereinafter.
Subsequently (FIG. <b>14</b>), a polycrystalline silicon seed layer is deposited on top of the sacrificial layer <b>54</b> and in the openings <b>55</b>, and then a polycrystalline silicon epitaxial layer <b>56</b> is grown. In this way, the epitaxial layer <b>56</b> is in direct contact with the substrate <b>53</b> at the openings <b>55</b>. Next, inside the epitaxial layer <b>56</b> third and fourth trenches <b>60</b><i>a, </i><b>60</b><i>b </i>are dug, which reach as far as the sacrificial layer <b>54</b>. In particular, the third trenches <b>60</b><i>a </i>delimit second plug portions <b>62</b> aligned vertically with the first plug portions <b>73</b> in the substrate <b>53</b>, and the third trenches <b>60</b><i>a </i>define a desired micromechanical structure (in the example illustrated, a microactuator <b>57</b> of the rotating type, including a rotor <b>58</b> and a stator <b>59</b>, with the rotor <b>58</b> supported by springs, which are not illustrated).
Subsequently, in a known way, a part of the sacrificial layer <b>54</b> is removed through the fourth trenches <b>60</b><i>b. </i>In particular, the sacrificial layer <b>54</b> is removed beneath the rotor <b>58</b> to form an air gap <b>63</b>, and it substantially remains underneath the stator <b>59</b>. The sacrificial layer <b>54</b> is removed only to a very small extent through the third trenches <b>60</b><i>a, </i>given the different geometry (the micromechanical structure is formed by thin regions and/or perforated regions, allowing the sacrificial layer <b>54</b> to be substantially removed; this, instead, is not done through the third trenches <b>60</b><i>a</i>).
In a way not shown, it is then possible to fill the third trenches, at least partially, with insulating material, in a way similar to that described for the first trenches <b>2</b><i>a </i>of FIG. <b>1</b>.
Subsequently, as illustrated in FIG. 15, the first wafer <b>1</b> is turned upside down and bonded to the second wafer <b>10</b>, inside which components of the circuit <b>40</b> have already been formed, and on top of which the connection regions <b>23</b> have already been made. Also in this case, a low-temperature heat treatment is carried out to enable a chemical reaction between the silicon of the epitaxial layer <b>56</b>, at the second plug portions <b>62</b>, and the metal of the connection regions <b>23</b>. Next, the substrate <b>53</b> of the first wafer <b>1</b> is thinned until the insulating material <b>76</b>, or at least the bottom of the first trenches <b>72</b><i>a, </i>is reached, an oxide layer <b>35</b> is deposited, the openings <b>28</b> are formed in the oxide layer <b>35</b>, and then second trenches <b>72</b><i>b </i>are made which separate fixed parts from mobile parts in the substrate <b>53</b>.
Next, as has been described with reference to FIG. 10, an insulating layer, for example stick foil, is deposited and selectively removed, and the electrical contacts <b>29</b> and electric connection lines <b>30</b> are formed. In FIG. 16, an electric connection line <b>30</b> connects the portion of the substrate <b>53</b> to which the rotor <b>58</b> is anchored, for example at cap region <b>67</b>, to the first plug region <b>73</b> that is furthest to the left, thus enabling electrical connection of the rotor <b>58</b> to the circuit <b>40</b> through the cap region <b>67</b>, the first plug portion <b>73</b> on the left, and the second plug portion <b>62</b> on the left. Shown in the right-hand half of FIG. 16 is instead the electrical connection between the circuit <b>40</b> and the outside, through the second plug portion <b>62</b>, the first plug region <b>73</b>, and the connection region <b>23</b> on the right.
Subsequently, the insulating layer is removed, and a body to be moved, for example a slider similar to the slider <b>41</b> of FIG. 11, can be fixed to the cap region <b>67</b>.
The solution shown in FIGS. 13-16 thus provides a micromechanical structure <b>57</b> protected by a cap, for example cap region <b>67</b>, and easily connects the circuit <b>40</b> both to the micromechanical structure <b>57</b> and to the outside.
FIG. 17 shows a variation of the structure of FIG. 16, in which the rotor <b>58</b> is not anchored to the substrate <b>53</b>, but is supported by springs (not shown) and biasing regions <b>60</b>, similar to the biasing regions <b>31</b>, <b>32</b> of FIG. <b>7</b>. In addition, the cap region <b>67</b> is fixed and does not have the second trenches <b>72</b><i>b. </i>The rotor <b>58</b> and stator <b>59</b> are connected via connection regions <b>23</b> and pad regions <b>19</b> to metallic regions <b>13</b>, <b>18</b> formed in the second wafer <b>10</b>. The metallic regions <b>13</b> are connected to the outside, as shown in the left-hand half of FIG. 17, via further connection regions <b>23</b> aligned with plug regions <b>62</b>, <b>73</b> formed in the first wafer <b>1</b>, in a way similar to that described with reference to FIGS. 13-16, and via contacts <b>29</b>. In addition, the metallic regions <b>18</b> enable connection of the circuit <b>40</b> to the stator <b>59</b> and, via plug regions <b>62</b>, <b>73</b> and contacts <b>29</b>, to the outside, as shown in the right-hand half of FIG. <b>17</b>. An insulating layer <b>80</b> covers the surface <b>26</b> of the first wafer <b>1</b>.
FIGS. 18 and 19 show a sixth embodiment, in which a micromechanical structure, for example an acceleration sensor <b>8</b>, is protected by a cap and electrically connected to the biasing and sensing circuit via plug regions.
Initially, as illustrated in FIG. 18, the first wafer comprises a substrate <b>53</b>, which, in contrast to the previous embodiments, is not etched to form trenches. On the substrate <b>53</b>, a sacrificial layer <b>54</b> is deposited and defined, and is removed only at openings <b>55</b>. Next, a polycrystalline silicon seed layer is deposited, and the epitaxial layer <b>56</b> is grown, as described with reference to FIG. <b>14</b>.
The epitaxial layer <b>56</b> is etched to form fifth trenches <b>65</b><i>a </i>for delimiting second plug portions <b>64</b>. Here, the fifth trenches <b>65</b><i>a </i>are filled, either partially or completely, with insulating material <b>66</b>, sixth trenches <b>65</b><i>b </i>are formed for defining the accelerometric sensor <b>8</b>, and the sacrificial layer <b>54</b> is partially removed through the sixth trenches <b>65</b><i>b, </i>so as to free the rotor <b>58</b> of the acceleration sensor <b>8</b>. As for the embodiment shown in FIGS. 1-8, the rotor <b>58</b> is carried by the fixed part via springs (not illustrated).
Subsequently, the first wafer <b>1</b> is bonded to the second wafer <b>10</b> using the connection regions <b>23</b> already formed on the surface <b>22</b> of the second wafer <b>10</b>. Then the first wafer <b>1</b> is thinned by grinding until the desired thickness for the substrate <b>53</b>. Next, the substrate <b>53</b> is selectively removed so as to form a cap region <b>67</b> of larger dimensions than the rotor <b>58</b>, but of smaller dimensions than the chip housing the circuit <b>40</b>, obtained after cutting the wafers <b>1</b>, <b>10</b>. In this way, the cap region <b>67</b> covers the rotor <b>58</b> from the back, protecting it mechanically, but leaves the plug regions <b>64</b> free.
Finally, the contacts <b>29</b> and the electric connection lines <b>30</b> are formed, which, in this embodiment, contact directly the silicon of the epitaxial layer <b>54</b>. In particular, in the example illustrated in FIG. 19, an electric connection line <b>30</b> connects a region (not shown), arranged inside the fixed part and is electrically connected to the rotor <b>58</b>, to the plug region <b>64</b> on the left, and thus to the circuit <b>40</b>. A ball-and-wire connection on the right instead enables connection of the circuit <b>40</b> to the outside.
When the acceleration sensor <b>8</b> is to be kept at low pressure, for example to reduce friction with air during movement, a sealing region <b>49</b> may be provided which surrounds the area of the acceleration sensor <b>8</b>, then the first wafer <b>1</b> may be bonded to the second wafer <b>10</b> in vacuum conditions, as already described with reference to FIG. <b>12</b>.
The advantages of the process and structures described are evident from the above. In particular, they enable mechanical connection of two bodies of semiconductor material, in particular of monocrystalline silicon, arranged on one another, and at the same time the electrical connection of a structure or circuit formed in the underlying body, which is covered by the overlying body, to the outside or to a structure made in the overlying body; or else, they enable electrical connection of the underlying body to regions arranged above the overlying body, without requiring complicated and costly processes to be carried out from the back, without damaging the structures and circuits already made, and applying single manufacture steps that are commonly used in the manufacture of wafers of semiconductor material for forming micro-electromechanical structures.
The described solutions moreover make it possible, when necessary, to isolate preset areas of the underlying body and/or of the overlying body from the outside environment, for example to enclose delicate elements in a low-pressure environment, and/or to isolate and prevent contamination of these elements during manufacture, for example cutting semiconductor material wafers, during subsequent manipulation steps, and during use.
Finally, it is clear that numerous modifications and variations may be made to the connection structure, the composite structure, and to the manufacture process described and illustrated herein, all falling within the scope of the invention, as defined in the attached claims. In particular, the present connection structure may be used for a wide range of applications, both for the connection of electronic circuits integrated in two or more different substrates, and for the connection of micro-electromechanical structures of various kinds to biasing/control/sensing circuits associated to the micro-electromechanical structures. The present connection structure may be used for connecting a high number of substrates, according to the requirements and to general considerations of a mechanical/electrical nature.
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| Document | Relation | Office | Cited during |
|---|---|---|---|
| CN102324404A | Cited by | China | Search report |
| US6852570B2 | Cited by | United States of America | Search report |
| US8044929B2 | Cited by | United States of America | Applicant |
| US2005094891A1 | Cited by | United States of America | Pre-grant |
| US2006166480A1 | Cited by | United States of America | Pre-grant |
| US2010112754A1 | Cited by | United States of America | Pre-grant |
| US2010062565A1 | Cited by | United States of America | Pre-grant |
| US7981765B2 | Cited by | United States of America | Applicant |
| US8763235B1 | Cited by | United States of America | Applicant |
| US7928960B2 | Cited by | United States of America | Applicant |
| US11715752B2 | Cited by | United States of America | Applicant |
| US2008237823A1 | Cited by | United States of America | Pre-grant |
| US2005170609A1 | Cited by | United States of America | Pre-grant |
| US2006118946A1 | Cited by | United States of America | Pre-grant |
| US6887769B2 | Cited by | United States of America | Applicant |
| US11254561B2 | Cited by | United States of America | Applicant |
| US8124456B2 | Cited by | United States of America | Applicant |
| US7157787B2 | Cited by | United States of America | Applicant |
| US2003157782A1 | Cited by | United States of America | Pre-grant |
| US2006262088A1 | Cited by | United States of America | Pre-grant |
| US8368222B2 | Cited by | United States of America | Search report |
| US2004256686A1 | Cited by | United States of America | Pre-grant |
| US8679887B2 | Cited by | United States of America | Applicant |
| US2008087979A1 | Cited by | United States of America | Pre-grant |
| US2006035476A1 | Cited by | United States of America | Pre-grant |
| US2004124509A1 | Cited by | United States of America | Pre-grant |
| US2004009647A1 | Cited by | United States of America | Pre-grant |
| US7087538B2 | Cited by | United States of America | Applicant |
| US8956904B2 | Cited by | United States of America | Applicant |
| US2003143773A1 | Cited by | United States of America | Pre-grant |
| US7608534B2 | Cited by | United States of America | Applicant |
| US2007210447A1 | Cited by | United States of America | Pre-grant |
| US2008272447A1 | Cited by | United States of America | Pre-grant |
| US7399652B2 | Cited by | United States of America | Search report |
| US7943411B2 | Cited by | United States of America | Applicant |
| US10549982B2 | Cited by | United States of America | Applicant |
| US8742585B2 | Cited by | United States of America | Applicant |
| US8220140B1 | Cited by | United States of America | Applicant |
| US2004014308A1 | Cited by | United States of America | Pre-grant |
| US8322022B1 | Cited by | United States of America | Applicant |
| US6924166B2 | Cited by | United States of America | Search report |
| US2008168838A1 | Cited by | United States of America | Pre-grant |
| US2010059835A1 | Cited by | United States of America | Pre-grant |
| US2011042814A1 | Cited by | United States of America | Pre-grant |
| US2007111386A1 | Cited by | United States of America | Pre-grant |
| US7663232B2 | Cited by | United States of America | Applicant |
| US8193550B2 | Cited by | United States of America | Applicant |
| US2007068779A1 | Cited by | United States of America | Pre-grant |
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10 members in 4 offices
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| Document | Office | Kind | |
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| EP1151962A1 | European Patent Office (EPO) | A1 | |
| US2001038148A1 | United States of America | A1 | |
| JP2002076269A | Japan | A | |
| US2002135062A1 | United States of America | A1 | |
| US6498053B2 | United States of America | B2 | |
| US6504253B2This record | United States of America | B2 | |
| EP1151962B1 | European Patent Office (EPO) | B1 | |
| DE60035179D1 | Germany | D1 | |
| DE60035179T2 | Germany | T2 | |
| JP4970662B2 | Japan | B2 |
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Numbers
- Application
- 84418001
Titles
- English
- Structure for electrically connecting a first body of semiconductor material overlaid by a second body of semiconductor material composite structure using electric connection structure
Patent term adjustment
- Net adjustment
- 0 days
Classification
- CPC, 10
- B81C1/00238
- B81C2201/019
- H10W20/023
- H10W20/20
- H10W90/722
- H10W90/00
- H10W72/9415
- H10W72/90
- H10W90/297
- H10W20/217
- IPC, 9
- B81C1 00
- B81C3 00
- H01L23 48
- H01L23 52
- H01L25 065
- H01L25 07
- H01L25 18
- H10D48 50
- H10D99 00
- USPC, 8
- 257758000
- 257686000
- 257688000
- 257723000
- 257E23011
- 438107000
- 438118000
- 438622000