Method and apparatus for cleaning flat workpieces

BACKGROUND OF THE INVENTION

This invention relates generally to semiconductor manufacturing systems, more particularly to cleaning apparatus forming a part of semiconductor manufacturing systems, and most particularly to high-purity cleaning systems for flat workpieces.

The production of integrated circuits requires very clean systems and processes. This is because integrated circuits and other semiconductor devices often have line-widths in the sub-micron range. Even very tiny particles adhering to the surface of a semiconductor wafer during the integrated circuit manufacturing process have the potential of destroying the functionality of integrated circuits on the wafer. The semiconductor manufacturing industry therefore goes to great lengths to keep the semiconductor manufacturing equipment, and the surrounding environment, in a very clean condition.

Semiconductor manufacturing is typically accomplished within “clean rooms” which are categorized by “Class.” For example, a Class 100 clean room will have no more than 100 airborne particles of a certain size per cubic foot. A Class 10 clean room will have only 10 such particles per cubic foot, a Class 1 clean room will have only 1 particle per cubic foot, etc. In modem semiconductor manufacturing plants, Class 1 clean rooms are often used.

Integrated circuits are typically formed in multiple copies on a single semiconductor wafer. This semiconductor wafer used most frequently is made from a very pure silicon material, and are typically 6-12 inches in diameter. These wafers, as received from the manufacturer, are very clean. They may, for example, have fewer than a dozen particles of a given sub-micron size per wafer. Ultimately, these wafers are processed by a series of deposition, masking, etching, implantation, etc. operations in order to form a number of integrated circuits on a surface. The wafer is then cut into “die”, each of which includes a single integrated circuit chip. Operative die are packaged and sold as the final integrated circuits.

The “yield” from a semiconductor wafer is defined as the total number of operative die divided by the total number of die on the wafer. The cost-per-integrated circuit is directly related to the yield of the wafer. Since a leading cause of inoperative die are particles that were present on the surface of the wafer during the manufacturing process, it is imperative to keep the wafer surface as clean as possible during the manufacturing process.

Unfortunately, many of the processes to which a wafer is exposed during the manufacturing process are inherently dirty. For example, an etching process can create a large number of particles on the surface of a wafer. As another example, chemi-mechanical polishing (CMP), which is increasingly used to replace isotropic etching processes, uses chemicals and fine particles to grind the surface of a wafer. Chemi-mechanical polishing is also sometimes referred to as “chemi-mechanical planarization”, since it is often used for planarization purposes. It will therefore be appreciated that CMP processes generate a great many particles on the surface of the wafer which must be removed to maintain a reasonable yield from the wafer.

The prior art teaches a number of methods for cleaning wafers. The most common is an aqueous or chemical bath into which the wafer is dipped. However, these “wet” or “dip” processes have a number of deficiencies. For one, wet processes are generally incompatible with cluster tool processing. Wet cleaning processes have traditionally been batch processes where a group or batch (usually 25) wafers was cleaned, rinsed, and dried together in a cassette. Since cluster tools process wafers singly (in series), wafers from cluster tools must be loaded into cassettes and then transported to cleaning areas by human operators. This requires that the wafers be loaded into plastic cassettes that are placed into dip tanks for chemical processing. These cassettes are then placed into spin/rinse dryers for final rinsing and drying. This process consumes time, costs money, and exposes the wafers to the possibility of contamination during transport. As wafer sizes get larger, the transportation and handling of wafers in cassette batches becomes much more difficult and less practical.

To aid in the removal of particles, traditional wet cleaning equipment has used ultrasonic (or Megasonic) high frequency agitation, rotating brushes, or high velocity liquid jets. High frequency agitation has been proven effective at removing particles, but the difficulty lies in preventing redeposit of particles from the solution once the ultrasound energy stops. Since the wafer must often be removed from the solution through a gas liquid interface, it must be removed through a zone where particles may concentrate, recontaminating the wafer upon exit. To avoid this, it has been proposed to provide continuous liquid flow at the interface, but high overflow rates are required to keep particle counts low and this may result in excessive water or chemical consumption.

Rotating brushes have also been used, where the bristles have been chemically treated to modify solution Zeta potential, therefore attracting particles from the wafer surface to the brush. However, for these to work, the nature of the particles must be such that they are attracted to the charge on the brushes. In addition, cleaning the brushes may be critical since dirty brushes (having accumulated a lot of particles) will eventually recontaminate the wafer surfaces, reducing cleaning effectiveness. Liquid jets must be very high velocity in order to result in a fluid boundary layer on the order of the particle sizes (well below 0.5 micron). These high velocities can damage surfaces due to erosion, especially with patterned substrates with various surface topography.

Wet processes do not tend to be very effective at removing all particles, and will actually add particles to the surface of the wafer when the cleaning solution becomes dirty. In addition, the aqueous or liquid phase contains particles that are about 3 orders of magnitude higher (per cubic meter) than those found in the gas phase. This is in part due to the fact that filtration technology is about two to three orders of magnitude less effective for the liquid phase than for the gas phase. Further, even the purest of water has the propensity to grow contaminating microorganisms. Because of these factors, there has been a dedicated focus for many years on “dry” processing utilizing gas phase processes.

The number of particles added to a wafer by the solution is dependent on the concentration equilibrium between the particles in the solution immediately in contact with the wafer and those on the surface. Soaps and surfactants will effectively reduce the “apparent” particle concentration by tying or solvating the particles to organic components in solution. Soaps are not widely used in the semiconductor industry for cleaning of high purity Si wafers because these same surfactants will also contaminate the wafer surfaces. In the case of very dirty wafers and very clean solutions, there will be a tendency for particles to move into solution (assuming charge effects and solution chemistry permits this). In the case of clean wafers and dirty solutions, the opposite can occur. The ultimate baseline test of a cleaning system is to measure particles added to or removed from “virgin prime” substrates which have very few particles on their surface. The better the cleaning system, the fewer the particle adders will be seen.

A typical commercial wafer cleaning apparatus (such as a spin rinse dryer) will always add particles to prime substrates, even when using ultra pure deionized water. This is because, no matter how pure the water source, there is always present particle and bacterial contamination. Only the very sophisticated and highly proprietary final cleaning processes used by the original equipment manufacturers (OEMs) of the silicon substrates, i.e. the wafer manufacturers themselves, can actually remove particles from prime quality wafers. These processes are too complex and expensive to be used in the production fabs.

For the foregoing reasons, wet wafer process cleaning has always been deemed by production fabs as a necessary evil, and for many years effort was focused on developing so called dry cleaning processes which used reactive gasses and plasmas to try and remove particle contaminates. With the advent of CMP, the practicality of using dry processes to remove large levels of contamination has been considerably reduced.

The use of high purity steam has some potential advantages when compared to conventional wet cleaning. If done correctly, high purity water can be vaporized into a high purity gas (steam), then condensed directly onto the wafer surface. UHP steam is potentially devoid of any ions and contaminates, including bacteria and particles, and will be a very aggressive solvent for surface contaminants. However, it is very important that adequate amounts of steam are applied to the wafer surface, and that the contaminants are flushed uniformly from the surface. Condensing steam at 1 atmosphere pressure will also raise the wafer temperature to nearly 100° C., making residue free drying a possibility.

The prior art has taught the possibility of using steam to clean silicon wafers for a number of years. For example, patents U.S. Pat. Nos. 4,186,032 and 4,079,522, mention the use of an inclined heat sink to process wafers one at a time by condensing steam on the wafer surface and allowing the condensate to drain off by gravity. However, this method will not produce uniformly clean wafers due to the fixed orientation of the wafer being cleaned, resulting in potential particle gradients bottom to top. Further, the process as described is quite lengthy, requiring many minutes per wafer. In addition, the technique has no provision for backside cleaning (i.e. the cleaning of the surface of the wafer opposite from the active surface of the wafer) that would not recontaminate the front surface. There is also no mention of purifying the steam prior to condensation, which is critical for particle free performance, since steam (like any gas) can contain aerosols and particles that will contaminate the wafer surface upon condensation.

The prior art discloses the use of steam or condensing water vapor to clean silicon wafers. Typically, such prior art discloses the contact of a wafer cassette or single wafer with saturated steam. The prior art therefore typically ignores the requirement to provide adequate “heat sinking” behind the wafer to condense sufficient steam to clean. Without the heat sink, only enough steam will condense to raise the temperature of the wafer from its input temperature to 100° C., e.g. only a few cubic cm. To condense sufficient quantities of water for adequate cleaning, on the order of a 100-200 cc/min of condensate, a heat sinking of many kilowatts is required. This is perhaps the reason condensing steam has not been utilized for conventional batch cassette processing. It is not easy or practical to heat sink each wafer adequately in a cassette.

It would therefore be desirable to have a cleaning method and apparatus which is both more effective than cleaning methods and apparatus of the prior art and which can become an integral part of a semiconductor manufacturing system.

SUMMARY OF THE INVENTION

One aspect of the present invention applies filtered, high purity steam to an active surface of a wafer to clean particles from the active surface. Preferably, a relatively cooler liquid is simultaneously applied to the back of the wafer to heat sink the large heat of vaporization and provide backside cleaning. Due to the elevated temperature produced by the condensing steam, the wafer can be dried quickly in situ. Because the invention does not use the “wet” batch (cassette) cleaning technology of the prior art, the clean wafer can exit from the system in a dry state, enabling a “dry in/dry out” single wafer processing strategy. Consequently, the cleaning apparatus of the present invention can be tightly integrated and form a part of a semiconductor processing system.

In one aspect of the present invention, a semiconductor deposition system includes a chemi-mechanical polishing apparatus operative to perform a CMP process on a surface of a semiconductor wafer, and a wafer cleaner for cleaning the wafer surface before and/or after the CMP process. Preferably, the wafer cleaner includes a wafer rotating mechanism, a steam inlet for applying steam directly to an active surface of a rotating wafer, and a liquid inlet for simultaneously applying a liquid to the backside of the wafer. Preferably, the CMP apparatus is implemented with the wafer cleaner as a chamber of a cluster machine.

The present invention further includes a method for manufacturing an integrated circuit including subjecting an active surface of a wafer to a plurality of processes, and cleaning the active surface of the wafer before, during, or after the plurality of processes. As used herein, the term “plurality of processes” refers to two or more processes selected from a group including deposition, patterning, doping, planarization, etching, and ashing processes. For example, the planarization process can be a chemi-mechanical polishing (CMP) process. After subjecting the active surface to the plurality of front end semiconductor manufacturing processes, the wafer is cut into a plurality (i.e. two or more) of integrated circuit die, and the die are packaged to form a plurality of integrated circuits.

A work piece cleaning system in accordance with the present invention includes a work piece holder including a plurality of work piece gripping members, a rotator mechanism coupled to the gripping members to rotate the work piece, a vapor phase inlet positioned to apply a vapor phase at a first temperature to a first surface of the work piece, and a liquid phase inlet positioned to apply a liquid phase at a second temperature lower than the first temperature to a second surface of the work piece. The liquid phase cools the work piece such that there is substantial condensation of the vapor phase when it contacts the first surface of the wafer. Preferably, the system further includes a liquid supply, and a vapor phase generator and filter coupling the vapor generator to the cleaning chamber. The liquid supply preferably comprises deionized water, and/or isopropyl alcohol solution, or other suitable aqueous and nonaqueous cleaning agents.

A work piece cleaning system in accordance with other aspects of the present invention includes a supply of an aqueous solution, a steam generator coupled to the supply of aqueous solution and operative to generate a vapor phase of the aqueous solution, a filter coupled to the steam generator to filter the vapor phase, a rotating wafer holding mechanism, and a nozzle coupled to the filter to direct the vapor phase to a surface of the wafer that is held and rotated by the wafer holding mechanism. Some of the vapor phase becomes liquefied upon contacting the wafer, and is urged outwardly toward the edge of the wafer by the rapid rotation of the wafer. Preferably, a liquid phase of an aqueous solution is applied to the other surface of the wafer to clean the backside of the wafer and to cool the wafer to aid in the condensation process. An ultrasonic transducer or other vibration mechanism can be coupled to the system to further aid in the cleaning process.

An advantage of the present invention is that it can be characterized as a “dry” process, even though various fluids are applied to the wafer during the cleaning process. This is because the wafer is heated during the cleaning process, and can be removed from the cleaning system in a dry state. As such, it can form an integral part of a semiconductor manufacturing apparatus, such as a cluster tool.

Another advantage of the invention is that the active side and the back side of the wafer can be cleaned simultaneously. This is advantageous in that processes of the prior art that only clean the active side of the wafer leave particles and residue on the back side of the wafer that can, itself, become a source of contamination for the active side.

A still further advantage of using a vapor phase, such as steam, to clean the active side of a wafer is that it is an inherently cleaner process than the wet clean processes of the prior art. This is due, in great part, to the extremely high purity that can be achieved with steam, especially when it is passed through a filter in its vapor phase. As such, the steam cleaning agent introduces virtually no particles or contaminants to the surface of the wafer.

These and other advantages of the present invention will become apparent to those skilled in the art upon a reading of the following descriptions of the invention and a study of the several figures of the drawing.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram view of a manufacturing system for making integrated circuits in accordance with the present invention;

FIG. 1<i>a </i>is a flow diagram of a manufacturing process of the present invention that can be implemented with the system illustrated in FIG. 1;

FIG. 2 is a diagram illustrating the operation of a semiconductor processing cluster tool in accordance with the present invention;

FIG. 2<i>a </i>is a flow diagram of a process for operating the cluster tool of FIG. 2;

FIG. 3 is a partially sectioned, top plan view of a wafer cleaner in accordance with the present invention;

FIG. 4 is a cross-sectional view take along line <b>4</b>—<b>4</b> of FIG. 3;

FIGS. 5<i>a </i>and <b>5</b><i>b </i>illustrate the movement of a fluid over the surface of a semiconductor wafer as the wafer is rotated both with reference to ground (FIG. 5<i>a</i>) and with respect to the wafer (FIG. 5<i>b</i>);

FIG. 6 is a schematic view of a cleaning chamber of the present invention illustrating the loading and unloading of a wafer;

FIG. 7 is a diagram illustrating the vapor phase delivery system and liquid phase delivery system of the present invention; and

FIG. 7<i>a </i>illustrates a process flow of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In FIG. 1, a semiconductor manufacturing system <b>10</b> includes a fabrication facility or “fab” <b>12</b> including a number of semiconductor processing apparatus and tools. Typically, the fab <b>12</b> is enclosed within a clean room <b>14</b>, e.g. a Class 10 or Class 1 clean room. The fab <b>12</b> includes one or more Ultra High Purity (UHP) wafer cleaners <b>16</b> (e.g. <b>16</b><i>a</i>, <b>16</b><i>b</i>, <b>16</b><i>c</i>) in accordance with the present invention in addition to front end processing apparatus <b>20</b>. As used herein, “front end” processing apparatus include systems, machines, apparatus, tools, etc. which operate at the wafer level to perform such functions as deposition, etch, photolithography, chemi-mechanical polishing (CMP), etc.

As is well known to those skilled in the art, a series of front end processing operations are used to build the multiple layers of an integrated circuit structure. Some of these front end processing equipment are shown generically in blocks <b>22</b> (e.g. <b>22</b><i>a</i>, <b>22</b><i>b</i>), while a particular front end processing apparatus is illustrated by CMP apparatus <b>24</b>. Also illustrated is a “coarse clean” apparatus <b>26</b> that is inserted into the process flow between CMP apparatus <b>24</b> and an UHP cleaning apparatus <b>16</b><i>a</i>. This “coarse clean” apparatus can be a “wet”, “dip” or brush cleaning apparatus as described previously, wherein one or more wafers are dipped into a vat of liquid cleaning solution or cleaned with brushes and liquid sprays. The coarse clean can also be an integrated module in the CMP machine itself, and/or a part of a cluster tool.

The semiconductor manufacturing system <b>10</b> may further include a backend processing system <b>28</b>. As used herein, “backend processing” includes systems, machines, apparatus, tools, etc. involved in the finishing work of manufacturing integrated circuits. Such backend processing systems includes the saws for cutting a process wafer into individual die, apparatus for testing the wafer in the die, apparatus for wire and packaging the die, etc.

A process for making an integrated circuit in accordance with the present invention is as follows. A semiconductor (usually silicon) wafer <b>30</b> is obtained from a wafer manufacturer. As noted previously, these wafers are provided in a very clean state, and are often referred to as “OEM Prime Virgin” wafers. Nevertheless, these wafers may have particles that need removing. The wafers <b>30</b> are entered into the fab <b>12</b> (typically through an air or load lock), and may be cleaned in a first Ultra High Purity (UHP) clean apparatus <b>16</b><i>a</i>. From there, the wafer <b>30</b> progresses through a number of front end processing apparatus forming a part of the front end processing system <b>20</b>. For example, the wafer <b>30</b> may be processed through one or more etch, epitaxial (“epi”), physical vapor deposition (“PVD”), etc. semiconductor processing systems <b>22</b><i>a</i>, and may be passed through an UHP cleaner <b>16</b><i>b </i>at various times during these processes.

Chemi-mechanical polishing (CMP) is becoming an increasingly popular method for planarizing and etching layers during semiconductor manufacturing. The CMP apparatus <b>24</b>, however, generates a large number of particles on the wafer <b>30</b> that must be removed prior to further processing. These particles are produced by the combination of chemical and abrasive actions caused by the CMP process. It is therefore desirable to have a first or “coarse” clean in an apparatus <b>26</b> immediately after a CMP operation.

A problem with simply cleaning a wafer <b>30</b> within a coarse cleaner <b>26</b> after a CMP operation is that there are still many particles left on the active and back surfaces of the wafer. Therefore, a UHP cleaning operation of the present invention is performed in a UHP clean apparatus <b>16</b><i>c </i>after the wafer <b>30</b> has been cleaned within the coarse cleaning apparatus <b>26</b>. After the cleaning within the UHP cleaning apparatus <b>16</b><i>c</i>, additional semiconductor manufacturing operations such as etch, PVD, chemical vapor deposition (“CVD”), etc. can be performed within the semiconductor processing systems <b>22</b><i>b. </i>

After the completion of the front end processing, a processed wafer <b>30</b>′ is typically removed from the fab <b>12</b> to other locations for further processing. As noted earlier, the “backend” processing system <b>28</b> performs such functions as testing the wafer <b>30</b>′, cutting the wafer into individual integrated circuits die, packaging the die, etc. The end result of the semiconductor manufacturing system <b>10</b> is to produce a number of integrated circuits, shown generally at <b>32</b>, from the wafers <b>30</b> passing through the system.

FIG. 1<i>a </i>summarizes a process <b>34</b> for making integrated circuits in accordance with the present invention. The process <b>34</b> begins with the obtaining of prime OEM wafers in an operation <b>36</b>, and a “dirty” processing operation <b>38</b> is performed. This dirty processing operation is performed in one of the aforementioned semiconductor manufacturing apparatus, or in other tools or environments related to the fabricated process, as will be appreciated by those skilled in the art. However, it should be noted that some processing operations are “dirtier” than other processing operations, and that cleaning may not be required after every operation which may leave some particles or other contaminants on the wafer surfaces.

After the performing of the dirty processing operation <b>38</b> the wafer is cleaned with in a UHP clean apparatus of the present invention. Preferably, the wafer is cleaned with steam on the active side of the wafer, and deionized water on the back side of the wafer in an operation <b>40</b>. Isopropol alcohol (“IPA”) can be added to the steam, the deionized water, or both, to aid in the cleaning process. Concentrations of between 0.1 to 25 volume % IPA are suitable. Next, in an operation <b>42</b>, the back end processing is completed. Operation <b>44</b> accomplishes the front end processing of the wafer to result in one or more packaged integrated circuits.

In FIG. 2, a semiconductor manufacturing apparatus <b>36</b> is in the form of a cluster tool including a number of chambers. More particularly, the cluster tool <b>36</b> includes a load station <b>38</b>, a robot chamber <b>40</b> and a number of processing chambers <b>42</b>, <b>44</b>, <b>46</b>, and <b>48</b>. The transfer chamber <b>38</b> and the processing chambers <b>42</b>-<b>48</b> are coupled to the robot chamber <b>40</b> by slit or gate valves <b>50</b>-<b>58</b>, respectively. A robot arm assembly <b>60</b> within the robot chamber <b>40</b> is used to transfer wafers between the various chambers <b>38</b>-<b>48</b>. The design and operation of cluster tools of the type of cluster tool <b>36</b> is well known to those skilled in the art.

Load station <b>38</b> includes a door <b>62</b> which can opened to a load cassette <b>64</b> including a number of wafers <b>30</b>. The cassette <b>64</b> is preferably placed on top of an elevator <b>66</b> within the transfer chamber <b>38</b> so that it can be moved vertically up and down (i.e. into and out of the plane of the paper in this figure). The load station <b>38</b> can be operated at atmospheric pressure or under vacuum. If operated at atmospheric pressure, the load station is preferably purged with dry, filtered nitrogen or filtered air via a hepa filter placed above the cassette <b>64</b> (not shown). In other embodiments of the invention, the cluster tool operates at absolute pressures lower than atmospheric, and can be evacuated by a vacuum system (not shown).

To begin processing the wafers within the cassette <b>64</b>, the slit or gate valve <b>50</b> is opened and the robot arm <b>60</b> removes one of the wafers <b>30</b> from the cassette <b>64</b>. This is accomplished by properly coordinating the movements between the robot arm assembly <b>60</b> and the vertical position of the cassette <b>64</b> as controlled by the elevator <b>66</b>. The design and use of robot wafer transfer systems is well known to those skilled in the art.

Once a wafer <b>30</b> has been removed from the cassette <b>64</b> and is within the robot chamber <b>40</b> as illustrated at <b>30</b>′ it can be placed within a first processing chamber <b>42</b> by opening the gate valve <b>52</b>. The gate valve <b>52</b> is then closed to allow the wafer <b>30</b> to be processed within the chamber <b>42</b>. The wafer then can be removed from the processing chamber <b>42</b> and inserted into, for example, a CMP chamber <b>44</b> for chemi-mechanical polishing. The robot movement of the wafer is accomplished as described previously, i.e. opening the appropriate gate valve leaving the wafer behind the chamber and closing the gate valve for subsequent processing.

It is assumed that the wafer leaves the CMP process chamber <b>44</b> in a reasonably clean state, i.e. with less than 200-500 particles per wafer, to prevent contamination of the robot transfer components. This contamination may degrade the performance of the UHP cleaning chamber <b>48</b> by contaminating wafers as they are removed. It is common to find “coarse” cleaning modules attached to the dirtier CMP process units, and if needed, these modules are assumed to be part of chamber <b>44</b>. As will be discussed in greater detail subsequently, the chamber <b>48</b> is provided with nitrogen (N2), deionized (DI), water, and filtered steam to support the UHP cleaning process.

After being cleaned within the UHP cleaning chamber <b>48</b> of the present invention, the wafer can be removed from a chamber <b>48</b> and replaced within the cassette <b>64</b> to be transferred to other apparatus. Therefore, the cluster tool <b>36</b> provides a processed, clean and dry wafer suitable for additional processing.

There, of course, may be other suitable configurations for the process chambers illustrated in FIG. <b>2</b>. For example, chambers <b>42</b>, <b>44</b>, or <b>46</b> can be photoresist strip chambers or more CMP or UHP steam cleaning chambers. Having multiple chambers on the same cluster tool can be advantageous for increased wafer throughput.

It should be noted that while, in the forgoing example, the UHP cleaning system is show to be a part of a cluster tool, that the UHP cleaning system can also be a stand-alone apparatus. That is, the cleaning system does not need to be integrated with other processing chamber, and can provide single or multiple wafer cleaning by utilizing the cleaning processes of the present invention. The UHP cleaning system of the present invention can also be implemented with multiple chambers in a cluster tool. That is, a plurality (i.e. two or more) UHP cleaning chambers can be provided on a single cluster tool to increase cleaned wafer throughput.

In FIG. 2<i>a</i>, a process <b>68</b> that can be implemented by the cluster tool <b>36</b> is illustrated in flow-diagram form. The process <b>68</b> begins at <b>70</b> with the loading of a wafer into a cluster machine. The wafer is then loaded into a cleaning chamber in an operation <b>72</b>, and operation <b>74</b> cleans one side of the wafer with steam and the other side with water. The wafer is then removed from the cleaning chamber in operation <b>76</b> and is removed from the cluster tool in an operation <b>78</b>.

In FIG. 3, a partially sectioned top plan view of the chamber <b>48</b> of FIG. 2 is illustrated in greater detail. The chamber includes an outer enclosure <b>80</b> made from, for example, welded aluminum. Within the chamber <b>48</b> is a cleaning apparatus <b>81</b> including a chuck <b>82</b> having a steam inlet <b>84</b>, a annular passage <b>86</b>, and annular a lip <b>88</b>, and an annular outlet or drain <b>90</b>. The top portion of the chamber <b>48</b> is not illustrated in this figure, but can be viewed in cross-section in FIG. <b>4</b>.

In FIG. 4, it can be seen that the cleaning apparatus <b>81</b> within the enclosure <b>80</b> includes a side wall structure <b>92</b><i>a</i>, <b>92</b><i>b</i>, and a lid assembly <b>94</b>. The side walls <b>92</b><i>a </i>are preferably formed from a conventional material such as aluminum or stainless steel, while the annular liquid drainage bowl <b>90</b> composed of outer wall section <b>92</b><i>b </i>and inner section <b>122</b>, is preferably made from a chemical resistant fluoropolymer such as PVDF (polyvinylidene fluoride), teflon (TFE, PFA, FEP), teflon NXT, Halar (ECTFE), or Kel-F (PCTFE). Polysulfone and PEEK may also be used, as well as stainless steel. The lid assembly <b>94</b> includes sections <b>94</b><i>a</i>, <b>94</b><i>b</i>, and <b>94</b><i>c</i>. Section <b>94</b><i>a </i>lies over the wafer and any particles created by this material will fall directly on the wafer surface. For this reason, it is preferably made from PEEK, teflon PFA, or teflon NXT. Section <b>94</b><i>c </i>is preferably made from the same materials as section <b>92</b><i>b</i>, but they need not be the same in each component. Section <b>94</b><i>b </i>is preferably made from the same materials as section <b>92</b><i>a. </i>

In a preferred embodiment of the present invention, the chuck <b>82</b> includes an upper platen portion <b>96</b> and an integral shaft portion <b>98</b>. A wafer <b>30</b> is held above the upper surface <b>97</b> of the platen portion <b>96</b> by pins <b>100</b>. Preferably, at least 3 notched pins <b>100</b> are used to hold the wafer <b>30</b> securely to the chuck <b>82</b>. A flow channel is provided within the shaft portion <b>98</b> and platen portion <b>96</b> for the passage of fluids, as will be discussed in greater detail subsequently.

The chuck <b>82</b> is supported for rotation by bearing assemblies <b>102</b> which engage the shaft portion <b>98</b> of the chuck <b>82</b>. These bearings <b>102</b> are supported for up and down vertical movements by carriage <b>104</b> for the purpose of loading and unloading the wafer <b>30</b> from the chuck <b>82</b>. The up and down movement of the carriage <b>104</b> is controlled by a motor <b>106</b>.

Optionally attached to the underside of the platen portion <b>98</b> are a plurality of ultrasonic transducers <b>108</b>. As used herein “plurality” means two or more transducers. Alternatively or additionally, an ultrasonic transducer <b>110</b> can be coupled to the lower end of the shaft portion <b>98</b> of the chuck <b>82</b>, or in other locations. The entire chuck <b>82</b> is rotated by a motor <b>120</b> with the use of a drive belt and pulley <b>121</b>, or by direct connection with motor <b>120</b>, or by some other suitable transmission mechanism. A frame (not shown) is provided and is preferably connected to the side wall structure <b>92</b> of the enclosure <b>80</b>. The frame includes a purge vent <b>124</b> into which a nitrogen (N2) purge can flow. The nitrogen flows through the vent <b>124</b> into the space <b>125</b> between the drainage bowl <b>122</b> and chuck <b>82</b>. An upper portion of the drainage bowl <b>122</b> forms the annular lip <b>88</b> which surrounds the perimeter of the platen portion <b>96</b> of the chuck <b>82</b>. Preferably, the lip <b>88</b> is provided with a relatively sharp edge <b>126</b>. When nitrogen flows through vent <b>124</b>, it divides into two main routes. Some of the nitrogen flows through the space <b>125</b>, and down through the bearing assemblies <b>102</b>. This flow prevents particles generated in the bearings from contaminating the process chamber. The other component of nitrogen flowing from vent <b>124</b> flows around the platen portion <b>96</b> of the chuck <b>82</b> and over the sharp edge <b>126</b> of the annular lip <b>88</b>. This prevents liquid from flowing into the space <b>125</b> and, instead, urges any liquid towards the drain portion <b>90</b>.

N₂purging is also provided in the lid assembly <b>94</b>, through an annular shaped passageway <b>127</b>, preferably exiting at or near the outer diameter of wafer <b>30</b>. This purge aids in the reduction or elimination of recirculation eddies (caused by rotation) which can contaminate the edge of the water.

The lid <b>94</b> is provided with a steam inlet <b>84</b>. This allows a vapor phase to be applied to an upper or “active” surface <b>130</b> (i.e. the surface that has integrated circuit devices being formed thereon) of the wafer <b>30</b> and a aqueous or liquid phase be applied to the back side surface <b>132</b> of the wafer <b>30</b>. Preferably, heat traces <b>134</b> (e.g. electrical resistance tape or blankets) are used to maintain an elevated temperature on the sidewalls structure <b>92</b><i>a </i>and the lid <b>94</b><i>b </i>to prevent condensation, particularly on components <b>94</b><i>a,c </i>and <b>92</b><i>b. </i>

In operation, the lid <b>94</b> is lifted and the chuck <b>82</b> is caused to move in a vertical direction by the carriage <b>104</b> moving under the controller motor <b>106</b>. A wafer is then placed on the platen portion <b>96</b> of the chuck <b>82</b> by the robot arm assembly, and the pins <b>100</b> engage the edge of the wafer <b>30</b>. The chuck <b>82</b> is then retracted within the chamber <b>48</b> and the lid <b>94</b> is closed and sealed via seals <b>136</b>. The chuck <b>82</b> is caused to rotate by motor <b>120</b> and transmission <b>121</b>, the purge nitrogen is caused to flow through vent <b>124</b>, and between <b>94</b><i>a </i>and <b>94</b><i>c</i>, deionized water is caused to flow through the channel <b>136</b> of the chuck <b>82</b> and through the liquid inlet <b>84</b>, and steam is introduced to the surface <b>130</b> of the wafer <b>30</b> through the steam inlet <b>138</b>. The water flowing on the back side <b>132</b> of the wafer <b>30</b> draws heat away from the wafer (i.e. provides a “heat sink”) and also cleans the back side of the wafer <b>30</b>. The water flows from the center of the wafer <b>30</b> to the edges of the wafer and is then directed by the lip <b>126</b> and the nitrogen purge into the drain <b>90</b> of the system. The steam entering nozzle area <b>138</b> impinges on the wafer <b>30</b> near the center, and is quickly condensed as it proceeds toward the outer diameter by the relatively cool wafer. The rotation of the chuck <b>82</b> causes the condensed steam to spin off of the surface of the wafer and to flow into the drain <b>90</b>. The rotation enhances the heat and mass transfer processes required to provide significant condensation for effective cleaning and purging of the wafer surface.

In FIG. 5A, the flow of fluid with respect to “ground” illustrates a spiral path <b>140</b> of the cleaning fluid from the center C to the edge E of wafer <b>30</b>. That is, steam released onto the active surface of the wafer is condensed on the wafer surface and spirals or otherwise moves from the center C towards the edge E of the wafer. This movement of the cleaning fluid is caused, to some extent, by the fluid build up of condensate on the active surface of the wafer and, to a greater extent, by the rotation of the wafer <b>30</b>. The wafer <b>30</b> is held by the pins <b>100</b> to enable this rotation.

FIG. 5B is the same view of the wafer <b>30</b> as in FIG. 5A, except the movement of the cleaning fluid <b>142</b> is shown with respect the surface of the wafer <b>30</b>. As can be seen, the fluid <b>142</b> moves essentially radially from the center C to the edge E of the wafer, when taken from the perspective of the surface of the wafer <b>30</b>. This radial movement is, again, due to the fluid accumulation during the condensation from the center C outward of the wafer <b>30</b>, and due to centrifugal forces created by the rotation of the wafer <b>30</b>. The wafer <b>30</b> is held by the pins <b>100</b>, as discussed previously, to enable this rotation.

While the FIGS. 5A and 5B illustrate the movement of the cleaning fluid from central regions of the wafer <b>30</b> towards the edge regions of wafer <b>30</b>, it is to be understood that the fluid paths <b>140</b> and <b>142</b> are for conceptual purposes only. The actual paths will vary dependent upon a variety of factors including the wetting of the wafer, irregularities in the wafer surface, droplet formation, etc. The key, however, is that the cleaning fluid tends to flow across the surface of the wafer and to be spun off of the edges of the wafer as it travels from the central regions of the wafer to the edge of the wafer.

In FIG. 6, the apparatus is illustrated in a pictorial fashion to facilitate a description of the loading and unloading of wafers. Assuming that the gate valve <b>58</b> is opened, the robot arm <b>60</b> places a wafer <b>30</b> within the chamber in alignment with the chuck <b>82</b>. At this point in time the chuck <b>82</b> is in a lower or retracted position <b>82</b>′ such that the wafer <b>30</b> is held above the chuck <b>82</b>. The chuck <b>82</b> is then raised such that pins <b>100</b> engage with the edge of the wafer <b>30</b> to firmly hold the wafer <b>30</b> to the chuck <b>82</b>. Typically, at this time, the robot arm <b>60</b> is withdrawn and the gate valve <b>58</b> is then closed. The chuck <b>82</b> is then lowered again to <b>82</b>′such that the lid <b>94</b> can be closed over the chuck. After cleaning, the process is reversed to remove the wafer <b>30</b> from the pins <b>100</b> of the chuck <b>82</b>.

FIG. 7 illustrates both a stand-alone flat workpiece cleaning system and the support systems for a cleaning chamber <b>48</b> of a cluster tool system. The chamber <b>48</b> has a number of inlets <b>146</b>, <b>148</b>, and <b>150</b>, and an outlet or drain <b>152</b>. There may also be a gaseous pressure outlet or drain (not shown here) for the N2 purge gasses. A steam generator <b>154</b> is preferably coupled to the inlet <b>146</b> by a valve system <b>156</b> and a filter <b>158</b>. A preferred steam generator <b>154</b> construction is disclosed in U.S. Pat. No. 5,063,609 the disclosure of which is incorporated herein by reference for all purposes. Preferably, the tubing <b>160</b> coupling the steam generator <b>154</b> to the valve system <b>156</b>, the valve system <b>156</b>, and tubing <b>162</b> coupling the valve system <b>156</b> to the filter <b>158</b> are made from PFA Teflon to minimize contamination of the steam. Alternatively, these aforementioned components can be made of teflon FEP, teflon NXT, PEEK, or PVDF. Heat traces <b>164</b> are preferably provided around at least tubing <b>162</b>, and preferably tubing <b>160</b>, valve assembly <b>156</b>, and filter <b>158</b>, to prevent the steam from condensing. Thermal insulation (not shown) may also be utilized on the aforementioned components. Various gas tanks such as a gas tank <b>166</b> for N₂, a gas tank <b>168</b> for HF, a gas tank <b>170</b> for HCL, and a gas tank <b>185</b> for NH₃are coupled to the valve system <b>156</b> such that one or more of these gasses can be mixed with the steam generated by steam generator <b>154</b>.

The filter <b>158</b> forms an important part of the purification of the steam created by steam generator <b>154</b>. While steam, in general, is a very clean form of water, it can still carry minute particles, aerosols, and impurities which can be deposited upon the active wafer surface. The present invention preferably employs a 100% Teflon microporous filter, such a filter made by Millipore Corporation as model number Chem-Line II PF40. The steam is filtered in its gaseous phase, and then is applied to the active wafer surface via the inlet <b>146</b> of the chamber <b>48</b>. This is very advantageous since filtering efficiency is much higher for the gaseous phase of water versus the liquid phase of water. This filtering of the gaseous phase therefore ensures a very high purity steam being applied to the active surface of the wafer.

A source of deionized (DI) water <b>172</b> and a source of heated N₂purge gas <b>174</b> are coupled to inlet port <b>148</b> by valve <b>176</b> and tee <b>178</b>. The DI water <b>172</b> is applied to the backside of the wafer <b>30</b> (not shown) to both wash the backside of the wafer and to carry heat away from the wafer, i.e. to provide a “heat sink.” The heated N₂purge gas <b>174</b>, coupled with nitrogen from tank <b>166</b> fed through heated components valve <b>156</b>, line <b>162</b>, and filter <b>158</b>, is used to dry the wafer after cleaning. A drain is coupled to the valve assembly <b>178</b> by a drain valve <b>182</b>. An additional (unheated) N₂purge <b>184</b> is coupled to the inlet <b>150</b>.

In FIG. 7A, a process <b>190</b> for cleaning flat workpieces such as semiconductor wafers, disk drive platters, optical blanks, etc. begin at an operation <b>192</b> wherein a wafer is loaded into the cleaner and the lid is closed. In an operation <b>194</b>, the chuck is then caused to rotate to rotate the loaded wafer. The cleaner is purged with N2 gas to force out air, CO₂, etc. in an operation <b>196</b>. The backside water flow is then started in an operation <b>198</b>. Subsequently, the front or “active side” steam flow is stared in an operation <b>200</b>. Ultrasonics (if any) can then be started in an operation <b>202</b>. Any process chemicals (e.g. HCL, HF, HBr, NH₃) used to enhance the cleaning process can be added in an operation <b>204</b>. There is no requirement, however, that any process chemicals be used. If process chemicals are used, they are then stopped in an operation <b>206</b>. Operation <b>208</b> then performs a steam rinse to remove any remaining process chemicals. Optionally, isopropyl (IP) alcohol is then added to the water used to generate the steam in an operation <b>210</b>. While IP is useful in the cleaning process under many circumstances, it may not always be desirable to add IP to the steam generator water. Both sides of the wafer then continue to be cleaned in an operation <b>212</b>. That is, the top or active side of the wafer continues to be cleaned by the steam and steam condensate, while the bottom side of the wafer continues to be cleaned by the DI water. Such cleaning can continue, for example, for about 30 seconds.

After the main portion of the cleaning cycle has been completed, the ultrasonics are turned off and the back side water flow is stopped in an operation <b>214</b>. The cleaner is then drained of the cleaning fluids that were accumulated during the back side rinsing of the wafer in an operation <b>216</b>. In an operation <b>218</b>, the top side steam is stopped, and a top side N2 purge is started. Subsequently, a backside N2 purge with heated N2 gas is commenced in an operation <b>220</b>. After the wafer (or other workpiece) is dry, an operation <b>222</b> terminates the purges, stops the rotation of the wafer, opens the lid, and removes the clean, dry wafer from the cleaning system.

While this invention has been described in terms of several preferred embodiments, it is contemplated that alternatives, modifications, permutations and equivalents thereof will become apparent to those skilled in the art upon a reading of the specification and study of the drawings. It is therefore intended that the following appended claims include all such alternatives, modifications, permutations and equivalents as fall within the true spirit and scope of the present invention.