Plasma panel erase apparatus

[57] ABSTRACT

Apparatus and method for erasing a selected gas discharge cell located between one of a plurality of X electrodes and one of a plurality of Y electrodes. Erasure is performed with non-coincident pulses and is particularly well suited for use with a sustaining pulse generator of the type which alternately applies sustaining pulses of a preselected amplitude and polarity to all the X electrodes and then to all the Y electrodes, since the sustaining pulse may be used as the conditioning pulse and with a slight modification as the erase pulse on the Y electrode.

Claims, 6 Drawing Figures

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PATENTED SEP 161975

3,906,451

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PATENTED SEP 161975

3,906,451

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3,906,451

PATENTED SEP 161975

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PATENTED SEP 161975

3,906,4b!

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3,906,451

PLASMA PANEL ERASE APPARATUS BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention pertains to the so-called plasma or gas 5 discharge display panel, and in particular the erasing of those individual spots in the type of displays which have an inherent memory capability. In such inherent memory displays writing is the initiation of light emission in a gas volume located between two selected electrodes 10 where light emission has not recently occurred. Writing is performed by imposing a voltage differential between the two electrodes having a peak greater than a threshold value, which threshold value is dependent on the characteristics of the display involved. Once emission 15 occurs in a particular gas volume or cell, sustaining pulses having voltage peaks less than the writing threshold can be applied to one or the other, or both electrodes, which cause a previously written cell to emit light upon each application of sustaining pulses to the 20 electrodes, and do not cause light emission from any cells which have not been specifically written. A more detailed description of writing and sustain techniques, as well as the physical characteristics of such displays, are contained in U.S. Pat. No. 3,573,542 (Mayer, et 25 al.,) having an assignee common with this application, in U.S. Pat. No. 3,786,474 (Miller); and in U.S. Pat. No. 3,671,938 (Ngo). Reference to these patents will permit easier understanding of the instant invention.

For general background in the gas discharge display ³⁰art, Materials of High Vacuum Technology, Warner Espe, pub. Pergamon Press 1968 is a valuable reference.

It is also necessary to be able to selectively extinguish or erase light emission from individual cells, in order to ³⁵permit efficient use of the display.

2. Description of the Prior Art

The Ngo each Mayer patents disclose the usual means of erasing a particular cell. The X electrode (on one side of the panel) and the Y electrode (on the other side of the panel) for that particular cell are ach simultaneously energized with a special half-select erase pulse. The erase pulses may have identical shapes, but are of opposite polarity as applied to the selected X electrode and Y electrode. Each is chosen such that by itself it is incapable of erasing any cell. The voltage caused across the cell between the two is, however, sufficient to cause the selected cell to be erased.

BRIEF DESCRIPTION OF THE INVENTION

This invention comprises apparatus for interrupting a normal series of sustaining pulses applied to all of the electrodes, both X and Y, with first of all a conditioning pulse (which may be a sustaining pulse) which reverses the polarity of the residual wall charge of the cells commonly adjacent the X electrodes which supplies firing current to the cell to be erased, with respect to all the other cells in the display. The conditioning pulse should be of sufficient magnitude so as to duplicate the effect on the cells receiving a conditioning pulse of a normal sustaining pulse in that direction, and it is in fact preferred that it be a sustaining pulse. Then an erase pulse is applied to the Y electrode which supplies firing current to the cell to be erased, which is sufficient to remove the residual wall charge at the site of the selected cell, but affects all other cells adjacent that Y electrode very little because the erase pulse has the polarity of the most recent sustaining pulse applied to them. After the erase pulse has been completed, normal sustaining pulses can then resume and all cells previously emitting light, except for the erased cell will continue to emit. The erase pulses employed in the technique can be chosen to have maximum amplitude approximately equal to or less than that of the voltage of sustaining pulses. The preferred erase pulse is distinguished by its slow rise time relative the sustaining pulses. In order to more reliably accomplish the desired erasing, it is preferred that a few sustaining pulse cycles be applied to the panel between each separate erase cycle.

A possible variation allows the removal of the residual wall charge by partially overlapping the conditioning pulse on the X electrode with the erase pulse on the Y electrode, both pulses having normal sustaining pulse rise times and differing from normal sustain operation by their overlapping. Still another variation permits application of the conditioning pulses to all except the electrode adjacent the cell to be erased and then application of the usual erase pulse to the Y electrode.

Accordingly, one object of this invention is to increase reliability in erasing of plasma cells.

A second object of this invention is to decrease the number of different pulse shapes required in the normal operation of a gas discharge panel.

Another object is to provide an erasing technique compatible with certain display operating systems.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. la is a combination block and circuit diagram of a gas discharge display panel and its operating system employing this invention.

FIG. 10 and Ic are simple erase circuit diagrams.

FIG. 2 displays waveforms associated with this invention.

FIG. 3 discloses waveforms associated with a variation on this invention.

FIG. 4 is a modification to FIG. 1 necessary in implementing the variation on the invention associated with FIG. 3.

DESCRIPTION OF THE PREFERRED EMBODIMENTS ⁴⁵ FIG. la discloses apparatus incorporating this invention in a workable gas discharge display panel system in which individual gas volumes or cells may be selectively written and erased. The diagram has been some₅θ what simplified by eliminating the writing circuitry and by making the display panel itself a matrix much smaller than that which normally would be employed in a commercial system. However, the principles displayed are applicable to a panel having any number of ionizable cells. Panel 100 can be conveniently considered to comprise two identical parallel sheets formed of glass or other suitable dielectric, spaced a short distance apart, and closed around their periphery. Between them a gas-tight chamber is formed which is 60 with any of the various well-known gas mixtures which can be locally ionized by the application of a voltage gradient across any desired volume thereof, and thereby made to produce visible light. X electrodes 101a-10L/ are placed adjacent the gas chamber in ₆₅ panel 100 on the near or front side of panel 100 as ' iewed in FIG. la. Y electrodes 102&lt;?-102&lt;/ are similarly placed adjacent panel 100 on its back or far side respect to the viewer of FIG. la. Both Y electrodes

3,906,451 paths. Thus, switch 128 provides a very low impedence path between current paths 129 and 130 whenever suitable positive control voltage is present on control path 127. OR gates 110a-l 10(/ provide the logical OR of the 5 signal on path 112 and the respective paths 111 a-111(/, on respective output paths 109α-109(/ DC sustain voltage V„ must have a magnitude selected for the particular physical dimensions and gas mixture present in panel 100. Selection of the sustain voltage 10 magnitude can be done according to teachings of the prior art.

During normal sustain operation (when neither writing nor erasing occurs) timing system 126 supplies switch control signals which cause the production of 15 waveforms 201 and 202 to the left of time T_rf (FIG. 2) on signal paths 112 and 127 respectively. It is assumed that the aforementioned wall charges exist adjacent written cells. When a sustain control pulse issues from sustain timing system 126, OR gates 110α—110(/ almost 20 instantaneously produce an identical pulse on each control signal path 109α-109(/, which closes switches 107a-107&lt;/, respectively. No pulse is applied to path 114 during this time, causing switch 113 to remain open. Voltage V„ is applied through switches 25 107α-107(/ and diodes 124a-124J to X electrodes 101a-101&lt;/ as pulse 201a. A second pulse issued by timing system 126 on signal path 121 is coincident with pulse 201α and causes switch 117 to close and Y electrodes 102α-102(/ to be grounded or connected to an 30 other reference voltage through diodes 103 a-103(/ respectively and switch 117 itself for the entire duration of pulse 201α. Pulse 201α has the appropriate rise time and duration to maintain or sustain the light-emitting status of the cells between the various X and Y elec³⁵ trodes. The voltage experienced by the cells of panel 100 due to this pulse, indicated as pulse 201α there also, is shown by arbitrary selection in waveform 205 as positive, which means only that the positive direction of current flow is from X electrodes 101a-10k/ to ⁴¹¹ Y electrodes 102a-102(/

At the appropriate time after the trailing edge of pulse 201α, the signal closing switch 117 is removed from path 121 and a sustain control pulse is applied to signal path 127 which causes switch 128 to close and ⁴⁵ apply V, to Y electrodes 102α-102(/ as pulse 202α. At or before this time, timing system 126 issues a pulse on path 114 causing switch 113 to close for the duration of pulse 202α and connect X electrodes ΙΟΙα-lOlrf to ground or other reference voltage. This causes a volt⁵⁰ age to be applied between Y electrodes 102α-102(/ and X electrodes 101a-101(/ equal in magnitude but opposite in direction to that applied during pulse 201α. This causes cells between which have conducted during pulse 201α. to conduct again and emit light. Pulse 202α *5 is shown in waveforms 202 and 204 as having positive polarity with respect to ground. In waveforms 205-208, pulse 202α is shown as having negative polarity because its effect is to cause current to flow from Y electrodes 102a-102(/ to X electrodes lOla-lOL/. The second X sustaining pulse 2016 is identical to pulse 201α, and occurs a preselected time after the trailing edge of Y sustaining pulse 202α. X and Y sustaining pulses continue to alternate in this fashion during normal sustaining operation. The interval between successive sustain pulses should be selected so as to produce the desired brilliance. as seen by the human eye. from each lightemitting cell.

102α-102(/ and X electrodes 101α-101ί/ are each shown parallel to others of the same designation, but this need not be. Y electrodes 102a-102&lt;/ are shown generally perpendicular to X electrodes lOla-lOld, although this also need not be so. Both X electrodes 101α-101ί/ and Y electrodes 102«-102r/ are shown as wires, but it may be convenient to form them of conductive transparent films placed on the exterior of the dielectric sheets, conductive strips embedded within the dielectric sheets, or in any of the other various embodiments of the prior art. It should be understood that each X and Y electrode ΙΟΙα-lOlJ is in close and intimate contact with the dielectric sheets so as to create relatively high capacitance between it and the adjacent gas volume within panel 100.

It is further assumed that application of a suitable voltage potential to a selected Y electrode 102α-102(/, say Y, electrode 102«, and a selected X electrode 101a-101(/, say X_:l electrode 102c, will cause the gas volume or cell commonly adjacent both selected electrodes (designated by ref. num. 125 in FIG. la) to ionize and conduct current briefly, and in so doing, emit light. Current flow and light emission ceases when the inherent capacitance between the selected X electrode and selected Y electrode adjacent the cell becomes charged to a level sufficiently close to the difference between the voltages applied to the X electrode and Y electrode involved that insufficient voltage across the gas volume exists. To cause further conduction, the voltages on the X electrode and the Y electrode may be reversed before the residual charge in the inherent capacitance is discharged by leakage, allowing conduction in the opposite direction with a lower voltage than if no residual or wall charge is present. This is because the voltage caused by the wall charge in the inherent wall capacitance has polarity which tends to assist the firing of the cell by the voltage between the adjacent electrodes of polarity opposite to that of the most recent pulse. Therefore, each cell in panel 100 can be considered to be a single memory bit whose content is indicated by the decreased voltage difference needed between the X electrode and Y electrode adjacent that cell to cause light emission when wall charge caused by a recent cell firing is present. By the application of sustaining pulses of a certain polarity to all Y electrodes 102α-102(/ alternately with similar pulses of the same polarity to X electrodes lOla-lOW, the conductive/nonconductive status of all cells may be maintained indefinitely. This is known as monopolar sustain operation. This memory characteristic, as well as means for writing individual cells are explained in greater detail in the previously mentioned Mayer and Ngo patents.

Sustaining is controlled in FIG. la by timing system 126 which supplies individual control pulses which cause other elements of the system to apply appropriate sustaining pulses on X electrodes 101α—101&lt;/ and Y electrodes 102a-102J to maintain cells of panel 100 in their current memory or light-emitting status. In the monopolar sustain method while a pulse is applied to all electrodes of a given type the other electrodes are grounded or otherwise connected to a reference voltage. Switches in FIGS. 1«-1&lt; are represented by blocks labeled SW, and may conveniently be of the type whose impedence between the current paths entering the block on opposite sides is essentially 0 whenever a suitable positive voltage is applied to the third, control path entering the block on a side between the other two

3,906,451

The X erase select signal on line 118 digitally specifies which of the X electrodes 101a-101&lt;7 passes adjacent the cell to be erased. Similarly, the Y erase select signal on path 120 specifies the Y electrode which passes adjacent the cell to be erased. In this way any desired cell to be erased may be easily and accurately designated. For the remainder of the discussion, assume that cell 125 which is adjacent X₃ electrode 101c and Y j electrode 102α is specified by the select signals on paths 118 and 120.

FIG. 2, previously mentioned in conjunction with normal sustain operation, discloses a number of waveforms comprising pulses and resulting cell voltages before, during and after a typical erasing operation, ft is most convenient to explain the invention in terms of the times and types of pulse applied, rather than in terms of the actual circuitry producing them, since circuits capable of producing them at the specified times are well known. The pulse train applied by X electrodes other than the X₃ electrode 101c to panel 100 can be conveniently denoted by V„ waveform 201 (unselected X electrode voltage) and that applied by Y electrodes other than Y । electrode 102α can be referred to as V„„. Vj, and V„ are the voltages applied to the X and Y electrodes selected by X and Y erase signals respectively on paths 118 and 120 to halt light emission from the selected cell, cell 125 for explanatory purposes. Since the sustaining pulse in waveforms 203 and 204 are identical to those in waveforms 201 and 202, they have been given identical reference numerals.

Placing an erase synchronizing signal on path 150 at time T_Pi initiates an erase operation. Timing system 126 interrupts issuance of sustaining pulses on lines 127 and 112 after the next trailing edge of a Y sustaining pulse, say pulse 202b. The X erase select signal on path 118 causes X-line conditioning select system 115 to produce a control signal on the appropriate conditioning control signal path 11 la-111 J, in this case path 111c for electrode X₃, a preselected time after the occurance of the erase synchronizing signal. OR gate 110c produces an essentially similar pulse on path 109c, which causes switch 107c to close, applying voltage V_s to X₃electrode 101c via diode 124c. This voltage is represented as conditioning pulse 203α in FIG. 2. It is preferable that the conditioning pulse control signal on path 111c be such that conditioning pulse 203α is similar or identical to a normal sustaining pulse 201α or 201b, differing only in that conditioning pulse 203α is applied to and affects only X_;) electrode 101c, rather than all X electrodes 101a-101&lt;7. Prior to the leading edge of pulse 203α, timing system 126 issues the appropriate control signal on signal path 121 to cause switch 117 to ground all Y electrodes 102a-102d. Therefore, conditioning pulse 203α affects X electrode 101c only, exactly the way sustaining pulse 201b affected it. As previously mentioned, sustain timing system 126 interrupts sustaining signals after a sustaining signal to Y electrodes 102α-102t/ has issued, and before the next sustaining pulse for X electrodes 101a-101c/ has issued. The effect of conditioning pulse 203α is to reverse the polarity of the residual wall charge in the dielectric spaced between selected X₃ electrode 101c and the portions of Y electrodes 102a-102z/ adjacent it, including the dielectric adjacent cell 125. Upon completion of conditioning pulse 203α, sustain timing system 126 removes the grounding signal to switch 117.

The next step of the erasing of selected cells 125 involves placing erase pulse 204α on Y_t electrode 102α, the electrode specified by the Y erase select signal on signal path 120. At the time the control signal is removed from switch 117 or shortly thereafter, a similar control signal is applied to path 114 for a preselected time by timing system 126 causing switch 113 to close and ground all X electrodes ΙΟΙα-lOW. At that time, or shortly thereafter, Y-line erase select system 116 energizes for a preselected time that one of the four erase control signal paths 106-106(7 specified by y erase select signal, in this case path 106α, causing switch 105α to close. OR gate 131 passes this switch closure signal through to signal path 119 to provide a control signal to erase pulse generator 122. In response to the control signal on path 119, erase pulse generator emits erase pulse 204α on path 123 which is applied to the power input terminal of switches 105a-105&lt;7 Since only switch 105a is closed, erase pulse 204a is applied to only Y, electrode 102a. Pulse 204a is chosen to have a shape and duration suitable to remove the residual electric charge in the walls of panel 100 adjacent cell 125, to prevent later conduction by cell 125 upon the application of normal sustaining pulses 201c and 202c.

Referring to waveform 208, it can be seen that cell 125 is subjected to a positive conditioning pulse 203α and the following negative erase pulse 204α. By comparing waveform 208 with waveforms 205-207 it can be seen that between time T,., and T,,₂, only cell 125 has the pulses of waveform 208 applied to it. During this time, no voltage pulses are applied to those cells not adjacent Y| electrode 102α or X_:1 electrode 101c, as displayed by waveform 205. Cells adjacent X_:, electrode 101c, excepting cell 125, are subjected during this time to the voltages of waveform 207, which essentially comprises conditioning pulse 203α only. Cells adjacent Yi electrode 102α excepting cell 125, are subjected to the voltages of waveform 206, which comprises erase pulse 204α during the interval between times T.., and T_(1i. In analyzing the effect of these pulses in cells other than cell 125, one must realize that a pulse which is of the same polarity and approximately the magnitude of a sustaining pulse immediately preceding it does not affect the wall charge in the dielectric adjacent the electrodes to which the pulse is applied, and hence does not affect the memory condition of the cells involved. Pulse 203α in waveform 207 merely acts as a normal sustaining pulse whose function would normally be performed by pulse 201c, and hence following it with pulse 201c does not affect the condition of cells adjacent X_:, electrode 101c. Pulse 204α in waveform 206 duplicates the effect of sustaining pulse 202b, and hence does not affect the residual electric charge in the walls adjacent Y, electrode 102α, except at cell 125.

The net result of the application of conditioning pulse 203α to X₃ electrode 101c and erase pulse 204(( to Y! electrode 102α, is to remove the wall charge adjacent cell 125, and to leave the wall charge adjacent all other cells essentially unchanged. Thus, cell 125 has been selectively erased without the necessity of even temporarily erasing other cells.

The actual characteristics of erase pulse 204α to most effectively cause the removal of the residual electric charge adjacent cell 125 is almost completely dependent on physical characteristics of panel 100 and the gas mixture within its gas chamber. As a general guideline, rise time on pulse 204α should be at least 10 times

3,906,451 and preferrably 50 to 100 times slower than that of a normal sustaining pulse 201α, etc. Maximum amplitude of pulse 204« is preferrably between 50 percent and 100 percent that of pulse 201α. Pulse 204α is shown to have approximately an exponential decay shape, such as may be produced by a standard R-C circuit. This is not essential, and a ramp or multi-step pulse can be substituted. However, the exponential decay shape is preferred because of ease of generation.

Turning next to FIG. lb, a simple circuit for producing an erase pulse 204α having an exponentially decreasing rate of change is displayed. Switch 140 receives the output of OR gate 131 and closes while the output pulse is on path 119, thereby applying De erase voltage V,. to the terminal of resistor 141 connected to switch 140. Capacitor 142 is assumed to be discharged and will initially absorb most of the current flowing through resistor 141 from voltage source V,.. As capacitor 142 charges to a higher voltage, voltage on path 123 increases according to the exponential decay curve. Resistor 143 is provided to discharge capacitor 142 after the signal on line 106α ceases, and may be chosen to discharge capacitor 142 over an interval several times that of the duration of pulse 204α.

Waveforms 209-211 disclose different timing and shape for erase pulse which may be easily incorporated into the apparatus of FIG. la. Whereas erase pulse 204α removed the residual wall charge over a relatively long period of time, with relatively small average current during the existence of pulse 204α, it is also possible to remove the wall charge with a relatively short pulse which induces a relatively large current flow through the gas volume to be erased during its existence. In general, current flow through a gas volume increases markedly with shortened rise time of the voltage pulse. Accordingly, X-line conditioning select system 115 may be designed to produce conditioning pulse 209α rather than pulse 203«. Pulse 209« may be of the same amplitude of pulse 203«, but have a somewhat longer duration, as shown. Responsive to the output of OR gate 131 on path 119, erase pulse generator 122 issues erase pulse 210« on path 123. Pulses 209« and 210« must be timed with respect to each other to cause the trailing edge of pulse 209« to occur during pulse 210«. During the time common to both pulses 209 « and 210«, neither Y electrodes 102«-102i/ nor X electrodes lOla-lOld are grounded. However, Y electrodes 102«-102&lt;7 are grounded over the duration of pulse 209« preceding the leading edge of erase pulse 210«. After the occurance of the trailing edge of pulse 209«, X electrodes 101a-101ri must be grounded. Both grounding operations can be controlled by the timing system 126 with reference to the synchronizing signal on path 150.

As can be seen in waveform 211, during the period of time of overlap for pulses 209α and 210«, the voltage across cell 125 is the difference between the amplitude of pulses 209α and 210α. The total duration of erase pulse 210a should be such that pulse 211b is just long enough and has a sufficiently steep leading edge to cause the residual wall charge adjacent gas volume 125 to be removed. As discussed in the explanation involving erase pulse 204α, the prior art teaches the procedure for determining the amount of residual wall charge adjacent cell 125 which must be removed to prevent subsequent conduction by cell 215 during sustaining pulses.

FIG. 1c discloses a simple erase pulse generator 122 comprising one-shot 144 and switch 145, for generating pulse 210«. In response to an output signal from OR gate 131, one-shot 144 places a closure signal on path 146 causing switch 145 to close while one-shot 144 is set. The width of one-shot 144 output pulses should be chosen equal to the duration of erase pulse 210α. Since the duration of pulse 211b must be selected with much greater precision than pulse 204α, one-shot 144 is provided to accurately control the width of the pulse 211b. It is preferable that erase voltage V_P of pulse 211b be selected to be approximately 50 percent that of a normal sustain pulse. Selecting this amplitude decreases the precision required in regulating the duration of pulse 211b.

Turning next to FIG. 3, therein are shown waveforms 301-308 which illustrate electrode-to-ground voltages and voltages across individual cells in the same manner that FIG. 2 illustrates such voltages, and use notation consistent therewith. The X electrode drive circuitry of FIG. 1, to implement this variation, must be modified as shown in FIG. 4, wherein all circuit elements of FIG. 1 are retained, except for switch 113, which is replaced by switches 113«-113&lt;J, and signal paths 114, replaced by similar paths 114a-114d. Timing system 126 has been replaced by timing system 126', whose operation is slightly different therefrom, as will be explained below. Since grounding of the X electrode is selective, X erase select signal on path 118 must be applied to timing system 126' as well. Erase pulse generator 122 must also be capable of generating pulse 304α, which is of polarity opposite to that of pulse 204α, but may be generated similarly.

Operation of the combined apparatus of FIGS. 1« and 4 to perform this variation is quite similar to that described in conjunction with FIG. 2. Operation during normal sustaining is identical, except that X electrode grounding is done by timing system 126' causing all switches 113«-113&lt;/ to close. When sustaining pulses are interrupted, the interruption must occur following an X electrode sustaining pulse, such as pulse 201b in waveform 301. The principle followed in this variation is to place similar or identical conditioning pulses on all of the X electrodes lOla-lOld. Accordingly, conditioning pulse 201a is applied simultaneously to all the X electrodes not selected by the X erase select signal on path 118, and conditioning pulse 302« is applied simultaneously with pulse 301« to the Y electrodes. It is convenient that these pulses be identical to sustaining pulses 201α, 202α, etc. and if so, can be caused as a normal sustaining pulse by timing system 126'. If the example of the erasing of cell 125 is still followed, these conditioning pulses will be applied to X_t, X₂, and X₄electrodes 101«, 101b, and lOld and all the Y electrodes 102«-1024/. The electrode specified by the signal on path 118 is grounded by timing system 126' during these conditioning pulses, i.e. X₃ electrode 101c is grounded for this example. The voltages which these pulses apply to cells which are adjacent neither selected X₃ electrode 101c nor selected Y, electrode 102α, is shown in waveform 305 as causing in effect no voltage to appear across these cells. However, since no conditioning pulse occurs on selected X₃ electrode 101c, which is instead grounded, pulse 302α does appear across all cells adjacent X₃ electrode 101c as shown by waveforms 307 and 308. Therefore, the conditioning pulses cause all these cells to have a negative

3,906,451 residual wall charge. Following conditioning pulses 302α, erase pulse 304α is applied to the selected Y_telectrode 102α. Erase pulse generator 122 generates erase pulse 304α and Y-line erase select system 116, by enabling switch 105α, gates the erase pulse to Y i electrode 102α. Erase pulse 304α has no effect on cells common to unselected X electrodes 101α, 101/?, and lOld because it is, as shown in waveform 306, an erase pulse of the same polarity as the latest sustaining pulse (2016) applied to them.

Waveform 308 displays the cell voltage across cell 125 during the erase interval. Only this cell is subjected to a negative polarity pulse 302α similar to a sustaining pulse and immediately thereafter a positive erase pulse 304α. Pulse 304α must be selected to cause the residual wall charge adjacent cell 125 to be removed as was the wall charge by the pulses shown in FIG. 2. Such pulse generation is well known and easily understood by those skilled in the art, so no problem in practicing this alternative variation should occur. Following the end of the erase interval, normal sustain operation begins with sustaining pulse 201c.

Because of the asymmetry of the voltages across cells which are not erased during any of the above-described erase operations, normal residual wall charges do not exist adjacent unerased cells. It is necessary to apply at least one X sustaining pulse 201c and one Y sustaining pulse 202c to panel 100 to restore the wall charges to approximately their normal condition, before further erasing can reliably occur, as is shown in FIGS. 2 and 3. Preferably, 4-6 pulses are applied between individual cell erase operations, to provide maximum reliability. The number of pulses necessary to completely restore normal wall charges is dependent on the physical characteristics of panel 100 and the gas mixture within it.

It is also possible to erase several cells along a specified Y electrode, by applying conditioning pulses to each electrode adjacent the cell on the selected Y electrode which is to be erased. Many other variations on the basic concepts herein disclosed are possible, by slight modifications of the teachings of this invention.