Integrated vacuum circuits

[57] ABSTRACT

An integrated circuit operative in vacuum and having all circuit elements formed in coplanar fashion on a single surface of a substrate to provide superior performance even in the presence of adverse environmental conditions. The circuit is especially adapted to microminiaturization and includes a unique electron discharge device having coplanar electrodes easily formed on a substrate surface by relatively simple film deposition techniques.

Claim, 16 Drawing Figures

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PATENTED&gt; 241973

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3,748,522 charge devices can be employed individually or in groups as active elements. The electron discharge devices and associated passive elements and interconnecting paths are formed on a common surface of a 5 substrate by well-known film deposition techniques such as by masking and photoetching techniques. The size of particular devices and circuits depends upon the intended operating power levels and upon the intended operating frequencies. Means are provided for heating 10 the integrated vacuum circuit to an operating temperature in order to provide predetermined electron emission to enable circuit operation. Such heater means, typically includes a heater element of planar configuration formed on the opposite surface of the circuit sub¹⁵ strate and operative to raise the temperature of the substrate and associated circuit to the requisite operating temperature. The substrate, including the circuit and associated heater element, is packaged within a suitable vacuous enclosure which includes electrical leads ²⁰ for supplying power to the heater element and for providing interconnection to the circuit. Means may be provided for electrically and thermally shielding the substrate to minimize radiation heat loss and to isolate 25 the circuit from spurious electrical fields.

It is a particular feature of the invention that the entire circuit can be heated to a uniform temperature while providing efficient thermionic emission only from selected circuit areas. For example, the electrodes of 30 electron discharge devices formed according to the invention can all be at the same temperature; however, the electrodes other than the cathode are substantially non-emitting while the cathode, which is at the same temperature as the associated electrodes, provides effi35 cient thermionic emission. As a result, the novel thermionic devices provide superior operation without the necessity of selective heating of a cathode. The present invention thus permits the provision of large numbers of active devices and complete integrated circuits on a 40 single substrate surface which can be heated to a predetermined temperature at which thermionic operation is achieved only where desired.

The active devices of the integrated vacuum circuit are fabricated by forming on a substrate surface the 45 electrodes of the device in a predetermined configuration to yield the intended device characteristics. For example, to form a triode, a conductive pattern is formed on the substrate surface to delineate the cathode, gate and anode electrodes and an electron emis50 sive material is formed over the cathode area to provide a thermionically emissive structure. When heated to an operating temperature, the coated cathode area will emit an electron stream to permit triode operation when the device is suitably biased in vacuum. By reason ⁵⁵ of contact potential differences between the gate and cathode electrodes, a triode implemented according to the invention, will exhibit an inherent negative bias, of for example, about 2.0 - 4.0 volts. For anode voltages which are not excessive, the triode remains cut-off with ⁶⁰ zero external gate bias, and a positive gate bias must be applied to drive the triode to a conducting state. As a result, direct coupling can be employed between stages of a circuit and in addition, no cathode resistors or bypass capacitors need be employed. Consequently, circuits constructed utilizing such novel electron discharge devices are relatively simple and require a minimum of components.

INTEGRATED VACUUM CIRCUITS

This is a division, of application Ser. No. 864,031, filed Oct. 6, 1969 now U.S. Pat. No. 3,701,919.

FIELD OF THE INVENTION

This invention relates in general to integrated electronic circuits and more particularly to circuits employing electron discharge devices especially adapted for microminiaturization, and capable of effective performance under widely varying operating conditions.

BACKGROUND OF THE INVENTION

Semiconductor devices are widely employed and for many purposes have replaced vacuum tubes by reason of the extremely small size, low power consumption, excellent dependability and relatively low manufacturing cost in volume production. Semiconductor integrated circuits similarly are now replacing circuits fabricated of discrete components, since such integrated circuits also offer the advantages of small size, excellent reliability, low power consumption and relatively low manufacturing cost. Semiconductor integrated circuits are however, generally limited to low power applications and to operation within specific, relatively narrow environmental ranges. For example, semiconductor devices and integrated circuits suffer serious performance degradation at elevated temperature which can be present in many practical systems and often catastrophic performance degradation also occurs in the presence of nuclear radiation, which limits the utility of such semiconductor devices and integrated circuits in many aerospace systems. The performance of semiconductor integrated circuits is dependent upon a highly sophisticated and carefully controlled manufacturing process in which selected regions of different conductivities are formed within a bulk of semiconductor material. Control of the working materials and of the process variables to provide a particular circuit is extremely critical, and becomes increasingly more critical with the complexity of a particular circuit. Imperfections within the semiconductor material itself can also result in a defective device and contribute to the low yields experienced in the fabrication of semiconductor integrated circuits, especially in the fabrication of complex circuits. From a physical point of view the most advantageous medium in which to control the flow of electrons is still in a high vacuum, and in this light, it is an object of the present invention to provide integrated circuits in which electron flow in a vacuum is employed in structures commensurate in size and packing density with semiconductor devices and circuits.

SUMMARY OF THE INVENTION

In accordance with the present invention, integrated circuits are formed by configurations of coplanar elements on a single surface of an insulative substrate. The circuits can be formed in microminiature size and are operative in vacuum to provide superior performance even under deleterious operating conditions. The invention includes a unique electron discharge device having coplanar electrodes formed on a common substrate surface and especially adapted to achieve effective thermionic operation at a uniform relatively low temperature. These unique electron discharge devices can be embodied in a circuit array which can include passive circuits elements to provide a vacuum integrated circuit according to the invention or the dis3,748,522

Integrated vacuum circuits according to the invention are particularly suitable to operation at high ambient temperatures and in the presence of nuclear radiation. Moreover, these circuits are relatively immune to catastrophic failure from exposure to electromagnetic environments and transient overloads. The performance of such circuits, especially under adverse conditions thus offers a marked improvement over semiconductor devices and integrated circuits which are extremely sensitive to such adverse conditions.

DESCRIPTION OF THE DRAWINGS

The invention will be more fully understood from the following detailed description, taken in conjunction with the accompanying drawings in which:

FIG. 1 is an enlarged pictorial view, partly cut away, of an embodiment of the invention;

FIG. 2 is an enlarged elevation view, partly cut away, of the embodiment of FIG. 1;

FIG. 3A is an enlarged pictorial view of the integrated vacuum circuit of FIG. 1;

FIG. 3B is an enlarged pictorial view, partly cut away, of a variation of the embodiment of FIG. 3A;

FIG. 4 is an enlarged pictorial view of the heater element of FIG. 1;

FIG. 5 depicts the anode current versus anode voltage characteristic curves of a dual triode according to the invention;

FIG. 6 is an enlarged pictorial view of an alternative embodiment of the invention;

FIG. 7A is a schematic diagram of a triode circuit, and FIG. 7B is an enlarged broken away pictorial view of this circuit constructed according to the invention;

FIG. 8 is an enlarged elevation view of an alternative embodiment of the invention;

FIG. 9 is an enlarged broken away pictorial view of a further embodiment of the invention;

FIG.. 10 is an enlarged elevation view of a variation of the embodiment of FIG. 8;

FIG. 11 is an enlarged pictorial view of the heater element of FIG. 10;

FIG. 12 is an enlarged pictorial view of still another embodiment of the invention;

FIG. 13 is an enlarged pictorial view of a further embodiment of the invention; and

FIG. 14 is an enlarged plan view of a still further embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

An integrated vacuum circuit according to the invention is illustrated in exaggerated form in FIGS. 1 and 2 and is disposed within an evacuated enclosure having terminal pins depending therefrom to provide means for interconnection thereto. An electrically insulative substrate 10 of circular disc-like configuration has formed on the upper surface thereof a circuit configuration 12 which, in the illustrated embodiment is a dual triode. A heater 13 is formed on the opposite surface of substrate 10 for raising the circuit temperature to a level for proper device operation, as will be explained. Substrate 10 with associated circuit 12 and heater 13 is disposed within an evacuated enclosure 14 and is supported therein by means of a plurality of conductive pins 16α spaced symmetrically about the periphery of the substrate, these pins also providing electrical connection to the heater 13 to permit application of heater current thereto. Electrical connection to circuit 12 is accomplished by means of the other ones of the conductive pins 16, also spaced about the periphery of substrate 10 and connected to respective circuit elements by means of respective lead wires 18. The vacuous enclosure 14, includes a circular base member 20 to enable evacuation of the enclosure 14 and for introduction of an inert gas which may be desirable in particular instances.

In order to minimize the effects of spurious electrical fields on the vacuum integrated circuit, and also to minimize spurious radiation from the circuit to the operating environment which may occur especially at high frequencies of operation, it is often desirable to provide shielding means within enclosure 14. Such shielding means as illustrated in FIGS. 1 and 2 includes a cup-shaped conductive member 26 and a disc-shaped conductive member 28 which cooperate to substantially surround substrate 10 and circuit 12 formed thereon. Disc 28 is attached to rim of member 26 by radial arms 30 and the shield is supported in spaced disposition around substrate 10 by a plurality of posts 32 extending between enclosure base member 20 and disc 28. The shielding structure in addition to providing electrical isolation also minimizes thermal radiation losses from heater 13 and therefore improves the thermal efficiency of the device. As an alternative to employing a separate shielding structure within enclosure 14, the enclosure cover itself can be formed of an electrically conductive material to serve as a shield. In certain applications, shielding may not be necessary at all and the shielding structure need not therefore be employed.

The dual triode circuit 12 is illustrated more clearly in FIG. 3A and includes first and second identical circuits separated by an isolation or guard electrode which substantially prevents electrical interaction therebetween. Each triode includes an arcuate cathode electrode 40, an arcuate gate electrode 42 disposed in parallel relationship therewith, and an anode electrode 44 disposed within the opening defined by gate electrode 42. Each electrode is connected to a respective conductive terminal pad 46 via a conductive path 48. An isolation electrode 50 is provided between the adjacent triode structures and includes first and second arcuate arms 52α and 52b each in parallel disposition with respective cathode electrodes 40, which join to form an elongated conductive arm 54 disposed between the triodes and which terminates in a terminal pad 56. The illustrated arcuate electrode configuration is effective to focus or concentrate electrons emitted from the cathode onto the anode electrode and substantially eliminates the possibility of electron overshooting of the anode. Isolation electrode 50 is also operative to assist in electron focusing and acts to minimize spurious fields which may tend to develop in the region of the electrodes. The circuit configuration can be formed in a variety of sizes depending on the power capability desired and the intended frequency of operation. In general, the smaller the electrode dimensions and spacings, the higher the cutoff frequency of the device.

The effective length of the electrodes can be increased to provide higher currents and lower impedance. As shown in FIG. 3B, cathode 40a and gate 42a are generally of the arcuate configuration illustrated in FIG. 3A but with the effective length thereof being greater by virtue of the linear extension of these elec3,748,522 trodes. The effective length of anode 44a is correspondingly increased. The active length of the electrodes is most easily varied by increasing or decreasing the linear portions of the electrodes, such as the linear portions 41 of the cathode and linear portions 43 of the gate. Thus, according to this embodiment of the invention, particular currents and device impedance can be easily provided while also maintaining electron focusing action as in the embodiment of FIG. 3A. Of course, it will be appreciated that the circuit of FIG. 3B can be employed as a single triode, or, as in FIG. 3A, can be employed together with an isolation electrode in a dual triode configuration.

The substrate on which the integrated vacuum circuit is formed is fabricated of an electrically insulative material capable of operation at the elevated operating temperatures of the circuit. More particularly, the substrate should have a volume resistivity at operating temperature such that leakage currents are within tolerable levels. In addition the substrate should have a surface finish, on the surface on which the vacuum circuit is formed, of a degree commensurate with the size of the circuit elements formed thereon, since the line width and line spacing of circuit elements which can be achieved on a given substrate surface is a function of the degree of surface finish. The substrate should also have desirable vacuum properties at operating temperature and chemical resistance to the selective eches employed in the fabrication of the circuitry. In general, ceramic materials provide the intended substrate characteristics. Typically, alumina can be employed having a surface polished to a desired degree of finish according to the intended degree of miniaturization of the circuit formed thereon. An 8 microinch surface finish has been found suitable to support integrated vacuum circuitry in which the patterns have line widths and spacings of one mil or more. For line widths and spacings less than one mil, the surface finish of the substrate becomes somewhat more critical in that any surface imperfections can result in portions of the circuit pattern being inoperative or imperfectly formed. With careful polishing however highly finished surfaces can be provided on alumina or other substrates to achieve the intended degree of circuit miniaturization. A single crystal material, such as sapphire, can be employed in the present invention and although sapphire is relatively more expensive than polycrystalline alumina, the costs tend to balance since highly finished sapphire substrate surfaces can be more easily attained.

As stated above, the volume resistivity of the substrate should be maintained above minimum predetermined levels at operating temperature in order to correspondingly maintain electrical leakage at acceptable levels. The allowable degree of substrate leakage is affected by the electrode voltages employed and the cathode current density. The circuits of the invention are operative at relatively low voltages, with the result that substrate volume resistivity becomes a less critical parameter. Moreover, high cathode current densities can be provided in circuits according to the invention at lower temperatures than usually required thereby further enlarging the choice of acceptable volume resistivities.

The circuit patterns of FIGS. 3A and 3B are formed by well known film deposition technique, such as by photolithography or photoetching. In general, a surface of a substrate having the desired degree of surface fin6 ish is coated, as for example by evaporation in a vacuum, with a metal, such as titanium, which will not emit electrons when coated with an electron-emissive material. A photoresist pattern then is employed as a mask to delineate, as for example by sputter etching, all electrodes (except cathodes) and associated conductive paths. The photoresist is removed, and a second metal, such as tungsten, which will emit electrons when coated with an emissive material, is deposited, for example by RF sputtering, over the substrate. Another photoresist pattern is then used as a mask for delineating, as for example by sputter etching, the cathode areas. Then a cathode-emissive material, typically triple carbonate, is applied to the tungsten cathode areas. Of course, a variety of deposition techniques well known in the art can be employed to form the metal patterns and emissive coatings of the novel vacuum circuitry, and such techniques need not be described in detail herein. By such relatively simple film disposition techniques, a reliable and highly effective circuit can be provided of sizes comparable to semiconductor devices and circuits but without the limitations associated therewith.

In the circuits illustrated in FIGS. 3A and 3B, no conductive path crosses any other conductive path. In some instances, however, as in relatively more complex circuitry in which a plurality of integrated vacuum circuits are interconnected to form a circuit array, it may be desirable to provide conductive paths which cross over each other. Such cross-overs can be fabricated by well known photoetching or photolithographic techniques. For example, a photoresist can be deposited and developed to provide a metal pad area on each side of a conductive path to be traversed, with the undeveloped photoresist extending across the underlying conductive path between the metal pad areas. A metal layer can then be formed over the photoresist and this layer plated to a desired thickness which, after removal of the underlying photoresist, provides a self supporting conductive bridge over the underlying conductive path.

The heater element 13 is formed on the opposite surface of substrate 10 than circuit 12 and is illustrated more clearly in FIG. 4. In the illustrated embodiment, the heater is a sinuous path 58 having terminals 62α, 62c provided respectively at the ends thereof and a terminal 62b provided centrally of path 58 as a center-tap connection. Typically, sinuous path 58 is formed by coating the substrate surface with a resistive material such as tungsten or molybdenum and selectively removing portions of the material to provide the intended heater path. As evident from FIG. 4, first and second interdigitated parallel arrays Of grooves 60 are formed to selectively remove the resistive material to provide heater path 58. The conductive terminals 62α, 62b and 62c are connected to respective mounting pins 16α to provide electrical connection to the heater as well as providing mechanical support for substrate 10, as described hereinabove. In operation, a suitable electrical current is applied to heater element 13 to raise the temperature of substrate 10 and the associated cathode electrodes such that the thermionic emission occurs and, with suitable potentials on the gate and anode electrodes triode operation achieved.

The characteristic curves of a dual triode of the type illustrated in FIG. 3A are depicted in FIG. 5. The dual triode was formed on a sapphire substrate one half inch in diameter. The deposited line widths were approxi3,748,522 mately 5 mils and the spacings between lines was approximately 5 mils. An amplification factor of about 10 is maintained over the operating range, and no significant interaction occurs between adjacent triodes.

As alternative triode electrode configuration is illustrated in FIG. 6 and includes in parallel disposition a linear cathode electrode 64, a gate electrode 66, and an anode electrode 68. Cathode electrode 64 is connected via an orthogonally disposed conductive path 70 to a conductive terminal pad 72. Similarly anode electrode 68 is coupled to a terminal pad 74 via a conductive path 76, while gate electrode 66 extends outwardly from the electrode to terminate in a terminal pad 78. The electrode pattern is, except for the cathodes, formed of a suitable non-emissive metal, such as for example titanium, while the cathode 64 formed of another metal such as tungsten or nickel is coated with an electron emissive material. The electrodes can be fabricated by photoetching or photolithographic techniques such as described hereinabove.

The triode configuration illustrated thus far can be employed singly or in multiple arrays and can also be formed together with interconnecting passive elements and conductive paths to provide complete circuit networks. As an example, the schematic diagram of FIG. 7A depicts a circuit, which includes a triode 80 and associated gate resistor 84 and anode resistor 82, and which can be implemented according to the invention in the manner illustrated in FIG. 7B. The triode electrodes are formed similarly to that depicted in FIG. 6 by forming a gate electrode 88, an anode electrode 90 and an emissive cathode electrode 86 on a surface of substrate 108. The resistors 82 and 84 are formed according to the invention as thermionic bi-directional diodes. Resistor 82 is formed by depositing an electron emissive electrode pair 92 and 94 in parallel spaced apart relationship on substrate 108, with electrode 94 connected to anode 90 by means of a conductive path 96. Similarly, resistor 84 is provided by a pair of deposited electron emissive parallel electrodes 98 and 100, with electrode 98 being coupled via a conductive path 102 to gate electrode 88. Connection is made to the circuit via conductive pads 104 and associated conductive paths 106 formed in desired locations on the substrate 108.

Resistors can be formed either as bi-directional (nonrectifying) or uni-directional (rectifying) thermionic diodes as may be required in particular operating circuits. A uni-directional device need only have one emissive electrode, while in a bi-directional device, both electrodes are emissive, as illustrated in FIG. 7B. The effective resistance of the thermionic diode is determined by the electrode spacing and electrode areas of the device. For example, a diode having interelectrode spacing of about 5-10 times that of a triode has been found suitable.

An alternative embodiment of the invention is illustrated in FIG. 8 wherein a heater is formed on the surface of a separate substrate which is supported in intimate contact with a substrate containing the novel circuitry. A heater element 110 which may be for example the sinuous path illustrated in FIG. 4, is formed on a surface of an insulative substrate 112, while the integrated vacuum circuit 114 is formed on a surface of insulative substrate 116. The substrates 112 and 116 are supported with heater 110 in intimate thermal contact with the surface of substrate 116 opposite to the sur8 face hiving circuit 114 formed thereon. The heater is maintained in intimate contact with substrate 116 by means of a plurality of clamps 118 spaced about the periphery of the substrate, each clamp being connected to a respective mounting pin 120. Mounting pins 120 are supported by and are in hermetic sealing relationship with an insulative base member 122 which can serve as the base for a vacuous enclosure, as described hereinabove. Clamps 118 are formed of a resilient conductive material and electrical connection is made to heater 110 by means of lead wires 124 connected between respective clamps and respective terminals of heater 110. A suitable electrical current can thus be applied to heater 110 by means of the associated conductive pins and clamps in order to uniformly heat substrate 116 and the associated circuit 114 to cause selected thermionic emission of the electron discharge devices which are part of circuit 114 and thereby enable circuit operation as described hereinabove. It will be recalled that the invention offers unique advantages in that thermionic emission occurs essentially from only the cathode areas of the circuit although the entire circuit is uniformly heated to a relatively low temperature. Thus, although other electrodes of the thermionic devices are at the same temperature as the cathode electrode, these other heated electrodes are substantially non-emitting while the efficient cathode structure provided herein provides the intended thermionic emission to achieve effective circuit operation.

The present invention can be employed in the implementation of a variety of thermionic devices and circuits. For example, individual thermionic devices such as the diodes and triodes illustrated hereinabove can be provided according to the invention and pluralities of such devices can be formed on a single substrate for use in those instances where an array of active elements is desirable. Additionally, one or more active thermionic devices can be provided along with associated conductive paths and/or passive circuit elements to provide complete integrated circuitry formed in a coplanar manner on a single substrate surface. Such integrated circuitry can be for digital or analog purposes. For digital purposes, circuitry according to the invention can be provided of a size comparable with semiconductor integrated circuits and which offer substantial immunity to adverse operating conditions. Employment of the invention to provide analog integrated circuits offers the advantage of relatively high power for extremely small size, which small size also permits circuit operation at extremely high frequencies such as in the microwave spectrum.

As an example of a typical digital circuit which can be formed according to the invention, there is shown in FIG. 9 a portion of a flip-flop in which all circuit elements are formed in a coplanar manner on a single substrate surface. A pair of triodes 126 and 128 are formed on a surface of a substrate 130 by providing conductive films in selective configurations to define the electrodes of the thermionic devices, as described. Cathode electrodes 132 and 134 are formed in adjacent relationship on the substrate surface and are connected to a common conductive path 136 also formed on the substrate surface. A gate electrode 138 is formed in spaced relation to cathode 132 and extends outwardly toward the periphery of substrate 130 terminating in a conductive terminal 140. A gate electrode 142 is formed in spaced relation to cathode 134 and continues as a con

3,748,522 ductive path on the substrate surface for interconnection to portions of the circuitry not shown. A conductive film path 144 provided in spaced relation to gate electrodes 138 and 142 serves as the anode electrode for both thermionic devices.

The anode electrodes formed of film 144 are connected via conductive paths formed on the substrate surface to terminal portion 146 and via conductive path 148 to other portions of the circuit, not shown. The anode electrodes are also coupled to a suitable source (not shown) of anode voltage via a thermionic bi-directional diode formed of parallel electron emissive electrodes 150 and 152 which is operative as an anode resistor. Similar circuitry is provided on the broken away portion of substrate 130 with conductive path 148 being connected to one gate electrode of a triode of the other triode pair and with gate electrode 142 being connected to the anode electrodes of the other triode pair. Suitable control terminals are also provided on the remaining portion of the circuit as are suitable power terminals. It should be evident that terminals 140 and 146 provide respective set and reset terminals, like terminals being provided on remaining portions of the circuit to accomplish bistable digital operation.

It is evident that, in the embodiment of FIG. 9, a single conductive path 144 serves as a common anode for a pair of gates 140 and 142, and a pair of cathodes 128 and 134. In a similar manner, the invention can provide a variety of other vacuum devices and circuits in which a common electrode is employed in conjunction with a plurality of individual electrodes, and such configurations are efficiently achieved by virtue of the novel planar geometry of the invention;

A further embodiment of the invention is illustrated in FIG. 10 wherein a separate heater element is disposed between first and second substrates, each substrate containing novel circuitry as described hereinabove. Referring to FIG. 10, it will be appreciated that the circuit and heater structures are mounted in a similar manner to the embodiment in FIG. 8 previously described, and like components of this embodiment are designated by the same reference numerals as in FIG. 8. A heater element 160, to be described in detail hereinbelow is disposed between a first substrate 162 and a second substrate 164 and in intimate contact with the confronting surfaces thereof. An integrated vacuum circuit 166 is formed on the exposed surface of substrate 162, while an integrated vacuum circuit 168 is formed on the exposed surface of substrate 164. The substrates 162 and 164 are supported with heater element 160 therebetween in intimate thermal contact by means of a plurality of clamps 118 spaced about the periphery of the substrate, each clamp being connected to a respective mounting pin 120. Mounting pins 120 are supported by and are in hermetic sealing relationship with an insulative base member 122 which, as described above, can serve as the base for a vacuous enclosure. As described in connection with FIG. 8, clamps 118 are formed of a resilient conductive material, with electrical connection being made to heater element 160 by means of lead wires 124 connected between respective clamps and respective terminals of heater 160. In order to uniformly heat substrates 162 and 164 and the associated circuitry 166 and 168 to cause selected thermionic emission of the electron discharge devices which are part of the novel circuitry, a suitable electrical current can be applied to heater ele ment 160 by means of the associated pins and clamps. Circuit operation as previously described is thus achieved.

The heater element 160 in the embodiment illustrated in FIG. 10 can be formed of a graphite-bearing foil depicted in FIG. 11, sold commercially under the tradename GRAFOIL. Referring to FIG. 11, there is shown a heater element 160 formed of an electrically resistive foil in a sinuous path and having an overall circular outline to conform to the circular configuration of the substrate discs. The sinuous path is formed by the interdigitated elements defined by channels 170 formed in alternate parallel arrays, as illustrated. Terminals 172α and 172c are provided, respectively, at the ends of the foil path, with a third terminal 172b provided centrally of the path as a center-tap connection. The conductive terminals 172α, 172b and 172c are connected to respective mounting pins 120 in the embodiment of FIG. 10 by means of respective lead wires 124 and clips 118. As previously described, a suitable electrical current applied to heater element 160 will raise the temperature of the associated substrates 162 and 164 as well as the associated integrated vacuum circuitry 166 and 168 such that selective thermionic emission will occur from the cathode electrodes.

A variation of the arcuate electrode geometry illustrated and described in connection with FIG. 3 is shown in FIG. 12. A triode electrode pattern is formed by photolithographic techniques, such as described hereinabove, on a surface of a substrate 174 with the cathode electrode being of linear configuration, and the gate and anode electrodes being of arcuate configuration. Referring to FIG. 12 a cathode electrode 176 is provided on the surface of substrate 174 with a gate electrode 178 disposed in parallel spaced relationship around the linear cathode 176 and an anode electrode 180 disposed in parallel spaced relationship around gate electrode 178. Each electrode is connected to a respective conductive terminal pad 182 via a conductive path 184. Cathode 176 includes an electron emissive material along the active length thereof. It will be noted that the effective length of gate electrode is greater than the effective length of anode 180 for reasons to be explained below. The effect of this arcuate electrode structure is to provide essentially a double gate, double anode configuration which minimizes spurious fields which can limit the performance characteristics of the triode. Extension of the effective ends of gate electrode 178, such as extremity 186, beyond the effective extremities of the anode 180 and beyond the active length of cathode 176 provides efficient end shielding, and efficiently shields the cathode from the anode along both edges thereof to substantially eliminate spurious flux leakage from anode 180 to cathode 176.

It will be appreciated that the invention is not limited to the illustrated triode structures but may be adapted for use with a variety of electrode configurations to suit particular requirements. For example, tetrode structures can be provided in accordance with the invention, one embodiment being depicted in FIG. 13. The illustrated tetrode configuration is generally similar to the triode embodiment of FIG. 12, with the addition of a second gate electrode 185 formed on a surface of substrate 188 in parallel spaced relation between the first gate electrode 190 and anode 192. The second gate

3,748,522 electrode 185 functions similarly to the screen grid of well known electron discharge tubes, and has a larger effective length than anode 192 and cathode 194 to provide good end shielding.

A further embodiment of the invention is illustrated in FIG. 14 wherein the gate and anode electrodes completely encircle the cathode. Cathode electrode 200 is formed of circular configuration, with the gate electrode 202 formed as an annular ring concentrically spaced around cathode 200. Anode electrode 204 is similarly formed as an annular ring concentrically spaced about gate 202. The electrode portion can be formed by photolighographic techniques, such as described hereinabove, with an electron emissive material formed on the cathode 200 to provide a thermionic emissive structure. In this closed electrode configuration electrical connection can be made to the electrodes by lead wires attached to respective electrode regions, or alternatively connection can be made via plated-through holes in the substrate on which the electrodes are formed, connecting respective electrodes on one substrate surface to a lead wire pattern formed on the opposite surface of the substrate.

Various modifications and alternative implementations will now occur to those versed in the art and it is not intended to limit the invention by what has been particularly shown and described. The substrate on which the novel circuit is formed can also serve as the base member of a vacuous enclosure rather than mounting the substrate within a separate enclosure. And, of course, a variety of mounting and packaging configurations can be employed to provide device configurations suitable for particular applications and operating environments. For example, rather than the pin type leads illustrated, connection to the circuit can be provided by leads extending in the plane of the circuit substrate and which leads can themselves be formed on the surface of a mounting substrate.