Semiconductor package and related method
Claim Score by NHIP
Abstract
A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.

Term
8.9 yearsto projected expiry
Projected expiry 27 August 2035, counted from filing; an application has no term until it is granted.
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25 claims: 2 independent, 23 dependent
- 1Broadest claimClaim Score 68, broad(NHIP)A semiconductor package, comprising:a substrate having opposing first and second surfaces;a plurality of semiconductor components disposed on and electrically connected to the first surface of the substrate;an encapsulant encapsulating the first surface of the substrate and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, wherein each of the package units has at least one of the semiconductor components;and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface of the substrate exposed from the metal layer, wherein the metal layer is formed on a groove surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface.
- 13A method for fabricating a semiconductor package, comprising:mounting a plurality of semiconductor components on a carrier, forming on the carrier an encapsulating body for encapsulatings the semiconductor components;cutting the encapsulating body and the carrier to form a plurality of isolated prepatory packages, each of the prepatory packages comprising: a substrate having opposing first and second surfaces, wherein the substrate is subject to a portion of the carrier, at least one of the plurality of the semiconductor components disposed on and electrically connected to the first surface of the substrate;and encapsulants being subject to a portion of the encapsulating body and encapsulating the first surface of the substrate and the at least one of the plurality of the semiconductor components;forming on each of the encapsulants of the prepatory packages at least one first groove that partitions each of the substrate into a plurality of package units, each of which has the at least one of the plurality of the semiconductor components;and forming on each of the substrates and each of the encapsulants of the prepatory packages a metal layer that encapsulating a periphery of the package units, with each of the second surfaces of each of the substrates exposed from the metal layer, wherein each of the metal layers is formed along a wall surface of each of the first grooves, to form a second groove corresponding in position to the first groove and having a metal surface.
Independent claims2
57 paragraphs in 4 sections, as filed
BACKGROUND OF THE INVENTION
00011. Field of the Invention
0002The present invention relates to package structures, and, more particularly, to a package structure having an electromagnetic shielding function, and a related method.
00032. Description of Related Art
0004With the rapid growth in electronic industry, several packaging types of electronic products have been developed. Several semiconductor packages are configured to have a shielding function in order to prevent electromagnetic interference (EMI).
0005As shown in <figref idref="DRAWINGS">FIGS. 1A and 1B</figref>, a conventional RF module <b>1</b> is fabricated by electrically connecting a plurality of semiconductor components <b>11</b><i>a </i>and <b>11</b><i>b </i>to a substrate <b>10</b>, forming an encapsulant <b>12</b> such as epoxy resin that encapsulates the semiconductor components <b>11</b><i>a </i>and <b>11</b><i>b </i>and the substrate <b>10</b>, and forming a metal thin film <b>13</b> covering the encapsulant <b>12</b>. The encapsulant <b>12</b> protects the semiconductor components <b>11</b><i>a </i>and <b>11</b><i>b </i>and the substrate <b>10</b> from external damages, such as moist or contaminants, and the metal thin film <b>13</b> shields the semiconductor components <b>11</b><i>a </i>and <b>11</b><i>b </i>from EMI.
0006As shown in <figref idref="DRAWINGS">FIG. 2</figref>, another conventional RF module <b>2</b> has a shielding layer <b>23</b> around a periphery thereof to prevent electromagnetic interferences from occurring between the RF module <b>2</b> and another module.
0007However, though the conventional RF modules <b>1</b> and <b>2</b> are shielded from external EMI through a metal material such as the metal thin film <b>13</b> that covers the periphery thereof, EMI still occurs among the inner semiconductor components <b>11</b><i>a </i>and <b>11</b><i>b. </i>
0008Hence, there is an urgent need for solving the prior art problems.
SUMMARY OF THE INVENTION
0009In view of the above-mentioned drawbacks of the prior art, the present invention provides a semiconductor package, comprising: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface of the substrate; an encapsulant encapsulating the first surface of the substrate and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, wherein each of the package units has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface of the substrate exposed from the metal layer, wherein the metal layer is formed on a groove surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface.
0010The present invention further provides a method for fabricating a semiconductor package, comprising: mounting a plurality of semiconductor components on a carrier, forming on the carrier an encapsulating body for encapsulating the semiconductor components; cutting the encapsulating body and the carrier to form a plurality of isolated prepatory packages, each of the prepatory packages comprising: a substrate having opposing first and second surfaces, wherein the substrate is subject to a portion of the carrier, a plurality of the semiconductor components disposed on and electrically connected to the first surface of the substrate; encapsulants being subject to a portion of the encapsulating body and encapsulating the first surface of the substrate and the at least one of the semiconductor components; forming on each of the encapsulants of the prepatory packages at least one first groove that partitions each of the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and forming on each of the substrates and each of the encapsulants of the prepatory packages a metal layer that encapsulating a periphery of the package units, with each of the second surfaces of each of the substrates exposed from the metal layer, wherein each of the metal layers is formed along a wall surface of each of the first grooves, to form a second groove corresponding in position to the first groove and having a metal surface.
0011In an embodiment, the first groove is fabricated by laser or mechanical cutting techniques.
0012In an embodiment, the semiconductor package is a radio-frequency (RF) module.
0013In an embodiment, the semiconductor component is an RF chip. For instance, the RF chip is a Bluetooth chip or a Wi-Fi chip.
0014In an embodiment, the encapsulant has an exposed top surface, an exposed side surface, and a bottom surface coupled to the first surface of the substrate, and the at least one first groove penetrates the encapsulant to communicate the exposed top surface of the encapsulant with the first surface of the substrate. In an embodiment, the metal layer is formed on the exposed top surface and the exposed side surfaces of the encapsulant.
0015In an embodiment, the metal layer is made of a material selected from the group consisting of copper, nickel, iron, aluminum and stainless steel.
0016In an embodiment, when the encapsulant has a plurality of the first grooves, the first grooves are aligned in a line.
0017In an embodiment, the substrate has a grounding structure that is electrically connected with the metal layer. In an embodiment, the grounding structure is a grounding part which corresponds in position to the first groove and is electrically connected to the metal layer.
0018In an embodiment, the second groove is filled with a filling material, and the filling material is an insulating material or a conductive material.
0019In summary, the semiconductor package and the related method according to the present invention are characterized by forming a second groove corresponding in position to the first groove and having a metal layer. A multilayer isolated structure, including metal layers and air layers, is thus formed among the package units, and the package units are well shielded and protected from the electromagnetic interferences.
BRIEF DESCRIPTION OF THE DRAWINGS
0020<figref idref="DRAWINGS">FIG. 1A</figref> shows a conventional RF module;
0021<figref idref="DRAWINGS">FIG. 1B</figref> shows a cross-sectional view of the RF module shown in <figref idref="DRAWINGS">FIG. 1A</figref>;
0022<figref idref="DRAWINGS">FIG. 2</figref> shows a conventional stacked package having a plurality of modules;
0023<figref idref="DRAWINGS">FIGS. 3A-3E</figref> are cross-sectional views illustrating a method of fabricating a semiconductor package according to the present invention; wherein FIGS. <b>3</b>A′ and <b>3</b>E′ show another embodiment of <figref idref="DRAWINGS">FIGS. 3A and 3E</figref>, and FIG. <b>3</b>D′ is a 3D view of <figref idref="DRAWINGS">FIG. 3D</figref>;
0024<figref idref="DRAWINGS">FIGS. 4A-4D</figref> are top views showing different types of first grooves according to the present invention; and
0025<figref idref="DRAWINGS">FIGS. 5A and 5B</figref> are top views showing other types of first grooves according to the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
0026The present invention is described in the following with specific embodiments, so that one skilled in the pertinent art can easily understand other advantages and effects according to the present invention from the disclosure according to the present invention.
0027It should be noted that all the drawings are not intended to limit the present invention. Various modification and variations can be made without departing from the spirit according to the present invention. Further, terms, such as “first”, “second”, “one” etc., are merely for illustrative purpose and should not be construed to limit the scope according to the present invention.
0028<figref idref="DRAWINGS">FIGS. 3A-3E</figref> are cross-sectional views showing a method of fabricating a semiconductor package <b>3</b> according to the present invention. In an embodiment, the semiconductor package <b>3</b> is a device that generates electromagnetic waves, for instance, a radio frequency (RF) module.
0029As shown in FIGS. <b>3</b>A and <b>3</b>A′, a carrier <b>3</b><i>a </i>is provided. The carrier <b>3</b><i>a </i>has a plurality of substrates <b>30</b> (partitioned by the dashed lines in the drawings), and each of the substrates <b>30</b> has opposing first and surfaces <b>30</b><i>a </i>and <b>30</b><i>b</i>. A plurality of semiconductor components <b>31</b> are formed on the carrier <b>3</b><i>a</i>, that is formed on the first surface <b>30</b><i>a </i>of each of the substrates <b>30</b>.
0030The substrate <b>30</b> has a plurality of conductive pads <b>300</b> disposed on the first surface <b>30</b> and on the second surface <b>30</b>.
0031In an embodiment, the semiconductor components <b>31</b> RF chips, such as Bluetooth chips or Wireless Fidelity (Wi-Fi) chips.
0032Further, as shown in <figref idref="DRAWINGS">FIG. 3A</figref>, the semiconductor components <b>31</b> are electrically connected with the corresponding conductive pads <b>300</b> of the substrate <b>30</b> via a wire bonding method (i.e., bonding wires <b>310</b>); alternatively, as shown in FIG. <b>3</b>A′, the semiconductor components <b>31</b>′ are electrically connected with the corresponding conductive pads <b>300</b> via a flip-chip method (that is via the solder balls or conductive elements <b>310</b>′ such as conductive bumps <b>310</b>′).
0033As shown in <figref idref="DRAWINGS">FIG. 3B</figref>, following the process described in <figref idref="DRAWINGS">FIG. 3A</figref>, an encapsulant <b>32</b> encapsulates the first surface <b>30</b><i>a </i>(or the substrate <b>30</b>) of the carrier <b>3</b><i>a</i>, the semiconductor components <b>31</b>, and the bonding wires <b>310</b>.
0034In an embodiment, the encapsulant <b>32</b> has an exposed top surface <b>32</b><i>a</i>, and a bottom surface <b>32</b><i>b </i>coupled to the first surface <b>30</b><i>a. </i>
0035As shown in <figref idref="DRAWINGS">FIG. 3C</figref>, the encapsulant <b>32</b> and the carrier <b>3</b><i>a </i>are cut along a cutting line L (shown in <figref idref="DRAWINGS">FIG. 3B</figref>) of a periphery of the substrate <b>30</b>, to form a plurality of isolated prepatory packages <b>3</b><i>b. </i>
0036In an embodiment, each of the prepatory packages <b>3</b><i>b </i>comprises a substrate <b>30</b> having a first surface <b>30</b><i>a</i>, a second surface <b>30</b><i>b</i>, and side surfaces <b>30</b><i>c </i>abutting the first surface <b>30</b><i>a </i>and the second surface <b>30</b><i>b</i>, a plurality of semiconductor components <b>31</b> formed on the first surface <b>30</b><i>a </i>of the substrate <b>30</b>, and an encapsulant <b>32</b> encapsulating the first surface <b>30</b><i>a </i>and the semiconductor components <b>31</b>. In an embodiment, the encapsulant <b>32</b> is cut to have side surfaces <b>32</b><i>c. </i>
0037As shown in FIGS. <b>3</b>D and <b>3</b>D′, a first groove <b>320</b> is formed on the encapsulant <b>32</b> of the prepatory package <b>3</b><i>b </i>by laser or mechanical cutting techniques such as using a knife, and the first surface <b>30</b><i>a </i>of the substrate <b>30</b> is partitioned into a plurality of package units <b>3</b>′ and <b>3</b>″. Each of the package units <b>3</b>′ and <b>3</b>″ has at least one semiconductor component <b>31</b>. In an embodiment, each of the package units <b>3</b>′ and <b>3</b>″ has electronic elements without interfering electromagnetic waves). A plurality of conductive elements <b>33</b> such as solder balls are disposed on the second surface <b>30</b><i>b </i>of the substrate <b>30</b>.
0038In an embodiment, the first groove <b>320</b> penetrates the encapsulant <b>32</b> to communicate the top surface <b>32</b><i>a </i>of the encapsulant <b>32</b> with a portion of the first surface <b>30</b><i>a </i>of the substrate <b>30</b>, with the remaining first surface <b>30</b><i>a </i>exposed from the first groove <b>320</b>.
0039Further, the first groove <b>320</b> is cut in the shaped of, but not limited to, a straight line (including a short line, as shown in <figref idref="DRAWINGS">FIG. 4A</figref>, and a long line, as shown in <figref idref="DRAWINGS">FIG. 4B</figref>), a right-angle bent line, as shown in <figref idref="DRAWINGS">FIG. 4C</figref>, a continuous curved line, as shown in <figref idref="DRAWINGS">FIG. 4D</figref>.
0040In another embodiment, a plurality of first grooves <b>520</b> are formed, as shown in <figref idref="DRAWINGS">FIGS. 5A and 5B</figref>. The first grooves <b>520</b> are arranged in a line, including an irregular right-angle line (shown in <figref idref="DRAWINGS">FIG. 5A</figref>) and a discontinuous line (shown in <figref idref="DRAWINGS">FIG. 5B</figref>).
0041In an embodiment, the semiconductor component <b>31</b> in one of the package units <b>3</b>′ is a Bluetooth chip, and the semiconductor component <b>3</b><i>a </i>in the other package units <b>3</b>″ is a Wi-Fi chip.
0042As shown in <figref idref="DRAWINGS">FIG. 3E</figref>, a sputtering using chemical plating, coating or reflow method can be performed, to form on the side surfaces <b>30</b><i>c </i>of the substrate <b>30</b> and the top surface <b>32</b><i>a </i>and side surfaces <b>32</b><i>c </i>of the encapsulant <b>32</b> a metal layer <b>34</b> that encapsulates a periphery of the package units <b>3</b>′ and <b>3</b>″, with the second surface <b>30</b><i>b </i>of the substrate <b>30</b> exposed from the metal layer <b>34</b>. The metal layer <b>34</b> is disposed along wall surfaces of the first groove <b>320</b>, and a second groove <b>340</b> having a metal surface is formed at a position corresponding to the first groove <b>320</b>.
0043In an embodiment, the metal layer <b>34</b> and an air layer (i.e., the air present in the second groove <b>340</b>) among the package units <b>3</b>′ and <b>3</b>″ serve as an EMI shielding structure that shield the semiconductor components <b>31</b> from EMI. For instance, the metal layer <b>34</b> and the air layer prevent electromagnetic interferences between the Bluetooth chip and the Wi-Fi chip from occurrence.
0044In an embodiment, the metal layer <b>34</b> is made of Cu, Ni, Fe, Al, or Sus. It should be noted, the metal layer <b>34</b> on each of the package units <b>3</b>′, <b>3</b>″ can be made of the same or different materials.
0045Further, the substrate <b>30</b> has a grounding structure that is electrically connected with the metal layer <b>34</b>. In an embodiment, the grounding structure is a grounding part <b>301</b> located at a position corresponding to the first groove <b>320</b>, as shown in FIG. <b>3</b>E′, and is electrically connected to the metal layer <b>34</b> (i.e., the bottom part of the second groove <b>340</b>). In another embodiment, the grounding structure is a grounding layer <b>36</b> formed within the substrate <b>30</b> and electrically connected with the side surfaces <b>30</b><i>c </i>of the substrate <b>30</b>, so as to enhance shielding effect.
0046In an embodiment, the second groove <b>340</b> is filled with a filling material <b>35</b>, as shown in FIG. <b>3</b>E′, and the filling material <b>35</b> is an insulating material or a conductive material, and completely fills the second groove <b>340</b>, wherein the top surface of the semiconductor package <b>4</b> is plane. In an embodiment that the filling material <b>35</b> is a conductive material, the conductivity of the filling material <b>35</b> is lower than the conductivity of the metal layer <b>34</b>. Hence, the filling material <b>35</b> and the metal layer <b>34</b> form a multilayer isolated structure between the package units <b>3</b>′, <b>3</b>″, so as to increase shielding effects between the package units.
0047In an embodiment, a second groove <b>340</b> having a metal surface serves as a division means between the two package units <b>3</b>′ and <b>3</b>″, and a multilayer isolated structure thus exists, in order to enhance the shielding effects between the package units <b>3</b>′ and <b>3</b>″, thereby preventing the semiconductor components <b>31</b> from electromagnetically interfering with one another.
0048The present invention provides a semiconductor package <b>3</b>, <b>4</b>, for example, an RF module, comprising: a substrate <b>30</b>, a plurality of semiconductor components <b>31</b>, <b>31</b>′, an encapsulant <b>32</b>, and a metal layer <b>34</b>.
0049The substrate <b>30</b> has opposing first and second surfaces <b>30</b><i>a </i>and <b>30</b><i>b. </i>
0050The semiconductor components <b>31</b>, <b>31</b>′ are formed on and electrically connected to the first surface <b>30</b><i>a </i>of the substrate <b>30</b>. In an embodiment, the semiconductor components <b>31</b>, <b>31</b>′ are RF chips, such as Bluetooth chips or Wi-Fi chips.
0051The encapsulant <b>32</b> covers the first surface <b>30</b><i>s </i>of the substrate <b>30</b> and the semiconductor components <b>31</b>, <b>31</b>′. The encapsulant <b>32</b> has at least one first groove <b>320</b>, <b>520</b> that partitions, for facilitating the substrate <b>30</b> into a plurality of package units <b>3</b>′, <b>3</b>″, with each of the package units <b>3</b>′, <b>3</b>″ having at least one the semiconductor components <b>31</b>, <b>31</b>′. The encapsulant <b>32</b> has exposed top and side surfaces <b>32</b><i>a </i>and <b>32</b><i>c </i>and a bottom surface <b>32</b><i>b </i>coupled to the first surface <b>30</b><i>a </i>of the substrate <b>30</b>, and the first groove <b>320</b>, <b>520</b> penetrates the encapsulant <b>32</b> to communicate the top surface <b>32</b><i>a </i>with the first surface <b>30</b><i>a </i>of the substrate <b>30</b>.
0052The metal layer <b>34</b> is formed on the side surfaces <b>30</b><i>c </i>of the substrate <b>30</b> and the top and side surfaces <b>32</b><i>a </i>and <b>32</b><i>c </i>of the encapsulant <b>32</b>, and encapsulates the periphery of the package units <b>3</b>′, <b>3</b>″, with the second surface <b>30</b><i>b </i>of the substrate <b>30</b> exposed from the metal layer <b>34</b>. In an embodiment, the metal layer <b>34</b> is disposed along the wall surfaces of the first groove <b>320</b>, <b>520</b>, and a second groove <b>340</b> having a metal surface is formed at a position corresponding in position to the first groove <b>320</b>, <b>520</b>. The metal layer <b>34</b> is made of one selected from a group consisting of copper, nickel, iron, aluminum and stainless steel.
0053In an embodiment, the encapsulant <b>32</b> is configured with a plurality of the first grooves <b>520</b>, and the first grooves <b>520</b> are arranged in a line.
0054In an embodiment, the substrate <b>30</b> has a grounding structure, such as a grounding layer <b>36</b> formed within the substrate <b>30</b>, or a grounding part <b>301</b> formed at a position corresponding to the first groove <b>320</b>, and the grounding structure is electrically connected with the metal layer <b>34</b> and is electrically connected to the metal layer <b>34</b>.
0055In an embodiment, the semiconductor package <b>4</b> further comprises a filling material <b>35</b> formed in the second groove <b>340</b> and made of an insulating material or conductive material.
0056In summary, the semiconductor package and the related method according to the present invention are characterized by having a second groove and forming a multilayer isolated structure among a plurality of package units, such that the multilayer isolated structure shields the semiconductor components from electromagnet interferes.
0057The present invention has been described using exemplary preferred embodiments. However, it is to be understood that the scope according to the present invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements. The scope of the claims, therefore, should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
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| Preliminary AmendmentA.PE | A.PE | |
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Numbers
- Publication
- 20160093576
- Application
- 14837604
Titles
- English
- SEMICONDUCTOR PACKAGE AND RELATED METHOD
Patent term adjustment
- Net adjustment
- 0 days
Classification
- CPC, 30
- H01L23/552
- H10W42/20
- H10W74/014
- H01L23/49838
- H10W74/117
- H01L23/3114
- H10W90/701
- H01L23/16
- H10W70/65
- H01L21/4853
- H01L21/561
- H10W90/00
- H01L21/563
- H10W90/754
- H01L21/78
- H10W72/0198
- H01L21/54
- H10W74/10
- H10W74/00
- H10W42/276
- H10W42/267
- H10W70/093
- H10W72/50
- H10W74/012
- H10W74/15
- H10W74/111
- H10W74/129
- H10W76/05
- H10W76/40
- H10P54/00
- IPC, 8
- H01L23 552
- H01L23 31
- H01L21 54
- H01L21 48
- H01L21 56
- H01L21 78
- H01L23 498
- H01L23 16