Light emitting diode, method of fabricating the same and led module having the same

CROSS REFERENCE TO RELATED APPLICATION

0001This application is a continuation of and, claims the benefits and priorities to, U.S. patent application Ser. No. 14/848,232, filed on Sep. 8, 2015, and Patent Cooperation Treaty (PCT) Application No. PCT/KR2014/006904, filed on Jul. 29, 2014, which further claims priorities from and the benefits of Korean Patent Application No. 10-2013-0089414, filed on Jul. 29, 2013, and Korean Patent Application No. 10-2013-0089415, filed on Jul. 29, 2013, which are all hereby incorporated by reference for all purposes as if fully set forth herein.

TECHNICAL FIELD

0002Exemplary embodiments of the disclosed technology relate to a light emitting diode (LED), an LED module including the same, and a method of fabricating the same. For example, some implementations of the disclosed technology relates to a light emitting diode having improved reliability, an LED module including the same, and a method of fabricating the same.

BACKGROUND

0003Since GaN-based light emitting diodes were first developed, GaN-based LEDs have been used for various applications including natural color LED displays, LED traffic signboards, white LEDs, and the like.

0004Generally, a GaN-based light emitting diode is formed by growing epitaxial layers on a substrate such as a sapphire substrate, and includes an N-type semiconductor layer, a P-type semiconductor layer and an active layer interposed therebetween. In addition, an n-electrode pad is formed on the N-type semiconductor layer and a p-electrode pad is formed on the P-type semiconductor layer. The light emitting diode is connected to an external power source through the electrode pads and driven thereby. In this case, current flows from the p-electrode pad to the n-electrode pad through the semiconductor layers.

0005On the other hand, a flip-chip type light emitting diode is used to prevent light loss due to the p-electrode pad while improving heat dissipation efficiency, and various electrode structures are proposed to promote current spreading in a large area flip-chip type light emitting diode. Examples are disclosed in U.S. Pat. No. 6,486,499. For example, a reflective electrode is formed on the P-type semiconductor layer, and extension legs are formed on a region of the N-type semiconductor layer, which is exposed by etching the P-type semiconductor layer and the active layer, to facilitate current spreading.

0006The reflective electrode formed on the P-type semiconductor layer reflects light generated from the active layer to improve light extraction efficiency and helps current spreading in the P-type semiconductor layer. On the other hand, the extension legs connected to the N-type semiconductor layer help current spreading in the N-type semiconductor layer to allow uniform generation of light in a wide active region. Particularly, a light emitting diode having a large area of about 1 mm²and used for high power output requires current spreading not only in the P-type semiconductor layer but also in the N-type semiconductor layer.

SUMMARY

0007Exemplary embodiments of the disclosed technology provide a light emitting diode chip having an electrostatic discharge protection function.

0008In addition, exemplary embodiments of the disclosed technology provide a light emitting diode which can be directly mounted on a printed circuit board or the like using a solder paste by preventing diffusion of metal elements from the solder paste.

0009Further, exemplary embodiments of the disclosed technology provide a light emitting diode having improved current spreading performance.

0010Furthermore, exemplary embodiments of the disclosed technology provide a light emitting diode having improved light extraction efficiency by improving reflectivity.

0011Furthermore, exemplary embodiments of the disclosed technology provide a light emitting diode capable of simplifying a manufacturing process by reducing the use of photomasks, an LED module including the same, and a method of fabricating the same.

0012Additional features of the disclosed technology will be set forth in the description which follows, and in part will become apparent from the description, or may be learned from practice of the disclosed technology.

0013In accordance with one aspect of the present invention, a light emitting diode includes: a first conductive-type semiconductor layer; a second conductive-type semiconductor layer; an active layer interposed between the first conductive-type semiconductor layer and the second conductive-type semiconductor layer; a first electrode pad region electrically connected to the first conductive-type semiconductor layer; a second electrode pad region electrically connected to the second conductive-type semiconductor layer; and a spark gap formed between a first leading end electrically connected to the first electrode pad region and a second leading end electrically connected to the second electrode pad region. The spark gap can achieve electrostatic discharge protection of the light emitting diode.

0014The light emitting diode may further include an upper insulation layer covering the second conductive-type semiconductor layer. In addition, the upper insulation layer may include an opening that exposes the spark gap. As the spark gap is exposed to the outside, it is possible to prevent generation of static electricity by electrical sparks via air.

0015The light emitting diode may include a mesa placed on the first conductive-type semiconductor layer. The mesa includes the active layer and the second conductive-type semiconductor layer. The first electrode pad region may be electrically connected to the first conductive-type semiconductor layer at a side of the mesa.

0016The light emitting diode may further include a reflective electrode structure placed on the mesa; and a current spreading layer covering the mesa and the first conductive-type semiconductor layer, and having an opening that exposes the reflective electrode structure. The current spreading layer is electrically connected to the first conductive-type semiconductor layer while being insulated from the reflective electrode structure and the mesa. Further, the upper insulation layer may cover the current spreading layer and the first leading end may be a portion of the current spreading layer.

0017The light emitting diode may further include an anti-diffusion reinforcing layer placed on the reflective electrode structure in the opening of the current spreading layer. Further, the second leading end may be a portion of the anti-diffusion reinforcing layer. Further, the anti-diffusion reinforcing layer may be formed of the same material as that of the current spreading layer.

0018In addition, the upper insulation layer may include a first opening that exposes the current spreading layer to define the first electrode pad region, and a second opening that exposes the anti-diffusion reinforcing layer to define the second electrode pad region.

0019The light emitting diode may further include a lower insulation layer placed between the mesa and the current spreading layer and insulating the current spreading layer from the mesa. The lower insulation layer has an opening placed in an upper region of the mesa and exposing the reflective electrode structure.

0020The spark gap may be placed between the first electrode pad region and the second electrode pad region. The spark gap generates electric sparks when static electricity of high voltage is applied between the first electrode pad region and the second electrode pad region. To this end, a gap between the first leading end and the second leading end may be narrower than other portions. Further, the first leading end and the second leading end may have a semi-circular or angled shape and face each other.

0021In accordance with another aspect of the present invention, a method of fabricating a light emitting diode includes: forming a first conductive-type semiconductor layer, an active layer and a second conductive-type semiconductor layer on a substrate; patterning the second conductive-type semiconductor layer and the active layer to form a mesa on the first conductive-type semiconductor layer; and forming a first electrode pad region electrically connected to the first conductive-type semiconductor layer and a second electrode pad region electrically connected to the second conductive-type semiconductor layer. Furthermore, the light emitting diode has a spark gap defined between the first leading end electrically connected to the first electrode pad region and the second leading end electrically connected to the second electrode pad region.

0022The method may further include: forming a reflective electrode structure on the second conductive-type semiconductor layer; and forming a current spreading layer covering the mesa and the first conductive-type semiconductor layer, and having an opening exposing the reflective electrode structure. Here, the current spreading layer forms ohmic contact with the first conductive-type semiconductor layer while being insulated from the mesa.

0023The current spreading layer allows uniform spreading of current in the first conductive-type semiconductor layer. The first leading end may be a portion of the current spreading layer.

0024The method may further include forming an anti-diffusion reinforcing layer on the reflective electrode structure. The anti-diffusion reinforcing layer may be formed together with the current spreading layer and the second leading end may be a portion of the anti-diffusion reinforcing layer. Thus, the first and second leading ends can be formed together with the current spreading layer and the anti-diffusion reinforcing layer by the same process.

0025The method may further include forming an upper insulation layer covering the current spreading layer. The upper insulation layer may have a first opening exposing the current spreading layer to define the first electrode pad region, and a second opening exposing the anti-diffusion reinforcing layer to define the second electrode pad region.

0026In addition, the upper insulation layer may further include an opening through which the first leading end and the second leading end are exposed. The opening may be distant from the first and second openings.

0027The method may further include forming a lower insulation layer covering the mesa and the first conductive-type semiconductor layer, before forming the current spreading layer. The lower insulation layer has openings that expose the reflective electrode structure and the first conductive-type semiconductor layer.

0028The lower insulation layer may include a silicon oxide layer and the upper insulation layer may include a silicon nitride layer.

0029The method may further include forming an anti-Sn diffusion plating layer on the first electrode pad region and the second electrode pad region using a plating technique.

0030In accordance with a further aspect of the present invention, a light emitting diode includes: a first conductive-type semiconductor layer; a mesa placed on the first conductive-type semiconductor layer and including an active layer and a second conductive-type semiconductor layer; a reflective electrode structure placed on the mesa; a current spreading layer covering the mesa and the first conductive-type semiconductor layer, and having an opening that exposes the reflective electrode structure, the current spreading layer being electrically connected to the first conductive-type semiconductor layer while being insulated from the reflective electrode structure and the mesa; and an upper insulation layer covering the current spreading layer. In addition, the upper insulation layer has a first opening exposing the current spreading layer to define the first electrode pad region, and a second opening exposing an exposed upper region of the reflective electrode structure to define the second electrode pad region.

0031Since the first and second electrode pad regions are respectively defined by the first and second openings of the upper insulation layer, there is no need for a separate photomask for forming the first and second electrode pads.

0032On the other hand, an LED module includes a printed circuit board; and the light emitting diode bonded to an upper side of the printed circuit board. Here, the first electrode pad region and the second electrode pad region are bonded to corresponding pads on the printed circuit boards via solder pastes, respectively.

0033In some embodiments, the light emitting diode may further include an anti-Sn diffusion plating layer formed on the first electrode pad region and the second electrode pad region.

0034Unlike typical AuSn solders in the related art, the solder paste is a mixture of a metal alloy and an organic material and is cured by heat treatment to provide a bonding function. Thus, metal elements such as Sn in the solder paste are unlikely to diffuse, unlike metal elements in the typical AuSn solders in the related art.

0035The anti-Sn diffusion plating layer can prevent the metal elements such as Sn in the solder paste from diffusing into the light emitting diode. Furthermore, as the anti-Sn diffusion plating layer is formed by a plating technique such as electroless plating, there is no need for a separate photomask for formation of the plating layer.

0036In some embodiments, the light emitting diode may further include an anti-diffusion reinforcing layer placed on the reflective electrode structure in the opening of the current spreading layer. The anti-diffusion reinforcing layer may be exposed through the second opening of the upper insulation layer. The anti-diffusion reinforcing layer can prevent metal elements such as Sn in the solder paste from diffusing to the reflective electrode structure in the light emitting diode.

0037The anti-diffusion reinforcing layer may be formed of the same material as that of the current spreading layer.

0038Thus, the anti-diffusion reinforcing layer may be formed together with the current spreading layer, and there is no need for a separate photomask for formation of the anti-diffusion reinforcing layer.

0039The current spreading layer may include an ohmic contact layer, a reflective metal layer, an anti-diffusion layer, and an anti-oxidation layer. The current spreading layer may form ohmic contact with the first conductive-type semiconductor layer through the ohmic contact layer. For example, the ohmic contact layer may be formed of Ti, Cr, Ni, and the like.

0040The reflective metal layer reflects light incident on the current spreading layer to increase reflectivity of the light emitting diode. The reflective metal layer may be formed of Al. In addition, the anti-diffusion layer prevents diffusion of metal elements and serves to protect the reflective metal layer. Particularly, the anti-diffusion layer can prevent diffusion of metal elements such as Sn in the solder paste. The anti-diffusion layer may include Cr, Ti, Ni, Mo, TiW, W or combinations thereof. Each of Mo, TiW and W may be used to form a single layer. On the other hand, Cr, Ti, and Ni may be used to form a pair of layers.

0041Particularly, the anti-diffusion layer may include at least two pairs of Ti/Ni or Ti/Cr layers. The anti-oxidation layer is formed to prevent oxidation of the anti-diffusion layer and may include Au.

0042The current spreading layer may have a reflectivity of 65% to 75%. Thus, the light emitting diode according to this embodiment of the invention can provide optical reflection by the current spreading layer in addition to optical reflection by the reflective electrode structure, whereby light traveling through a sidewall of the mesa and the first conductive-type semiconductor layer can be reflected.

0043The current spreading layer may further include a bonding layer placed on the anti-oxidation layer. The bonding layer may include Ti, Cr, Ni or Ta. The bonding layer is used to enhance bonding strength between the current spreading layer and the upper insulation layer.

0044The solder paste may adjoin the current spreading layer and the anti-diffusion reinforcing layer. Alternatively, the solder paste may adjoin the anti-Sn diffusion plating layer formed on the current spreading layer and the anti-diffusion reinforcing layer.

0045The reflective electrode structure may include a reflective metal section; a capping metal section; and an anti-oxidation metal section. Furthermore, the reflective metal section may have a slanted side surface such that an upper surface of the reflective metal section has a narrower area than a lower surface thereof, and the capping metal section may cover the upper and lower surfaces of the reflective metal section. Further, the anti-oxidation metal section covers the capping metal section.

0046A stress relief layer may be formed at an interface between the reflective metal section and the capping metal section. The stress relief layer relieves stress due to a difference in coefficient of thermal expansion between the metal layers formed of different materials.

0047In addition, the mesa may include elongated branches extending parallel to each other in one direction, and a connecting portion at which the branches are connected to each other. The opening of the current spreading layer may be placed on the connecting portion.

0048The light emitting diode may further include a lower insulation layer placed between the mesa and the current spreading layer and insulating the current spreading layer from the mesa. The lower insulation layer has an opening that is placed in an upper region of the mesa and exposes the reflective electrode structure.

0049Furthermore, the opening of the current spreading layer may have a greater width than the opening of the lower insulation layer such that the opening of the lower insulation layer is completely exposed therethrough. As a result, the current spreading layer can be insulated from the reflective electrode structure.

0050On the other hand, the light emitting diode may further include an anti-diffusion reinforcing layer placed within the opening of the current spreading layer and the opening of the lower insulation layer, and the anti-diffusion reinforcing layer may be exposed through the second opening of the upper insulation layer.

0051In addition, the lower insulation layer may include a silicon oxide layer and the upper insulation layer may include a silicon nitride layer. As the upper insulation layer is formed of silicon nitride, it is possible to prevent diffusion of metal elements from the solder paste through the upper insulation layer.

0052In some embodiments, the solder paste may include lead-free solder alloys, for example, Sn—Ag alloys, Sn—Bi alloys, Sn—Zn alloys, or Sn—Ag—Cu alloys.

0053The light emitting diode may further include a substrate and a wavelength conversion layer covering a lower surface of the substrate. The substrate may be a growth substrate for growing the semiconductor layers. In addition, the wavelength conversion layer may cover the lower surface and a side surface of the substrate.

0054In accordance with yet another aspect of the present invention, a method of fabricating a light emitting diode includes: forming a first conductive-type semiconductor layer, an active layer and a second conductive-type semiconductor layer on a substrate; patterning the second conductive-type semiconductor layer and the active layer to form a mesa on the first conductive-type semiconductor layer while forming a reflective electrode structure on the mesa to form ohmic contact with the mesa; forming a current spreading layer covering the mesa and the first conductive-type semiconductor layer, and having an opening that exposes the reflective electrode structure, the current spreading layer forming ohmic contact with the first conductive-type semiconductor layer while being insulated from the mesa; and forming an upper insulation layer covering the current spreading layer. On the other hand, the upper insulation layer may have a first opening exposing the current spreading layer to define a first electrode pad region, and a second opening exposing an exposed upper region of the reflective electrode structure to define the second electrode pad region.

0055In the fabrication method, since there is no need for formation of electrode pads on the upper insulation layer, it is possible to reduce the number of photomasks for fabrication of the light emitting diode.

0056The method may further include forming an anti-diffusion reinforcing layer on the reflective electrode structure. The anti-diffusion reinforcing layer can be formed together with the current spreading layer, and the second opening of the upper insulation layer can expose the anti-diffusion reinforcing layer. Accordingly, the reflective electrode structure can be concealed and protected by the anti-diffusion reinforcing layer and the upper insulation layer.

0057The method may further include forming a lower insulation layer covering the mesa and the first conductive-type semiconductor layer, before forming the current spreading layer; dividing the lower insulation layer and the first conductive-type semiconductor layer into chip regions by laser scribing; and patterning the lower insulation layer to form openings exposing the first conductive-type semiconductor layer and an opening exposing the reflective electrode structure.

0058Since a chip isolation region is formed using laser scribing, there is no need for use of a photomask. In addition, since laser scribing is performed after formation of the lower insulation layer, particles formed in the laser scribing process can be easily removed by cleaning the lower insulation layer, whereby the light emitting diode can be prevented from being contaminated by the particles.

0059The lower insulation layer may include a silicon oxide layer and the upper insulation layer may include a silicon nitride layer.

0060The method may further include forming an anti-Sn diffusion plating layer on the first electrode pad region and the second electrode pad region using a plating technique. The plating layer may be formed by electroless plating such as ENIG (electroless nickel immersion gold) and the like.

0061On the other hand, the substrate may be partially removed to have a small thickness by grinding and/or lapping. Then, the substrate is separated from the chip isolation region formed by laser scribing, thereby providing final individual chips separated from each other. Next, a wavelength conversion layer may be coated onto the light emitting diode chips, and the light emitting diode having the wavelength conversion layer is mounted on a printed circuit board via a solder paste, thereby providing an LED module.

0062The wavelength conversion layer may be formed by coating a phosphor-containing resin, followed by curing the resin. Alternatively, the wavelength conversion layer may be formed by spraying phosphor powder onto the light emitting diode chip using an aerosol apparatus.

0063According to embodiments of the disclosed technology, it is possible to protect light emitting diodes from static electricity by forming a spark gap. In addition, some implementations of the disclosed technology provide a light emitting diode, which can prevent diffusion of metal elements from a solder paste, and a method for fabricating the same. Further, some implementations of the disclosed technology provide a light emitting diode having improved current spreading performance, for example, a flip-chip type light emitting diode having improved current spreading performance. Furthermore, the light emitting diodes according to some implementations of the disclosed technology have improved reflectivity by forming a current spreading layer, thereby providing improved light extraction efficiency. Furthermore, the light emitting diodes according to some implementations of the disclosed technology can omit a photolithography process for formation of electrode pads, and can reduce the number of photomasks by forming a chip isolation region using a laser scribing technique.

BRIEF DESCRIPTION OF DRAWINGS

0064<figref idref="DRAWINGS">FIG. 1</figref> is a schematic sectional view of an exemplary LED module in accordance with an embodiment of the disclosed technology.

0065<figref idref="DRAWINGS">FIG. 2(</figref><i>a</i>) to <figref idref="DRAWINGS">FIG. 10</figref> are views illustrating an exemplary method of fabricating a light emitting diode in accordance with an embodiment of the disclosed technology, and in each of <figref idref="DRAWINGS">FIG. 2</figref> to <figref idref="DRAWINGS">FIG. 9</figref>, (a) is a plan view, (b) is a cross-sectional view taken along line A-A, and (c) is a cross-sectional view taken along line B-B.

0066<figref idref="DRAWINGS">FIG. 11(</figref><i>a</i>) to <figref idref="DRAWINGS">FIG. 14(</figref><i>c</i>) are views illustrating an exemplary method of fabricating a light emitting diode in accordance with an embodiment of the disclosed technology, and in each of <figref idref="DRAWINGS">FIG. 11</figref> to <figref idref="DRAWINGS">FIG. 14</figref>, (a) is a plan view, (b) is a cross-sectional view taken along line A-A, and (c) is a cross-sectional view taken along line B-B.

DETAILED DESCRIPTION

0067In the related art, the light emitting diode employs linear extension legs which have high resistance, which results in imposing some limit on current spreading. Moreover, since the reflective electrode is placed only on the P-type semiconductor layer, a substantial amount of light is absorbed by the electrode pads and extension legs while not being reflected by the reflective electrode and thus, substantial light loss is caused. When used in a final product, the light emitting diode is provided by an LED module. The LED module generally includes a printed circuit board and an LED package mounted on the printed circuit board, in which the light emitting diode is mounted in chip form within the LED package. A typical LED chip is packaged after being mounted on a sub-mount, a lead frame or a lead electrode by silver pastes or AuSn solders. Then, the LED package is mounted on the printed circuit board by solder pastes. As a result, pads on the LED chip are distant from the solder pastes, and bonded to the printed circuit board by a relatively stable bonding material such as silver pastes, AuSn, and the like.

0068Recently, various attempts have been made to fabricate an LED module by directly bonding electrode pads of a light emitting diode to a printed circuit board using solder pastes. For example, an LED module can be fabricated by directly mounting an LED chip on a printed circuit board instead of packaging the LED chip. Otherwise, an LED module can be fabricated by mounting a so-called wafer level LED package on a printed circuit board. In these LED modules, since the electrode pads directly adjoin the solder pastes, metal elements such as tin (Sn) diffuse from the solder pastes into the light emitting diode through the pads and cause short circuit in the light emitting diode and device failure.

0069GaN-based compound semiconductors are formed by epitaxial growth on a sapphire substrate, the crystal structure and lattice parameter of which are similar to those of the semiconductors, in order to reduce crystal defects. However, the epitaxial layers grown on the sapphire substrate contain many crystal defects such as V-pits, threading dislocations, and the like. When high voltage static electricity is applied to the epitaxial layers, current is concentrated at crystal defects in the epitaxial layers, causing diode breakdown. Thus, with respect to electrostatic discharge or electrical fast transient (EFT), which is a spark generated in a switch, and lightning surge in air, securing reliability of LEDs becomes important.

0070Generally, in packaging of a light emitting diode, a Zener diode is mounted together with the light emitting diode to prevent electrostatic discharge. However, the Zener diode is expensive and a process of mounting the Zener diode increases the number of processes for packaging the light emitting diode and manufacturing costs. Moreover, since the Zener diode is placed near the light emitting diode in the LED package, the LED package has deteriorated luminous efficacy due to absorption of light by the Zener diode and deteriorated LED package yield.

0071Hereinafter, exemplary embodiments of the disclosed technology will be described in detail with reference to the accompanying drawings. It should be understood that the following embodiments are provided as some examples of the disclosed technology to facilitate understanding of the disclosed technology. Thus, it should be understood that the disclosed technology is not limited to the following embodiments and may be embodied in different ways. In addition, in the drawings, the width, length and thickness of components may be exaggerated for convenience. Further, it should be noted that the drawings are not to precise scale. Like components will be denoted by like reference numerals throughout the specification.

0072<figref idref="DRAWINGS">FIG. 1</figref> is a schematic sectional view of an LED module in accordance with one embodiment of the disclosed technology.

0073Referring to <figref idref="DRAWINGS">FIG. 1</figref>, an LED module according to an exemplary embodiment of the disclosed technology includes a printed circuit board <b>51</b> having pads <b>53</b><i>a </i>and <b>53</b><i>b </i>and a light emitting diode <b>100</b> bonded to the printed circuit board <b>51</b> via solder pastes <b>55</b>.

0074The printed circuit board has a printed circuit thereon, and any substrate capable of providing an LED module can be used as the printed circuit board without limitation.

0075Conventionally, a light emitting diode is mounted on a substrate having a lead frame or lead electrodes formed thereon, and a light emitting diode package including such a light emitting diode is mounted on a printed circuit board. According to some implementations, the light emitting diode <b>100</b> is directly mounted on the printed circuit board <b>51</b> via the solder pastes <b>55</b>.

0076The light emitting diode <b>100</b> may include a flip-chip type light emitting diode and be mounted upside down on the printed circuit board. To this end, the light emitting diode <b>100</b> has a first electrode pad region <b>43</b><i>a </i>and a second electrode pad region <b>43</b><i>b</i>. The first and second electrode pad regions <b>43</b><i>a </i>and <b>43</b><i>b </i>may be formed in a recess shape on one surface of the light emitting diode <b>100</b>.

0077On the other hand, a lower surface of the light emitting diode <b>100</b>, for example, a surface of the light emitting diode opposite the first and second electrode pad regions <b>43</b><i>a </i>and <b>43</b><i>b</i>, may be covered with a wavelength conversion layer <b>45</b>. The wavelength conversion layer <b>45</b> may cover not only the lower surface of the light emitting diode <b>100</b> but also side surfaces of the light emitting diode <b>100</b>.

0078In <figref idref="DRAWINGS">FIG. 1</figref>, the light emitting diode is schematically shown for convenience of description. The structure and respective components of the light emitting diode will be more clearly understood in the following description of a method of fabricating the light emitting diode. Furthermore, it should be noted that light emitting diodes according to embodiments of the disclosed technology are not limited to the structure in which the light emitting diode is directly mounted on the printed circuit board.

0079<figref idref="DRAWINGS">FIG. 2(</figref><i>a</i>) to <figref idref="DRAWINGS">FIG. 10</figref> are views illustrating a method of fabricating a light emitting diode in accordance with an exemplary embodiment of the disclosed technology. In each feature, (a) is a plan view, (b) is a cross-sectional view taken along line A-A, and (c) is a cross-sectional view taken along line B-B.

0080First, referring to <figref idref="DRAWINGS">FIGS. 2(</figref><i>a</i>) to <b>2</b>(<i>c</i>), a first conductive-type semiconductor layer <b>23</b>, an active layer <b>25</b> and a second conductive-type semiconductor layer <b>27</b> are grown on a substrate <b>21</b>. The substrate <b>100</b> enables the growth of a GaN-based semiconductor layer, and may include, for example, a sapphire substrate, a silicon carbide substrate, a GaN substrate, or a spinel substrate, and the like. In some implementations, the substrate may be or include a patterned substrate such as a patterned sapphire substrate.

0081For example, the first conductive-type semiconductor layer may include an n-type gallium nitride-based layer and the second conductive-type semiconductor layer <b>27</b> may include a p-type gallium nitride-based layer. In addition, the active layer <b>25</b> may have a single quantum well structure or a multi-quantum well structure, and may include well layers and barrier layers. In addition, the composition of the well layers may be determined according to the wavelength of light and may include, for example, AlGaN, GaN or InGaN.

0082On the other hand, a pre-oxidation layer <b>29</b> may be formed on the second conductive-type semiconductor layer <b>27</b>. The pre-oxidation layer <b>29</b> may be formed of or include, for example, SiO₂by chemical vapor deposition.

0083Then, a photoresist pattern <b>30</b> is formed. The photoresist pattern <b>30</b> is patterned to have openings <b>30</b><i>a</i>. As shown in <figref idref="DRAWINGS">FIG. 2(</figref><i>a</i>) and <figref idref="DRAWINGS">FIG. 2(</figref><i>b</i>), the openings <b>30</b><i>a </i>are formed such that an inlet of each opening has a narrower width than a bottom of the opening. The photoresist pattern <b>30</b> having the openings <b>30</b><i>a </i>of this structure can be easily formed using a negative type photoresist.

0084Referring to <figref idref="DRAWINGS">FIGS. 3(</figref><i>a</i>) to <b>3</b>(<i>c</i>), the pre-oxidation layer <b>29</b> is etched using the photoresist pattern <b>30</b> as an etching mask. The pre-oxidation layer <b>29</b> may be etched by wet etching. As a result, the pre-oxidation layer <b>29</b> in the openings <b>30</b><i>a </i>of the photoresist pattern <b>30</b> is etched to form openings <b>29</b><i>a </i>of the pre-oxidation layer <b>29</b>, which expose the second conductive-type semiconductor layer <b>27</b>. The bottom portions of the openings <b>29</b><i>a </i>are generally similar or greater than the bottom portions of the openings <b>30</b><i>a </i>of the photoresist pattern <b>30</b>.

0085Referring to <figref idref="DRAWINGS">FIG. 4</figref>, a reflective electrode structure <b>35</b> is formed by a lift-off technology. The reflective electrode structure <b>35</b> may include a reflective metal section <b>31</b>, a capping metal section <b>32</b> and an anti-oxidation metal section <b>33</b>. The reflective metal section <b>31</b> includes a reflective layer, and a stress relief layer may be further formed between the reflective metal section <b>31</b> and the capping metal section <b>32</b>. The stress relief layer relieves stress due to difference in coefficient of thermal expansion between the reflective metal section <b>31</b> and the capping metal section <b>32</b>.

0086The reflective metal section <b>31</b> may be formed of or include, for example, Ni/Ag/Ni/Au, and may have an overall thickness of about 1600 Å. As shown, the reflective metal section <b>31</b> is formed to have a slanted side surface, for example, such that the bottom of the reflective metal section has a relatively wide area. Such a reflective metal section <b>31</b> may be formed by e-beam evaporation.

0087The capping metal section <b>32</b> covers upper and side surfaces of the reflective metal section <b>31</b> to protect the reflective metal section <b>31</b>. The capping metal section <b>32</b> may be formed by sputtering or by e-beam evaporation, for example, planetary e-beam evaporation, in which vacuum deposition is performed while rotating the substrate <b>21</b> in a slanted state. The capping metal section <b>32</b> may include Ni, Pt, Ti, or Cr, and may be formed by depositing, for example, about five pairs of Ni/Pt layers or about five pairs of Ni/Ti layers. Alternatively, the capping metal section <b>32</b> may include TiW, W, or Mo.

0088A material for the stress relief layer may be selected in various ways depending upon metal components of the reflective layer and the capping metal section <b>32</b>. For example, when the reflective layer is composed of or includes Al or Al-alloys and the capping metal section <b>32</b> is composed of or includes W, TiW or Mo, the stress relief layer may be or include a single layer of Ag, Cu, Ni, Pt, Ti, Rh, Pd or Cr, or a composite layer of Cu, Ni, Pt, Ti, Rh, Pd or Au. In addition, when the reflective layer is composed of or includes Al or Al-alloys and the capping metal section <b>32</b> is composed of or includes Cr, Pt, Rh, Pd or Ni, the stress relief layer may be or include a single layer of Ag or Cu, or a composite layer of Ni, Au, Cu or Ag.

0089In addition, when the reflective layer is composed of or includes Ag or Ag-alloys and the capping metal section <b>32</b> is composed of or includes W, TiW or Mo, the stress relief layer may be or include a single layer of Cu, Ni, Pt, Ti, Rh, Pd or Cr, or a composite layer of Cu, Ni, Pt, Ti, Rh, Pd, Cr or Au. Further, when the reflective layer is composed of or includes Ag or Ag-alloys and the capping metal section <b>32</b> is composed of or includes Cr or Ni, the stress relief layer may be or include a single layer of Cu, Cr, Rh, Pd, TiW or Ti, or a composite layer of Ni, Au or Cu.

0090Further, the anti-oxidation metal section <b>33</b> includes Au in order to prevent oxidation of the capping metal section <b>32</b>, and may be formed of or include, for example, Au/Ni or Au/Ti. Since Ti secures adhesion of an oxide layer such as SiO₂, in some implementations, Ti can be used. The anti-oxidation metal section <b>33</b> may also be formed by sputtering or by e-beam evaporation, for example, planetary e-beam evaporation, in which vacuum deposition is performed while rotating the substrate <b>21</b> in a slanted state.

0091The photoresist pattern <b>30</b> is removed after deposition of the reflective electrode structure <b>35</b>, whereby the reflective electrode structure <b>35</b> remains on the second conductive-type semiconductor layer <b>27</b>, as shown in <figref idref="DRAWINGS">FIG. 4</figref>.

0092The reflective electrode structure <b>35</b> may include branches <b>35</b><i>b </i>and a connecting portion <b>35</b><i>a</i>, as shown in <figref idref="DRAWINGS">FIG. 4</figref>. The branches <b>35</b><i>b </i>may have an elongated shape and be parallel to each other. The connecting portion <b>35</b><i>a </i>connects the branches <b>35</b><i>b </i>to each other. However, it should be understood that the reflective electrode structure <b>35</b> is not limited to a particular shape and may be modified into various shapes.

0093Referring to <figref idref="DRAWINGS">FIG. 5</figref>, a mesa M is formed on the first conductive-type semiconductor layer <b>21</b>. The mesa M includes the active layer <b>25</b> and the second conductive-type semiconductor layer <b>27</b>. The active layer <b>25</b> is placed between the first conductive-type semiconductor layer <b>23</b> and the second conductive-type semiconductor layer <b>27</b>. The reflective electrode structure <b>35</b> is placed on the mesa M.

0094The mesa M is formed by patterning the second conductive-type semiconductor layer <b>27</b> and the active layer <b>25</b> so as to expose the first conductive-type semiconductor layer <b>23</b>. The mesa M may be formed to have a slanted side surface by photoresist reflow technology or the like. The slanted profile of the side surface of the mesa M enhances extraction efficiency of light generated in the active layer <b>25</b>.

0095As shown, the mesa M may include elongated branches Mb extending parallel to each other in one direction and a connection portion Ma connecting the branches to each other. With such configuration of the mesa, the light emitting diode can permit uniform spreading of electric current in the first conductive-type semiconductor layer <b>23</b>. Here, it should be understood that the mesa M is not limited to a particular shape and may be modified into various shapes. On the other hand, the reflective electrode structure <b>35</b> covers most of the upper surface of the mesa M and generally has the same shape as the shape of the mesa M in plan view.

0096While the second conductive-type semiconductor layer <b>27</b> and the active layer <b>25</b> are subjected to etching, the pre-oxidation layer <b>29</b> remaining on these layers is also partially removed by etching. On the other hand, although the pre-oxidation layer <b>29</b> can remain near an edge of the reflective electrode structure <b>35</b> on each of the mesa M, the remaining pre-oxidation layer <b>29</b> can also be removed by wet etching and the like. Alternatively, the pre-oxidation layer <b>29</b> may be removed before formation of the mesa M.

0097Referring to <figref idref="DRAWINGS">FIG. 6</figref>, after the mesa M is formed, a lower insulation layer <b>37</b> is formed to cover the mesa M and the first conductive-type semiconductor layer. The lower insulation layer <b>37</b> may be formed of or include an oxide layer such as SiO₂and the like, a nitride layer such as SiNx and the like, or an insulation layer of MgF₂by chemical vapor deposition (CVD) and the like. The lower insulation layer <b>37</b> may be a single layer or multiple layers. In addition, the lower insulation layer <b>37</b> may be or include a distributed Bragg reflector (DBR) in which low refractive index material layers and high refractive index material layers are alternately stacked one above another. For example, an insulating reflective layer having high reflectivity may be formed by stacking dielectric layers such as SiO₂/TiO₂, or SiO₂/Nb₂O₅, and the like.

0098Then, a chip isolation region <b>23</b><i>h </i>is formed by laser scribing to divide the lower insulation layer <b>37</b> and the first conductive-type semiconductor layer <b>23</b> into chip units. Grooves may be formed on the upper surface of the substrate <b>21</b> by laser scribing. As a result, the substrate <b>21</b> is exposed near an edge of the first conductive-type semiconductor layer <b>23</b>.

0099Since the first conductive-type semiconductor layer <b>23</b> is divided into chip units by laser scribing, it is possible to omit a separate photomask for an isolation process. However, it should be understood that the disclosed technology is not limited to the isolation process using laser scribing. For example, the first conductive-type semiconductor layer <b>23</b> may be divided into chip units before or after formation of the lower insulation layer <b>37</b> using a typical photolithography and etching technique.

0100As shown in <figref idref="DRAWINGS">FIG. 6</figref>, the mesa M may be formed to be placed only inside an upper region of the first conductive-type semiconductor layer <b>23</b>. For example, the mesa M may be placed in an island shape on the upper region of the first conductive-type semiconductor layer <b>23</b>.

0101Next, referring to <figref idref="DRAWINGS">FIG. 7</figref>, the lower insulation layer <b>37</b> is subjected to patterning to form openings <b>37</b><i>a </i>and <b>37</b><i>b </i>in predetermined regions to allow electrical connection to the first conductive-type semiconductor layer <b>23</b> and the second conductive-type semiconductor layer <b>27</b>. For example, the lower insulation layer <b>37</b> may have openings <b>37</b><i>b </i>which expose the first conductive-type semiconductor layer <b>23</b>, and openings <b>37</b><i>a </i>which expose the reflective electrode structure <b>35</b>.

0102The openings <b>37</b><i>a </i>are placed only in upper regions of the mesas M, for example, on the connecting portions of the mesas M. The openings <b>37</b><i>b </i>may be placed in regions between the branches Mb of the mesas M and near the edge of the substrate <b>21</b>, and may have an elongated shape extending along the branches Mb of the mesas M.

0103Referring to <figref idref="DRAWINGS">FIG. 8</figref>, a current spreading layer <b>39</b> is formed on the lower insulation layer <b>37</b>. The current spreading layer <b>39</b> covers the mesa M and the first conductive-type semiconductor layer <b>23</b>. In addition, the current spreading layer <b>39</b> has an opening <b>39</b><i>a </i>placed in the upper region of the mesa M and exposing the reflective electrode structure <b>35</b>. The current spreading layer <b>39</b> may form ohmic contact with the first conductive-type semiconductor layer <b>23</b> through the opening <b>37</b><i>b </i>of the lower insulation layer <b>37</b>. The current spreading layer <b>39</b> is insulated from the mesa M and the reflective electrodes <b>35</b> by the lower insulation layer <b>37</b>.

0104The opening <b>39</b><i>a </i>of the current spreading layer <b>39</b> has a greater area than the opening <b>37</b><i>a </i>of the lower insulation layer <b>37</b> to prevent the current spreading layer <b>39</b> from being connected to the reflective electrode structures <b>35</b>. Thus, the opening <b>39</b><i>a </i>has sidewalls placed on the lower insulation layer <b>37</b>.

0105The current spreading layer <b>39</b> is formed on an overall upper region of the substrate <b>21</b> excluding the openings <b>39</b><i>a</i>. Thus, electric current can be easily dispersed through the current spreading layer <b>39</b>.

0106The current spreading layer <b>39</b> may include an ohmic contact layer, a reflective metal layer, an anti-diffusion layer, and an anti-oxidation layer. The current spreading layer can form ohmic contact with the first conductive-type semiconductor layer through the ohmic contact layer. For example, the ohmic contact layer may be formed of or include Ti, Cr, or Ni, and the like. The reflective metal layer increases reflectivity of the light emitting diode by reflecting incident light entering the current spreading layer. The reflective metal layer may be formed of or include Al. In addition, the anti-diffusion layer protects the reflective metal layer by preventing diffusion of metal elements. For example, the anti-diffusion layer can prevent diffusion of metal elements such as Sn within a solder paste. The anti-diffusion layer may be composed of or include Cr, Ti, Ni, Mo, TiW, or W or combinations thereof. The anti-diffusion layer may be a single layer including Mo, TiW or W. Alternatively, the anti-diffusion layer may include a pair of Cr, Ti or Ni layers. For example, the anti-diffusion layer may include at least two pairs of Ti/Ni or Ti/Cr layers. The anti-oxidation layer is formed to prevent oxidation of the anti-diffusion layer and may include Au.

0107The current spreading layer may have a reflectivity of 65% to 75%. Accordingly, the light emitting diode according to this embodiment can provide optical reflection by the current spreading layer in addition to optical reflection by the reflective electrode structure, whereby light traveling through the sidewall of the mesa and the first conductive-type semiconductor layer can be reflected.

0108The current spreading layer may further include a bonding layer placed on the anti-oxidation layer. The bonding layer may include Ti, Cr, Ni or Ta. The bonding layer is used to enhance bonding strength between the current spreading layer and the upper insulation layer, and may be omitted.

0109For example, the current spreading layer <b>39</b> may have a multi-layer structure including Cr/Al/Ni/Ti/Ni/Ti/Au/Ti.

0110While the current spreading layer <b>39</b> is formed, an anti-diffusion reinforcing layer <b>40</b> is formed on the reflective electrode structure <b>35</b>. The anti-diffusion reinforcing layer <b>40</b> and the current spreading layer <b>39</b> may be formed of or include the same material by the same process. The anti-diffusion reinforcing layer <b>40</b> is separated from the current spreading layer <b>39</b>. The anti-diffusion reinforcing layer <b>40</b> is placed within the opening <b>39</b><i>a </i>of the current spreading layer <b>39</b>.

0111The anti-diffusion reinforcing layer <b>40</b> has a leading end <b>40</b><i>a </i>extending therefrom, and the current spreading layer <b>39</b> has a leading end <b>39</b><i>b </i>facing the leading end <b>40</b><i>a</i>. The leading end <b>40</b><i>a </i>may be placed on the lower insulation layer <b>37</b> outside the opening <b>37</b><i>a </i>of the lower insulation layer <b>37</b>. However, it should be understood that the disclosed technology is not limited thereto. Alternatively, the opening <b>37</b><i>a </i>of the lower insulation layer <b>37</b> may have a similar shape to the shape of the leading end <b>40</b><i>a</i>, and the leading end <b>40</b><i>a </i>may be placed within the opening <b>40</b><i>a </i>of the lower insulation layer <b>37</b>.

0112The leading end <b>39</b><i>a </i>of the current spreading layer <b>39</b> is placed on the lower insulation layer <b>37</b> and is separated from the leading end <b>40</b><i>a</i>. The leading end <b>39</b><i>b </i>and the leading end <b>40</b><i>a </i>define a spark gap therebetween. As a result, these leading ends <b>39</b><i>b </i>and <b>40</b><i>a </i>may be placed closer than other portions or may have an angled shape in order to allow generation of an electric spark between the leading ends <b>39</b><i>b </i>and <b>40</b><i>a </i>when high voltage static electricity is applied to a gap between the current spreading layer <b>39</b> and the anti-diffusion reinforcing layer <b>40</b>. For example, as shown in <figref idref="DRAWINGS">FIG. 8</figref>, the leading ends <b>39</b><i>b </i>and <b>40</b><i>a </i>may have a semi-circular shape or an angled shape and may be disposed to face each other.

0113Referring to <figref idref="DRAWINGS">FIG. 9</figref>, an upper insulation layer <b>41</b> is formed on the current spreading layer <b>39</b>. The upper insulation layer <b>41</b> has an opening <b>41</b><i>a </i>which exposes the current spreading layer <b>39</b> to define a first electrode pad region <b>43</b><i>a</i>, and an opening <b>41</b><i>b </i>which exposes the reflective electrode structure <b>35</b> to define a second electrode pad region <b>43</b><i>a</i>. The opening <b>41</b><i>a </i>may have an elongated shape perpendicular to the branches Mb of the mesa M. The opening <b>41</b><i>b </i>of the upper insulation layer <b>41</b> has a narrower area than the opening <b>39</b><i>a </i>of the current spreading layer <b>39</b> and thus the upper insulation layer <b>41</b> can cover the sidewall of the opening <b>39</b><i>a. </i>

0114When the anti-diffusion reinforcing layer <b>40</b> is formed on the reflective electrode structure <b>35</b>, the opening <b>41</b><i>b </i>exposes the anti-diffusion reinforcing layer <b>40</b>. In this case, the reflective electrode structure <b>35</b> can be concealed or sealed by the upper insulation layer <b>41</b> and the anti-diffusion reinforcing layer <b>40</b>. Furthermore, the upper insulation layer <b>41</b> has an opening <b>41</b><i>c </i>which exposes at least part of the leading end <b>39</b><i>b </i>and the leading end <b>40</b><i>a</i>. With this configuration, the spark gap between the leading end <b>39</b><i>b </i>and the leading end <b>40</b><i>a </i>is exposed, thereby allowing generation of electrostatic discharge by an electrical spark through air.

0115Further, the upper insulation layer <b>41</b> may be formed on the chip isolation region <b>23</b><i>h </i>to cover the side surface of the first conductive-type semiconductor layer <b>23</b>. With this configuration, it is possible to prevent penetration of moisture and the like through upper and lower interfaces of the first conductive-type semiconductor layer.

0116The upper insulation layer <b>41</b> may be formed of or include a silicon nitride layer to prevent diffusion of metal elements from solder pastes, and may have a thickness of 1 m to 2 m. When the thickness of the upper insulation layer is less than 1 m, it is difficult to prevent diffusion of metal the elements from the solder pastes.

0117Optionally, an anti-Sn diffusion plating layer (not shown) may be additionally formed on the first electrode pad region <b>43</b><i>a </i>and the second electrode pad region <b>43</b><i>b </i>by electroless plating such as ENIG (electroless nickel immersion gold) and the like.

0118The first electrode pad region <b>43</b><i>a </i>is electrically connected to the first conductive-type semiconductor layer <b>23</b> through the current spreading layer <b>39</b>, and the second electrode pad region <b>43</b><i>b </i>is electrically connected to the second conductive-type semiconductor layer <b>27</b> through the anti-diffusion reinforcing layer <b>40</b> and the reflective electrode structure <b>35</b>.

0119The first electrode pad region <b>43</b><i>a </i>and the second electrode pad region <b>43</b><i>b </i>are used to mount the light emitting diode on a printed circuit board and the like via solder pastes. Thus, in order to prevent short circuit between the first electrode pad region <b>43</b><i>a </i>and the second electrode pad region <b>43</b><i>b </i>by the solder pastes, electrode pads may be separated by a distance of about 300 m or more from each other.

0120Then, the substrate <b>21</b> may be removed to have a small thickness by partially grinding and/or lapping a lower surface of the substrate <b>21</b>. Then, the substrate <b>21</b> is divided into individual chip units, thereby providing divided light emitting diode chips. Here, the substrate <b>21</b> may be divided at the chip isolation region <b>23</b><i>h </i>formed by laser scribing and thus there is no need for additional laser scribing for division of chips.

0121The substrate <b>21</b> may be removed from the light emitting diode chips before or after being divided into individual light emitting diode chip units.

0122Referring to <figref idref="DRAWINGS">FIG. 10</figref>, a wavelength conversion layer <b>45</b> is formed on the light emitting diodes separated from each other. The wavelength conversion layer <b>45</b> may be formed by coating a phosphor-containing resin onto the light emitting diodes using a printing technique, or by coating the substrate <b>21</b> with phosphor powder using an aerosol apparatus. For example, aerosol deposition can form a thin phosphor layer with a uniform thickness on the light emitting diodes, thereby improving color uniformity of light emitted from the light emitting diodes. As a result, the light emitting diodes according to the embodiments of the disclosed technology are completed and may be bonded to the corresponding pads <b>53</b><i>a</i>, <b>53</b><i>b </i>of the printed circuit board <b>51</b> by solder pastes, as shown in <figref idref="DRAWINGS">FIG. 1</figref>.

0123In this embodiment, the first and second electrode pad regions <b>43</b><i>a </i>and <b>43</b><i>b </i>exposed by the upper insulation layer <b>41</b> are directly mounted on the printed circuit board. However, it should be understood that the disclosed technology is not limited thereto. Alternatively, additional electrode patterns are formed on the electrode pad regions <b>43</b><i>a </i>and <b>43</b><i>b </i>to form further enlarged pad regions. In this case, however, an additional photomask for formation of the electrode patterns may be used.

0124<figref idref="DRAWINGS">FIG. 11(</figref><i>a</i>) to <figref idref="DRAWINGS">FIG. 14(</figref><i>c</i>) are views illustrating a method of fabricating a light emitting diode in accordance with another embodiment of the disclosed technology, and in each figure, (a) is a plan view, (b) is a cross-sectional view taken along line A-A, and (c) is a cross-sectional view taken along line B-B.

0125In the embodiments described above, the mesa M is formed after the reflective electrode structure <b>35</b> is formed. In the present implementations, the mesa M is formed before the reflective electrode structure <b>35</b> is formed.

0126First, referring to <figref idref="DRAWINGS">FIG. 11</figref>, as described with reference to <figref idref="DRAWINGS">FIG. 2</figref>, a first conductive-type semiconductor layer <b>23</b>, an active layer <b>25</b> and a second conductive-type semiconductor layer <b>27</b> are formed on a substrate <b>21</b>. Then, the mesa M is formed by a patterning process. The mesa M is similar to that described above in <figref idref="DRAWINGS">FIG. 5</figref>, and a detailed description thereof will be omitted.

0127Referring to <figref idref="DRAWINGS">FIG. 12</figref>, a pre-oxidation layer <b>29</b> is formed to cover the first conductive-type semiconductor layer <b>23</b> and the mesa M. The pre-oxidation layer <b>29</b> may be formed of or include the same material by the same process as those described with reference to <figref idref="DRAWINGS">FIG. 2</figref>. A photoresist pattern <b>30</b> having openings <b>30</b><i>a </i>is formed on the pre-oxidation layer <b>29</b>. The openings <b>30</b><i>a </i>of the photoresist pattern <b>30</b> are placed in an upper region of the mesa M. The photoresist pattern <b>30</b> is the same as that described with reference to <figref idref="DRAWINGS">FIG. 2</figref> except that the photoresist pattern <b>30</b> is formed on the substrate <b>21</b> having the mesa M formed thereon, and a detailed description thereof will be omitted.

0128Referring to <figref idref="DRAWINGS">FIG. 13</figref>, the pre-oxidation layer <b>29</b> is subjected to etching through the photoresist pattern <b>30</b> used as an etching mask, so that openings <b>29</b><i>a </i>are formed to expose the second conductive-type semiconductor layer <b>27</b> therethrough.

0129Referring to <figref idref="DRAWINGS">FIG. 14</figref>, as described in detail with reference to <figref idref="DRAWINGS">FIG. 4</figref>, the reflective electrode structure <b>35</b> is formed on each mesas M by a lift-off technique. Then, light emitting diodes can be fabricated through similar processes to the processes described above with reference to <figref idref="DRAWINGS">FIG. 6</figref> to <figref idref="DRAWINGS">FIG. 11</figref>.

0130According to this embodiment, since the mesa M is formed prior to the reflective electrode structure <b>35</b>, the pre-oxidation layer <b>29</b> can remain on side surfaces of the mesas M and in regions between the mesas M. Then, the pre-oxidation layer <b>29</b> is covered by the lower insulation layer <b>39</b> and is subjected to patterning together with the lower insulation layer <b>39</b>.

0131Although various embodiments have been described above, it should be understood that other implementations are also possible. In addition, some features of a certain embodiment may also be applied to other embodiments in the same or similar ways without departing from the spirit and scope of the disclosed technology.