Solid-state image pickup device, method of manufacturing thereof, and electronic apparatus

CROSS REFERENCES TO RELATED APPLICATIONS

0001The present application is a Continuation of application Ser. No. 12/929,688, filed Feb. 9, 2011, and contains subject matter related to Japanese Patent Application JP 2010-068879 filed in the Japanese Patent Office on Mar. 24, 2010, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

00021. Field of the Invention

0003The present invention relates to a solid-state image pickup device, a method of manufacturing thereof, and an electronic apparatus applied to a camera or the like provided with the solid-state image pickup device.

00042. Description of the Related Art

0005As a solid-state image pickup device (image sensor), a CMOS (Complementary Metal Oxide Semiconductor) solid-state image pickup device is known. Since the CMOS solid-state image pickup device is driven with low voltage and low power consumption, the CMOS solid-state image pickup device is used for digital still cameras, digital video cameras, various mobile terminals such as mobile phones attached with a camera, or the like.

0006Each pixel in the CMOS solid-state image pickup device includes a photodiode as a photoelectric conversion portion receiving light and a plurality of pixel transistors outputting signals. In general, output signals are accumulated in an impurity diffusion layer, which is referred to as a floating diffusion (FD), in a silicon substrate and amplified by an amplifying transistor to be output.

0007Recently, as a technology of widening the dynamic range of the image sensor, disclosed is a technology where, besides the floating diffusion (FD), capacitance elements are formed in the substrate, and charges are also accumulated in the capacitance elements. This technology is disclosed in Japanese Journal of Applied Physics, vol. 47, No. 7, pp. 5390-5395, (2008) and Technical Digest of VLSI Circuit Technology, pp. 180-181, (2009), where a photodiode, a plurality of pixel transistors outputting signals, and a capacitance element for charge accumulation are included in each pixel.

0008<figref idref="DRAWINGS">FIG. 18</figref> illustrates a layout of a pixel provided with a capacitance element disclosed in Technical Digest of VLSI Circuit Technology, pp. 180-181, (2009). In this CMOS solid-state image pickup device, a photodiode PD and a plurality of pixel transistors, that is, a transfer transistor Tr<b>1</b>, a reset transistor Tr<b>2</b>, an amplifying transistor Tr<b>3</b>, a column selecting transistor Tr<b>4</b>, and a capacitance selecting transistor Tr<b>5</b> are formed in one pixel <b>111</b>. T denotes a transfer gate electrode, FD denotes a floating diffusion, S denotes a capacitance selecting gate electrode, R denotes a reset gate electrode, SF denotes an amplifying gate electrode, and X denotes a column selecting gate electrode. In addition, a capacitance element <b>112</b> for charge accumulation is formed in the pixel <b>111</b>. The one end of the capacitance element <b>112</b> is connected to a common source/drain region <b>113</b> of the reset transistor Tr<b>2</b> and the capacitance selecting transistor Tr<b>5</b>, and the other end thereof is connected to a ground or a power supply VDD. A vertical signal line (not shown) is connected to a source/drain region <b>114</b> of the one side of the column selecting transistor Tr<b>4</b>.

0009In addition, on the other hand, a back side illuminated type CMOS solid-state image pickup device where wire lines are formed on a front surface side of a semiconductor substrate for implementation of high sensitivity in a CMOS solid-state image pickup device and image capturing is performed by using light which is incident from a rear surface side of the semiconductor substrate is disclosed in, for example, Japanese Patent No. 4123415, Japanese Unexamined Patent Application Publication Nos. 2003-31785 and 2006-245499. In the case of the back side illuminated type CMOS solid-state image pickup device, as illustrated in FIG. 4 of Japanese Patent No. 4123415, the wire line layer in the front surface of the semiconductor substrate may be disposed just above the photodiode without consideration of the light incident to the photodiode.

0010In addition, recently, a module where a CMOS solid-state image pickup device chip and a logic LSI chip are three-dimensionally laminated is disclosed in Japanese Unexamined Patent Application Publication Nos. 2002-44527 and 2006-49361, and the like. In this technology, the solid-state image pickup device chip is laminated on a chip, on which an AD converter or a memory is mounted, by using bump connection, so that miniaturization is implemented.

0011<figref idref="DRAWINGS">FIG. 19</figref> illustrates a CMOS solid-state image pickup device <b>115</b> where a first semiconductor chip <b>116</b> including an image pickup area on which a plurality of pixels are arrayed in a two-dimensional array shape and a second semiconductor chip <b>117</b> on which logic circuits are formed are laminated. In the second semiconductor chip <b>117</b>, a memory <b>118</b>, an analog digital converter (hereinafter, referred to as an A/D converter), and the like are formed. In addition, in the second semiconductor chip <b>117</b>, an area <b>119</b> where the first semiconductor chip <b>116</b> is to be laminated and other circuits are formed.

0012In addition, a CMOS solid-state image pickup device where light transmitting through a photoelectric conversion portion is reflected so as to be incident again to the photoelectric conversion portion is also disclosed in Japanese Unexamined Patent Application Publication No. 2008-147333 or the like.

SUMMARY OF THE INVENTION

0013In the solid-state image pickup device having a layout of the pixel added with the aforementioned capacitance element <b>112</b> illustrated in <figref idref="DRAWINGS">FIG. 18</figref>, the area occupied by the capacitance element <b>112</b> in one pixel is very large. In general, the size of the pixel constructed with a photodiode and a plurality of pixel transistors outputting signals has been miniaturized as the generation proceeds. On the other hand, in order to increase the sensitivity of light reception, it is necessary to increase the area of the photodiode. Under these circumstances, in the solid-state image pickup device having the pixels illustrated in <figref idref="DRAWINGS">FIG. 18</figref>, since the capacitance element <b>112</b> is necessarily disposed in one pixel, it is necessary to relatively decrease the area of the photodiode PD. Therefore, there is a problem in that the sensitivity of light reception is reduced. In addition, a process for newly forming the capacitance element <b>112</b> is necessary.

0014In addition, in a solid-state image pickup device where semiconductor chips <b>116</b> and <b>117</b> illustrated in <figref idref="DRAWINGS">FIG. 19</figref> are laminated, there is a problem in that cross talk caused by noise from the second semiconductor chip <b>117</b> in which a logic circuit such as an AD converter is formed or noise caused by light incidence is generated. For example, in the second semiconductor chip <b>117</b> of the logic circuit, light emission caused by hot carriers generated at transistors is incident to the photodiode of the first semiconductor chip <b>116</b> of the solid-state image pickup device, so that noise is generated.

0015It is desirable to provide a solid-state image pickup device capable of improving the area efficiency of a photoelectric conversion portion in a back side illuminated type and reducing disturbance noise and a method of manufacturing the solid-state image pickup device.

0016It is desirable to provide an electronic apparatus adapted to a camera or the like having the solid-state image pickup device.

0017According to an embodiment of the invention, there is provided a solid-state image pickup device including: a plurality of pixels, each of which includes a photoelectric conversion portion and a pixel transistor formed in a front surface side of a substrate, wherein a rear surface side of the substrate is set as a light receiving plane of the photoelectric conversion portion; and an element, which becomes a passive element or an active element, which is disposed in the front surface side of the substrate so as to be superimposed on the photoelectric conversion portion.

0018The solid-state image pickup device according to the embodiment of the invention is configured as a back side illuminated type. In addition, since the passive element or the active element which is a portion of the components of the solid-state image pickup device is disposed in the front surface side of the substrate so as to be superimposed on the photoelectric conversion portion, so that it is possible to increase the area of the photoelectric conversion portion. In the configuration where the first semiconductor chip having an image pickup area and a second semiconductor chip in which a logic circuit is formed are laminated, cross talk caused by noise from the second semiconductor chip or disturbance noise such as noise caused by light incidence is reduced.

0019According to another embodiment of the invention, there is provided a method of manufacturing a solid-state image pickup device, including the step of forming a plurality of pixels in a semiconductor substrate, each of which includes a photoelectric conversion portion and a pixel transistor formed in a front surface side of the substrate, wherein a rear surface side of the substrate is set as a light receiving plane of the photoelectric conversion portion. In addition, the method may further include the step of forming an element, which becomes a passive element or an active element, which is disposed in the front surface side of the substrate so as to be superimposed on the photoelectric conversion portion.

0020In the method of manufacturing a solid-state image pickup device according to the embodiment of the invention, since the rear surface side of the substrate is used as a light receiving plane and the step of forming the passive element or the active element disposed in the front surface side of the substrate so as to be superimposed on the photoelectric conversion portion is included, it is possible to increase the area of the photoelectric conversion portion. In addition, in the configuration where the first and second semiconductor chips are laminated, it is possible to form the first semiconductor chip capable of shielding disturbance noise from the second semiconductor chip.

0021According to still another embodiment of the invention, there is provided an electronic apparatus including: a solid-state image pickup device; an optical system which guides incident light to a photodiode of the solid-state image pickup device; and a signal processing circuit which performs a process on an output signal of the solid-state image pickup device. The solid-state image pickup device includes a plurality of pixels, each of which includes a photoelectric conversion portion and a pixel transistor formed in a front surface side of a substrate, wherein a rear surface side of the substrate is set as a light receiving plane of the photoelectric conversion portion; and a passive element or an active element which is disposed in the front surface side of the substrate so as to be superimposed on the photoelectric conversion portion.

0022In the electronic apparatus according to the invention, since the aforementioned solid-state image pickup device according to the invention is provided, it is possible to increase the area of the photoelectric conversion portion in the solid-state image pickup device, and in the case where the first and second semiconductor chips are configured to be laminated, it is possible to reduce disturbance noise from the second semiconductor chip.

0023In the solid-state image pickup device according to the invention, it is possible to improve the area efficiency of the photoelectric conversion portion, so that it is possible to provide a back side illuminated type solid-state image pickup device where disturbance noise is reduced.

0024In the method of manufacturing a solid-state image pickup device according to the invention, it is possible to improve the area efficiency of the photoelectric conversion portion, so that it is possible to manufacture a back side illuminated type solid-state image pickup device where disturbance noise is reduced.

0025In the electronic apparatus according to the invention, it is possible to improve the area efficiency of the photoelectric conversion portion in the solid-state image pickup device, so that it is possible to reduce disturbance noise. Accordingly, it is possible to provide a high quality electronic apparatus such as a camera.

BRIEF DESCRIPTION OF THE DRAWINGS

0026<figref idref="DRAWINGS">FIG. 1</figref> is a schematic configuration diagram illustrating an example of a solid-state image pickup device applied to embodiments of the invention.

0027<figref idref="DRAWINGS">FIG. 2</figref> is a schematic cross-sectional diagram illustrating main components of a solid-state image pickup device according to a first embodiment of the invention.

0028<figref idref="DRAWINGS">FIG. 3</figref> is a schematic cross-sectional diagram illustrating main components according to the first embodiment of the invention.

0029<figref idref="DRAWINGS">FIG. 4</figref> is a schematic plan diagram illustrating main components according to the first embodiment of the invention.

0030<figref idref="DRAWINGS">FIG. 5</figref> is a schematic cross-sectional diagram illustrating main components of a solid-state image pickup device according to a second embodiment of the invention.

0031<figref idref="DRAWINGS">FIG. 6</figref> is a schematic plan diagram illustrating main components of the solid-state image pickup device according to the second embodiment of the invention.

0032<figref idref="DRAWINGS">FIG. 7</figref> is an equivalent circuit diagram of a unit pixel according to the second embodiment.

0033<figref idref="DRAWINGS">FIG. 8</figref> is a schematic plan diagram illustrating main components of a solid-state image pickup device according to a third embodiment of the invention.

0034<figref idref="DRAWINGS">FIG. 9</figref> is a circuit configuration diagram illustrating a solid-state image pickup device for explaining the solid-state image pickup device according to a fourth embodiment of the present invention.

0035<figref idref="DRAWINGS">FIG. 10</figref> is a schematic plan diagram illustrating main components of the solid-state image pickup device according to a sixth embodiment of the invention.

0036<figref idref="DRAWINGS">FIG. 11</figref> is a schematic cross-sectional diagram illustrating main components of the solid-state image pickup device according to a seventh embodiment of the invention.

0037<figref idref="DRAWINGS">FIG. 12</figref> is a schematic configuration diagram illustrating main components of the solid-state image pickup device according to an eighth embodiment of the invention.

0038<figref idref="DRAWINGS">FIGS. 13A to 13E</figref> are manufacturing process diagrams illustrating a method of manufacturing a solid-state image pickup device according to a ninth embodiment of the invention.

0039<figref idref="DRAWINGS">FIG. 14</figref> is a schematic cross-sectional diagram illustrating the solid-state image pickup device obtained by the manufacturing method according to the ninth embodiment of the invention.

0040<figref idref="DRAWINGS">FIGS. 15A to 15C</figref> are manufacturing process diagrams illustrating a method of manufacturing a solid-state image pickup device according to an eleventh embodiment of the invention.

0041<figref idref="DRAWINGS">FIG. 16</figref> is a schematic cross-sectional diagram illustrating the solid-state image pickup device obtained by the manufacturing method according to the eleventh embodiment of the invention.

0042<figref idref="DRAWINGS">FIG. 17</figref> is a schematic configuration diagram illustrating an electronic apparatus according to the sixth embodiment of the invention.

0043<figref idref="DRAWINGS">FIG. 18</figref> is a schematic configuration diagram illustrating an example of a solid-state image pickup device in the related art.

0044<figref idref="DRAWINGS">FIG. 19</figref> is a schematic configuration diagram illustrating another example of a solid-state image pickup device in the related art.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

0045Hereinafter, embodiments for implementing the invention (hereinafter, referred to as embodiments) will be described. In addition, the description is made in the following order.

00461. Example of Schematic Configuration of MOS Solid-State Image Pickup Device

00472. First Embodiment (Example of Configuration of Solid-State Image Pickup Device)

00483. Second Embodiment (Example of Configuration of Solid-State Image Pickup Device)

00494. Third Embodiment (Example of Configuration of Solid-State Image Pickup Device)

00505. Fourth Embodiment (Example of Configuration of Solid-State Image Pickup Device)

00516. Fifth Embodiment (Example of Configuration of Solid-State Image Pickup Device)

00527. Sixth Embodiment (Example of Configuration of Solid-State Image Pickup Device)

00538. Seventh Embodiment (Example of Configuration of Solid-State Image Pickup Device)

00549. Eighth Embodiment (Example of Configuration of Solid-State Image Pickup Device)

005510. Ninth Embodiment (Example of Method of Manufacturing Solid-State Image Pickup Device)

005611. Tenth Embodiment (Example of Method of Manufacturing Solid-State Image Pickup Device)

005712. Eleventh Embodiment (Example of Method of Manufacturing Solid-State Image Pickup Device)

005813. Twelfth Embodiment (Example of Configuration of electronic apparatus)

1. Example of Schematic Configuration of CMOS Solid-State Image Pickup Device

0059<figref idref="DRAWINGS">FIG. 1</figref> illustrates a schematic configuration of an example of an MOS solid-state image pickup device applied to embodiments of the invention. As illustrated in <figref idref="DRAWINGS">FIG. 1</figref>, the solid-state image pickup device <b>1</b> of the example is configured to include a pixel area (a so-called image pickup area) <b>3</b> where a plurality of pixels <b>2</b> including photoelectric conversion portions are arrayed regularly in a two-dimensional array shape in a semiconductor substrate <b>11</b>, for example, a silicon substrate and a peripheral circuit portion. As the pixel <b>2</b>, a unit pixel constructed with one photoelectric conversion portion and a plurality of the pixel transistors may be used. In addition, as the pixel <b>2</b>, a so-called pixel shared structure where a plurality of the photoelectric conversion portions shares other pixel transistors except for the transfer transistor may be used. A plurality of the pixel transistors may be constructed with four transistors including a transfer transistor, a reset transistor, an amplifying transistor, and a selecting transistor or three transistors excluding the selecting transistor.

0060The peripheral circuit portion is configured to include so-called logic circuits such as a vertical driving circuit <b>4</b>, a column signal processing circuit <b>5</b>, a horizontal driving circuit <b>6</b>, an output circuit <b>7</b>, and a control circuit <b>8</b>.

0061The control circuit <b>8</b> receives an input clock and a data commanding an operation mode or the like and outputs a data of internal information or the like of the solid-state image pickup device. In other words, the control circuit <b>8</b> generates a clock signal or a control signal, which becomes a reference of operations of the vertical driving circuit <b>4</b>, the column signal processing circuit <b>5</b>, the horizontal driving circuit <b>6</b>, and the like, according to a vertical synchronization signal, a horizontal synchronization signal, and a master clock. In addition, the control circuit <b>8</b> inputs these signals to the vertical driving circuit <b>4</b>, the column signal processing circuit <b>5</b>, the horizontal driving circuit <b>6</b>, and the like.

0062The vertical driving circuit <b>4</b> is constructed with, for example, a shift register to select a pixel driving wire line and to supply a pulse for driving a pixel with the selected pixel driving wire line so as to drive pixels in units of a row. In other words, the vertical driving circuit <b>4</b> selectively drives the pixels <b>2</b> in the pixel area <b>3</b> sequentially in units of a row in the vertical direction. In addition, a pixel signal according to signal charges generated according to a received light amount, for example, in a photodiode which becomes the photoelectric conversion element of each pixel <b>2</b> is supplied to the column signal processing circuit <b>5</b> through a vertical signal line <b>9</b>.

0063The column signal processing circuit <b>5</b> is disposed, for example, for each column of the pixels <b>2</b> to perform a signal process such as a noise removing process in units of a column of pixels on signals output from one row worth of the pixels <b>2</b>. In other words, the column signal processing circuit <b>5</b> performs a signal process such as CDS for removing fixed pattern noise unique to the pixels <b>2</b>, signal amplification, or AD conversion. A horizontal select switch (not shown) is disposed to be connected to the output terminal of the column signal processing circuit <b>5</b> between a horizontal signal line <b>10</b> and the output terminal.

0064The horizontal driving circuit <b>6</b> is constructed with, for example, a shift register to sequentially output horizontal scan pulses so as to sequentially select each of the column signal processing circuits <b>5</b> and to output a pixel signal from each of the column signal processing circuits <b>5</b> to the horizontal signal line <b>10</b>.

0065The output circuit <b>7</b> performs a signal process on the signals sequentially supplied from each of the column signal processing circuits <b>5</b> through the horizontal signal line <b>10</b> and outputs the processed signals. For example, there may be a case where only buffering may be performed or a case where various digital signal processes such as black level adjustment or column variation correction may be performed. An input/output terminal <b>12</b> exchanges signals with an external portion.

2. First Embodiment

Example of Configuration of Solid-State Image Pickup Device

0066<figref idref="DRAWINGS">FIGS. 2 to 4</figref> illustrate a solid-state image pickup device according to a first embodiment of the invention, that is, a back side illuminated type CMOS solid-state image pickup device. <figref idref="DRAWINGS">FIG. 2</figref> illustrates a schematic configuration of an area corresponding to a unit pixel of an image pickup area where a plurality of the pixels is arrayed in a two-dimensional array shape. <figref idref="DRAWINGS">FIG. 3</figref> illustrates a schematic cross sectional structure of main components of <figref idref="DRAWINGS">FIG. 2</figref>. <figref idref="DRAWINGS">FIG. 4</figref> illustrates a schematic plan diagram, that is, a schematic plan layout of <figref idref="DRAWINGS">FIG. 3</figref>.

0067In the solid-state image pickup device <b>21</b> according to the first embodiment, a second conductivity type semiconductor well area <b>23</b> is formed in a first conductivity type silicon semiconductor substrate <b>22</b>, and a photodiode PD which becomes the photoelectric conversion portion is formed in the semiconductor well area <b>23</b> in the depth direction from a front surface of the substrate. In this embodiment, the first conductivity type is set to be the n type, and the second conductivity type is set to be the p type. The photodiode PD is configured to include an n-type semiconductor area <b>24</b> and a p-type semiconductor area <b>20</b> which also suppresses dark currents in the front surface side of the substrate. A plurality of the pixel transistors Tr constituting read circuits for reading signal charges of the photodiode PD are formed in the front surface side of the p-type semiconductor well area <b>23</b>. In this embodiment, a plurality of the pixel transistors Tr are constructed with four transistors of the transfer transistor Tr<b>1</b>, the reset transistor Tr<b>2</b>, the amplifying transistor Tr<b>3</b>, and the selecting transistor Tr<b>4</b>.

0068The transfer transistor Tr<b>1</b> is formed to include a photodiode PD, an n-type semiconductor area <b>25</b>, which becomes a floating diffusion portion FD, and a transfer gate electrode <b>31</b>. The reset transistor Tr<b>2</b> is formed to include a pair of n-type source/drain regions <b>26</b> and <b>27</b> and a reset gate electrode <b>32</b>. The amplifying transistor Tr<b>3</b> is formed to include a pair of n-type source/drain regions <b>27</b> and <b>28</b> and an amplifying gate electrode <b>33</b>. The selecting transistor Tr<b>4</b> is formed to include a pair of n-type source/drain regions <b>28</b> and <b>29</b> and a selecting gate electrode <b>34</b>.

0069Although not shown, the floating diffusion portion FD is connected through a later-described wire line to the amplifying gate electrode <b>33</b> and the n-type source/drain region <b>26</b> which becomes the actual source region of the reset transistor Tr<b>2</b>. The n-type source/drain region <b>27</b> which becomes the actual drain region of each of the reset transistor Tr<b>2</b> and the amplifying transistor Tr<b>3</b> is connected to the power supply VDD. The n-type source/drain region <b>29</b> which becomes the actual source region of the selecting transistor Tr<b>4</b> is connected to the vertical signal line. Between adjacent pixels or within the unit pixel, an element isolation region <b>40</b> is provided.

0070The photodiode PD and a plurality of the pixel transistors Tr<b>1</b> to Tr<b>4</b> are formed in the semiconductor substrate <b>22</b> by using the so-called front-end process.

0071On the other hand, a multi-layered wire line layer <b>38</b>, in which wire lines <b>37</b> of a plurality of layers are formed through interlayer insulating films <b>36</b>, is formed on the front surface of the semiconductor substrate <b>22</b>. In this embodiment, a two-layered wire line <b>37</b> is formed. The multi-layered wire line layer <b>38</b> is formed by using the so-called back-end process. Reference numeral <b>50</b> denotes a connection conductor which connects a necessary pixel transistor to a necessary wire line.

0072In addition, in this embodiment, an element <b>39</b> which becomes a passive element or an active element superimposed on the photodiode PD is formed in the front surface side of the substrate. The passive element is simultaneously formed by using the interlayer insulating films <b>36</b> and the wire lines <b>37</b> of the multi-layered wire line layer <b>38</b>. As a passive element, there is a capacitance element, a resistance element, an inductance element, or the like in a pixel or a peripheral circuit side. The active element is formed by using the wire line <b>37</b>, the interlayer insulating film <b>36</b>, or the like which is formed by using the back-end process. As an active element, there is a pixel transistor or the like constituting a pixel. The transistor may be formed, for example, as a thin-film transistor.

0073After the back-end process is finished, a support substrate <b>90</b>, for example, a silicon substrate or the like is adhered on the front surface side of the semiconductor substrate <b>22</b>, and the semiconductor substrate <b>22</b> is thinned by polishing the rear surface thereof. The rear surface of the substrate which is thinned down to the vicinity of the photodiode PD is formed as a light receiving plane <b>35</b>. A p-type semiconductor area <b>89</b> for suppressing dark currents is formed in an interface which faces the light receiving plane <b>35</b> of the photodiode PD. A color filter <b>91</b> and an on-chip lens <b>92</b> are formed through an insulating film <b>94</b> in the side of the light receiving plane <b>35</b>, so that the back side illuminated type solid-state image pickup device <b>21</b> according to the embodiment is completed. In addition, the p-type semiconductor area <b>89</b> and the on-chip lens <b>92</b> may be omitted in the configuration.

0074According to the solid-state image pickup device <b>21</b> of the first embodiment, since the element <b>39</b> such as a passive element or an active element is disposed so as to be superimposed just on the photodiode PD by using a back-end process, it is possible to improve the area efficiency of the photodiode PD of the pixel. Since the high sensitivity is obtained due to the improvement of the area efficiency of the photodiode PD, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

3. Second Embodiment

Example of Configuration of Solid-State Image Pickup Device

0075<figref idref="DRAWINGS">FIGS. 4 and 5</figref> illustrate a solid-state image pickup device according to a second embodiment of the invention, that is, a back side illuminated type CMOS solid-state image pickup device. Similarly to <figref idref="DRAWINGS">FIG. 3</figref> described above, <figref idref="DRAWINGS">FIG. 5</figref> illustrates a schematic cross sectional structure of main components in an area corresponding to a unit pixel of an image pickup area where a plurality of the pixels are arrayed in a two-dimensional array shape. <figref idref="DRAWINGS">FIG. 6</figref> illustrates a schematic plan diagram, that is, a schematic plan layout thereof.

0076First, an example of an equivalent circuit of a unit pixel according to the embodiment is described with reference to <figref idref="DRAWINGS">FIG. 7</figref>. The unit pixel <b>41</b> according to the embodiment is constructed with a photodiode PD which becomes the photoelectric conversion portion and five pixel transistors. The five pixel transistors include a transfer transistor Tr<b>1</b>, a reset transistor Tr<b>2</b>, an amplifying transistor Tr<b>3</b>, a column selecting transistor Tr<b>4</b>, and a capacitance selecting transistor Tr<b>5</b>. Herein, as the pixel transistors Tr<b>1</b> to Tr<b>5</b>, for example, n-channel MOS transistors may be used.

0077The photodiode PD is connected to the transfer transistor Tr<b>1</b>. The transfer transistor Tr<b>1</b> is connected to the capacitance selecting transistor Tr<b>5</b> through the floating diffusion portion FD. Signal charges (herein, electrons), which are generated by photoelectric conversion in the photodiode PD and stored therein, are transferred to the floating diffusion portion FD by applying a transfer pulse φT to the gate of the transfer transistor Tr<b>1</b>.

0078The capacitance selecting transistor Tr<b>5</b> is connected to a series circuit constructed with the reset transistor Tr<b>2</b>, the amplifying transistor Tr<b>3</b>, and the column selecting transistor Tr<b>4</b>. The floating diffusion portion FD is connected to the gate of the amplifying transistor Tr<b>3</b>. The power supply VDD is connected to the source of the reset transistor Tr<b>2</b> and the drain of the amplifying transistor Tr<b>3</b>, that is, the common source/drain region. The source of the selecting transistor is connected to the vertical signal line <b>9</b>. In addition, a capacitance element <b>42</b> for charge storage is connected between a central connection point of the capacitance selecting transistor Tr<b>5</b> and the reset transistor Tr<b>2</b> and the power supply VDD. A capacitance selecting pulse φS is applied to the capacitance selecting gate of the capacitance selecting transistor Tr<b>5</b>; a reset pulse φR is applied to the reset gate of the reset transistor Tr<b>2</b>; and a column selecting pulse φX is applied to the column selecting gate of the column selecting transistor Tr<b>4</b>.

0079Herein, the source of the capacitance selecting transistor Tr<b>5</b> (the drain of the transfer transistor Tr<b>1</b>) is configured as a floating diffusion portion FD. Before the signal charges are transferred from the photodiode PD to the floating diffusion portion FD, the reset pulse φR and the capacitance selecting pulse φS are applied to the reset gate and the capacitance selecting gate, respectively. Therefore, the potential of the floating diffusion portion FD and the capacitance of the capacitance element <b>42</b> for charge storage are reset. By applying the column selecting pulse φX to the gate of the column selecting transistor Tr<b>4</b>, the column selecting transistor Tr<b>4</b> is in the on state, so that the pixel is selected.

0080When strong light is received, the charges overflown from the photodiode PD exceeds the potential barrier under the channel of the transfer transistor Tr<b>1</b> and the capacitance selecting transistor Tr<b>5</b> to be stored in the floating diffusion portion FD and the capacitance element <b>42</b>. At this time, the photoelectrons that are not saturated are stored in the photodiode PD. After the storage is finished, the capacitance selecting transistor Tr<b>5</b> is turned off, so that the signal charges stored in the floating diffusion portion FD and the capacitance element <b>42</b> are divided. At this time, the signal charges of the floating diffusion portion FD, which include noise caused by a variation of the transistor, are read. Next, the transfer transistor Tr<b>1</b> is turned on, so that the signal charges stored in the photodiode PD are transferred to the floating diffusion portion FD. After the transfer is finished, the transfer transistor Tr<b>1</b> is turned off, so that the signal of the floating diffusion portion FD is read. This signal is a sum of the aforementioned noise and signal. Next, the transfer transistor Tr<b>1</b> and the capacitance selecting transistor Tr<b>5</b> are turned on, so that all charges are collected in the floating diffusion portion FD and the capacitance element <b>42</b>, and the signal thereof is read. In this manner, the signal charges which are read several times are converted into a charge voltage by the amplifying transistor Tr<b>3</b>, and the charge voltage is output through the column selecting transistor Tr<b>4</b> to the vertical signal line <b>9</b> as a pixel signal.

0081In addition, the equivalent circuit of the unit pixel is not limited to the aforementioned example, but other equivalent circuits may be employed.

0082Similarly to the aforementioned embodiment, in the solid-state image pickup device <b>44</b> according to the second embodiment, a second conductivity type semiconductor well area <b>23</b> is formed in a first conductivity type silicon semiconductor substrate <b>22</b>, and a photodiode PD which becomes the photoelectric conversion portion is formed in the semiconductor well area <b>23</b> in the depth direction from the front surface of the substrate. In this embodiment, the first conductivity type is set to be the n type, and the second conductivity type is set to be the p type. The photodiode PD is configured to include an n-type semiconductor area <b>24</b> and a p-type semiconductor area <b>25</b> which also suppresses dark currents in the front surface side of the substrate. A plurality of the pixel transistors are formed in the front surface side of the p-type semiconductor well area <b>23</b>. In this embodiment, as illustrated in the equivalent circuit of <figref idref="DRAWINGS">FIG. 6</figref>, a plurality of the pixel transistors are constructed with four transistors including a transfer transistor Tr<b>1</b>, a reset transistor Tr<b>2</b>, an amplifying transistor Tr<b>3</b>, and a selecting transistor Tr<b>4</b>.

0083The photodiode PD and a plurality of the pixel transistors Tr<b>1</b> to Tr<b>4</b> may be formed in the semiconductor substrate <b>22</b> by using the so-called front-end process.

0084On the other hand, a multi-layered wire line layer <b>38</b>, in which wire lines <b>37</b> of a plurality of layers are formed through interlayer insulating films <b>36</b>, is formed on the front surface of the semiconductor substrate <b>22</b>. In this example, a two-layered wire line <b>37</b> is formed. The multi-layered wire line layer <b>38</b> is formed by using the so-called back-end process.

0085In addition, in the embodiment, a capacitance element <b>42</b> which becomes a passive element superimposed on the photodiode PD is formed in the front surface side of the substrate. The capacitance element <b>42</b> is a capacitance element for charge storage, which is used for storing charges leaking from the photodiode PD. The capacitance element <b>42</b> is simultaneously formed by using the interlayer insulating films <b>36</b> and the wire lines <b>37</b> of the multi-layered wire line layer <b>38</b>. The wire line <b>37</b> may be formed as a metal wire line of Cu, Al, W, or the like. In this example, the wire lines <b>37</b> are formed with a Cu wire line <b>37</b>A and a barrier metal <b>37</b>B which is formed on the upper and lower surfaces of the Cu wire line <b>37</b>A. The barrier metal <b>37</b>B is formed by using a metal which prevents diffusion of Cu and does not pass light. The capacitance element <b>42</b> is formed by using the wire line <b>37</b> and the interlayer insulating film <b>36</b> of the first layer and the wire line <b>37</b> of the second layer. In the case where the wire lines <b>37</b> includes three or more layers, it is preferable that the capacitance element <b>42</b> is formed by using the wire lines <b>37</b> of the two layers near to the photodiode PD and the interlayer insulating film <b>36</b> therebetween because the charges leaking from the photodiode PD are easily transferred to the capacitance element <b>42</b>.

0086The interlayer insulating film <b>36</b> may be formed by using a silicon oxide film (SiO₂), a silicon oxide nitride film (SiON), or the like, or a so-called high dielectric film including hafnium, tantalum, or the like. In particular, the interlayer insulating film <b>36</b> of a portion where the capacitance element <b>42</b> is to be formed may be formed by using a high dielectric film, and other interlayer insulating films <b>36</b> may be formed by using a silicon oxide film, a silicon oxide nitride film, or the like having a low dielectric constant. The high dielectric film is used for the capacitance element <b>42</b>, so that it is possible to increase a capacitance per unit area.

0087After the back-end process is finished, although not shown, a support substrate such as a silicon substrate is adhered on the interlayer insulating film <b>36</b>, and the semiconductor substrate <b>22</b> is thinned by polishing the rear surface thereof. The rear surface of the substrate which is thinned down to the vicinity of the photodiode PD is formed as a light receiving plane <b>35</b>. A p-type semiconductor area <b>89</b> for suppressing dark currents is formed in an interface which faces the light receiving plane <b>35</b> of the photodiode PD. A color filter and an on-chip lens are formed in the side of the light receiving plane <b>35</b>, so that the back side illuminated type solid-state image pickup device according to the embodiment is completed.

0088Since other configurations are the same as those described in the first embodiment, in <figref idref="DRAWINGS">FIGS. 5 and 6</figref>, the components corresponding to <figref idref="DRAWINGS">FIGS. 3 and 4</figref> are denoted by the same reference numerals, and the description thereof is omitted.

0089In the solid-state image pickup device <b>44</b> according to the second embodiment, the capacitance element <b>42</b> for charge storage constituting the unit pixel <b>41</b> is disposed just above the photodiode PD by using the multi-layered wire line layer <b>38</b>, so that it is possible to improve the area efficiency of the photodiode PD in the pixel. Since the capacitance element <b>42</b> is formed on the photodiode PD by using a metal wire line, as illustrated with a broken line in <figref idref="DRAWINGS">FIG. 5</figref>, the light L which is irradiated from the rear surface and transmitted through the photodiode PD is reflected on the electrode (the wire line <b>37</b> of a metal) of the capacitance element <b>42</b> to be incident again to the photodiode PD. Therefore, it is possible to improve the light usage efficiency. Due to the improvement of the area efficiency of the photodiode PD, the high sensitivity is obtained, so that it is possible to miniaturize and highly integrate the pixels. Accordingly, it is possible to provide a high quality solid-state image pickup device.

0090According to the embodiment, without increasing the layout area of the capacitance element <b>42</b>, it is possible to freely set a capacitance value with the size of the wire line <b>37</b> which becomes an electrode and the thickness of the interlayer insulating film <b>36</b>. When the dielectric film of the capacitance element <b>42</b> as the interlayer insulating film <b>36</b> is formed by using a high dielectric film, it is possible to increase a capacitance value per valley area. Since the capacitance element <b>42</b> for charge storage is included, it is possible to set a saturated signal amount to a large value, so that it is possible to provide a solid-state image pickup device having a widened dynamic range.

0091In addition, the wire lines <b>37</b> of the two layers constituting the capacitance element <b>42</b> may be configured by combining two metal wire lines, by combining a metal wire line as the one wire line and a polysilicon wire line as the other wire line, or by combining two polysilicon wire lines.

4. Third Embodiment

Example of Configuration of Solid-State Image Pickup Device

0092<figref idref="DRAWINGS">FIG. 8</figref> illustrates a solid-state image pickup device according to a third embodiment of the invention, that is, a back side illuminated type CMOS solid-state image pickup device. <figref idref="DRAWINGS">FIG. 8</figref> illustrates a schematic plan diagram, that is, a schematic plan layout of an area corresponding to a unit pixel of an image pickup area where a plurality of the pixels are arrayed in a two-dimensional array shape.

0093The solid-state image pickup device <b>46</b> according to the third embodiment is configured by disposing a capacitance element <b>42</b> having so-called comb-teeth electrodes on the photodiode PD so as to be superimposed thereon. In other words, a pair of facing comb-teeth electrodes <b>47</b>A and <b>47</b>B of the capacitance element <b>42</b> are formed by using the same layer, for example, the wire line <b>37</b> of the first layer in the multi-layered wire line layer <b>38</b>, and the capacitance element <b>42</b> is configured with the comb-teeth electrodes <b>47</b>A and <b>47</b>B and the interlayer insulating film <b>36</b> (not shown) therebetween. Since other configurations are the same as those described in the first embodiment, in <figref idref="DRAWINGS">FIG. 8</figref>, the components corresponding to <figref idref="DRAWINGS">FIG. 4</figref> are denoted by the same reference numerals, and the description thereof is omitted.

0094In the solid-state image pickup device <b>46</b> according to the third embodiment, a comb-teeth type capacitance element <b>42</b> having comb-teeth shaped electrodes <b>47</b>A and <b>47</b>B which are formed by using the wire line <b>37</b> of the same layer is disposed just above the photodiode PD. Therefore, similarly as described in the second embodiment, since the high sensitivity is obtained due to the improvement of the area efficiency of the photodiode PD, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device. In addition, since the capacitance element <b>42</b> for charge storage is included, it is possible to set a saturated signal amount to a large value, so that it is possible to provide a solid-state image pickup device having a widened dynamic range.

5. Fourth Embodiment

Example of Configuration of Solid-State Image Pickup Device

0095<figref idref="DRAWINGS">FIG. 9</figref> illustrates a solid-state image pickup device according to a fourth embodiment of the invention, that is, a back side illuminated type CMOS solid-state image pickup device. <figref idref="DRAWINGS">FIG. 9</figref> illustrates a diagrammatic equivalent circuit of the solid-state image pickup device according to the embodiment. As illustrated in <figref idref="DRAWINGS">FIG. 9</figref>, the solid-state image pickup device <b>48</b> according to the fourth embodiment is implemented by arraying pixels <b>2</b>, each of which includes a photodiode PD and a plurality of pixel transistors, in a two-dimensional array shape. Similarly to the aforementioned embodiment, a plurality of the pixel transistors are constructed with four transistors including a representatively illustrated amplifying transistor <b>52</b> including a transfer transistor and a reset transistor and a switch element <b>53</b> which becomes a selecting transistor. In this embodiment, the outputs of the pixels <b>2</b> arrayed in the two-dimensional array shape are read in units of a column, and the outputs as digital signals are output to the A/D converter <b>54</b>. In addition, the pixels <b>2</b> are driven by a driving signal from the vertical driving circuit <b>4</b> at every horizontal line, and the pixel signals are output though the vertical signal line <b>9</b>. The pixel signals from the A/D converter <b>54</b> are output through the horizontal signal line <b>10</b> when the switch element <b>55</b> is turned on by the signal from the horizontal driving circuit <b>6</b>.

0096In addition, in the embodiment, the capacitance element included in the A/D converter <b>54</b> is formed as the capacitance element by using the wire line <b>37</b> and the interlayer insulating film <b>36</b> as illustrated in <figref idref="DRAWINGS">FIGS. 5 and 8</figref> described above, and the capacitance element is configured to be disposed on the photodiode PD. Other configurations are the same as those of the solid-state image pickup device described above, and thus, the description thereof is omitted.

0097In the solid-state image pickup device <b>48</b> according to the fourth embodiment, since the capacitance element included in the A/D converter <b>54</b> is disposed on the photodiode PD, the area occupying the peripheral circuit is reduced, so that it is possible to improve the area efficiency of the photodiode PD. In addition, when the A/D converter is formed in another semiconductor chip, it is possible to implement the semiconductor chip having the solid-state image pickup device <b>48</b> with a smaller size. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

0098The fourth embodiment shows an example where the capacitance element included in the A/D converter is disposed just above the photodiode PD. Besides that, a configuration where a capacitance element included in, for example, a correlated double sampling circuit (CDS) constituting a signal processing circuit is disposed just above the photodiode PD may be used. The configuration may also give the same effect as that of the fourth embodiment.

[Modified Example of Fourth Embodiment]

0099In the solid-state image pickup device according to the modified example, although not shown, the A/D converter is provided to each pixel, the capacitance element of each A/D converter is disposed on the area of the corresponding A/D converter by using the interlayer insulating film <b>36</b> and the wire line <b>37</b>. On the other hand, as illustrated in <figref idref="DRAWINGS">FIGS. 5 and 8</figref>, the capacitance element <b>42</b> for charge storage formed by using the interlayer insulating film <b>36</b> and the wire line <b>37</b> is disposed on each of the photodiodes PD. Other configurations are the same as those of the solid-state image pickup device described above, and thus, the description thereof is omitted.

0100In the solid-state image pickup device according to the modified example, since the capacitance element of the A/D converter is disposed on each area of the A/D converter for each pixel, it is possible to improve the area efficiency of the photodiode PD, so that it is possible to improve sensitivity characteristics. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

6. Fifth Embodiment

Example of Configuration of Solid-State Image Pickup Device

0101Although not shown, a solid-state image pickup device according to a fifth embodiment of the invention, that is, a back side illuminated type solid-state image pickup device, is configured by disposing a capacitance element for storing charges, which is necessary for a global shutter operation of the photodiodes PD of each pixels. In the solid-state image pickup device performing the global shutter operation, an element which simultaneously discharges the charges stored in the photodiodes PD of all the pixels during the charge storage period and stores the charges stored in the remaining charge storage period is necessary. In the embodiment, the capacitance element illustrated in <figref idref="DRAWINGS">FIGS. 5 and 8</figref> is configured as the element for charge storage. The capacitance element is connected between the photodiode PD and the floating diffusion portion FD to operate as a memory. Other configurations are the same as those of the solid-state image pickup device described above, and thus, the description thereof is omitted.

0102In the solid-state image pickup device according to the fifth embodiment, it is possible to enable a global shutter operation, and it is possible to improve the area efficiency of the photodiode PD. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

7. Sixth Embodiment

Example of Configuration of Solid-State Image Pickup Device

0103<figref idref="DRAWINGS">FIG. 10</figref> illustrates a solid-state image pickup device according to a sixth embodiment of the invention, that is, a back side illuminated type CMOS solid-state image pickup device. <figref idref="DRAWINGS">FIG. 10</figref> illustrates a schematic plan diagram, that is, a schematic plan layout of main components in an area corresponding to a unit pixel of an image pickup area where a plurality of the pixels are arrayed in a two-dimensional array shape.

0104The solid-state image pickup device <b>57</b> according to the sixth embodiment is configured by disposing an inductance element <b>58</b> and/or a resistance element <b>59</b> which become passive elements on the photodiode PD so as to be superimposed thereon. The inductance element <b>58</b> and the resistance element <b>59</b> are formed by the aforementioned wire line <b>37</b>, for example, the wire line <b>37</b> in the same layer. The inductance element <b>58</b> and the resistance element <b>59</b> may be used as a circuit which reads, for example, an output of the photodiode PD. The inductance element <b>58</b> and the resistance element <b>59</b> may be an inductance element or a resistance element in a peripheral circuit or a pixel. Since other configurations are the same as those described in the first embodiment, in <figref idref="DRAWINGS">FIG. 10</figref>, the components corresponding to <figref idref="DRAWINGS">FIG. 4</figref> are denoted by the same reference numerals, and the description thereof is omitted. In addition, in order to improve inductance characteristics, a laminated inductance element formed by surrounding a copper wire line with a magnetic material such as NiFe may be used as the aforementioned inductance element <b>58</b>. Since various elements which become passive elements are formed by the wire line <b>37</b>, a magnetic layer AFe_xO_y(A is Mn, Co, Ni, Cu, Zn, Ba, Sr, Pb, Y, or the like) which is not generally used in a semiconductor device may also be used for the inductance element <b>58</b>.

0105In the solid-state image pickup device <b>57</b> according to the sixth embodiment, since the inductance element <b>58</b> and/or the resistance element <b>59</b> which are used for a circuit of reading an output of the photodiode PD are disposed just above the photodiode PD, it is possible to improve the area efficiency of the photodiode PD, so that it is possible to improve sensitivity characteristics. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

8. Seventh Embodiment

Example of Configuration of Solid-State Image Pickup Device

0106<figref idref="DRAWINGS">FIG. 11</figref> illustrates a solid-state image pickup device, that is, a back side illuminated type CMOS solid-state image pickup device according to a seventh embodiment of the invention. <figref idref="DRAWINGS">FIG. 11</figref> illustrates a schematic cross sectional structure of main components in an area corresponding to a unit pixel in an image pickup area where a plurality of the pixels is arrayed in a two-dimensional array shape.

0107The solid-state image pickup device <b>61</b> according to the seventh embodiment is configured by disposing a transistor <b>62</b> which becomes an active element on the photodiode PD so as to be superimposed thereon. The transistor <b>62</b> may be formed as a thin film transistor which is formed by using a back-end process. The thin film transistor <b>62</b> includes a semiconductor thin film <b>63</b> of polycrystalline silicon, amorphous silicon, or the like, a gate insulating film (for example, a gate oxide film) <b>64</b>, and a gate electrode <b>65</b>, and the thin film transistor <b>62</b> is configured by forming a source region and a drain region in the semiconductor thin film <b>63</b>. The gate electrode <b>65</b> may be formed by a metal wire line or polysilicon. Besides the silicon, a compound semiconductor thin film of ZnO, or the like may be used as the semiconductor thin film <b>63</b>. The thin film transistor <b>62</b> may be a transistor which is used as a circuit of reading an output of the photodiode PD, that is, a pixel transistor. In the case where the thin film transistor <b>62</b> is a pixel transistor, a transistor selected from a portion or all of the transistors excluding the transfer transistor Tr<b>1</b>, for example, the reset transistor Tr<b>2</b>, the amplifying transistor, and the selecting transistor in the case of the four transistors may be used.

0108A wire line <b>37</b> having a plurality of layers is formed through an interlayer insulating film above the thin film transistor <b>62</b>. Since other configurations are the same as those described in the first embodiment, in <figref idref="DRAWINGS">FIG. 11</figref>, the components corresponding to <figref idref="DRAWINGS">FIG. 3</figref> are denoted by the same reference numerals, and the description thereof is omitted.

0109In the solid-state image pickup device <b>61</b> according to the seventh embodiment, since a portion or all of the pixel transistors formed by using the thin film transistor <b>62</b> is disposed just above the photodiode PD, it is possible to improve the area efficiency of the photodiode PD, so that it is possible to improve sensitivity characteristics. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

9. Eighth Embodiment

Example of Configuration of Solid-State Image Pickup Device

0110<figref idref="DRAWINGS">FIG. 12</figref> illustrates a solid-state image pickup device according to an eighth embodiment of the invention, that is, a back side illuminated type CMOS solid-state image pickup device. <figref idref="DRAWINGS">FIG. 12</figref> is a schematic configuration diagram diagrammatically illustrating the solid-state image pickup device according to the embodiment.

0111The solid-state image pickup device <b>67</b> according to the eighth embodiment is implemented by three-dimensionally laminating and assembling a first semiconductor chip <b>68</b> including an image pickup area where a plurality of pixels is arrayed in a two-dimensional array shape and a second semiconductor chip <b>69</b> including at least a logic circuit through connection using solder bumps or the like. The first semiconductor chip <b>68</b> is a so-called sensor chip including a back side illuminated type CMOS solid-state image pickup device. The second semiconductor chip <b>69</b> is a so-called logic chip including a memory LSI, a logic LSI, an A/D converter, and the like constituting a peripheral circuit.

0112The first semiconductor chip <b>68</b> is formed by arraying a plurality of pixels including the photodiode PD and a plurality of the pixel transistors in the image pickup area in a two-dimensional array shape. The wire lines <b>37</b> of a plurality of layers are formed through the interlayer insulating films <b>36</b> in the front surface side of the substrate. A color filter <b>71</b> and an on-chip lens <b>72</b> are formed on the rear surface side of the substrate, which becomes the light receiving plane <b>35</b>. The second semiconductor chip <b>69</b> is configured by forming a memory LSI <b>74</b>, an A/D converter <b>75</b>, a logic LSI, and the like on the semiconductor substrate <b>72</b>. The second semiconductor chip <b>69</b> has a function as a support substrate for the thinned first semiconductor chip <b>68</b>.

0113In the embodiment, a circuit element <b>76</b> which becomes the aforementioned active element or passive element is formed in the front surface of the substrate opposite to the light receiving plane <b>35</b> so as to be superimposed on the photodiode PD by using a wire line of a back-end process. Similarly to the aforementioned embodiment, as the active element, a transistor, for example, a pixel transistor may be used. Similarly to the aforementioned embodiment, as the passive element, a capacitance element, for example, a capacitance element for charge storage, or a capacitance element included in an A/D converter, a correlated double sampling circuit, or the like may be used. In addition, similarly to the aforementioned embodiment, as the passive element, an inductance element and/or a resistance element may be used.

0114In the laminated configuration of the sensor chip and the logic chip, the light generated by the so-called cross talk where noise generated from the logic LSI influences a solid-state image pickup device or by hot carriers in transistors included in the logic LSI or the like is incident to the solid-state image pickup device to become noise.

0115However, in the solid-state image pickup device <b>67</b> according to the eighth embodiment, the element <b>76</b> which becomes an active element or a passive element is formed in the front surface side of the substrate opposite to the light receiving plane <b>35</b> so as to be superimposed on the photodiode PD. Disturbance noise such as an electrical noise and optical noise, which is generated by the second semiconductor chip <b>69</b> to the photodiode PD, may be shielded by the element <b>76</b>. At this time, a metal used for the active element or the passive element is configured as a metal having a high light reflectance so as to more securely perform the shielding. Table 1 lists the reflectance of metals with respect to light having various wavelengths.

0000<tables id="TABLE-US-00001" num="00001"><table frame="none" colsep="0" rowsep="0" pgwide="1"><tgroup align="left" colsep="0" rowsep="0" cols="1"><colspec colname="1" colwidth="266pt" align="center" /><thead><row><entry namest="1" nameend="1" rowsep="1">TABLE 1</entry></row></thead><tbody valign="top"><row><entry namest="1" nameend="1" align="center" rowsep="1" /></row><row><entry>Reflectance (%) of Metal</entry></row></tbody></tgroup><tgroup align="left" colsep="0" rowsep="0" cols="9"><colspec colname="1" colwidth="56pt" align="left" /><colspec colname="2" colwidth="21pt" align="center" /><colspec colname="3" colwidth="21pt" align="center" /><colspec colname="4" colwidth="21pt" align="center" /><colspec colname="5" colwidth="21pt" align="center" /><colspec colname="6" colwidth="35pt" align="center" /><colspec colname="7" colwidth="35pt" align="center" /><colspec colname="8" colwidth="21pt" align="center" /><colspec colname="9" colwidth="35pt" align="center" /><tbody valign="top"><row><entry>Wavelength (nm)</entry><entry>Ag</entry><entry>Al</entry><entry>Au</entry><entry>Cu</entry><entry>Ni</entry><entry>Pt</entry><entry>Rh</entry><entry>Sn</entry></row><row><entry namest="1" nameend="9" align="center" rowsep="1" /></row><row><entry>UV (280)</entry><entry>25.2</entry><entry>92.3</entry><entry>37.8</entry><entry>33.0</entry><entry>37.6</entry><entry>43.1</entry><entry>68.5</entry><entry>17</entry></row><row><entry /><entry /><entry /><entry /><entry /><entry /><entry /><entry /><entry>(251 nm)</entry></row><row><entry>violet (400)</entry><entry>94.8</entry><entry>92.4</entry><entry>38.7</entry><entry>47.5</entry><entry>41.2</entry><entry>52.4</entry><entry>77.6</entry><entry>  27.0</entry></row><row><entry /><entry /><entry /><entry /><entry /><entry>(361 nm)</entry><entry>(361 nm)</entry><entry /><entry>(357 nm)</entry></row><row><entry>red (700)</entry><entry>98.5</entry><entry>89.9</entry><entry>97.0</entry><entry>97.5</entry><entry>68.8</entry><entry>69.0</entry><entry>80.4</entry></row><row><entry>IR (1000)</entry><entry>98.9</entry><entry>83.9</entry><entry>98.2</entry><entry>98.5</entry><entry>72.0</entry><entry>77.0</entry><entry>85.0</entry></row><row><entry namest="1" nameend="9" align="center" rowsep="1" /></row></tbody></tgroup></table></tables>

0116As listed in Table 1, Ag, Al, Rh, or the like of which the reflectance is high over the light in all wavelength ranges may be very suitably used as a material of an active element or a passive element.

0117In the solid-state image pickup device <b>67</b> according to the eighth embodiment, particularly, when the passive element is formed by using a metal wire line and disposed so as to be superimposed on the photodiode PD, it is possible to more securely shield disturbance noise without increasing the number of manufacturing processes. In addition, it is possible to improve the area efficiency of the photodiode PD, so that it is possible to improve sensitivity characteristics. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

10. Ninth Embodiment

Example of Method of Manufacturing Solid-State Image Pickup Device

0118<figref idref="DRAWINGS">FIGS. 13A to 13D</figref> illustrate a method of manufacturing a solid-state image pickup device according to a ninth embodiment of the invention. First, as illustrated in <figref idref="DRAWINGS">FIG. 13A</figref>, by an impurity ion injection method and a thermal diffusion method, a second conductivity type, for example, a p-type semiconductor well area <b>23</b> is formed in a first conductivity type, an n-type silicon semiconductor substrate <b>22</b>, and an element isolation region <b>40</b> is formed. The semiconductor substrate <b>22</b> may include an epitaxial growing layer.

0119In addition, the semiconductor well area <b>23</b> of the different conductivity type may be formed in the same substrate. In other words, the p-type semiconductor well area may be formed in the n-type semiconductor substrate, and the n-type semiconductor well area may be formed in the p-type semiconductor well area. Otherwise, the opposite n-type semiconductor well area may be formed in the p-type semiconductor substrate, and the p-type semiconductor well area may be formed in the n-type semiconductor well area. The element isolation region <b>40</b> may include a silicon thermal oxide film or a deposited silicon oxide film, or the element isolation region <b>40</b> may be formed by using an impurity diffusion film.

0120Next, as illustrated in <figref idref="DRAWINGS">FIG. 13B</figref>, the photodiode PD is formed by forming an n-type semiconductor area <b>24</b> in the semiconductor well area <b>23</b> and a p-type semiconductor area <b>20</b> on the surface thereof. In addition, another n-type source/drain region constituting the pixel transistor including an n-type semiconductor area <b>25</b>, which becomes a floating diffusion portion FD, is formed in the semiconductor well area <b>23</b> so as to be adjacent to the photodiode PD. The semiconductor areas <b>23</b>, <b>24</b>, and <b>25</b> or the like are formed by using an ion injection method, a thermal diffusion method, or the like. In addition, the gate insulating film <b>30</b> and the gate electrode <b>31</b> of the pixel transistor are formed. The gate insulating film <b>30</b> and the gate electrode <b>31</b> are formed by using a chemical thin film deposition method and a lithography technology, a dry etching technology, or the like. The gate insulating film <b>30</b> may be formed by using a silicon oxide film and a silicon nitride film containing nitrogen, or a material including hafnium, tantalum, or the like. In addition, the gate electrode <b>31</b> may be formed by using polysilicon, silicide, or a metal. The n-type source/drain region, the p-type source/drain region, the gate insulating film, and the gate electrode constituting the CMOS transistor are formed in the peripheral circuit formation area. The source/drain region of the MOS transistor including the pixel transistor may be formed after the gate electrode is formed.

0121After the so-called front-end process is finished as above, the so-called back-end process proceeds. In other words, as illustrated in <figref idref="DRAWINGS">FIG. 13C</figref>, the interlayer insulating film <b>36</b> is formed by a chemical vapor deposition method, and a contact hole <b>81</b> for contacting with, for example, the n-type semiconductor area <b>25</b> is formed in the interlayer insulating film <b>36</b> by dry etching. A connection conductor <b>50</b> made of a metal, for example, tungsten is buried in the contact hole <b>81</b>. At this time, by performing a metal thin film deposition according to a sputter method and, after that, performing patterning according to a chemical mechanical polishing method, a metal thin film is remained in only the contact hole <b>81</b> formed in the interlayer insulating film <b>36</b>, so that a connection conductor <b>50</b> is formed.

0122Next, the multi-layered wire line layer in which wire lines of a plurality of layer are formed through the interlayer insulating films is formed, and at this time, the element which becomes the passive element or the active element as described above is formed so as to be superimposed on the photodiode PD by using the wire line. The passive element is the aforementioned capacitance element, inductance element, resistance element, or the like. The active element is the aforementioned pixel transistor.

0123In this embodiment, as illustrated in <figref idref="DRAWINGS">FIG. 13D</figref>, a metal layer constructed with a first barrier metal <b>37</b>B<b>1</b>, a wire line <b>37</b>A, and a second barrier metal <b>137</b>B<b>2</b> is formed by a sputter method or the like, and patterning is performed by a lithography method and a dry etching method. By the patterning, the wire line <b>371</b> of the first layer including the one electrode <b>83</b> which becomes the capacitance element is formed.

0124Next, as illustrated in <figref idref="DRAWINGS">FIG. 13E</figref>, the interlayer insulating film <b>36</b> and the wire line <b>372</b> of the second layer including the other electrode <b>84</b> which becomes the capacitance element on the interlayer insulating film <b>36</b> is formed by the same process. The capacitance element <b>88</b> which is a passive element is formed by the electrode <b>83</b> of the wire line of the first layer, the electrode <b>84</b> of the wire line of the second layer, and the interlayer insulating film <b>36</b> therebetween. The capacitance element <b>88</b> is formed on the photodiode PD. In this embodiment, although the multi-layered wire line layer <b>86</b> is configured by disposing the wire lines <b>371</b> and <b>372</b> of the two layers, the multi-layered wire line layer <b>86</b> may be configured with a structure where the wire lines of three or more layers are disposed. As the capacitance element <b>88</b>, a capacitance element for charge storage in a pixel, a capacitance element of an A/D converter, a capacitance element of a correlated double sampling circuit, or the like may be used.

0125Next, similarly as illustrated in <figref idref="DRAWINGS">FIG. 14</figref>, a support substrate <b>90</b>, for example, a silicon substrate is adhered on the multi-layered wire line layer <b>86</b>, and the semiconductor substrate <b>22</b> is thinned by polishing the rear surface side by a chemical mechanical polishing method or the like. A p-type semiconductor area <b>89</b> for suppressing dark currents, a color filter <b>91</b>, an on-chip lens <b>92</b>, and the like are formed through the insulating films <b>93</b> in the rear surface of the thinned substrate, so that a desired back side illuminated type solid-state image pickup device is obtained.

0126In addition, in the embodiment, although the capacitance element <b>88</b> is formed by using the wire line <b>371</b> of the first layer and the wire line <b>372</b> of the second layer, the capacitance element <b>88</b> may be formed by using the wire lines of other layers.

0127In the method of manufacturing a solid-state image pickup device according to the ninth embodiment, since the capacitance element <b>88</b> is formed in the front surface side of the substrate so as to be superimposed on the photodiode PD, it is possible to improve the area efficiency of the photodiode PD, so that it is possible to manufacture a back side illuminated type solid-state image pickup device with a high sensitivity. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to provide a high quality solid-state image pickup device.

11. Tenth Embodiment

Example of Method of Manufacturing Solid-State Image Pickup Device

0128In a method of manufacturing a solid-state image pickup device according to a tenth embodiment of the invention, although not shown, an inductance element and/or a resistance element which are passive elements are formed by using, for example, the wire line <b>371</b> of the first layer in the ninth embodiment. The other processes are the same as those of the ninth embodiment, and thus, the description thereof is omitted. Accordingly, a desired back side illuminated type solid-state image pickup device where an inductance element and/or a resistance element are disposed on the photodiode PD is obtained. In addition, the inductance element and/or the resistance element may be formed by using the wire lines of the second layer or later.

0129In the method of manufacturing a solid-state image pickup device according to the tenth embodiment, since the inductance element and/or the resistance element which become passive elements are formed on the photodiode PD, it is possible to improve the area efficiency of the photodiode PD, so that it is possible to manufacture a back side illuminated type solid-state image pickup device with a high sensitivity. Accordingly, it is possible to miniaturize and highly integrate the pixels, so that it is possible to manufacture a high quality solid-state image pickup device.

12. Eleventh Embodiment

Example of Method of Manufacturing Solid-State Image Pickup Device

0130<figref idref="DRAWINGS">FIGS. 15A to 15C</figref> illustrate a method of manufacturing a solid-state image pickup device according to an eleventh embodiment of the invention. The embodiment is an example of a method of manufacturing a solid-state image pickup device where an active element, which is a thin film transistor in this example, is disposed on a photodiode PD. Similarly to the aforementioned ninth embodiment, in the embodiment, the processes of <figref idref="DRAWINGS">FIGS. 13A to 13C</figref> are performed until the interlayer insulating film <b>36</b> is formed. The processes up to this point are the same, and thus, the description thereof is omitted.

0131Next, as illustrated in <figref idref="DRAWINGS">FIG. 15A</figref>, after a polycrystalline silicon film, an amorphous silicon film, or the like is deposited by a chemical vapor deposition method or a sputtering method, a semiconductor thin film <b>63</b> which is an active layer of a thin film transistor is formed by a lithography method or a dry etching method. The semiconductor thin film <b>63</b> is formed on the photodiode PD.

0132Next, as illustrated in <figref idref="DRAWINGS">FIG. 15B</figref>, a gate electrode <b>65</b> is formed through a gate insulating film <b>64</b> on the semiconductor thin film. At this time, the semiconductor thin film <b>63</b> of polysilicon or amorphous silicon is added with necessary impurities by an ion injection method, a thermal diffusion method, or the like so as to be able to perform transistor operations. In this manner, the thin film transistor <b>62</b> which becomes the pixel transistor is formed.

0133Next, as illustrated in <figref idref="DRAWINGS">FIG. 15C</figref>, a multi-layered wire line layer <b>86</b>, in which wire lines <b>37</b> of a plurality of layers are formed through the interlayer insulating films <b>36</b>, is formed. The wire line <b>37</b> may be formed in a configuration having a bimetal as described with reference to <figref idref="DRAWINGS">FIGS. 13A to 13E</figref>.

0134Next, similarly as illustrated in <figref idref="DRAWINGS">FIG. 14</figref>, a support substrate <b>90</b>, for example, a silicon substrate is adhered on the multi-layered wire line layer <b>86</b>, and the semiconductor substrate <b>22</b> is thinned by polishing the rear surface side by a chemical mechanical polishing method or the like. A p-type semiconductor area <b>89</b> for suppressing dark currents, a color filter <b>91</b>, an on-chip lens <b>92</b>, and the like are formed through insulating films in the rear surface of the thinned substrate, so that a desired back side illuminated type solid-state image pickup device illustrated in <figref idref="DRAWINGS">FIG. 16</figref> is obtained.

0135In the method of manufacturing a solid-state image pickup device according to the eleventh embodiment, since the pixel transistor <b>62</b> is formed in the front surface side of the substrate so as to be superimposed on the photodiode PD, it is possible to improve the area efficiency of the photodiode PD, so that it is possible to manufacture a back side illuminated type solid-state image pickup device with a high sensitivity. Therefore, it is possible to miniaturize and highly integrate the pixels, so that it is possible to manufacture a high quality solid-state image pickup device.

0136The aforementioned method of manufacturing a solid-state image pickup device may be used to manufacture the solid-state image pickup devices according to the first to eighth embodiments.

0137A unit pixel (non-shared type) constructed with one photodiode and a plurality of pixel transistors, for example, four transistors or three transistors may be used as the pixel in the CMOS solid-state image pickup devices according to the aforementioned embodiments. Alternatively, a shared pixel (shared type) where one pixel transistor portion is shared by a plurality of photodiodes may be used.

0138In addition, in the solid-state image pickup devices according to the aforementioned embodiments, signal charges are electrons, and the first and second conductivity types are configured as the n type and the p type. However, the invention may be adapted to a solid-state image pickup device where the signal charges are holes. In this case, the conductivity types of the semiconductor substrate, the semiconductor well area, or the semiconductor area are reversed, so that the p type becomes the first conductivity type, and the n type becomes the second conductivity type.

13. Twelfth Embodiment

Example of Configuration of Electronic Apparatus

0139The aforementioned solid-state image pickup device according to the invention may be adapted to an electronic apparatus, for example, a camera system such as a digital camera or a video camera, a mobile phone having a photographing function, or other apparatuses having a photographing function.

0140<figref idref="DRAWINGS">FIG. 17</figref> illustrates a camera as an example of the electronic apparatus according to a twelfth embodiment of the invention. The camera according to the embodiment is an example of a video camera capable of photographing a still image or a moving picture. The camera <b>101</b> according to the embodiment includes a solid-state image pickup device <b>102</b>, an optical system <b>103</b> which guides incident light to a light receiving sensor portion of the solid-state image pickup device <b>102</b>, and a shutter unit <b>104</b>. In addition, the camera <b>101</b> includes a driving circuit <b>105</b> which drives the solid-state image pickup device <b>102</b> and a signal processing circuit <b>106</b> which processes an output signal of the solid-state image pickup device <b>102</b>.

0141One of the solid-state image pickup devices of the aforementioned embodiments is used as the solid-state image pickup device <b>102</b>. The optical system (optical lens) <b>103</b> focuses image light (incident light) from a subject on an imaging plane of the solid-state image pickup device <b>102</b>. Accordingly, signal charges are accumulated in the solid-state image pickup device <b>102</b> for a predetermined time period. The optical system <b>103</b> may be an optical lens system constructed with a plurality of optical lenses. The shutter unit <b>104</b> controls a light illuminating time period and a light shielding time period for the solid-state image pickup device <b>132</b>. The driving circuit <b>105</b> supplies driving signals for controlling the transfer operation of the solid-state image pickup device <b>132</b> and the shutter operation of the shutter unit <b>104</b>. By the driving signals (timing signals) supplied from the driving circuit <b>105</b>, the signal transfer of the solid-state image pickup device <b>102</b> is performed. The signal processing circuit <b>106</b> performs various signal processes. A video signal which is subject to the signal processes is stored in a storage medium such as a memory or output to a monitor.

0142In the electronic apparatus such as a camera according to the twelfth embodiment, as described above, it is possible to improve the area efficiency of the photodiode PD in the solid-state image pickup device <b>102</b>, so that it is possible to reduce disturbance noise. Accordingly, it is possible to provide an apparatus such as a camera with a high quality.

0143The present application contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2010-068879 filed in the Japan Patent Office on Mar. 24, 2010, the entire contents of which are hereby incorporated by reference.

0144It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.