Encapsulant interposer system with integrated passive devices and manufacturing method therefor
Claim Score by NHIP
Abstract
A method of manufacturing a semiconductor package system including: forming a leadframe having a passive device; encapsulating the passive device to form an encapsulant interposer; attaching a first die to the encapsulant interposer; forming a substrate interposer having a second die; and stacking the encapsulant interposer over the substrate interposer.

Term
2.2 yearsto projected expiry
Projected expiry 21 November 2028, counted from filing; an application has no term until it is granted.
- Priority and filed
- Published
- Today
- Projected expiry
20 claims: 3 independent, 17 dependent
- 1A method of manufacturing for a semiconductor package system comprising:forming a leadframe having a passive device;encapsulating the passive device to form an encapsulant interposer;attaching a first die to the encapsulant interposer;forming a substrate interposer having a second die;and stacking the encapsulant interposer over the substrate interposer.
- 6A method of manufacture for a semiconductor package system comprising:forming a leadframe having a passive device;encapsulating the passive device to form an encapsulant interposer, attaching a first die to the encapsulant interposer;forming a substrate interposer having a second die;stacking the encapsulant interposer over the substrate interposer;and encapsulating the encapsulant interposer, the first die, and the second die in a package mold compound.
- 11Broadest claimClaim Score 89, very broad(NHIP)A semiconductor package system comprising:an encapsulant interposer having a passive device encapsulated;a first die connected to the encapsulant interposer;and a substrate interposer having a second die, the encapsulant interposer being stacked over the substrate interposer.
Independent claims3
153 paragraphs in 5 sections, as filed
TECHNICAL FIELD
0001The present invention relates generally to semiconductor packages, and more particularly to a system for a semiconductor package having an encapsulant interposer with integrated passive devices.
BACKGROUND ART
0002In the electronics industry, the tendency has been to reduce the size of electronic devices such as camcorders and portable telephones while increasing performance and speed. Integrated circuit packages for complex systems typically are comprised of multiple interconnected integrated circuit chips. The integrated circuit chips usually are made from a semiconductor material such as silicon or gallium arsenide. The integrated circuit chips may be mounted in packages that are then mounted on printed wiring boards.
0003Typically, the packages on which these integrated semiconductor chips are mounted include a substrate or other chip-mounting device. One example of such a substrate is a leadframe. Leadframes typically include an area on which an integrated circuit chip is mounted and multiple power, ground, and/or signal leads to which power, ground, and/or signal sites of the integrated semiconductor chip are electronically attached. Semiconductor integrated chips may be attached to the leadframe using adhesive or any other techniques for attaching such chips to a leadframe which are commonly known to those skilled in the art. The power, ground and/or signal sites on the chip may then be electrically connected to individual leads of the leadframe through techniques such as wire bonding.
0004An interposer is an electrical interface routing between one socket or connection to another. It is an intermediate layer often used for interconnection routing or as a ground/power plane. When multiple chips are mounted within the same semiconductor package, routing problems may arise due to the different routing design of each individual chip. To solve this problem, an interposer is often used. Sometimes the terms ‘substrate’ and ‘interposer’ are used to refer to the same thing.
0005Leadframes have been used extensively in the integrated circuit packaging industry mainly because of their low manufacturing cost and high reliability. Leadframe packages remain a cost-effective solution for packaging integrated circuits and in recent years certain variations of leadframes such as leadless packages also emerge as improvements.
0006Conventional leadframes include a die pad, surrounded by a number of leads. An integrated circuit chip is attached to the die pad using a conductive adhesive such as silver epoxy. The conductive adhesive is cured after die attach. After the die is attached to the die pad, a wire-bonding process is typically used to make electrical interconnections between the integrated circuit and the leads of the leadframe. After wire bonding, the leadframe with the integrated circuit attached is encapsulated using a mold compound.
0007Such enclosures may include encapsulant in a plastic or a multi-part housing made of plastic, ceramic, or metal. The enclosure protects the leadframe and the attached chip from physical, electrical, and/or chemical damage. Finally, post mold curing and singulation steps are conducted to complete the packaging process.
0008The leadframe and attached chip(s) may then be mounted on, for example, a circuit board, or card along with other leadframes or devices. The circuit board or card may then be incorporated into a wide variety of devices such as computers, automobiles, and appliances, among others.
0009A problem with the conventional leadframes is that the die pad and the leads of the leadframe occupy space of the semiconductor package that is not occupied by the attached semiconductor chip, resulting in reduced chip packaging density. As integrated circuits have become smaller with increased performance requirements, enhancing packaging density becomes more and more important.
0010Another problem with the conventional leadframes is that it does not include many desirable passive devices, such as inductors, capacitors, and resisters, for a semiconductor package. The modern trend of integrated circuits has been that more and more functionalities, including passive device functionalities, are integrated into one single package.
0011Thus, a need still remains for increasing the packaging density of the leadframe design and adding passive devices to the leadframes. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures, adds an even greater urgency to the critical necessity for finding answers to these problems.
0012Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.
DISCLOSURE OF THE INVENTION
0013The present invention provides a method of manufacturing a semiconductor package system including: forming a leadframe having a passive device; encapsulating the passive device to form an encapsulant interposer, attaching a first die to the encapsulant interposer; forming a substrate interposer having a second die; and stacking the encapsulant interposer over the substrate interposer.
0014The present invention provides a semiconductor package system including: an encapsulant interposer having a passive device encapsulated; a first die connected to the encapsulant interposer; and a substrate interposer having a second die, the encapsulant interposer being stacked over the substrate interposer.
0015Certain embodiments of the invention have other aspects in addition to or in place of those mentioned above. The aspects will become apparent to those skilled in the art from a reading of the following detailed description when taken with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
0016<figref idref="DRAWINGS">FIG. 1</figref> is a top view of an encapsulant interposer of a first embodiment of the present invention after a stage of singulation.
0017<figref idref="DRAWINGS">FIG. 2</figref> is a cross-sectional view of the encapsulant interposer of the first embodiment of the present invention along line <b>2</b>-<b>2</b> of <figref idref="DRAWINGS">FIG. 1</figref>.
0018<figref idref="DRAWINGS">FIG. 3</figref> is a top view of a leadframe of the first embodiment of the present invention after a first intermediate stage of the process.
0019<figref idref="DRAWINGS">FIG. 4</figref> is a top view of an unfinished encapsulant interposer of the first embodiment of the present invention after a second intermediate stage of the process.
0020<figref idref="DRAWINGS">FIG. 5</figref> is a top view of an unfinished encapsulant interposer of the first embodiment of the present invention after a third intermediate stage of the process.
0021<figref idref="DRAWINGS">FIG. 6</figref> is a cross-sectional view of a semiconductor package of a second embodiment of the present invention after a stage of singulation.
0022<figref idref="DRAWINGS">FIG. 7</figref> is a top view of an encapsulant interposer of a third embodiment of the present invention after a stage of singulation.
0023<figref idref="DRAWINGS">FIG. 8</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer of the third embodiment of the present invention along line <b>8</b>-<b>8</b> of <figref idref="DRAWINGS">FIG. 7</figref>.
0024<figref idref="DRAWINGS">FIG. 9</figref> is a top view of an encapsulant interposer of a fourth embodiment of the present invention after a stage of singulation.
0025<figref idref="DRAWINGS">FIG. 10</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer of the fourth embodiment of the present invention along line <b>10</b>-<b>10</b> of <figref idref="DRAWINGS">FIG. 9</figref>.
0026<figref idref="DRAWINGS">FIG. 11</figref> is a top view of an encapsulant interposer of a fifth embodiment of the present invention after a stage of singulation.
0027<figref idref="DRAWINGS">FIG. 12</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer of the fifth embodiment of the present invention along line <b>12</b>-<b>12</b> of <figref idref="DRAWINGS">FIG. 1</figref>.
0028<figref idref="DRAWINGS">FIG. 13</figref> is a top view of an encapsulant interposer of a sixth embodiment of the present invention after a stage of singulation.
0029<figref idref="DRAWINGS">FIG. 14</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer of the sixth embodiment of the present invention along line <b>14</b>-<b>14</b> of <figref idref="DRAWINGS">FIG. 13</figref>.
0030<figref idref="DRAWINGS">FIG. 15</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package of a seventh embodiment of the present invention after a stage of singulation.
0031<figref idref="DRAWINGS">FIG. 16</figref> is a top view of an encapsulant interposer of an eighth embodiment of the present invention after a stage of singulation.
0032<figref idref="DRAWINGS">FIG. 17</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer of the eighth embodiment of the present invention along line <b>17</b>-<b>17</b> of <figref idref="DRAWINGS">FIG. 16</figref>.
0033<figref idref="DRAWINGS">FIG. 18</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package of a ninth embodiment of the present invention after a stage of singulation.
0034<figref idref="DRAWINGS">FIG. 19</figref> is a top view of an unfinished encapsulant interposer of a tenth embodiment of the present invention after an intermediate stage of the process.
0035<figref idref="DRAWINGS">FIG. 20</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the unfinished encapsulant interposer of the tenth embodiment of the present invention along line <b>20</b>-<b>20</b> of <figref idref="DRAWINGS">FIG. 19</figref> after a stage of singulation.
0036<figref idref="DRAWINGS">FIG. 21</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package of an eleventh embodiment of the present invention after a stage of singulation.
0037<figref idref="DRAWINGS">FIG. 22</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package of a twelfth embodiment of the present invention after a stage of singulation.
0038<figref idref="DRAWINGS">FIG. 23</figref> is a top view of an encapsulant interposer of a thirteenth embodiment of the present invention after a stage of singulation.
0039<figref idref="DRAWINGS">FIG. 24</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer of the thirteenth embodiment of the present invention along line <b>24</b>-<b>24</b> of <figref idref="DRAWINGS">FIG. 23</figref>.
0040<figref idref="DRAWINGS">FIG. 25</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package of a fourteenth embodiment of the present invention after a stage of singulation.
0041<figref idref="DRAWINGS">FIG. 26</figref> is a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package of a fifteenth embodiment of the present invention after a stage of singulation.
0042<figref idref="DRAWINGS">FIG. 27</figref> is a flow chart disclosing a method of manufacturing of a semiconductor package system in a further embodiment of the present invention.
BEST MODE FOR CARRYING OUT THE INVENTION
0043The following embodiments are described in sufficient detail to enable those skilled in the art to make and use the invention. It is to be understood that other embodiments would be evident based on the present disclosure, and that system, process, or mechanical changes may be made without departing from the scope of the present invention.
0044In the following description, numerous specific details are given to provide a thorough understanding of the invention. However, it will be apparent that the invention may be practiced without these specific details. Likewise, the drawings showing embodiments of the system are semi-diagrammatic and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown exaggerated in the drawings. Also, where multiple embodiments are disclosed and described having some features in common, for clarity and ease of illustration, description, and comprehension thereof, similar and like features one to another will ordinarily be described with like reference numerals.
0045For expository purposes, the term “horizontal” as used herein is defined as a plane parallel to the plane or surface of the leadframe, regardless of its orientation. The term “vertical” refers to a direction perpendicular to the horizontal as just defined. Terms, such as “above”, “below”, “bottom”, “top”, “side” (as in “sidewall”), “higher”, “lower”, “upper”, “over”, and “under”, are defined with respect to the horizontal plane. The term “on” means that there is direct contact among elements.
0046The term “coplanar” is defined as being in the same plane or flat. With regard to an unfinished leadframe the term means that the unfinished leadframe is in one plane and flat as contrasted with having different heights.
0047Referring now to <figref idref="DRAWINGS">FIG. 1</figref>, therein is shown a top view of an encapsulant interposer <b>100</b> of a first embodiment of the present invention after a stage of singulation.
0048An encapsulant interposer <b>100</b> is shown. The encapsulant interposer <b>100</b> has a contact pad <b>102</b>, a first inductor <b>104</b>, a second inductor <b>106</b>, and an external contact terminal <b>108</b>. The contact pad <b>102</b> is connected to the external contact terminal <b>108</b>. The first inductor <b>104</b> and the second inductor <b>106</b> are also connected to the external contact terminal <b>108</b>.
0049The contact pad <b>102</b>, the first inductor <b>104</b>, and the second inductor <b>106</b> are encapsulated in a mold compound <b>110</b>.
0050In the current embodiment of the present invention, the first inductor <b>104</b> and the second inductor <b>106</b>, both of which are passive devices, are included in the encapsulant interposer <b>100</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0051Referring now to <figref idref="DRAWINGS">FIG. 2</figref>, therein is shown a cross-sectional view of the encapsulant interposer <b>100</b> of the first embodiment of the present invention along line <b>2</b>-<b>2</b> of <figref idref="DRAWINGS">FIG. 1</figref>.
0052The external contact terminal <b>108</b> is not coplanar with the contact pad <b>102</b>. The external contact terminal <b>108</b> bends downward and is not horizontal. A standoff height <b>202</b> is created between one end of the external contact terminal <b>108</b> and the contact pad <b>102</b> in the vertical direction.
0053The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, and the devices that would be put upon the encapsulant interposer later on. In the current embodiment of the present invention, both the top and the bottom surfaces of the first inductor <b>104</b> and the second inductor <b>106</b> are exposed.
0054Referring now to <figref idref="DRAWINGS">FIG. 3</figref>, therein is shown a top view of a leadframe <b>300</b> of the first embodiment of the present invention after a first intermediate stage of the process.
0055The leadframe <b>300</b> is shown. The leadframe <b>300</b> has the contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, the external contact terminal <b>108</b>, a first dam bar <b>302</b>, and a second dam bar <b>304</b>.
0056The contact pad <b>102</b> is connected to the external contact terminal <b>108</b> and to the second dam bar <b>304</b>. The first inductor <b>104</b> and the second inductor <b>106</b> are also connected to the external contact terminal <b>108</b> and to the second dam bar <b>304</b>. The external contact terminal <b>108</b> is connected to the first dam bar <b>302</b> at one end and to the second dam bar <b>304</b> at the other end.
0057The leadframe <b>300</b> could be pre-plated with one or more metal layers such as Ni, Au, Pt, etc.
0058Referring now to <figref idref="DRAWINGS">FIG. 4</figref>, therein is shown a top view of an unfinished encapsulant interposer <b>400</b> of the first embodiment of the present invention after a second intermediate stage of the process.
0059The contact pad <b>102</b>, the first inductor <b>104</b>, and the second inductor <b>106</b> are encapsulated in the mold compound <b>110</b>.
0060Referring now to <figref idref="DRAWINGS">FIG. 5</figref>, therein is shown a top view of an unfinished encapsulant interposer <b>500</b> of the first embodiment of the present invention after a third intermediate stage of the process.
0061The first dam bar <b>302</b> and the second dam bar <b>304</b> in <figref idref="DRAWINGS">FIG. 4</figref> are removed by a process of singulation.
0062The external contact terminal <b>108</b> is then trimmed and formed to a predetermined shape. The encapsulant interposer <b>100</b> is thus formed. Although the external contact terminal <b>108</b> is shown to bend downward in <figref idref="DRAWINGS">FIG. 2</figref>, it should be understood that one or more of them can be bent to any shape to facilitate further interconnection.
0063Referring now to <figref idref="DRAWINGS">FIG. 6</figref>, therein is shown a cross-sectional view of a semiconductor package <b>600</b> of a second embodiment of the present invention after a stage of singulation.
0064The semiconductor package <b>600</b> has a first die <b>602</b> and a second die <b>604</b>. The semiconductor package <b>600</b> also has the encapsulant interposer <b>100</b> embedded. The first die <b>602</b> is attached to the encapsulant interposer <b>100</b> through a die paste <b>606</b>. The second die <b>604</b> is underneath the encapsulant interposer <b>100</b> and is attached to a substrate interposer <b>608</b>. The encapsulant interposer <b>100</b>, the first die <b>602</b>, the second die <b>604</b>, and the die paste <b>606</b> are encapsulated in a package mold compound <b>610</b>.
0065In the current embodiment of the present invention, the encapsulant interposer <b>100</b> is used as an internal stacking module of the semiconductor package <b>600</b>. It has been discovered that such a configuration reduces the thickness of the semiconductor package <b>600</b>, resulting in thinner profile of such packages.
0066Referring now to <figref idref="DRAWINGS">FIG. 7</figref>, therein is shown a top view of an encapsulant interposer <b>700</b> of a third embodiment of the present invention after a stage of singulation.
0067An encapsulant interposer <b>700</b> is shown. The encapsulant interposer <b>700</b> has the contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, a third inductor <b>702</b>, and the external contact terminal <b>108</b>. The contact pad <b>102</b> is connected to the external contact terminal <b>108</b>. The first inductor <b>104</b>, the second inductor <b>106</b>, and the third inductor <b>702</b> are also connected to the external contact terminal <b>108</b>.
0068The contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, and the third inductor <b>702</b> are encapsulated in the mold compound <b>110</b>.
0069Compared to the encapsulant interposer <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref>, where the encapsulant interposer <b>100</b> has two rows of the contact pad <b>102</b>, the current embodiment of the present invention has one row of the contact pad <b>102</b>. The encapsulant interposer could have more than two rows of the contact pad <b>102</b>.
0070In the current embodiment of the present invention, the first inductor <b>104</b>, the second inductor <b>106</b>, and the third inductor <b>702</b>, all of which are passive devices, are included in the encapsulant interposer <b>700</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0071Referring now to <figref idref="DRAWINGS">FIG. 8</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer <b>700</b> of the third embodiment of the present invention along line <b>8</b>-<b>8</b> of <figref idref="DRAWINGS">FIG. 7</figref>.
0072The external contact terminal <b>108</b> is not coplanar with the contact pad <b>102</b>. The external contact terminal <b>108</b> bends downward and is not horizontal. The standoff height <b>202</b> is created between one end of the external contact terminal <b>108</b> and the contact pad <b>102</b> in the vertical direction.
0073The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, the third inductor <b>702</b>, and the devices that would be put upon the encapsulant interposer later on.
0074Referring now to <figref idref="DRAWINGS">FIG. 9</figref>, therein is shown a top view of an encapsulant interposer <b>900</b> of a fourth embodiment of the present invention after a stage of singulation.
0075An encapsulant interposer <b>900</b> is shown. The encapsulant interposer <b>900</b> has the contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, the third inductor <b>702</b>, and the external contact terminal <b>108</b>. The contact pad <b>102</b> is connected to the external contact terminal <b>108</b>. The first inductor <b>104</b>, the second inductor <b>106</b>, and the third inductor <b>702</b> are also connected to the external contact terminal <b>108</b>.
0076The first inductor <b>104</b> and the second inductor <b>106</b> are interconnected through a jumper wire <b>902</b>. Such an interconnection effectively puts the first inductor <b>104</b> and the second inductor <b>106</b> in serial positions and results in a new inductor with approximately double the inductance of each individual inductor.
0077The contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, the third inductor <b>702</b>, and the jumper wire <b>902</b> are encapsulated in the mold compound <b>110</b>.
0078Compared to the encapsulant interposer <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref>, where the encapsulant interposer <b>100</b> has two rows of the contact pad <b>102</b>, the current embodiment of the present invention has one row of the contact pad <b>102</b>. The encapsulant interposer could have more than two rows of the contact pad <b>102</b>. Also, other combinations of the inductors could be interconnected by the jumper wire <b>902</b>.
0079In the current embodiment of the present invention, the first inductor <b>104</b>, the second inductor <b>106</b>, and the third inductor <b>702</b>, all of which are passive devices, are included in the encapsulant interposer <b>900</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0080Referring now to <figref idref="DRAWINGS">FIG. 10</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer <b>900</b> of the fourth embodiment of the present invention along line <b>10</b>-<b>10</b> of <figref idref="DRAWINGS">FIG. 9</figref>.
0081The external contact terminal <b>108</b> is not coplanar with the contact pad <b>102</b>. The external contact terminal <b>108</b> bends downward and is not horizontal. The standoff height <b>202</b> is created between one end of the external contact terminal <b>108</b> and the contact pad <b>102</b> in the vertical direction.
0082The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, the third inductor <b>702</b>, and the devices that would be put upon the encapsulant interposer later on. The mold compound <b>110</b> also protects the jumper wire <b>902</b>. In the current embodiment of the present invention, the bottom surfaces of the first inductor <b>104</b>, the second inductor <b>106</b>, and the third inductor <b>702</b> are exposed.
0083Referring now to <figref idref="DRAWINGS">FIG. 11</figref>, therein is shown a top view of an encapsulant interposer <b>1100</b> of a fifth embodiment of the present invention after a stage of singulation.
0084An encapsulant interposer <b>1100</b> is shown. The encapsulant interposer <b>1100</b> has the contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, and the external contact terminal <b>108</b>. The contact pad <b>102</b> is connected to the external contact terminal <b>108</b>. The first inductor <b>104</b> and the second inductor <b>106</b> are also connected to the external contact terminal <b>108</b>.
0085Compared to the encapsulant interposer <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref>, where the first inductor <b>104</b> is partially encircled by the second inductor <b>106</b>, the current embodiment of the present invention has the first inductor <b>104</b> and the second inductor <b>106</b> side by side. The exact positioning of the first inductor <b>104</b> and the second inductor <b>106</b> does not necessarily have to be symmetrical and can be offset.
0086The contact pad <b>102</b>, the first inductor <b>104</b>, and the second inductor <b>106</b> are encapsulated in the mold compound <b>110</b>.
0087Compared to the encapsulant interposer <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref>, where the encapsulant interposer <b>100</b> has two rows of the contact pad <b>102</b>, the current embodiment of the present invention has one row of the contact pad <b>102</b>. The encapsulant interposer could have more than two rows of the contact pad <b>102</b>.
0088In the current embodiment of the present invention, the first inductor <b>104</b> and the second inductor <b>106</b>, both of which are passive devices, are included in the encapsulant interposer <b>1100</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0089Referring now to <figref idref="DRAWINGS">FIG. 12</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer <b>1100</b> of the fifth embodiment of the present invention along line <b>12</b>-<b>12</b> of <figref idref="DRAWINGS">FIG. 11</figref>.
0090The external contact terminal <b>108</b> is not coplanar with the contact pad <b>102</b>. The external contact terminal <b>108</b> bends downward and is not horizontal. The standoff height <b>202</b> is created between one end of the external contact terminal <b>108</b> and the contact pad <b>102</b> in the vertical direction.
0091The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, and the devices that would be put upon the encapsulant interposer later on. In the current embodiment of the present invention, the bottom surfaces of the first inductor <b>104</b> and the second inductor <b>106</b> are exposed.
0092Referring now to <figref idref="DRAWINGS">FIG. 13</figref>, therein is shown a top view of an encapsulant interposer <b>1300</b> of a sixth embodiment of the present invention after a stage of singulation.
0093An encapsulant interposer <b>1300</b> is shown. The encapsulant interposer <b>1300</b> has the contact pad <b>102</b>, the first inductor <b>104</b>, and the second inductor <b>106</b>.
0094Compared to the encapsulant interposer <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref>, where there is the external contact terminal <b>108</b> of <figref idref="DRAWINGS">FIG. 1</figref>, the current embodiment of the present invention does not have the external contact terminal <b>108</b> of <figref idref="DRAWINGS">FIG. 1</figref>. This type of configuration is sometimes called a “leadless” configuration.
0095The contact pad <b>102</b>, the first inductor <b>104</b>, and the second inductor <b>106</b> are encapsulated in the mold compound <b>110</b>.
0096In the current embodiment of the present invention, the first inductor <b>104</b> and the second inductor <b>106</b>, both of which are passive devices, are included in the encapsulant interposer <b>1300</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0097Referring now to <figref idref="DRAWINGS">FIG. 14</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer <b>1300</b> of the sixth embodiment of the present invention along line <b>14</b>-<b>14</b> of <figref idref="DRAWINGS">FIG. 13</figref>.
0098Compared to the encapsulant interposer <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref>, where there is the external contact terminal <b>108</b> of <figref idref="DRAWINGS">FIG. 1</figref>, the current embodiment of the present invention does not have the external contact terminal <b>108</b> of <figref idref="DRAWINGS">FIG. 1</figref> or <figref idref="DRAWINGS">FIG. 2</figref>. The standoff height <b>202</b> of <figref idref="DRAWINGS">FIG. 2</figref> does not exist in the current embodiment of the present invention. The encapsulant interposer <b>1300</b> is flat.
0099The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, and the devices that would be put upon the encapsulant interposer later on. In the current embodiment of the present invention, both the top and the bottom surfaces of the first inductor <b>104</b> and the second inductor <b>106</b> are exposed.
0100Referring now to <figref idref="DRAWINGS">FIG. 15</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package <b>1500</b> of a seventh embodiment of the present invention after a stage of singulation.
0101The semiconductor package <b>1500</b> has the first die <b>602</b> and the second die <b>604</b>. The semiconductor package <b>1500</b> also has the encapsulant interposer <b>1300</b> embedded. The first die <b>602</b> is attached to the encapsulant interposer <b>1300</b> through the die paste <b>606</b>. The second die <b>604</b> is underneath the encapsulant interposer <b>1300</b> and is attached to the substrate interposer <b>608</b>.
0102The first die <b>602</b> is also electrically connected to the substrate interposer <b>608</b> through a bonding wire <b>1502</b>.
0103The encapsulant interposer <b>1300</b>, the first die <b>602</b>, the second die <b>604</b>, and the die paste <b>606</b> are encapsulated in the package mold compound <b>610</b>.
0104In the current embodiment of the present invention, the encapsulant interposer <b>1300</b> is used as an internal stacking module of the semiconductor package <b>1500</b>. It has been discovered that such a configuration reduces the thickness of the semiconductor package <b>1500</b>, resulting in thinner profile of such packages.
0105Referring now to <figref idref="DRAWINGS">FIG. 16</figref>, therein is shown a top view of an encapsulant interposer <b>1600</b> of an eighth embodiment of the present invention after a stage of singulation.
0106An encapsulant interposer <b>1600</b> is shown. The encapsulant interposer <b>1600</b> has the first inductor <b>104</b>, the second inductor <b>106</b>, and an inductor pad <b>1602</b>.
0107The first inductor <b>104</b>, the second inductor <b>106</b>, and the inductor pad <b>1602</b> are encapsulated in the mold compound <b>110</b>.
0108In the current embodiment of the present invention, the first inductor <b>104</b> and the second inductor <b>106</b>, both of which are passive devices, are included in the encapsulant interposer <b>1600</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0109Referring now to <figref idref="DRAWINGS">FIG. 17</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer <b>1600</b> of the eighth embodiment of the present invention along line <b>17</b>-<b>17</b> of <figref idref="DRAWINGS">FIG. 16</figref>.
0110Compared to the encapsulant interposer <b>100</b> of <figref idref="DRAWINGS">FIG. 1</figref>, where there is the external contact terminal <b>108</b> of <figref idref="DRAWINGS">FIG. 1</figref>, the current embodiment of the present invention does not have the external contact terminal <b>108</b> of <figref idref="DRAWINGS">FIG. 1</figref> or <figref idref="DRAWINGS">FIG. 2</figref>. The standoff height <b>202</b> of <figref idref="DRAWINGS">FIG. 2</figref> does not exist in the current embodiment of the present invention. The encapsulant interposer <b>1600</b> is flat.
0111The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, and the devices that would be put upon the encapsulant interposer later on. In the current embodiment of the present invention, the top surfaces of the first inductor <b>104</b> and the second inductor <b>106</b> are exposed.
0112Referring now to <figref idref="DRAWINGS">FIG. 18</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package <b>1800</b> of a ninth embodiment of the present invention after a stage of singulation.
0113The semiconductor package <b>1800</b> has the first die <b>602</b> and the second die <b>604</b>. The semiconductor package <b>1800</b> also has the encapsulant interposer <b>1600</b> embedded. The first die <b>602</b> is attached to the encapsulant interposer <b>1600</b> through the die paste <b>606</b>. The second die <b>604</b> is underneath the encapsulant interposer <b>1600</b> and is attached to the substrate interposer <b>608</b>. The encapsulant interposer <b>1600</b> having the inductor pad <b>1602</b>, the first die <b>602</b>, the second die <b>604</b>, and the die paste <b>606</b> are encapsulated in the package mold compound <b>610</b>.
0114In the current embodiment of the present invention, the encapsulant interposer <b>1600</b> is used as an internal stacking module of the semiconductor package <b>1800</b>. It has been discovered that such a configuration reduces the thickness of the semiconductor package <b>1800</b>, resulting in thinner profile of such packages.
0115Referring now to <figref idref="DRAWINGS">FIG. 19</figref>, therein is shown a top view of an unfinished encapsulant interposer <b>1900</b> of a tenth embodiment of the present invention after an intermediate stage of the process.
0116The unfinished encapsulant interposer <b>1900</b> is shown. The unfinished encapsulant interposer <b>1900</b> has the contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, the first dam bar <b>302</b>, the second dam bar <b>304</b>, and a connect bar <b>1902</b>.
0117The contact pad <b>102</b> is connected to the second dam bar <b>304</b>. The first inductor <b>104</b> and the second inductor <b>106</b> are also connected to the second dam bar <b>304</b>. The connect bar <b>1902</b> connects the first dam bar <b>302</b> to the second dam bar <b>304</b>.
0118The contact pad <b>102</b>, the first inductor <b>104</b>, and the second inductor <b>106</b> are encapsulated in the mold compound <b>110</b>.
0119In the current embodiment of the present invention, the first inductor <b>104</b> and the second inductor <b>106</b>, both of which are passive devices, are included in the unfinished encapsulant interposer <b>1900</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0120After this intermediate stage of the process, the first dam bar <b>302</b> and the second dam bar <b>304</b> will be eliminated by a process of singulation. After the stage of singulation, the connect bar will be formed to a predetermined shape.
0121Referring now to <figref idref="DRAWINGS">FIG. 20</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the unfinished encapsulant interposer <b>1900</b> of the tenth embodiment of the present invention along line <b>20</b>-<b>20</b> of <figref idref="DRAWINGS">FIG. 19</figref> after a stage of singulation.
0122An encapsulant interposer <b>2000</b> is shown after the stage of singulation. The connect bar <b>1902</b> is not coplanar with the contact pad <b>102</b>. The connect bar <b>1902</b> bends downward and is not horizontal. The standoff height <b>202</b> is created between one end of the connect bar <b>1902</b> and the contact pad <b>102</b> in the vertical direction.
0123The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, and the devices that would be put upon the encapsulant interposer later on. In the current embodiment of the present invention, both the top and the bottom surfaces of the first inductor <b>104</b> and the second inductor <b>106</b> are exposed.
0124Referring now to <figref idref="DRAWINGS">FIG. 21</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package <b>2100</b> of an eleventh embodiment of the present invention after a stage of singulation.
0125The semiconductor package <b>2100</b> has the first die <b>602</b> and the second die <b>604</b>. The semiconductor package <b>2100</b> also has the encapsulant interposer <b>2000</b> embedded. The first die <b>602</b> is attached to the encapsulant interposer <b>2000</b> through the die paste <b>606</b>. The second die <b>604</b> is underneath the encapsulant interposer <b>2000</b> and is attached to the substrate interposer <b>608</b>.
0126The encapsulant interposer <b>2000</b> having the connect bar <b>1902</b>, the first die <b>602</b>, the second die <b>604</b>, and the die paste <b>606</b> are encapsulated in the package mold compound <b>610</b>.
0127In the current embodiment of the present invention, the encapsulant interposer <b>2000</b> is used as an internal stacking module of the semiconductor package <b>2100</b>. It has been discovered that such a configuration reduces the thickness of the semiconductor package <b>2100</b>, resulting in thinner profile of such packages.
0128Referring now to <figref idref="DRAWINGS">FIG. 22</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package <b>2200</b> of a twelfth embodiment of the present invention after a stage of singulation.
0129The semiconductor package <b>2200</b> has the second die <b>604</b>. The semiconductor package <b>2200</b> also has the encapsulant interposer <b>2000</b> embedded. The second die <b>604</b> is underneath the encapsulant interposer <b>2000</b> and is attached to the substrate interposer <b>608</b>.
0130The encapsulant interposer <b>2000</b> having the connect bar <b>1902</b> and the second die <b>604</b> are encapsulated in the package mold compound <b>610</b>. The encapsulation process is done in a way that the top surfaces of the first inductor <b>104</b> and the second inductor <b>106</b> of the encapsulant interposer <b>2000</b> are exposed through a package mold compound opening <b>2202</b>. The package mold compound opening <b>2202</b> allows other semiconductor chips to be connected to the encapsulant interposer <b>2000</b>, resulting in formation of Fan-in Package-on-Package (Fi-PoP) packages.
0131In the current embodiment of the present invention, the encapsulant interposer <b>2000</b> is used as an internal stacking module of the semiconductor package <b>2200</b>. It has been discovered that such a configuration reduces the thickness of the semiconductor package <b>2200</b>, resulting in thinner profile of such packages.
0132Referring now to <figref idref="DRAWINGS">FIG. 23</figref>, there in is shown a top view of an encapsulant interposer <b>2300</b> of a thirteenth embodiment of the present invention after a stage of singulation.
0133An encapsulant interposer <b>2300</b> is shown. The encapsulant interposer <b>2300</b> has the contact pad <b>102</b>, the first inductor <b>104</b>, the second inductor <b>106</b>, and the external contact terminal <b>108</b>. A selected number of the contact pad <b>102</b> is connected to the external contact terminal <b>108</b>. The first inductor <b>104</b> and the second inductor <b>106</b> are also connected to the external contact terminal <b>108</b>.
0134The contact pad <b>102</b>, the first inductor <b>104</b>, and the second inductor <b>106</b> are encapsulated in the mold compound <b>110</b>.
0135In the current embodiment of the present invention, the selected number of the contact pad <b>102</b> that is connected to the external contact terminal <b>108</b> is the contact pad <b>102</b> that usually carried ground/power signals.
0136In the current embodiment of the present invention, the first inductor <b>104</b> and the second inductor <b>106</b>, both of which are passive devices, are included in the encapsulant interposer <b>2300</b>. It has been discovered that such a configuration saves space that is reserved for such passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages. Furthermore, since the inclusion of the inductors in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process, it has also been discovered that such a configuration reduces the cost of manufacturing process. It has further been discovered that the inductor performance in this configuration is improved compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound <b>110</b>.
0137Referring now to <figref idref="DRAWINGS">FIG. 24</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 2</figref> of the encapsulant interposer <b>2300</b> of the thirteenth embodiment of the present invention along line <b>24</b>-<b>24</b> of <figref idref="DRAWINGS">FIG. 23</figref>.
0138The external contact terminal <b>108</b> is not coplanar with the contact pad <b>102</b>. The external contact terminal <b>108</b> bends downward and is not horizontal. The standoff height <b>202</b> is created between one end of the external contact terminal <b>108</b> and the contact pad <b>102</b> in the vertical direction.
0139The mold compound <b>110</b> provides mechanical support to the first inductor <b>104</b>, the second inductor <b>106</b>, and the devices that would be put upon the encapsulant interposer later on. In the current embodiment of the present invention, both the top and the bottom surfaces of the first inductor <b>104</b> and the second inductor <b>106</b> are exposed.
0140Referring now to <figref idref="DRAWINGS">FIG. 25</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package <b>2500</b> of a fourteenth embodiment of the present invention after a stage of singulation.
0141The semiconductor package <b>2500</b> has a first type flip chip die <b>2502</b> and the second die <b>604</b>. The semiconductor package <b>2500</b> also has the encapsulant interposer <b>100</b> embedded. The first type flip chip die <b>2502</b> is attached to the encapsulant interposer <b>100</b>. The second die <b>604</b> is underneath the encapsulant interposer <b>100</b> and is attached to the substrate interposer <b>608</b>.
0142The encapsulant interposer <b>100</b>, the first type flip chip die <b>2502</b>, and the second die <b>604</b> are encapsulated in the package mold compound <b>610</b>.
0143In the current embodiment of the present invention, the encapsulant interposer <b>100</b> is used as an internal stacking module of the semiconductor package <b>2500</b>. It has been discovered that such a configuration reduces the thickness of the semiconductor package <b>2500</b>, resulting in thinner profile of such packages.
0144Referring now to <figref idref="DRAWINGS">FIG. 26</figref>, therein is shown a cross-sectional view similar to <figref idref="DRAWINGS">FIG. 6</figref> of a semiconductor package <b>2600</b> of a fifteenth embodiment of the present invention after a stage of singulation.
0145The semiconductor package <b>2600</b> has a second type flip chip die <b>2602</b> and the second die <b>604</b>. The semiconductor package <b>2600</b> also has the encapsulant interposer <b>700</b> embedded. The second die <b>604</b> is underneath the encapsulant interposer <b>700</b> and is attached to the substrate interposer <b>608</b>.
0146The encapsulant interposer <b>700</b> and the second die <b>604</b> are encapsulated in the package mold compound <b>610</b>. The encapsulation process is done in a way that the top surface of the encapsulant interposer <b>700</b> is exposed and is not covered by the package mold compound <b>610</b>. The second type flip chip die <b>2602</b> is attached to the encapsulant interposer <b>700</b> through the exposed top surface of the encapsulant interposer <b>700</b>. The difference between the first type flip chip die <b>2502</b> in <figref idref="DRAWINGS">FIG. 25</figref> and the second type flip chi die <b>2602</b> is that the first type flip chip die <b>2502</b> in <figref idref="DRAWINGS">FIG. 25</figref> is fully encapsulated by the package mold compound <b>610</b> while the second type flip chip die <b>2602</b> is not.
0147In the current embodiment of the present invention, the encapsulant interposer <b>700</b> is used as an internal stacking module of the semiconductor package <b>2600</b>. It has been discovered that such a configuration reduces the thickness of the semiconductor package <b>2600</b>, resulting in thinner profile of such packages.
0148Referring now to <figref idref="DRAWINGS">FIG. 27</figref>, therein is shown a flow chart disclosing a method <b>2700</b> of manufacturing of the semiconductor package system in a further embodiment of the present invention. The method <b>2700</b> includes forming a leadframe having a passive device in a block <b>2702</b>; encapsulating the passive device to form an encapsulant interposer in a block <b>2704</b>; attaching a first die to the encapsulant interposer in a block <b>2706</b>; forming a substrate interposer having a second die in a block <b>2708</b>; and stacking the encapsulant interposer over the substrate interposer in a block <b>2710</b>.
0149It is discovered that the present invention reduces semiconductor package thickness by using an encapsulant interposer integrated with passive devices as an internal stacking module; saves space that is reserved for passive devices in conventional semiconductor packages, resulting in denser and more compact semiconductor packages; reduces the cost of manufacturing because the inclusion of the passive devices in the encapsulant interposer makes the manufacturing process of semiconductor packages having such passive devices much simpler than the convention manufacturing process; improves inductor performance compared to inductors in conventional semiconductor packages because the inductors are protected from leakage due to the encapsulation by the mold compound.
0150Yet another important aspect of the present invention is that it valuably supports and services the historical trend of reducing costs, simplifying systems, and increasing performance.
0151These and other valuable aspects of the present invention consequently further the state of the technology to at least the next level.
0152Thus, it has been discovered that the integrated circuit package system of the present invention furnishes important and heretofore unknown and unavailable solutions, capabilities, and functional aspects for improving yield, increasing reliability, reducing complexity, and reducing cost of integrated circuit system. The resulting processes and configurations are straightforward, cost-effective, uncomplicated, highly versatile and effective, can be surprisingly and unobviously implemented by adapting known technologies, and are thus readily suited for efficiently and economically manufacturing integrated circuit package system fully compatible with conventional manufacturing processes and technologies.
0153While the invention has been described in conjunction with a specific best mode, it is to be understood that many alternatives, modifications, and variations will be apparent to those skilled in the art in light of the aforegoing description. Accordingly, it is intended to embrace all such alternatives, modifications, and variations that fall within the scope of the included claims. All matters hithertofore set forth herein or shown in the accompanying drawings are to be interpreted in an illustrative and non-limiting sense.
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| Examiner's Amendment CommunicationEX.A | EX.A | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Non-Final ActionA... | A... | |
| PG-Pub Issue NotificationPG-ISSUE | PG-ISSUE | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response to Election / Restriction FiledELC. | ELC. | |
| Mail Restriction RequirementMCTRS | MCTRS | |
| Restriction/Election RequirementCTRS | CTRS | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| IFW TSS Processing by Tech Center CompleteTSSCOMP | TSSCOMP | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Filing ReceiptFLRCPT.O | FLRCPT.O | |
| Sent to Classification ContractorPGPC | PGPC | |
| Cleared by OIPE CSRL194 | L194 | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Information Disclosure Statement consideredIDSC | IDSC | |
| Electronic Information Disclosure StatementEIDS. | EIDS. | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Initial Exam Team nnIEXX | IEXX |
11 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| AssignmentAS | AS | |
| Maintenance fee paymentMAFP | MAFP | |
| AssignmentAS | AS | |
| AssignmentAS | AS | |
| Maintenance fee paymentMAFP | MAFP | |
| AssignmentAS | AS | |
| AssignmentAS | AS | |
| AssignmentAS | AS | |
| Fee paymentFPAY | FPAY | |
| Information on status: patent grantGrantedPATENTED CASESTCF | STCF | |
| AssignmentAS | AS |
Numbers
- Publication
- 20100127361
- Application
- 12276297
Titles
- English
- ENCAPSULANT INTERPOSER SYSTEM WITH INTEGRATED PASSIVE DEVICES AND MANUFACTURING METHOD THEREFOR
Patent term adjustment
- Applicant delay
- −1 day
- Net adjustment
- 0 days
Classification
- CPC, 30
- H10W70/479
- H10W74/016
- H10W74/117
- H10W70/413
- H10W70/40
- H10W90/401
- H10W90/701
- H10W90/736
- H10W90/734
- H10W72/251
- H10W72/07251
- H10W72/20
- H10W90/00
- H10W72/59
- H10W72/923
- H10W72/942
- H10W72/9415
- H10W72/90
- H10W72/5449
- H10W90/754
- H10W90/756
- H10W72/884
- H10W90/722
- H10W90/724
- H10W90/22
- H10W72/60
- H10W70/60
- H10W90/291
- H10W74/10
- H10W74/00
- IPC, 2
- H01L21 50
- H01L23 495