Power management circuit for battery pack
Claim Score by NHIP
Abstract
A power system for managing charging, discharging and protection of rechargeable batteries is disclosed. The power system mainly includes a power system. The power system includes a switching circuit coupled to the rechargeable batteries to charge and discharge the rechargeable batteries. The power system includes a power management unit to control the switching circuit. The power system includes a temperature sensing circuit to monitor a temperature of the batteries, voltage detectors to monitor voltages of the batteries, and current detectors to monitor a current of the batteries. If an abnormal condition is sensed by the power management unit when the power system is in an operating mode, the power management unit will terminate the operating mode by switching off the switching circuit to protect the batteries and the power system.

Term
1.9 yearsto projected expiry
Projected expiry 17 August 2028, counted from filing; an application has no term until it is granted.
- Priority and filed
- Published
- Today
- Projected expiry
19 claims: 3 independent, 16 dependent
- 1Broadest claimClaim Score 82, broad(NHIP)A power system coupled to at least one battery, comprising:a switching circuit coupled to the at least one battery;a sensing circuit for sensing a temperature of the at least one battery and generating a signal based on the temperature;and a power management unit being capable of monitoring a voltage and a current of the at least one battery, receiving the signal from the sensing circuit and switching off the switching circuit when an abnormal condition is sensed by the power management unit.
- 10A method for protecting a battery in an operating mode, the battery having a temperature, a voltage and a current, comprising the steps of:(a) generating a plurality of reference voltages;(b) generating a first signal based upon the temperature of the battery;(c) generating a second signal based upon the voltage of the battery;(d) generating a third signal based upon the current of the battery;(e) generating a control signal based upon the first, second and third signals;and (f) stopping the operating mode of the battery according to the control signal.
- 14A portable computer comprising:an input device for taking inputs from a user;a microcontroller for performing operations based on the inputs from the user;at least one battery for powering the portable computer;and a power system for managing the at least one battery, the power system comprising: a switching circuit coupled to at least one battery;a sensing circuit for sensing a temperature of the at least one battery and generating a signal according to the temperature;and a power management unit being capable of monitoring a voltage and a current of the at least one battery, receiving the signal from the sensing circuit and switching off the switching circuit when an abnormal condition is sensed by the power management unit.
Independent claims3
67 paragraphs in 5 sections, as filed
FIELD OF THE INVENTION
0001The present invention relates to power supply systems and more particular to topology of power management systems.
BACKGROUND OF THE INVENTION
0002Rechargeable batteries are commonly employed to supply power for portable electronic devices such as radios, notebook computers, cameras, etc. A rechargeable battery can be refreshed to full capacity if the rechargeable battery is charged by a power source such as an adapter. A battery management system may be employed to implement the charging function, and the battery management system can also provide protection function to protect the battery from any damage under some abnormal conditions, such as over voltage, over temperature, etc. In conventional solutions, the charging function and protection function for a battery management system are usually implemented by separate circuits, a circuit for the charging function and a circuit for the protection function.
0003The battery management system usually includes a detection circuit to monitor the capacity of the rechargeable battery, for example, the voltage value of the rechargeable battery. When the battery capacity is not full, the battery management system will charge the battery. When the battery is fully charged, the charging process will be terminated.
0004During the process of charging the rechargeable battery, if some abnormal conditions such as over voltage, over current or abnormal temperature occur, these abnormal conditions will considerably deteriorate the battery performance. So the protection function is needed to avoid abnormal conditions from deteriorating the battery. When an abnormal condition is detected, the protection operation, such as terminating the charging process, is activated to protect the battery.
0005In conventional battery management systems, the circuits designed for charging and protection functions are located on different chips. The circuit for the charging function may be integrated into one chip and sealed as an apparatus outside a battery package. The circuit for the protection function may be integrated into another chip and sealed with the battery inside the battery package. In these conventional applications, since two separate packages are needed for charging the rechargeable battery, it is not convenient enough especially for use by portable electronic devices. Some designers have tried to integrate both charging and protection functions into a single chip and seal the chip with the battery inside the battery package.
0006However, the simple combination of two circuits makes the chip size much larger. The chip integrating with both charging and protection functions is larger and much more complex than a chip with only one function. Sealing the combined chip within the battery package increases the size of the battery package even more. Therefore, it is needed an efficient system for providing the charging and protection functions to portable electronic devices, and it is to such system the present invention is primarily directed.
SUMMARY OF THE INVENTION
0007In one embodiment, there is disclosed a power system coupled to at least one battery. The power system includes a switching circuit coupled to the at least one battery and a sensing circuit for sensing a temperature of the at least one battery. The sensing circuit generates a signal based on the temperature. The power system includes a power management unit. The power management unit is capable of monitoring a voltage and a current of the at least one battery, receiving the signal from the sensing circuit and switching off the switching circuit when an abnormal condition is sensed by the power management unit.
0008In yet another embodiment, there is disclosed a method for protecting a battery in an operating mode. The battery having a temperature, a voltage and a current. The method includes the steps of generating a plurality of reference voltages, generating a first signal based upon the temperature of the battery, generating a second signal based upon the voltage of the battery and generating a third signal based upon the current flowing through the battery. The method also includes the steps of generating a control signal based upon the first, second and third signals and stopping the operating mode of the battery according to the control signal.
0009In yet another embodiment, there is disclosed a portable computer. The portable computer includes an input device for taking inputs from a user, a microcontroller for performing operations based on the inputs from the user, at least one battery for powering the portable computer and a power system for managing the at least one battery. The power system includes a switching circuit coupled to the at least one battery, a sensing circuit and a power management unit. The sensing circuit is for sensing a temperature of the at least one battery and generating a signal according to the temperature. The power management unit monitors a voltage and a current of the at least one battery, receives the signal from the sensing circuit and switches off the switching circuit when an abnormal condition is sensed by the power management unit.
BRIEF DESCRIPTION OF THE DRAWINGS
0010Advantages of the present invention is apparent from the following detailed description of exemplary embodiments thereof, which description should be considered in conjunction with the accompanying drawings, in which:
0011<figref idref="DRAWINGS">FIG. 1</figref> is a simplified schematic diagram of a preferred exemplary circuit according to one embodiment of the invention;
0012<figref idref="DRAWINGS">FIG. 2</figref> is a simplified schematic diagram of another preferred exemplary circuit according to one embodiment of the invention;
0013<figref idref="DRAWINGS">FIG. 3</figref> is a schematic diagram of an exemplary power management unit consistent with the embodiment in <figref idref="DRAWINGS">FIG. 1</figref>;
0014<figref idref="DRAWINGS">FIG. 4</figref> is another schematic diagram of an exemplary power management unit consistent with the embodiment in <figref idref="DRAWINGS">FIG. 1</figref>;
0015<figref idref="DRAWINGS">FIG. 5</figref> is a block diagram of a trim signal translation unit consistent with the embodiment in <figref idref="DRAWINGS">FIGS. 3 and 4</figref>;
0016<figref idref="DRAWINGS">FIG. 6</figref> illustrates signal waveforms at a ZAPPING mode of the trim signal translation unit consistent with the embodiment in <figref idref="DRAWINGS">FIG. 5</figref>;
0017<figref idref="DRAWINGS">FIG. 7</figref> illustrates signal waveforms at a READ mode of the trim signal translation unit consistent with the embodiment in <figref idref="DRAWINGS">FIG. 3</figref>;
0018<figref idref="DRAWINGS">FIG. 8</figref> illustrates signal waveforms at a QUSAI-ZAPPING mode of the trim signal translation unit consistent with the embodiment in <figref idref="DRAWINGS">FIG. 3</figref>; and
0019<figref idref="DRAWINGS">FIG. 9</figref> is a block diagram of a portable computer utilizing the power system in <figref idref="DRAWINGS">FIGS. 1 and 2</figref>.
DETAILED DESCRIPTION OF THE INVENTION
0020The present invention provides a power management system for management of charging, discharging and protection functions of rechargeable batteries. Since the embodiments shown in the drawings are only for illustrative purposes, some sub-components and/or peripheral components generally incorporated in the power management system are omitted herein. In describing the preferred embodiments, specific terminologies are employed for the sake of clarity. However, the disclosure of this patent specification is not intended to be limited to the selected terminology and the specified embodiments. It is understood that each specific element includes all technical equivalents that operate in a similar manner.
0021<figref idref="DRAWINGS">FIG. 1</figref> illustrates a schematic diagram of an exemplary circuit <b>100</b>. The circuit <b>100</b> mainly includes a power system <b>120</b>. The circuit <b>100</b> includes input ports <b>102</b>, <b>104</b> and <b>106</b> and an output port <b>110</b>. The input port <b>102</b> is for connecting to an external power source such as an adapter. The output port <b>110</b> is for connecting to a system load (not shown in <figref idref="DRAWINGS">FIG. 1</figref>). The adapter supplies power to the system load and the power system <b>120</b>. The input port <b>104</b> is a negative terminal of the circuit <b>100</b> and usually connected to the ground. A control signal may be applied to the power system <b>120</b> via the input port <b>106</b> to control a charging process of the power system <b>120</b>.
0022A diode <b>108</b> is coupled between the input port <b>102</b> and the power system <b>120</b>. The diode <b>108</b> allows a current flowing from the adapter to the power system <b>120</b> and prevents a reverse current flowing from the power system <b>120</b> to the adapter. A switching circuit <b>145</b> is coupled to the diode <b>108</b>. The switching circuit <b>145</b> includes a discharge switch <b>140</b> and a charge switch <b>150</b>. The discharge switch <b>140</b> of the switching circuit <b>145</b> may be constructed as a parallel connection of a transistor <b>142</b> and a diode <b>144</b>. The diode <b>144</b> may be a body diode within the transistor <b>142</b>. Similarly, the charge switch <b>150</b> may be constructed as a parallel connection of a transistor <b>152</b> and a diode <b>154</b>. The diode <b>154</b> may be a body diode within the transistor <b>152</b>.
0023An inductor <b>124</b>, a resistor <b>126</b>, batteries <b>112</b> and <b>114</b> are connected in series between the switching circuit <b>145</b> and the ground. The batteries <b>112</b> and <b>114</b> are rechargeable batteries. In the present invention, one or more rechargeable batteries can be coupled to the power system <b>120</b> with correlated connections adjusted. When the adapter is coupled to the input port <b>102</b>, the adapter supplies power to drive the system load through the output port <b>110</b>. The adapter can also charge the batteries <b>112</b> and <b>114</b> through the switching circuit <b>145</b>, the inductor <b>124</b> and the resistor <b>126</b> if the batteries <b>112</b> and <b>114</b> are not full of capacity. Thus the power system <b>120</b> will work in a charging mode. If no battery is connected, the adapter only supplies power to the system load. If no adapter is coupled to the circuit <b>100</b>, the batteries <b>112</b> and <b>114</b> supply power to the system load when needed. Thus the power system <b>120</b> will work in a discharging mode.
0024The power system <b>120</b> includes a power management unit <b>130</b> to manage charging, discharging and protection functions of the batteries <b>112</b> and <b>114</b>. The power management unit <b>130</b> can be integrated into an integrated circuit (IC) chip. A terminal DO of the power management unit <b>130</b> is connected to a gate terminal of the transistor <b>142</b> to control the states of the discharge switch <b>140</b>. If the terminal DO is set to an ON state (logic 0), the transistor <b>142</b> is turned on to switch on the discharge switch <b>140</b>. If the terminal DO is set to an OFF state (logic 1), the transistor <b>142</b> is turned off to switch off the discharge switch <b>140</b>. Similarly, a terminal HDR of the power management unit <b>130</b> is connected to a gate terminal of the transistor <b>152</b> to control the states of the charge switch <b>150</b>. If the terminal HDR is set to an ON state (logic 0), the transistor <b>152</b> is turned on to switch on the charge switch <b>150</b>. If the terminal HDR is set to an OFF state (logic 1), the transistor <b>152</b> is turned off to switch off the charge switch <b>150</b>. The terminal HDR can also be set as a pulse width modulation (PWM) signal to switch on and off the charge switch <b>150</b> periodically.
0025If the adapter is coupled to the circuit <b>100</b>, the adapter also supplies power to a terminal VCC of the power management unit <b>130</b> via the diode <b>144</b> of the discharge switch <b>140</b>. If the adapter is absent, the batteries <b>112</b> and <b>114</b> will supply power to the terminal VCC via the diode <b>154</b> of the charge switch <b>150</b>.
0026If the adapter is coupled to the circuit <b>100</b>, the terminal HDR of the power management unit <b>130</b> is set as the PWM signal to turn on and off the charge switch <b>150</b> periodically. Then the power system <b>120</b> works in the charging mode. A charge current flows from the adapter through the diode <b>144</b>, the transistor <b>152</b>, the inductor <b>124</b> and the resistor <b>126</b> to charge the batteries <b>112</b> and <b>114</b>. The power management unit <b>130</b> monitors the voltages of the batteries <b>112</b> and <b>114</b>. When the batteries <b>112</b> and <b>114</b> are fully charged, the power management unit <b>130</b> sets the terminal HDR to an OFF state to turn off the charge switch <b>150</b>. Thus the switching circuit <b>145</b> is switched off. Then the charging mode is stopped and no charge current flows from the adapter to the batteries <b>112</b> and <b>114</b>.
0027A transistor <b>166</b> is coupled between a terminal THM of the power management unit <b>130</b> and the ground. A gate terminal of the transistor <b>166</b> is coupled to the input port <b>106</b>, thus the states of the transistor <b>166</b> are controlled by the signal from the input port <b>106</b>. If the signal at the input port <b>106</b> is at logic <b>1</b>, the transistor <b>166</b> will be turned on. Hence, the voltage at the terminal THM is pulled to the ground if the power system <b>120</b> is working in the charging mode. The power management unit <b>130</b> then sets the terminal HDR to an OFF state to turn off the charge switch <b>150</b> to terminate the charging process.
0028If the adapter is absent, a terminal DO of the power management unit <b>130</b> is set to an ON state to switch on the discharge switch <b>140</b>. Then the power system <b>120</b> will work in the discharging mode. The batteries <b>112</b> and <b>114</b> supply power to the system load via the diode <b>154</b> and the transistor <b>142</b>. The power management unit <b>130</b> monitors the voltages of the batteries <b>112</b> and <b>114</b>. If the voltage of the battery <b>112</b> and/or <b>114</b> is lower than a predetermined low threshold, the power management unit <b>130</b> can set the terminal DO to an OFF state to turn off the discharge switch <b>140</b>. Thus the switching circuit <b>145</b> is switched off and the discharging mode is stopped.
0029A terminal BAT of the power management <b>130</b> is coupled to the anode of the battery <b>112</b> and a terminal BAT<b>2</b> is coupled to the anode of the battery <b>114</b>. When the power system <b>120</b> is in operating, the voltages of the batteries <b>112</b> and <b>114</b> are monitored continuously via the terminals BAT and BAT<b>2</b>. During the charging process, the power management <b>130</b> sets the terminal HDR to an OFF state to turn off the charge switch <b>150</b> if the voltage of the battery <b>112</b> and/or <b>114</b> is higher than a predetermined high threshold. Thus the charging process is terminated by switching off the switching circuit <b>145</b>. This operation protects the batteries <b>112</b> and <b>114</b> from over voltage during the charging process. During a discharging process, the power management unit <b>130</b> sets the terminal DO to an OFF state to turn off the discharge switch <b>140</b> if the voltage of the battery <b>112</b> and/or <b>114</b> is lower than the predetermined low threshold. Thus, the discharging process is terminated by switching off the switching circuit <b>145</b>. This operation protects the batteries <b>112</b> and <b>114</b> from over discharge during the discharging process.
0030The resistor <b>126</b> is coupled between a terminal SNS and the terminal BAT of the power management unit <b>130</b>. The power management unit <b>130</b> monitors a current flowing through the resistor <b>126</b> by the terminals SNS and BAT. When the current increases, the voltage on the resistor <b>126</b> increases accordingly. When the voltage is higher than a predetermined value during the charging process, the terminal HDR is set to an OFF state to turn off the charge switch <b>150</b>. Thus the charging mode ends. Likely, when the voltage is higher than the predetermined value during the discharging process, the terminal DO is set to an OFF state to turn off the discharge switch <b>140</b>. Thus the discharging mode ends. This current detection function protects the batteries <b>112</b> and <b>114</b> and the whole circuit <b>100</b> from any damage caused by over current.
0031In the power system <b>120</b>, a temperature sensing circuit <b>121</b> for sensing a surface temperature of the batteries <b>112</b> and <b>114</b> is coupled to the terminal THM of the power management unit <b>130</b>. The temperature sensing circuit <b>121</b> mainly includes a thermistor <b>122</b>. When the power system <b>120</b> is working in the charging mode, the power management unit <b>130</b> provides a current to the thermistor <b>122</b> via the terminal THM. As the temperature of the batteries <b>112</b> and <b>114</b> varies, the resistance of the thermistor varies accordingly. The voltage on the thermistor <b>122</b> varies responsive to the resistance variation of the thermistor <b>122</b>. The voltage of thermistor <b>122</b> is sensed by the power management unit <b>130</b> at the terminal THM. If the voltage exceeds a predetermined voltage range, the terminal HDR of the power management unit <b>130</b> is set to an OFF state to stop the charging mode. This protection operation is capable of avoiding any excessive high/low temperature situation that may affect the performances and the lifespan of the batteries <b>112</b> and <b>114</b>. The voltage range is regulated by predetermined high/low threshold temperatures and the embedded batteries can work effectively within the predetermined high/low threshold temperature.
0032In the power system <b>120</b>, a LED light <b>162</b> is connected with a transistor <b>164</b> in series between the diode <b>108</b> and the ground. The power management unit <b>130</b> controls the states of the transistor <b>164</b>. When the power system <b>120</b> is working properly, the transistor <b>164</b> is set to an ON state by a signal from the terminal THM. Thus the LED light <b>162</b> is turned on and lights continuously. If an abnormal condition occurs, such as a battery is overheated, the current flowing through the resistor <b>126</b> is too large or a battery is over voltage, the signal at the terminal THM is set as a periodic pulse signal to change the states of the transistor <b>164</b> periodically. Thus the LED light <b>162</b> is blinking in response to the periodic pulse signal. This means that the LED light <b>162</b> lights persistently to inform the users that the power system <b>120</b> is working properly. The LED light <b>162</b> blinks to inform the users that the working mode of the power system <b>120</b> is terminated in response to the abnormal condition.
0033In the present invention, the value of the charge current is adjustable under control of the power management unit <b>130</b>. A diode <b>128</b> may be coupled between the inductor <b>124</b> and the ground. When the power system <b>120</b> is working in the charging mode, the power management unit <b>130</b> sets the terminal HDR as the PWM signal to change the states of the charge switch <b>150</b> periodically. A discrete current flows from the charge switch <b>150</b> into the inductor <b>124</b>. If the charge switch <b>150</b> is on, the charge current flows from the adapter to the inductor <b>124</b>. Some power from the adapter is transferred to the batteries <b>112</b> and <b>114</b>, while some other power is stored in the inductor <b>124</b>. If the charge switch <b>150</b> is off, the charge current flows from the diode <b>128</b> to the inductor <b>124</b>. The inductor <b>124</b> transfers the stored power to the batteries <b>112</b> and <b>114</b>. Thus, the inductor <b>124</b> generates a continuous current to charge the batteries <b>112</b> and <b>114</b>. The value of the charge current can be adjusted to a desired value by modulating the ON time interval of the PWM signal at the terminal HDR. The longer the on period of the PWM signal is, the larger the charge current will be.
0034<figref idref="DRAWINGS">FIG. 2</figref> illustrates an exemplary circuit according to another embodiment of the invention. In <figref idref="DRAWINGS">FIG. 2</figref>, the same components as in <figref idref="DRAWINGS">FIG. 1</figref> are indicated by same reference numerals and some same circuits omitted herein can be found in <figref idref="DRAWINGS">FIG. 1</figref> entirely. A power system <b>200</b> in <figref idref="DRAWINGS">FIG. 2</figref> and the power system <b>120</b> in <figref idref="DRAWINGS">FIG. 1</figref> have main difference in the switching circuit <b>245</b> and the switching circuit <b>145</b>. The arrangement of other components not mentioned here remains the same as that in <figref idref="DRAWINGS">FIG. 1</figref>, such as the power management unit <b>130</b>, the batteries <b>112</b> and <b>114</b>, etc.
0035In <figref idref="DRAWINGS">FIG. 2</figref>, diodes <b>202</b> and <b>204</b> are coupled sequentially between the input port <b>102</b> and the batteries <b>112</b> and <b>114</b>. If an external power source such as an adapter is coupled to the input port <b>102</b>, the adapter supplies power to the terminal VCC of the power management unit <b>130</b> via the diode <b>202</b>. If the adapter is absent, the batteries <b>112</b> and <b>114</b> supply power to the terminal VCC of the power management unit <b>130</b> via the diode <b>204</b>. The switching circuit <b>245</b> includes the charge switch <b>150</b> and the discharge switch <b>140</b>. The charge switch <b>150</b>, the discharge switch <b>140</b> and the inductor <b>124</b> are connected in series between the input port <b>102</b> and the anode of the battery <b>112</b>. When the terminal HDR is set to an ON state to turn on the charge switch <b>150</b>, a charge current flows through the transistor <b>152</b>, the diode <b>144</b> and the inductor <b>124</b> to charge the batteries <b>112</b> and <b>114</b>. When the terminal HDR is set to an OFF state, the charge switch <b>150</b> is turned off to prevent the charge current from flowing through the charge switch <b>150</b>. When the terminal DO is set to an ON state to turn on the discharge switch <b>140</b>, a discharge current flows from the batteries <b>112</b> and <b>114</b> through the inductor <b>124</b>, the transistor <b>142</b> and the diode <b>154</b> to a system load. When the terminal DO is set to an OFF state, the discharge switch <b>140</b> is off to prevent the discharge current from flowing through the discharge switch <b>140</b> to the system load.
0036It is widely known that leakage currents exist if diodes/transistors have reverse bias voltages. In the power system <b>120</b>, when the discharging mode is terminated by turning off the discharge switch <b>140</b>, a leakage current flows through the discharge switch <b>140</b> and another leakage current flows through the diode <b>128</b>. The total leakage current flowing out from the batteries <b>112</b> and <b>114</b> is a sum of the currents flowing though the discharge switch <b>140</b> and the diode <b>128</b>. In the power system <b>200</b>, when the discharging mode is terminated by turning off the discharge switch <b>140</b>, a leakage current flows from the batteries <b>112</b> and <b>114</b> through the discharge switch <b>140</b> and a diode <b>228</b> to the negative terminal of the power system <b>200</b>. Hence, the leakage current in the power system <b>200</b> of <figref idref="DRAWINGS">FIG. 2</figref> is much smaller than the leakage current of the power system <b>120</b> of <figref idref="DRAWINGS">FIG. 1</figref>. Thus, the decreased leakage current further improves the performance of the circuit <b>100</b> and can protect the batteries <b>112</b> and <b>114</b> more effectively from over discharge.
0037<figref idref="DRAWINGS">FIG. 3</figref> is a schematic diagram of the power management unit <b>130</b> in <figref idref="DRAWINGS">FIG. 1</figref> according to one embodiment of the invention. The power management unit <b>130</b>A is used to control the charging, discharging and protection functions for the power system <b>120</b>. The power management unit <b>130</b>A includes a power unit <b>310</b>, a protection controller <b>302</b> and a charge controller <b>306</b>. The power unit <b>310</b> detects the presence/absence of the adapter via a terminal AD. The power unit <b>310</b> provides a signal to the protection controller <b>302</b> as well as the charge controller <b>306</b> to indicate whether the adapter exists. If the adapter exists, the charge controller <b>306</b> sets the terminal HDR as the PWM signal to enable the charging function. Also, the protection controller <b>302</b> sets the terminal DO to an OFF state to disable the discharging function. If the adapter is absent, the protection controller <b>302</b> sets the terminal DO to an ON state to enable the discharging function and the charge controller <b>306</b> sets the terminal HDR to an OFF state to disable the charging function. The power unit <b>310</b> is supplied with voltages from the terminals AD and VCC. Then the power unit <b>310</b> generates a voltage and applies this voltage to a terminal LV of the power management unit <b>130</b>A.
0038The power management unit <b>130</b>A also includes a regulator <b>380</b> and drivers <b>382</b> and <b>384</b>. The regulator <b>380</b> and the drivers <b>382</b> and <b>384</b> are supplied with the voltage from the terminal VCC. The regulator <b>380</b> converts the voltage from the terminal VCC to a lower voltage and supplies the lower voltage to the derivers <b>382</b> and <b>384</b> as well as a terminal CL. The driver <b>382</b> is controlled by a control signal from the protection controller <b>302</b>. The driver <b>384</b> is controlled by a control signal from the charge controller <b>306</b>. The terminal DO can be set to an ON/OFF state by setting the driver <b>382</b> at the voltage value of the terminal VCC/CL. Similarly, the terminal HDR can be set to an ON/OFF state by setting the driver <b>384</b> at the voltage value of the terminal VCC/CL.
0039Since the battery <b>112</b> is connected between the terminal BAT and BAT<b>2</b>, a voltage detector <b>330</b> is coupled between the terminal BAT and BAT<b>2</b> to detect the voltage of the battery <b>112</b>. The voltage detector <b>330</b> sends a signal indicative of the voltage of the battery <b>112</b> to the protection controller <b>302</b>. A voltage detector <b>340</b> is coupled between the terminal BAT<b>2</b> and the ground to detect the voltage of the battery <b>114</b>. The voltage detector <b>340</b> sends a signal indicative of the voltage of the battery <b>114</b> to the protection controller <b>302</b>.
0040The voltage detector <b>330</b> includes reference voltage sources <b>332</b> and <b>334</b> and comparators <b>336</b> and <b>338</b>. The reference voltage source <b>332</b> and <b>334</b> are used to generate a permitted highest voltage and a permitted lowest voltage to regulate a predetermined voltage range. The comparators <b>336</b> and <b>338</b> are used to compare the voltage of the battery <b>112</b> with the predetermined voltage range. If the battery voltage is within the predetermined voltage range, the battery voltage detector <b>330</b> sends a signal (logic 0) to the protection controller <b>302</b>. If the battery voltage is outside the predetermined voltage range, such as larger than the permitted highest voltage or smaller than the permitted lowest voltage, another signal (logic 1) will be applied to the protection controller <b>302</b> to indicate an abnormal voltage of the battery <b>112</b>. During the discharging process, the protection controller <b>302</b> sends a control signal to the driver <b>382</b> to sets the terminal DO to an OFF state if the protection controller <b>302</b> receives the signal indicating the abnormal voltage. Thus the discharging process will be terminated. During the charging process, the protection controller <b>302</b> sends a signal to the charge controller <b>306</b> if the protection controller <b>302</b> receives the signal indicating the abnormal voltage. Then the charge controller <b>306</b> applies a control signal to the driver <b>384</b> to set the terminal HDR to an OFF state to terminate the charging process.
0041The voltage of the battery <b>114</b> is also detected simultaneously by the voltage detector <b>340</b> in a similar manner. The voltage detector <b>340</b> has a similar topology with the voltage detector <b>330</b>, including reference voltages <b>342</b> and <b>344</b> used to regulate a predetermined voltage range. The voltage detector <b>340</b> also includes comparators <b>346</b> and <b>348</b> to compare the battery voltage with the predetermined voltage range. If the voltage of the battery <b>114</b> exceeds the predetermined voltage range, the working mode of the power system <b>120</b> will be terminated. The predetermined voltage ranges of the batteries <b>112</b> and <b>114</b> may be different because the predetermined voltage ranges can be set separately based on the different property of the batteries <b>112</b> and <b>114</b>. Thus, we can protect the batteries <b>112</b> and <b>114</b> from excessive high/low voltages.
0042A delay unit <b>304</b> may be coupled between the protection controller <b>302</b> and the voltage detectors <b>330</b> and <b>340</b>. With the delay unit <b>304</b>, the signals from the voltage detectors <b>330</b> and <b>340</b> are sent to the protection controller <b>302</b> after a time delay. In case any momentary abnormal voltage that does not affect the battery performance, the delay unit <b>304</b> postpones the protection operation activated by the protection controller <b>302</b>. The delay time period should be set at a proper value. If the abnormal voltage situation lasts longer than the delay time period, the protection operation such as terminating the working mode of the power system <b>120</b> will be activated.
0043When the power system <b>120</b> is in operating, the current flowing through the batteries is also monitored to prevent an excessive large current from destroying the batteries <b>112</b> and <b>114</b> or the power system <b>120</b>. The voltage drop on the resistor <b>126</b> is monitored by the power management unit <b>130</b>A at the terminals SNS and BAT. The current can be obtained from the voltage and the resistance of the resistor <b>126</b>. A current detector <b>320</b> is employed to detect if the voltage of the resistor <b>126</b> is too large.
0044The current detector <b>320</b> includes a reference voltage source Vref, amplifiers <b>322</b> and <b>324</b> and comparators <b>326</b> and <b>328</b>. When the power system <b>120</b> is working in the discharging mode, the comparator <b>328</b> sends a signal (logic 1) to the protection controller <b>302</b> if the voltage drop on the resistor <b>126</b> is larger than the reference voltage Vref. Then the protection controller <b>302</b> will send a control signal to the driver <b>382</b> to set the terminal DO to an OFF state. Thus, the discharging mode is terminated.
0045When the power system <b>120</b> is working in the charging mode, the voltage on the resistor <b>126</b> is also transferred to a current detector <b>350</b> that is coupled to the charge controller <b>306</b>. The current detector <b>350</b> includes a reference voltage source <b>352</b>, an amplifier <b>354</b> and comparators <b>356</b> and <b>358</b>. If the voltage of the resistor <b>126</b> is higher than the reference voltage <b>352</b>, the current detector <b>350</b> outputs a control signal to the charge controller <b>306</b>. The charge controller <b>306</b> then set the terminal HDR to an OFF state to terminate the charging mode. In this operation, if the current flowing through the batteries is higher than a predetermined value, the working mode is terminated instantly to protect the power system <b>120</b> from damage of over current.
0046The efficiencies and life-spans of the rechargeable batteries may be affected if the batteries are charged when the battery temperature is excessive high/low. So it is crucial to protect the rechargeable batteries <b>112</b> and <b>114</b> from excessive high/low temperatures during the charging process. The management unit <b>130</b>A provides a function of protecting the batteries <b>112</b> and <b>114</b> from excessive high/low temperature. A temperature detector. <b>360</b> is coupled between the charge controller <b>306</b> and the terminal THM of the power management unit <b>130</b>A. The voltage of the thermistor <b>122</b> (shown in <figref idref="DRAWINGS">FIG. 1</figref>) is indicative of the surface temperature of the batteries <b>112</b> and <b>114</b>. The voltage is transferred to the temperature detector <b>360</b> via the terminal THM. Then the temperature detector <b>360</b> applies a signal to the charge controller <b>306</b> to control the charging process.
0047The temperature detector <b>360</b> includes a current source <b>362</b>, a reference voltage source Vref, resistors <b>364</b>, <b>366</b> and <b>368</b>, comparators <b>370</b> and <b>372</b> and an OR gate <b>374</b>. The current source <b>362</b> is coupled between the terminal THM and the resistor <b>364</b>. The states of the current source <b>362</b> are controlled by the charge controller <b>306</b>. When the power system <b>120</b> is working in the charging mode, the current source <b>362</b> is turned on by a signal from the charge controller <b>306</b>. The current source <b>362</b> supplies a current via the terminal THM to the thermistor <b>122</b>. The voltage of the thermistor <b>122</b> is transferred to the comparators <b>370</b> and <b>372</b> via the terminal THM. The resistors <b>364</b>, <b>366</b> and <b>368</b> are connected in series for obtaining divided reference voltages to regulate a permitted voltage range. If the voltage of the thermistor <b>122</b> is out of the permitted voltage range, one of the comparators <b>370</b> and <b>372</b> applies a signal at logic 1 to the OR gate <b>374</b>. Thus the OR gate <b>374</b> sends a signal at logic 1 to the charge controller <b>306</b>. Then, the charge controller will send a control signal to the driver <b>384</b> to set the terminal HDR to an OFF state. Thus the charging mode will be stopped. It is appreciated by those skilled in the art that during the charging process, if the temperature of the batteries is excessive high/low, the charging process is terminated to protect the batteries from damage. When the battery temperature recovers to a permitted value, the charging process can be activated again by setting the terminal HDR as the PWM signal.
0048<figref idref="DRAWINGS">FIG. 4</figref> depicts another embodiment of the power management unit <b>130</b>. In this figure, the same components as in <figref idref="DRAWINGS">FIG. 3</figref> are indicated by the same reference numerals for clarity. In this embodiment, a rechargeable battery <b>112</b> is designed to be connected to the power system <b>120</b> between the terminal BAT and the ground. All the functions, such as voltage detecting, current detecting and battery temperature sensing are implemented in the same manner as those in <figref idref="DRAWINGS">FIG. 3</figref>. Hence, the similar description is simplified herein for clarity.
0049The battery voltage detector <b>330</b> is coupled between the terminal BAT and the protection controller <b>302</b>. The voltage detector <b>330</b> monitors the voltage of the battery <b>112</b> (shown in <figref idref="DRAWINGS">FIG. 1</figref>). If the battery voltage exceeds the predetermined range, the protection controller <b>302</b> sets the terminal DO to an OFF state to stop the working mode of the power system <b>120</b>. The current detector <b>350</b> detects the current of the battery <b>112</b> and protects the power system <b>120</b> from an excessive large current. The temperature detector <b>360</b> prevents the power system <b>120</b> from charging the battery <b>112</b> in an excessive high/low temperature condition.
0050In the present invention, a plurality of reference voltages is needed. The power management unit <b>130</b> includes a trim translation unit <b>500</b> (not shown in <figref idref="DRAWINGS">FIGS. 3 and 4</figref>) and a trimming unit (not shown in the FIGS.) to generate the plurality reference voltages. The trim translation unit <b>500</b> receives the voltage from the adapter and generates standard trimming signals to the trimming unit. The trimming unit then generates a plurality of reference voltages based on the trimming signals from the trim translation unit <b>500</b>. The trimming unit also provides signals to adjust the delay time of the delay unit <b>304</b> and internal oscillator frequencies.
0051<figref idref="DRAWINGS">FIG. 5</figref> depicts a block diagram of the trim translation unit <b>500</b>. The trim translation unit <b>500</b> includes an input port <b>502</b> coupled to the terminal THM to receive a signal CLK, an input port <b>504</b> coupled to the terminal AD to receive a signal DATA, an input port <b>506</b> to receive a control signal and an input port <b>508</b> to receive a signal PDB. The trim translation unit <b>500</b> includes a latch circuit usually a RS flip-flop <b>510</b>, a plurality of D flip-flops <b>512</b>, <b>514</b>, <b>516</b>, <b>518</b> and <b>520</b> and a selector <b>522</b>. The trim translation unit <b>500</b> includes a port <b>582</b> to output a signal PW<b>1</b>, a port <b>584</b> to output a signal RESETN, a port <b>586</b> to output a signal CLK<b>2</b> and a port <b>588</b> to output a signal CLK<b>1</b>.
0052The input signals CLK and DATA are supplied to a NAND gate <b>530</b>. A NAND gate <b>532</b> receives a signal from the input port <b>506</b> and the output signal of the NAND gate <b>530</b> to generate a RSTN signal. The RSTN signal is supplied to the D flip-flops <b>512</b>, <b>514</b>, <b>516</b>, <b>518</b> and <b>520</b>. If the signal at the input port <b>506</b> is set to logic 1, the trim translation unit <b>500</b> is activated to work by the RSTN signal. If the signal at the input port <b>506</b> is set to logic 0, the trim translation unit <b>500</b> stops working.
0053When the trim translation unit <b>500</b> starts to work, the signals DATA and CLK at a first duty cycle of the CLK signal are used to decide an operation mode. The input signals CLK and DATA are supplied to the RS flip-flop <b>510</b> via inverters separately. The RS flip-flop <b>510</b> output a signal DATA<b>1</b>. The signal DATA<b>1</b> is set to logic 0 if the signal CLK is at logic 1 and the signal DATA is at logic 1 during the first duty cycle. The signal DATA<b>1</b> is applied to the D flip-flop <b>516</b> to generate a signal MODE at logic 0. The signal MODE at logic 0 is applied to an AND gate <b>542</b> to generate a signal READ at logic 0. Since the signal CLK is at logic 1, the D flip-flop <b>518</b> generates a signal ZAP at logic 1. Thus, the trim translation unit <b>500</b> will work in a ZAPPING mode after the first duty cycle.
0054When the trim translation unit <b>500</b> is working in the ZAPPING mode, the signal MODE and the signal READ are set to logic 0. An AND gate <b>544</b> receives the signal MODE to generate a signal at logic 0 to an OR gate <b>546</b>. The OR gate <b>546</b> also has an input signal CLK. Thus the OR gate <b>546</b> generates a signal having a same waveform as the signal CLK. Since the signal ZAP is at logic 1, an OR gate <b>548</b> generates a signal at logic 1 with the input signals ZAP and READ. An AND gate <b>550</b> receives the signals from the OR gates <b>546</b> and <b>548</b> and generates the signal CLK<b>1</b> at the port <b>588</b>. Thus, the signal CLK<b>1</b> has a waveform same as the waveform of the signal CLK. An AND gate <b>540</b> has two input signals, one is DATA<b>1</b> and the other is an output signal of the D flip-flop <b>516</b>. Since the signal MODE is at logic 0, the output signal PW<b>1</b> of the AND gate <b>540</b> is a pulse wave having positive pulse when the signal DATA has a negative pulse. At the falling edge of the first duty cycle of the signal CLK, the D flip-flop <b>512</b> set the output signal RESENTN to logic 1.
0055During the first duty cycle, the output signal DATA<b>1</b> of the RS flip-flop <b>510</b> has a positive pulse if the input signal DATA has a negative pulse. Thus, the D flip-flop <b>516</b> sets the signal MODE to logic 1. The AND gate <b>542</b> sets the signal READ to logic 1. Then the trim translation unit <b>500</b> will work in a READ mode.
0056When the trim translation unit <b>500</b> is working in the READ mode, the output signal MODE of the D flip-flop <b>516</b> and the signal READ are set to logic 1. The output signal PW<b>1</b> of the AND gate <b>540</b> is set to logic 0. Since the input signal PDB at the port <b>508</b> is set to logic 1 during the READ mode, the AND gate <b>544</b> receives the signals MODE and PDB to generate a signal having a same waveform as the signal MODE. The signal MODE is set to logic 1 at a falling edge of the input signal DATA. Then the OR gate <b>546</b> sets the output signal having the same waveform as the signal MODE to the AND gate <b>550</b>. The OR gate <b>548</b> sends the signal at logic 1 to the AND gate <b>550</b>. Thus the AND gate <b>550</b> sets the signal CLK<b>1</b> to logic 1 at the falling edge of the input signal DATA during the first duty cycle. The selector <b>522</b> is coupled to the D flip-flop <b>520</b> to output a signal CLK<b>2</b> at the port <b>586</b>. The selector <b>522</b> has one control signal PDB and two input signals, CLK and the output signal of the D flip-flop <b>520</b>. Since the signal PDB is set to logic 1 during the READ mode, the selector <b>522</b> selects the input signal CLK at a terminal IN<b>0</b> as an output signal. Thus the signal CLK<b>2</b> has a waveform same as the signal CLK after the first duty cycle.
0057When the READ mode ends, the trim translation unit <b>500</b> starts a QUASI-ZAPPING mode automatically. Then the output signal MODE of the D flip-flop <b>516</b> is set to logic 0. The output signal of the OR gate <b>546</b> is set to have a waveform same as the signal CLK. Thus, the output signal CLK<b>1</b> has a waveform same as the signal CLK during the QUASI-ZAPPING mode. The PDB signal is set to logic 0 to drive the selector <b>522</b> selecting an input signal at a terminal IN<b>1</b> as the output signal CLK<b>2</b>. Thus, if the signal DATA has a negative pulse when the signal CLK is at logic 1 of a duty cycle, the signal CLK<b>2</b> will be set to logic 1 during the next duty cycle.
0058<figref idref="DRAWINGS">FIG. 6</figref> depicts waveforms <b>600</b> when the trim translation unit <b>500</b> is working in the ZAPPING mode. Waveforms <b>610</b>, <b>620</b>, <b>630</b>, <b>640</b>, <b>650</b> and <b>660</b> illustrates the signal CLK, the signal DATA, a signal PROG, the signal RESETN, the signal CLK<b>1</b> and the signal PW<b>1</b>, respectively. The waveforms at the first duty cycle, cycle 0 of the signal CLK <b>610</b> are for mode decision. Since both of the signals CLK <b>610</b> and DATA <b>620</b> are at logic 1 during the cycle 0, the trim translation unit <b>500</b> works in the ZAPPING mode. The signal PROG <b>630</b> is set to logic 1 after cycle 0. The signal RESETN <b>640</b> is set to logic 1 at the falling edge of cycle 0 of the CLK signal <b>610</b>. The signal CLK<b>1</b><b>650</b> has a waveform same as the signal CLK <b>610</b> from cycle <b>2</b>. The signal PW<b>1</b><b>660</b> has positive pulses if the signal DATA <b>620</b> has negative pulses.
0059<figref idref="DRAWINGS">FIG. 7</figref> depicts waveforms <b>700</b> when the trim translation unit <b>500</b> is working in the READ mode. Waveforms <b>710</b>, <b>720</b>, <b>730</b>, <b>740</b>, <b>750</b>, <b>760</b> and <b>770</b> illustrates the signal CLK, the signal DATA, the signal PROG, the signal RESETN, the signal CLK<b>1</b>, the signal CLK<b>2</b> and the signal PW<b>1</b>, respectively. The waveforms at the first duty cycle, cycle 0 of the signal CLK <b>710</b> are for mode decision. During cycle 0, the signal CLK <b>710</b> is to logic 1 and the signal DATA <b>720</b> has a negative pulse, the trim translation unit <b>500</b> works in the READ mode. The signal PROG <b>730</b> is set to logic 1. The signal RESETN <b>740</b> is set to logic 1 at the falling edge of cycle <b>0</b> of the signal CLK <b>710</b>. The signal CLK<b>1</b><b>750</b> is set to logic 1 at the falling edge of the negative pulse of the signal DATA <b>720</b> during cycle <b>0</b>. The signal CLK<b>2</b><b>760</b> has a waveform same as the signal CLK <b>710</b>. The signal PW<b>1</b><b>660</b> is set to logic 0.
0060<figref idref="DRAWINGS">FIG. 8</figref> depicts waveforms <b>800</b> when the trim translation unit <b>500</b> is working in the READ mode and then working in the QUASI-ZAPPING mode. Waveforms <b>810</b>, <b>820</b>, <b>830</b>, <b>840</b>, <b>850</b>, <b>860</b>, <b>870</b>, <b>880</b> illustrates the signal CLK, the signal DATA, the signal PROG, the signal PDB, the signal RESETN, the signal CLK<b>1</b>, the signal CLK<b>2</b> and the signal PW<b>1</b> respectively. When the READ mode ends at a cycle N of the signal CLK <b>810</b>, the trim translation unit <b>500</b> enters the QUASI-ZAPPING mode automatically. In the QUASI-ZAPPING mode, the signal PDB <b>840</b> is set to logic 0. The signal CLK<b>1</b><b>860</b> has a waveform same as the signal CLK <b>810</b> after the cycle N. The signal CLK<b>2</b><b>870</b> is set to logic 1 for a duty cycle time period if the signal DATA has a negative pulse. The signal PW<b>1</b><b>880</b> is set to logic 0.
0061<figref idref="DRAWINGS">FIG. 9</figref> depicts a portable computer <b>900</b> utilizing the power system <b>120</b> in <figref idref="DRAWINGS">FIG. 1</figref>. The portable computer <b>900</b> includes an input port <b>902</b>, a power system <b>920</b>, a rechargeable battery <b>912</b>, an input device <b>930</b> and a microcontroller <b>940</b>. The input port <b>902</b> is for connecting to an external power source such as an adapter. The power system <b>920</b> is an exemplary embodiment of the power system according to the present invention. The power system <b>920</b> is connected to the battery <b>912</b> to manage charging, discharging and protection functions of the battery <b>912</b>. The input device <b>930</b> takes inputs from a user and provides the inputs to the microcontroller <b>940</b>. The microcontroller <b>940</b> performs operations based on the inputs from the user.
0062If the adapter is coupled to the power system <b>920</b>, then the power system <b>920</b> is working in a charging mode. The adapter supplies power to the portable computer <b>900</b>. The adapter also charges the battery <b>912</b> under control of the power system <b>920</b>. If the adapter is absent, then the power system <b>920</b> is working in a discharging mode. The battery <b>912</b> supplies power to the input device <b>930</b> and the micro controller <b>940</b>. During the operating mode, including the charging mode and the discharging mode, the power system <b>920</b> monitors a temperature, a voltage and a current of the battery <b>912</b>. If an abnormal condition occurs, such as the temperature is excessive high/low, the voltage is excessive high/low or the current is too high, the power system <b>920</b> will stop the operating mode to protect the portable computer <b>900</b>.
0063In operation, the adapter is coupled to the power system <b>120</b>. The power management unit <b>130</b> sets the terminal HDR as the pulse width modulation (PWM) signal. Then the circuit <b>100</b> is working in the charging mode. During the charging process, the power management unit <b>130</b> monitors the battery temperature, the battery current and the battery voltages through temperature detector <b>360</b>, current detectors <b>320</b> and <b>350</b> and voltage detectors <b>330</b> and <b>340</b> respectively.
0064When the power system <b>120</b> is working in the charging mode, the power management unit <b>130</b> monitors the battery temperature to protect the power system <b>120</b> from charging the batteries <b>112</b> and <b>114</b> in an excessive high/low temperature. The voltage of the thermistor <b>122</b> is indicative of the battery temperature. The voltage is sensed by the power management unit <b>130</b>. The temperature detector <b>360</b> compares the voltage with the predetermined voltage range. If the voltage of the thermistor <b>122</b> is within the predetermined voltage range, the temperature detector <b>360</b> applies a signal at logic 0 to the charge controller <b>306</b>. If the voltage of the thermistor <b>122</b> is out of the predetermined voltage range, the temperature detector <b>360</b> applies a signal at logic 1 to the charge controller <b>306</b>. Then the charge controller <b>306</b> set the terminal HDR to an OFF state to turn off the charge switch <b>150</b>. Thus the charging mode is terminated to protect the power system <b>120</b>.
0065If the power system <b>120</b> is working under a normal condition, the adapter charges the batteries <b>112</b> and <b>114</b> continuously. The voltage detectors <b>330</b> and <b>340</b> monitor the voltages of the batteries <b>112</b> and <b>114</b>. If the battery <b>112</b> and/or <b>114</b> is charged to a predetermined value, the voltage detector <b>330</b> applies a signal to the protection controller <b>302</b>. The protection controller <b>302</b> sends a signal to the charge controller <b>306</b> to set the terminal HDR to an OFF state. Then the charge switch <b>150</b> is turned off to terminate the charging process. During the charging process, the power management unit <b>130</b> also monitors the battery current. If the current exceeds a predetermined value, the charge controller <b>306</b> will set the terminal HDR to an OFF state to terminate the charging process.
0066If the adapter is absent, then the circuit <b>100</b> works in the discharging mode. The terminal DO is set to an ON state and the terminal HDR is set to an OFF state. The batteries <b>112</b> and <b>114</b> supply power to the system load through the switching circuit <b>145</b>. During the discharging process, the power management unit <b>130</b> monitors the battery current and the battery voltages through current detectors <b>320</b> and <b>350</b> and voltage detectors <b>330</b> and <b>340</b> respectively. If an abnormal condition occurs, such as the current is higher than a predetermined value, the current detector <b>320</b> applies a signal at logic 1 to the protection controller <b>302</b>. The protection controller <b>302</b> then set the terminal DO to an OFF state to switching off the switching circuit <b>145</b>. Thus the discharging process is terminated.
0067The embodiments that have been described herein, however, are but some of the several that utilize this invention and are set forth here by way of illustration but not of limitation. It is obvious that many other embodiments, which will be readily apparent to those skilled in the art, may be made without departing materially from the spirit and scope of the invention as defined in the appended claims. Furthermore, although elements of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
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| US12431717B2 | Cited by | United States of America | Applicant |
| US2015236535A1 | Cited by | United States of America | Pre-grant |
| CN106740188A | Cited by | China | Search report |
| US12401216B2 | Cited by | United States of America | Search report |
| US8612782B2 | Cited by | United States of America | Applicant |
| US2009037754A1 | Cited by | United States of America | Pre-grant |
| US10705593B2 | Cited by | United States of America | Search report |
| US2009251107A1 | Cited by | United States of America | Pre-grant |
| US2015103868A1 | Cited by | United States of America | Pre-grant |
| US8577056B2 | Cited by | United States of America | Applicant |
| ITMI20120333A1 | Cited by | Italy | Search report |
| US8049469B2 | Cited by | United States of America | Search report |
| US2005285572A1 | Cites | United States of America | Pre-grant |
| US6208117B1 | Cites | United States of America | Pre-grant |
| US6329796B1 | Cites | United States of America | Pre-grant |
| US6441592B1 | Cites | United States of America | Pre-grant |
6 members in 3 offices; this record represents the family
Members6
| Document | Office | Kind | |
|---|---|---|---|
| US2008150488A1 | United States of America | A1 | |
| CN101252287A | China | A | |
| TW200842389A | Taiwan Province of China | A | |
| US7737662B2 | United States of America | B2 | |
| TWI340516B | Taiwan Province of China | B | |
| CN101252287B | China | B |
35 transactions on the USPTO file
Allowed after 1 non-final rejection and 1 final rejection.
- Non-final rejections
- 1
- Final rejections
- 1
- RCEs
- 0
- Appeals
- 0
Over time
Point at a mark for the transactionTransactions
| Event | Code | |
|---|---|---|
| Payment of Maintenance Fee, 12th Yr, Small EntityM2553 | M2553 | |
| Payment of Maintenance Fee, 8th Yr, Small EntityM2552 | M2552 | |
| Applicant Has Filed a Verified Statement of Small Entity Status in Compliance with 37 CFR 1.27SMAL | SMAL | |
| Correspondence Address ChangeC.ADB | C.ADB | |
| Recordation of Patent Grant MailedPGM/ | PGM/ | |
| Patent Issue Date Used in PTA CalculationAllowedPTAC | PTAC | |
| Issue Notification MailedAllowedWPIR | WPIR | |
| Dispatch to FDCD1935 | D1935 | |
| Application Is Considered Ready for IssuePILS | PILS | |
| Issue Fee Payment VerifiedN084 | N084 | |
| Issue Fee Payment ReceivedIFEE | IFEE | |
| Mail Notice of AllowanceAllowedMN/=. | MN/=. | |
| Notice of Allowance Data Verification CompletedAllowedN/=. | N/=. | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Final ActionA.NE | A.NE | |
| Mail Final Rejection (PTOL - 326)Final rejectionMCTFR | MCTFR | |
| Final RejectionFinal rejectionCTFR | CTFR | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Response after Non-Final ActionA... | A... | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| PG-Pub Issue NotificationPG-ISSUE | PG-ISSUE | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Correspondence Address ChangeC.ADB | C.ADB | |
| IFW TSS Processing by Tech Center CompleteTSSCOMP | TSSCOMP | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Sent to Classification ContractorPGPC | PGPC | |
| Application Is Now CompleteCOMP | COMP | |
| Additional Application Filing FeesADDFLFEE | ADDFLFEE | |
| A statement by one or more inventors satisfying the requirement under 35 USC 115, Oath of the ApplicOATHDECL | OATHDECL | |
| Notice Mailed--Application Incomplete--Filing Date AssignedINCD | INCD | |
| Cleared by OIPE CSRL194 | L194 | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Initial Exam Team nnIEXX | IEXX |
8 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Maintenance fee paymentMAFP | MAFP | |
| Maintenance fee paymentMAFP | MAFP | |
| Fee payment procedurePAT HOLDER CLAIMS SMALL ENTITY STATUS, ENTITY STATUS SET TO SMALL (ORIGINAL EVENT CODE: LTOS)FEPP | FEPP | |
| Fee paymentFPAY | FPAY | |
| Information on status: patent grantGrantedPATENTED CASESTCF | STCF | |
| AssignmentAS | AS | |
| AssignmentAS | AS | |
| AssignmentAS | AS |
Numbers
- Publication
- 20080150488
- Application
- 11645491
Titles
- English
- Power management circuit for battery pack
Patent term adjustment
- A delay
- +429 daysthe office missed an examination deadline
- B delay
- +171 dayspendency past three years
- Net adjustment
- 600 days
Classification
- CPC, 6
- H02J7/663
- H02J7/64
- H02J7/63
- H02J7/65
- H02J7/62
- H02J7/60
- IPC, 1
- H02J7 00