Integration of FBAR filter(s) and on-chip inductors
20 claims: 3 independent, 17 dependent
- 1Broadest claimClaim Score 95, very broad(NHIP)An apparatus comprising:a die;a first FBAR integrated on the die to contribute in forming of a FBAR filter;and an inductor integrated on the die, with the inductor being electrically coupled to the first FBAR.
- 12A method comprising:depositing and patterning a first metal layer, with a portion of which forming an inductor;forming a via to expose a portion of the inductor;depositing a second metal layer, with at least a portion being deposited over the via, to electrically couple the second metal layer to the inductor;and depositing a third metal layer, with at least a portion being deposited over the second metal layer, the corresponding portions of the second and third metal layers contributing in forming a part of a first FBAR, and another portion of the third metal layer contributing in forming a part of a second FBAR.
- 15A system comprising:a component comprising a die, a first FBAR integrated on the die to contribute in forming of a FBAR filter, and an inductor integrated on the die, with the inductor being electrically coupled to the first FBAR;and a signal processor coupled to the communication interface.
Independent claims3
35 paragraphs in 3 sections, as filed
TECHNICAL FIELD & BACKGROUND
0001The present invention is related to the field of Microelectromechanical Systems (MEMS). More specifically, the present invention is related to integration of film bulk acoustic resonators (FBAR) filters with on-chip inductors.
0002Radio frequency (RF) front-end passives, such as transceivers and receivers are increasingly needed for wireless communication. These front-end passives include front-end filters. RF front-end filters consist of FBAR have been found to have a number of advantages over other technologies, such as surface acoustic wave (SAW) devices and ceramic filters, particularly at relatively high frequencies. A FBAR filter typically consists of series FBARs as well as shunt FBARs. The bandwidth of a FBAR filter is typically limited by the electromechanical coupling (K<sup>2</sup>) of piezoelectric materials. For example, the electromechanical coupling (K<sup>2</sup>) of polycrystalline ZnO films is about 4%, depending on the film's crystal orientation and quality.
BRIEF DESCRIPTION OF THE DRAWINGS
0003The present invention will be described by way of exemplary embodiments, but not limitations, illustrated in the accompanying drawings in which like references denote similar elements, and in which:
0004<figref idref="DRAWINGS">FIG. 1</figref> illustrates a cross sectional view of a portion of a component with two FBARs and an on-chip inductor, in accordance with one embodiment;
0005<figref idref="DRAWINGS">FIG. 2</figref> illustrates an exposed top view of the inductor of <figref idref="DRAWINGS">FIG. 1</figref> in accordance with one embodiment;
0006<figref idref="DRAWINGS">FIGS. 3</figref><i>a</i>-<b>3</b><i>f </i>illustrate a method for making the on-chip inductor and the FBAR of <figref idref="DRAWINGS">FIG. 1</figref>, in accordance with one embodiment; and
0007<figref idref="DRAWINGS">FIG. 4</figref> illustrates a system having the component of <figref idref="DRAWINGS">FIG. 1</figref> in accordance with one embodiment.
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
0008Embodiments of the present invention include, but are not limited to, a component having FBAR filter(s) and on-chip inductors, method for making such component, and system having such component.
0009Various aspects of the illustrative embodiments will be described using terms commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art. However, it will be apparent to those skilled in the art that the present invention may be practiced with only some of the described aspects. For purposes of explanation, specific numbers, materials and configurations are set forth in order to provide a thorough understanding of the illustrative embodiments. However, it will be apparent to one skilled in the art that the present invention may be practiced without the specific details. In other instances, well-known features are omitted or simplified in order not to obscure the illustrative embodiments.
0010Various operations will be described as multiple discrete operations, in turn, in a manner that is most helpful in understanding the present invention, however, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation.
0011The phrase “in one embodiment” is used repeatedly. The phrase generally does not refer to the same embodiment, however, it may. The terms “comprising”, “having” and “including” are synonymous, unless the context dictates otherwise.
0012Referring now to <figref idref="DRAWINGS">FIG. 1</figref>, wherein a cross sectional view of a portion of a component having a FBAR filter and an on-chip inductor in accordance with one embodiment is shown. As illustrated, for the embodiment, component <b>100</b> includes a FBAR filter having series FBAR <b>102</b> and shunt FBAR <b>104</b>. Further, component <b>100</b> includes on-chip inductor <b>106</b> electrically coupled to FBAR <b>102</b> and <b>104</b>, and cavity <b>108</b> exposing undersides of the metal layers employed to form on-chip inductor <b>106</b> (hereinafter, simply inductor), and FBAR <b>102</b> and <b>104</b>.
0013Resultantly, the FBAR filter may be responsive to signals over a wider bandwidth, without the needs of disposing long line inductors on a circuit board on which component <b>100</b> is to be mounted, and coupling the long line inductors to FBARs <b>102</b> and <b>104</b>.
0014As illustrated, for the embodiment, inductor <b>106</b> is formed on a portion of metal layer <b>112</b>, which is exposed by via <b>122</b>. Further, for the embodiment, inductor <b>106</b> is of a coil type (see also <figref idref="DRAWINGS">FIG. 2</figref> which illustrates an exposed top view of inductor <b>106</b> formed on top of passivation layer <b>144</b><i>a, </i>without the higher layers). In alternate embodiments, inductor <b>106</b> may have a different form factor.
0015Series FBAR <b>102</b>, more specifically, its bottom electrode, is formed on a portion of metal layer <b>116</b>. Its top electrode is formed by metal <b>132</b>. Shunt FBAR <b>104</b>, more specifically, its bottom electrode, on the other hand, is formed with corresponding portions of metal layer <b>114</b> and <b>116</b>. Its top electrode is formed by metal <b>134</b>. The portion of metal layer <b>116</b> contributing in the forming of shunt FBAR <b>104</b> has a thickness that is thicker than the thickness of the portion of metal layer <b>116</b> contributing in the forming of series FBAR <b>102</b>.
0016For the embodiment, metal layer <b>116</b> is electrically coupled to metal layer <b>114</b>, which except for the portion disposed in via <b>122</b>, is generally separated from metal layer <b>112</b> by inter-layer dielectric layer <b>124</b>. By virtue of metal layer <b>114</b> being electrically coupled to via <b>122</b>, metal layer <b>116</b> is also in electrical contact with metal layer <b>112</b>. Further, top electrode <b>132</b> of series FBAR <b>102</b> is also in electrical contact with metal layer <b>112</b>. [Note that these electrical connections are circuit dependent. In other applications or embodiments, series FBAR <b>102</b> and shunt FBAR <b>104</b> may be electrically coupled to each other and other circuit elements in other manners.]
0017In various embodiments, each of metal layers <b>112</b>, <b>114</b> and <b>116</b> may be formed employing a metal such as aluminum (Al), molybdenum (Mo), platinum (PI), or other materials with like properties.
0018In various embodiments, metal layer <b>112</b> is a relatively thick metal layer, with a thickness greater than 0.7 μm.
0019In various embodiments, the inter-layer dielectric layer may be formed employing dielectric material such as silicon oxide (SiO<sub>2</sub>) or other dielectic materials of like properties.
0020It should be noted that while for ease of understanding, only two FBAR <b>102</b>-<b>104</b> and one inductor <b>106</b> are shown in <figref idref="DRAWINGS">FIG. 1</figref>, in alternate embodiments, component <b>100</b> may include more or less FBAR and/or inductors.
0021<figref idref="DRAWINGS">FIGS. 3</figref><i>a</i>-<b>3</b><i>f </i>illustrate a method of making component <b>100</b> in accordance with one embodiment. The method reflects the desired electrical connections between the top and bottom electrodes of series FBAR <b>102</b> and shunt FBAR <b>104</b> and other circuit elements of the embodiment. In alternate embodiments, the method may be modified to accommodate other desired electrical connections between the top and bottom electrodes of series FBAR <b>102</b> and shunt FBAR <b>104</b> and other circuit elements.
0022For the embodiment, passivation layer <b>144</b><i>a </i>and hard mask <b>144</b><i>b </i>are first deposited on a top side and a bottom side of substrate <b>142</b> respectively, op <b>302</b>. In various embodiments, substrate <b>142</b> may be a silicon (Si) substrate, and passivation layer and hard mask <b>144</b><i>a</i>-<b>144</b><i>b </i>may be formed employing silicon nitride (SiN), deposited through low pressure chemical vapor deposition (LPCVD).
0023Next, metal layer <b>112</b>, including inductor <b>106</b>, may be formed by deposition and patterning, op <b>304</b>. In various embodiments, portions of metal layer <b>112</b> are also patterned to form bonding pads of component <b>100</b>.
0024Then, inter-layer dielectric layer <b>124</b> is formed on top of metal layer <b>112</b> by deposition (and optionally, chemical mechanical polishing (CMP)), and via <b>122</b> is formed by etching, op <b>306</b>.
0025Thereafter, metal layer <b>114</b> is formed on top of a portion of inter-layer dielectric layer <b>124</b>, including via <b>122</b>, op <b>308</b>, by deposition, patterning and etching. Thus, metal layer <b>114</b> is electrically coupled to metal layer <b>112</b> through via <b>122</b>.
0026Next, metal layer <b>116</b> is formed on top of metal layer <b>114</b> and inter-layer dielectric layer <b>124</b> by deposition and patterning, op <b>310</b>. Thus, metal layers <b>114</b> and <b>116</b> are in electrical contact with each other. Further, metal layer <b>116</b> is also in electrical contact with metal layer <b>112</b> through metal layer <b>114</b>. As described earlier, the “thinner” portion of metal layer <b>116</b> forms a part of series FBAR <b>102</b> (bottom electrode), and the corresponding portions of metal layers <b>114</b> and <b>116</b> form a part of shunt FBAR <b>104</b> (bottom electrode). Further, the portion of metal layer <b>116</b> contributing in the forming of shunt FBAR filter <b>104</b> is thicker than the portion contributing in the forming of series FBAR <b>102</b>.
0027Next, another dielectric layer <b>126</b> is deposited on top of metal layer <b>116</b>, op <b>312</b>. The dielectric layer <b>126</b> is etched to create the pad areas <b>120</b>, op <b>312</b>, and the top electrodes are deposited, op <b>312</b>. In various embodiments, dielectric layer <b>126</b> may be an aluminum nitride (AIN) layer.
0028Finally, a series of etching are performed to create the underside cavity <b>108</b> (see <figref idref="DRAWINGS">FIG. 1</figref>). In various embodiments, the etching may be performed employing potassium hydroxide (KOH).
0029<figref idref="DRAWINGS">FIG. 4</figref> illustrates a system in accordance with one embodiment. As illustrated, for the embodiment, system <b>400</b> includes a communication interface <b>402</b> for receiving and sending RF signals. Communication interface <b>402</b> includes a number of components, in particular, a RF transceiver <b>406</b> having front end <b>408</b>. More specifically, for the embodiment, front end <b>408</b> is component <b>100</b> endowed with a FBAR filter, formed with FBAR <b>102</b>-<b>104</b> and complemented by inductor <b>106</b> as earlier described.
0030Further, system <b>400</b> includes digital signal processor <b>404</b> coupled to communication interface <b>402</b> for processing the signals received, and providing communication interface <b>402</b> with the signals to be transmitted.
0031Depending on the applications, system <b>400</b> may include other components, including but are not limited to volatile and non-volatile memory, mass storage (such as hard disk, compact disk (CD), digital versatile disk (DVD) and so forth), and so forth.
0032In various embodiments, system <b>400</b> may be a personal digital assistant (PDA), a wireless mobile phone, a tablet computing device, a laptop computing device, a desktop computing device, a set-top box, an entertainment control unit, a digital camera, a digital video recorder, a CD player, a DVD player, or other digital device of the like.
Conclusion and Epilogue
0033Thus, it can be seen from the above descriptions, a novel component having a FBAR filter with FBAR and on-chip inductor, method for making such a component, and a system having such a component have been described. While the present invention has been described in terms of the foregoing embodiments, those skilled in the art will recognize that the invention is not limited to the embodiments described. The present invention can be practiced with modification and alteration within the spirit and scope of the appended claims.
0034Thus, the description is to be regarded as illustrative instead of restrictive on the present invention.
Contents3
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Numbers
- Publication
- 20050140468
- Publication, DOCDB
- 2005140468
- Publication, EPODOC
- US2005140468
- Application
- 10746022
- Application, DOCDB
- 74602203
- Application, EPODOC
- US20030746022
Titles
- English
- Integration of FBAR filter(s) and on-chip inductors
Classification
- CPC, 3
- H03H9/564
- H03H3/02
- H03H9/0557
- IPC, 3
- H03H3 02
- H03H9 05
- H03H9 56
- USPC, 1
- 333191000
