Method of manufacturing an electronic device
Claim Score by NHIP
Abstract
The existing IC cards have a disadvantage of difficulty of mass production because an IC chip is supplied on a substrate one at a time. The present invention provides a method of manufacturing by placing a positioning jig having a plurality of openings each of which has a size fit with a semiconductor device, providing a plurality of semiconductor devices on said jig to house the devices into the openings, and fixing on a substrate then cutting the substrate to provide independent electronic devices. When the semiconductor device is in a form of chip, a support member attached to the chip will facilitate the handling of chips.

Term
Term ended
Projected expiry passed 18 February 2024, 2.6 years ago.
- Priority
- Filed
- Published
- Projected expiry
- Today
20 claims: 2 independent, 18 dependent
- 1Broadest claimClaim Score 77, broad(NHIP)A method of manufacturing an electronic device, comprising the steps of:placing a positioning jig or frame having a plurality of openings on a film based substrate having adhesive paste thereon;placing a plurality of semiconductor devices into said openings;removing said positioning jig or frame from said film based substrate;winding said film based substrate to form a roll;and cutting said roll into round slices.
- 14A method of manufacturing an electronic device, comprising the steps of:placing a positioning jig or frame having a plurality of openings on a film based substrate having adhesive paste thereon;placing a plurality of semiconductor devices each having a support member into said openings;removing said positioning jig or frame from said film based substrate;winding said film based substrate to form a roll;and cutting said roll into round slices.
Independent claims2
101 paragraphs in 4 sections, as filed
BACKGROUND OF THE INVENTION
0001[0001] 1. Field of the Invention
0002[0002] The present invention relates to a method of manufacturing an electronic device and more particularly to a method of manufacturing an electronic device equipped with a semiconductor integrated circuit, including IC cards, valuable papers, contactless identification devices and the like.
0003[0003] 2. Description of the Prior Art
0004[0004] Recently, some electronic devices are estimated to have a promised potential that these devices, including IC cards equipped with an IC chip, a tag, and an identification devices by radio frequency technology, may incorporate a functionality in addition to the recognition of bar codes of the prior technology.
0005[0005] Now an exemplary method of manufacturing an IC card in accordance with the prior technology will be described with reference to FIGS. <b>14</b>(<i>a</i>) to <b>14</b>(<i>c</i>). As shown in FIG. 14(<i>a</i>) a thin IC chip <b>17</b> will be sucked from a pellet case <b>142</b> by means of a vacuum absorber <b>141</b>. Then the picked up IC chip <b>17</b> will be transferred on an IC card substrate <b>15</b> (base film) having some adhesive paste applied thereon and pressed on it to fix thereon (see FIG. 14(<i>b</i>)). Thereafter the IC chip <b>17</b> attached will be covered by a covering sheet <b>19</b>, as shown in FIG. 14(<i>c</i>)
0006[0006] Another example of attaching a semiconductor chip onto a base film is disclosed in the Japanese Patent Application Laid-Open No. Hei 08-316194. The method disclosed therein will be described with reference to FIGS. <b>2</b>(<i>a</i>) to <b>2</b>(<i>c</i>). In this example, as shown in FIG. 2(<i>a</i>), a plurality of semiconductor chips <b>17</b> having an antenna <b>16</b> is attached on a supporting sheet, these chips <b>17</b> will be pushed on a base film <b>15</b> having paste material <b>14</b> by means of a press head <b>21</b>. Thereby the thin IC chips will be transferred and fixed on the film base as shown in FIG. 2(<i>b</i>). FIG. 2(<i>c</i>) is a cross-section indicating the chip and film encapsulated by an adhesive material <b>18</b> thereafter.
0007[0007] In the prior techniques as have been described above, the productivity is low because an IC chip is attached one at a time on a substrate. For example, in the method shown in FIGS. <b>14</b>(<i>a</i>) to <b>14</b>(<i>c</i>), the improvement of productivity will be limited because each chip is sucked and transferred one at a time. In the prior method shown in FIGS. <b>2</b>(<i>a</i>) to <b>2</b>(<i>c</i>), the press head is registered with each of chips to press one by one, the mechanism of assembly machine will become complex. In addition, a certain gap between two adjoining chips will be required during the transfer. This results in a difficulty of lowering the manufacturing cost.
0008[0008] In addition, if the thickness of IC chips to be delivered is for example equal to or less than 10 micrometers, the IC chip will be curled due to the internal stress of the semiconductor material. Thus, this may cause a damage in the chip, which will deform from a curled shape to a plane shape when sucked. In addition, since the chip is very thin, the sucking force of the vacuum sucker may result in a local deformation of the chip, leading to a change of device characteristics by the stress applied to the devices on the chip.
SUMMARY OF THE INVENTION
0009[0009] The present invention has been made in view of the above circumstances and has an object to overcome the above problems and to provide a method of manufacturing an electronic device, suitable for mass production of such devices equipped with a semiconductor integrated circuit.
0010[0010] Another object of the present invention is to provide a method of manufacturing an electronic device, with a lower cost and a higher reliability.
0011[0011] Yet another object of the present invention is to provide a method of manufacturing an IC chip suitable for the method of manufacturing an electronic device as have been described above and ease in processing.
0012[0012] To achieve the object and in accordance with the purpose of the invention, as embodied and broadly described herein, this invention comprises a method of manufacturing an electronic device, comprising the steps of: providing a frame having a plurality of openings on a substrate to be mounted with a semiconductor device, each opening has a dimension suitable to the semiconductor device; providing a plurality of semiconductor devices to the frame to seat one in each of the openings; and fixing the semiconductor devices to the substrate.
0013[0013] By means of a frame having a plurality of openings, a number of semiconductor devices may be supplied to predetermined positions on the substrate at once.
0014[0014] By means of a film-based substrate as the substrate, mass production will be facilitated. In addition, the productivity will be further improved by rolling up and rewinding the base film.
0015[0015] By means of a paper sheet as substrate, the product may be used for the valuables.
0016[0016] To achieve the another object and in accordance with the purpose of the invention, as embodied and broadly described herein, this invention comprises a method of manufacturing an electronic device, comprising the step of: using a thinner IC chip than 30 micrometers for the semiconductor device.
0017[0017] By using a thin film chip, the reliability thereof will be improved due to the strength with respect to the bending stress. The strength with respect to the bending stress may be significant when the thickness is equal to or less than 10 micrometers.
0018[0018] To achieve effectively the yet another object and in accordance with the purpose of the invention, as embodied and broadly described herein, this invention comprises a method of manufacturing an electronic device, comprising the step of: providing a supporting dowel member on the surface or on the backside or on both sides of a thin IC chip.
0019[0019] A support member will improve the resistance to the external stress to facilitate the handling. In particular, the fracture of chips during supplying the thin IC chip onto the frame may be considerably reduced. The thin IC chips will also be placed with a significant certainty on the openings of the frame. Furthermore, the curling of chips when the chips are thinner may be prevented or suppressed.
0020[0020] By forming the semiconductor device in a shape of cube, the resistance to the external stress will be increased to improve the reliability. In particular, the breakage of corner of the chip will be significantly reduced by forming the maximum dimension of 0.5 millimeters or less.
0021[0021] By forming the semiconductor device in a shape of sphere, the resistance to the external stress will be further increased more than a cube form, because no corner exists.
0022[0022] In particular the application of the semiconductor device to a thin electronic device including IC cards, tags, and valuables will be allowed when forming the external dimension of the semiconductor device (length of an edge for a cube and a chip, or diameter for a sphere) equal to or less than 0.5 millimeters.
0023[0023] By providing an optical shielding member on the semiconductor chip, the effect influenced by the incident light to the semiconductor device on the electron-hole pairs may be avoided.
0024[0024] By means of a sheet material having a light shield characteristics for the shield material, the influence by the incident light may be positively avoided. By using printing ink for the shield material, the shield may be formed in an inexpensive manner.
0025[0025] To achieve the yet another object of the present invention, the method in accordance with the present invention comprises the steps of: providing a wall pattern onto the part corresponding to the separating region between semiconductor devices in a semiconductor substrate having a plurality of semiconductor devices; forming a support member having a certain mobility and allowing a bonding after curing onto the part corresponding to the semiconductor devices; and splitting the semiconductor device part into chips.
0026[0026] The mobility of the support member before curing allows the supply at once of the support member to a plurality of inner wall regions surrounded by the wall patterns, therefore improves the productivity. The support member, which can be melted after curing, is particularly suitable to thinner electronic devices because after assembly into an electronic device the member can be melted to reduce the thickness.
0027[0027] By screen-printing of the support member, a mass production will be allowed at a less cost.
0028[0028] By means of a support member of a photosensitive material, the controllability of shapes inherent will allow a mass production.
0029[0029] The above and further objects and novel features of the present invention will more fully appear from following detailed description when the same is read in connection with the accompanying drawings. It is to be expressly understood, however, that the drawings are for the purpose of illustration only and not intended as a definition of the limits of the present invention.
BRIEF DESCRIPTION OF THE DRAWINGS
0030[0030] FIGS. <b>1</b>(<i>a</i>) to <b>1</b>(<i>d</i>) are schematic cross-sectional views indicating a method of manufacturing an electronic device in accordance with the present invention;
0031[0031] FIGS. <b>2</b>(<i>a</i>) to <b>2</b>(<i>c</i>) are schematic cross-sectional views indicating a method of manufacturing an IC card in accordance with the prior art;
0032[0032] FIGS. <b>3</b>(<i>a</i>) to <b>3</b>(<i>e</i>) are schematic cross-sectional views indicating a method of formation of a support member in accordance with the present invention;
0033[0033] FIGS. <b>4</b>(<i>a</i>) to <b>4</b>(<i>e</i>) are schematic cross-sectional views indicating another method of manufacturing a support member in accordance with the present invention;
0034[0034]FIG. 5 is a plan view of a base film substrate for an IC card equipped with an IC chip in accordance with the present invention;
0035[0035] FIGS. <b>6</b>(<i>a</i>) to <b>6</b>(<i>b</i>) are perspective views indicating a wound roll of substrate with IC chips in accordance with the present invention;
0036[0036]FIG. 7 is a plan view indicating an example of IC chip to be mounted in an electronic device in accordance with the present invention;
0037[0037] FIGS. <b>8</b>(<i>a</i>) to <b>8</b>(<i>c</i>) are series of processes for forming a support member in accordance with the present invention onto a wafer, (a) a plan view, (b) and (c) schematic cross-sectional views;
0038[0038]FIG. 9 is a schematic cross-sectional view of an electronic device in accordance with the present invention;
0039[0039]FIG. 10 is a schematic cross-sectional view of another electronic device in accordance with the present invention;
0040[0040] FIGS. <b>11</b>(<i>a</i>) to <b>11</b>(<i>c</i>) are schematic cross-sectional views indicating the method of an electronic device in accordance with the present invention;
0041[0041]FIG. 12 is a schematic diagram indicating a mode embodying the electronic device in accordance with the present invention;
0042[0042]FIG. 13 is a plan view indicating the method of manufacturing an electronic device in accordance with the present invention;
0043[0043] FIGS. <b>14</b>(<i>a</i>) to <b>14</b>(<i>c</i>) are schematic cross-sectional views indicating another method of manufacturing an IC card in accordance with the Prior Art;
0044[0044] FIGS. <b>15</b>(<i>a</i>) to <b>15</b>(<i>c</i>) are schematic cross-sectional views indicating another method of manufacturing a support member in accordance with the present invention;
0045[0045]FIG. 16 is a plan view indicating the method of manufacturing of a support member in accordance with the present invention;
0046[0046]FIG. 17 is a schematic cross-sectional view indicating a wound roll of substrate with IC chips equipped in accordance with the present invention;
0047[0047]FIG. 18 is a schematic circuit diagram of an exemplary circuit formed in an IC chip of the electronic device in accordance with the present invention; and
0048[0048] FIGS. <b>19</b>(<i>a</i>) to <b>19</b>(<i>d</i>) are schematic cross-sectional views indicating the method of manufacturing an electronic device in accordance with the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
0049[0049] [First Embodiment]
0050[0050] A method of manufacturing a number of electronic devices by attaching a plurality of IC chips (thin chips) <b>17</b> onto a substrate <b>15</b> at once will be described in greater details by referring to FIGS. <b>1</b>(<i>a</i>) to <b>1</b>(<i>d</i>). In this embodiment, a film-based substrate is used for the substrate <b>15</b>. On the substrate <b>15</b> having some adhesive paste <b>14</b> applied, a registration jig (positioning frame) <b>12</b> having openings of the size corresponding to the IC chip <b>17</b> will be placed to supply a plurality of IC chips <b>17</b> into the openings. The depth of the opening in the jig is preferably such that an opening houses one IC chip. When a support material <b>13</b> is provided, the size of the openings should include the thickness of the member. The depth should be enough to encompass the chip, because the portion extending from the jig of an IC chip may be likely damaged by mechanically abrading with another IC chip if the opening has an insufficient depth. The supply of IC chip <b>17</b> to the opening can be performed by means of a vacuum sucker having a plurality of sucking ports each corresponding to the position of respective of a plurality of openings, by attracting a plurality of IC chips at once. FIG. 1(<i>a</i>) indicates a schematic cross-sectional view of thin chips <b>17</b> each having a support member <b>13</b> and each placed in the respective of openings of the registration jig <b>12</b> to fix onto a film-base substrate <b>15</b> by means of suction and push-out air <b>11</b>. On the surface of thin chips a small antenna <b>16</b> for transmitting and receiving energy and data by means of radio frequency. A contactless electronic device may be thereby provided.
0051[0051]FIG. 13 is a plan view of registration to a jig, for aligning thin chips <b>17</b> to the jig. The jig has a through hole or a recess of the shape and size corresponding to the size of chip or a square. A thin chip will be fitted into the through hole or recess. The automatic registration will be performed while at the same time the mounting will be pressed to adhere automatically to the substrate.
0052[0052] Next, as shown in FIG. 1(<i>b</i>), the positioning jig <b>12</b> will be removed.
0053[0053] Then, a covering sheet <b>19</b> will be placed through an adhesive material <b>18</b> (see FIG. 1(<i>c</i>)).
0054[0054] Thereafter, the support member <b>36</b> will be melted to flow by applying heat and pressure to reduce the thickness of the electronic device (see FIG. 1(<i>d</i>)). Then, the IC card substrate <b>15</b> will be cut so as to have the desirable number of thin IC chips <b>17</b> (one or more) to form an electronic device. In accordance with this method, the thin chip <b>17</b> will be stable during handling due to the support member <b>13</b>. In the eventual form, the support member <b>13</b> will be deformed so as to conform to the thin shape and size of the final product. Since the IC chip <b>17</b> is thin, the chip may be curled due to the internal stress of the semiconductor material and is susceptible to the physical external stress, however by means of support member <b>13</b> as have been described above in this embodiment, a mechanical strength nearly equivalent to a thicker chip can be achieved so that a production of a number of thin chips at the same time will be allowed, with ease of handling, resulting in a significant improvement of productivity.
0055[0055] [Second Embodiment]
0056[0056] Now a method of attaching a support member to a thin chip will be described in greater details by referring to FIGS. <b>3</b>(<i>a</i>) to <b>3</b> (<i>e</i>).
0057[0057]FIG. 3(<i>a</i>) is a schematic cross-sectional view of a silicon-on-insulator type (SOI) wafer having a silicon substrate <b>31</b> (of thickness of approximately 200 micrometers), an oxide layer <b>32</b> (of thickness of approximately 1 micrometer), and a surface device layer <b>33</b> (of thickness of 0.5 to 10 micrometers) having semiconductor IC devices formed in a manner well known in the art.
0058[0058]FIG. 3(<i>b</i>) is a schematic cross-sectional view during a process of forming an oxide pattern <b>34</b> (of thickness of approximately 0.5 micrometers) on the backside of the silicon-on-insulator wafer. The oxide pattern <b>34</b> may also be formed by a photolithograph as well known in the art. The oxide pattern <b>34</b> will be formed in the region used for separating semiconductor devices.
0059[0059]FIG. 3(<i>c</i>) is a schematic cross-sectional view of the process of etching the silicon by making use of the oxide pattern formed thereon to leave the silicon sacrifice wall <b>35</b> and remove the oxide. When using a SOI waver, the oxide layer <b>32</b> is served for a protection of silicon etching so as to provide a precise control of the thickness of the silicon sacrifice wall <b>35</b>. However, when using an ordinary silicon substrate, the manufacturing cost can be lowered whereas the thickness controllability will be somewhat degraded when compared with a silicon-on-insulator wafer. Silicon can be processed in a shorter period of time by using a wet type etching method. On the other hand, the silicon can be processed with a higher precision of pattern by using a dry etching method. In the dry etching, the etching rate will be lower than the wet etching. Thus, the throughput may be improved by polishing the surface of the silicon substrate <b>31</b> or by previously thinning by means of the wet etching or the like.
0060[0060]FIG. 3(<i>d</i>) is a schematic cross-sectional view indicating the support member <b>13</b> filled into the area from which the silicon has been removed (the area will correspond to the semiconductor IC devices region). The preferable support member <b>13</b> may be selected from a group of candidates, which will be melted and flowed by heating. For example, some examples of the support member <b>13</b> include wax and epoxy resin.
0061[0061]FIG. 3(<i>e</i>) is a schematic cross-sectional view indicating the oxide layer <b>32</b> and the surface device layer <b>33</b> are removed by etching. By providing a size of the support member <b>13</b> larger than the semiconductor chip, the resistance to the external stress will be improved. In accordance with this method, the support member may be formed at a higher accuracy by selecting an arbitrary support member material. In addition, the process will be performed on the wafer, allowing a further effect of providing a considerably excellent productivity.
0062[0062] It should be noted here that although in this embodiment a silicon-on-insulator substrate is used, a substrate made of an ordinary silicon material may be used to render the process cost lower at the price of the variation of thickness of the IC chips.
0063[0063] [Third Embodiment]
0064[0064] Another method of forming the support member <b>13</b> will be described in greater details by referring to FIGS. <b>4</b>(<i>a</i>) to <b>4</b>(<i>e</i>).
0065[0065] First a silicon-on-insulator type wafer is provided having a silicon substrate <b>31</b>, an oxide layer <b>32</b>, and a surface device layer <b>33</b> having semiconductor integrated circuit devices formed thereon (see FIG. 4(<i>a</i>)).
0066[0066] The silicon substrate <b>31</b> will be etched to be removed (see FIG. 4(<i>b</i>)). The oxide layer <b>32</b> will be served for a protector of silicon etching.
0067[0067] Then, using a photo-resist technology, a photo-resist sacrifice wall <b>41</b> will be formed (see FIG. 4(<i>c</i>)).
0068[0068] Thereafter a support member is filled between photo-resist sacrifice wall patterns <b>41</b> (see FIG. 4(<i>d</i>)).
0069[0069] Thereafter, the oxide layer <b>32</b> and the surface device layer <b>33</b> will be etched to be removed (see FIG. 4(<i>e</i>)). In accordance with this method, the support member may be formed at a higher accuracy with an arbitrary material selected. Since the process is performed on the wafer, the method will provide an effect of considerably excellent productivity. In this method the height of the wall pattern will be determined by the thickness of the resist layer, so that the range of adjusting the height will be narrower than the method in accordance with the second embodiment, however, the formation of the oxide layer <b>32</b> will be unnecessary, facilitating the photo-resist sacrifice wall <b>41</b> to be readily formed.
0070[0070] [Fourth Embodiment]
0071[0071] An embodiment in which the electronic device is an IC card will be described in greater details by referring to FIG. 5. IC cards are used in a vast field of application, and it is anticipated that a number of cards in some fields will be disposable. Therefore, a significant consideration is needed on the thin chip equipped on an IC card film base <b>51</b> made of the film base described earlier. FIG. 5 is an embodiment of such an IC card. More specifically, a film base substrate in the size of a name card having chips mounted in a dispersed manner will allow the use of such a substrate as a card, provide a method of manufacturing IC cards at a considerably thinner card at a lower cost, and promote the use of such a card. By incorporating an antenna into the thin IC chip <b>17</b>, a contactless IC card can be yielded.
0072[0072] [Fifth Embodiment]
0073[0073] FIGS. <b>6</b>(<i>a</i>) and <b>6</b>(<i>b</i>) show another embodiment in accordance with the present invention. FIG. 6(<i>a</i>) is an overview of a roll before cutting <b>61</b> having thin IC chips mounted thereon, which later will be sliced. The thin IC chips <b>17</b> are adhered onto the film based IC card substrate <b>15</b>. FIG. 6(<i>b</i>) is a roll <b>62</b> sliced to a predetermined width of the roll before cutting <b>61</b> not yet sliced as shown in FIG. 6(<i>a</i>). Each chip is mounted on the sliced roll, allowing to use as a tape. By making a roll tape by slicing a large sheet incorporating a plurality of thin chips thereon, a mass production of electronic devices will be provided.
0074[0074] [Sixth Embodiment]
0075[0075]FIG. 7 shows an exemplary plan view of a thin IC chip <b>17</b> used in an embodiment in accordance with the present invention. More specifically, a chip having an antenna <b>16</b> as shown in the figure will be effectively utilized in the present invention. An effective resonance circuit may be formed with an antenna <b>16</b> and a tuning capacitance <b>73</b> connected by a connection wiring <b>71</b> through a through hole <b>72</b>. In the microwave band, the inductance and capacitance may be sufficient to be very small values, such as 4.2 pxn (H·F), so that a resonance circuit can be built with an extremely small inductor and a capacitor, allowing the formation of on-chip antenna to be effectively arranged. The present invention provides a method of manufacturing taking into consideration the economical efficiency.
0076[0076]FIG. 18 shows an example of a circuit formed in an IC chip. The circuit is a very promising one, which can be served for receiving microwave signals to transmitting data. This circuit has numerous features and characteristics such as converting the electromagnetic energy of the received microwaves into a direct current voltage, and receiving clock signals. By using microwaves, an antenna of a microscopic size of for example 300 micrometers square or less can be used for this purpose. Thereby an antenna is allowed to be incorporated in an IC chip.
0077[0077] By using a thin IC chip having an antenna as have been described above, a contactless electronic device will be provided.
0078[0078] [Seventh Embodiment]
0079[0079] In this embodiment, another method of forming the support member <b>13</b> will be described in greater details by referring to FIGS. <b>8</b>(<i>a</i>) to <b>8</b>(<i>c</i>). FIG. 8(<i>a</i>) is a plan view of a silicon wafer <b>81</b>. FIG. 8(<i>b</i>) is a partially sectional view of a portion shown in FIG. 8(<i>a</i>). In the cross-sectional view the silicon wafer <b>81</b> is affixed on a supporting sheet <b>82</b>, each chip is thinner and separated from each other. FIG. 8(<i>c</i>) is a schematic cross-sectional view illustrating the support member <b>13</b> required in the present invention is formed by screen-printing. For the material a silver paste and conductive carbon ink may be used.
0080[0080] The efficiency of the present invention is in the formation of the support member at a lower cost. Screen-printing may allow the support member to be easily formed on a wafer.
0081[0081] [Eighth Embodiment]
0082[0082]FIG. 9 shows still another preferred embodiment of the present invention. A thin chip as an inevitable mode of implementation is expected to be implemented in a thin form of product. The technology required in the implementation to be cited herein may include a protection of malfunctions by optics. A countermeasure for this purpose is shown in this figure, in which a light shield may be added on top and bottom of the antenna <b>16</b> formed on a thin IC chip <b>17</b> by means of an upper shield sheet <b>91</b> and a lower shield sheet <b>92</b>. This may provide an electronic device, which is protected from the malfunctioning in a thinner chip.
0083[0083] By using a shield sheet having a larger surface area than the thin IC chip <b>17</b> the incident light may be effectively shaded. In addition, the shielding member may be formed at once on a wafer, prior to separating chips, to allow the cost to decrease. Furthermore, the shielding members may be either on top or on bottom, depending on the application.
0084[0084] The shielding member formed by printing will further decrease the manufacturing cost.
0085[0085] [Ninth Embodiment]
0086[0086] A method of shielding incident light will be further described by referring to FIG. 10. In FIG. 9, there are the upper shielding mask sheet <b>91</b> and the lower shielding mask sheet <b>92</b>, which are formed on both sides of the thin IC chip <b>17</b> and the antenna <b>16</b> formed thereon, thereafter upper shielding mask ink <b>101</b> and lower shielding mask ink <b>102</b> will be formed thereon to have a functionality to complete the shield such that the top shielding sheet <b>91</b> and the bottom shielding sheet <b>92</b> do not work sufficiently as expected due to the transparency. Ink may be provided as the printing patterns. This allows the shielding to be improved.
0087[0087] [Tenth Embodiment]
0088[0088] A method of forming an electronic device by cutting a film in a form of roll tape having a plurality of IC chips mounted to separate to pieces, and attaching a piece to a medium will be described in greater details by referring to FIGS. <b>11</b>(<i>a</i>) to <b>11</b>(<i>c</i>). FIG. 11(<i>a</i>) is a schematic cross-sectional view of an example arrangement of a tape cutter <b>111</b> and tape rollers for outspreading the rolled tape in accordance with the present invention on a medium <b>113</b>. FIG. 11(<i>b</i>) is a schematic diagram of adhering the tape including thin chips onto the medium by means of the tape rollers. FIG. 11(<i>c</i>) is the mating of a piece with the medium. In this embodiment, the tape including thin chips is so thinner that the adhesion to a medium will be performed without problem, allowing electronic devices to be manufactured in a bulk at a lower cost.
0089[0089] [Eleventh Embodiment]
0090[0090] An example of use of the electronic device in accordance with the present invention will be described by referring to FIG. 12. An interrogator antenna <b>121</b> will transmit a radio frequency transmission <b>121</b> toward the IC chip <b>17</b>, which is mounted on the IC card substrate <b>15</b>, to feed the received radio frequency waves to the interrogator antenna <b>121</b> by means of an effective circuit technology. This can be implemented without a battery or power source, by obtaining the energy needed to operate the circuit from the interrogator antenna <b>121</b> to send back any data necessary to the interrogator. The thin IC chip may be attached to any type of mediums <b>113</b>.
0091[0091] [Twelfth Embodiment]
0092[0092] Another embodiment of forming a support member is shown in FIGS. <b>15</b>(<i>a</i>) to <b>15</b>(<i>c</i>). After removing the silicon substrate on the backside of the silicon-on-insulator substrate, a supporting sheet <b>82</b> will be attached on the side of the oxide layer <b>32</b>. Then, on the surface side of the surface device layer <b>33</b> having semiconductor integrated circuit devices formed a resist layer <b>153</b> will be applied to the thickness of approximately 50 micrometers, then the irradiating beam <b>151</b> will be applied to the photosensitive material <b>153</b> through a photomask <b>152</b> (see FIG. 15(<i>a</i>)). The thickness of the resist layer <b>153</b> may be in the range of approximately <b>5</b> to 100 micrometers. Thus the thinner the supporting effect is small, the thicker the layer is difficult to form. The accuracy of the size of patterns of the support member may be sufficient in the range of ±5 micrometers or so.
0093[0093] Thereafter, the exposed area (corresponding to the chip separator area) will be developed to be removed (see FIG. 15(<i>b</i>)).
0094[0094] Next, the surface device layer <b>33</b> in the area that the photosensitive material <b>153</b> has been removed will be removed (see FIG. 15(<i>c</i>)). FIG. 16 shows a plan view. In FIG. 16 only a line of chips is shown for the sake of simplicity, however in a practical production a number of chips exist on a wafer (for example, 330,000 chips on a <b>8</b>″ wafer). As can be appreciated, by using the photosensitive material as the support member, the support can be easily formed on a wafer. The support member has another advantage in the aspect of efficiency that it can be formed by only one lithograph process on a wafer. By forming thin chips equal to or less than approximately 10 micrometers, the resistance to the bending stress may be improved, at the price of difficulty in handling. However, a thinner chip with a support member attached in advance will considerably improve the processability of chips.
0095[0095] [Thirteenth Embodiment]
0096[0096]FIG. 17 shows a wound roll of tape substrate <b>15</b> with the thin IC chips <b>17</b> mounted thereon. In the tenth, preferred embodiment as have been described above, the IC card substrate <b>15</b> with the thin chips <b>17</b> mounted thereon is cut to make pieces to install on another medium <b>113</b>. In this embodiment the tape substrate <b>15</b> itself, which is cut to include required thin chips are used as the electronic device. A mottled whorl in this figure is the schematic cross-sectional view of the arrangement underlying the present invention. More specifically, the tape medium (in this embodiment the tape substrate itself) having thin IC chips <b>17</b> mounted thereon may be wounded like a roll of toilet tissue to be reeled without jag. Semiconductors mounted on a cellophane adhesive tape may be achieved at a very lower cost in accordance with the present invention, resulting in a potential to widely spread. A convenience may be significantly improved, by having intelligence with the equivalent handling to the usual scotch tapes.
0097[0097] [Fourteenth Embodiment]
0098[0098] FIGS. <b>19</b>(<i>a</i>) to <b>19</b>(<i>d</i>) show another embodiment in accordance with the present invention. In basics, this embodiment is similar to the first preferred embodiment as have been described above, however the IC card substrate <b>15</b> and the covering sheet <b>19</b> are replaced respectively with the bottom shielding sheet <b>92</b> and the top shielding sheet <b>91</b>, both having the shield effect. This allows the shielding effect to be further improved to suppress or prevent the malfunctioning caused by the electron-hole pairs generated by the incident light.
0099[0099] The foregoing description of the preferred embodiments of the invention has been presented for purposes of illustration and description thereof. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and modifications and variations are possible in light of the above teachings or may be acquired from practice of the invention. The embodiments chosen and described in order to explain the principles of the invention and its practical application to enable one skilled in the art to utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. it is intended that the scope of the invention be defined by the claims appended hereto, and their equivalents.
0100[0100] In accordance with the present invention, following effects maybe expected. The reinforcement of thin chips allows the manufacturing processes to be performed in a manner similar to those used for the ordinary thicker chips, the batch handling of thinner chips in bulk to be realized, as sell as the productivity to be considerably increased. The support member which may melt and flow facilitate to provide a thinner electronic device.
0101[0101] It is further understood by those skilled in the art that the foregoing description is some preferred embodiments of the disclosed method and that various changes and modifications may be made in the invention without departing from the spirit and scope thereof.
Contents4
16 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14 Sheet 15 Sheet 16
Every citation, both ways
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8 members in 2 offices
Priority claims2
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| 81863801 | United States of America | A |
Members8
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42 transactions on the USPTO file
Allowed after 2 non-final rejections.
- Non-final rejections
- 2
- Final rejections
- 0
- RCEs
- 0
- Appeals
- 0
Over time
Point at a mark for the transactionTransactions
| Event | Code | |
|---|---|---|
| Expire PatentEXP. | EXP. | |
| Recordation of Patent Grant MailedPGM/ | PGM/ | |
| Patent Issue Date Used in PTA CalculationAllowedPTAC | PTAC | |
| Issue Notification MailedAllowedWPIR | WPIR | |
| Dispatch to FDCD1935 | D1935 | |
| Application Is Considered Ready for IssuePILS | PILS | |
| Issue Fee Payment VerifiedN084 | N084 | |
| Issue Fee Payment ReceivedIFEE | IFEE | |
| Mail Notice of AllowanceAllowedMN/=. | MN/=. | |
| Notice of Allowance Data Verification CompletedAllowedN/=. | N/=. | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Paralegal or electronic terminal disclaimer approvedP574 | P574 | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| terminal disclaimer fee paidTDP | TDP | |
| Terminal Disclaimer FiledDIST | DIST | |
| Response after Non-Final ActionA... | A... | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Date Forwarded to ExaminerFWDX | FWDX | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Response after Non-Final ActionA... | A... | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Mail Non-Final RejectionNon-final rejectionMCTNF | MCTNF | |
| Non-Final RejectionNon-final rejectionCTNF | CTNF | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| IFW TSS Processing by Tech Center CompleteTSSCOMP | TSSCOMP | |
| Case Docketed to Examiner in GAUDOCK | DOCK | |
| Application Is Now CompleteCOMP | COMP | |
| Application Return from OIPEWROIPE | WROIPE | |
| Application Return TO OIPEROIPE | ROIPE | |
| Application Is Now CompleteCOMP | COMP | |
| Application Dispatched from OIPEOIPE | OIPE | |
| Cleared by OIPE CSRL194 | L194 | |
| IFW Scan & PACR Auto Security ReviewSCAN | SCAN | |
| Preliminary AmendmentA.PE | A.PE | |
| Request for Foreign Priority (Priority Papers May Be Included)RQPR | RQPR | |
| Reference capture on IDSRCAP | RCAP | |
| Information Disclosure Statement (IDS) FiledM844 | M844 | |
| Information Disclosure Statement (IDS) FiledWIDS | WIDS | |
| Initial Exam Team nnIEXX | IEXX |
9 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Lapsed due to failure to pay maintenance feeLapsedFP | FP | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Information on status: patent discontinuationPATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362STCH | STCH | |
| Lapse for failure to pay maintenance feesLapsedLAPS | LAPS | |
| Maintenance fee reminder mailedREMI | REMI | |
| Fee paymentFPAY | FPAY | |
| Fee payment procedurePAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITYFEPP | FEPP | |
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Numbers
- Application
- 67601603
Titles
- English
- Method of manufacturing an electronic device
Patent term adjustment
- A delay
- +139 daysthe office missed an examination deadline
- Net adjustment
- 139 days
Classification
- CPC, 27
- H10P72/74
- G06K19/07718
- G06K19/07745
- G06K19/07747
- H01Q1/2208
- H01Q1/38
- H01Q9/40
- H01Q9/42
- Y10T29/49121
- H10P72/0442
- H10P72/741
- H10P72/7426
- H10P72/7416
- H10P72/7402
- H10W70/699
- H10W70/611
- H10W44/501
- H10W42/20
- H10W72/01331
- H10W72/354
- H10W72/07227
- H10W72/07327
- H10W72/07236
- H10W72/073
- H10W72/07337
- H10W72/0198
- H10W90/293
- IPC, 8
- B42D15 10
- G06K19 07
- G06K19 077
- H01L21 68
- H01L23 498
- H01L23 552
- H01L23 64
- H01L25 00