Compact serial -to ethernet conversion port

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] (Not Applicable)

STATEMENT RE: FEDERALLY SPONSORED RESEARCH/DEVELOPMENT

[0002] (Not Applicable)

BACKGROUND OF THE INVENTION

[0003] The present invention relates to generally to ethernet ports and the serial-to-ethernet conversion associated with such ports. More particularly, the invention relates to the structure and method of fabrication of a serial-to-ethernet converter housed completely within an ethernet jack to provide profile reduction, and reduce manufacturing cost and complexity. Furthermore, the serial-to-ethernet converter also contains general purpose programmable input/output pins (PIO). These PIOs can be used to control devices that have no microcontroller, and also read data from such devices. This integral RJ-45/converter device can thus be used as a complete modular ethernet interface for electronic devices that lack intelligence (no microcontroller).

[0004] A Registered Jack-45 (RJ-45) is a wire connector used commonly to interface microcontroller based products onto local area networks (LAN), particularly ethernets. RJ-45 connectors employ a male plug and a female jack or socket. The present invention concerns an improved RJ-45 ethernet Jack that integrates functionality which is commonly required for an interface to electronic devices.

[0005] The RJ-45 jack characteristically is comprised of a housing incorporating a planar array of parallel electrical contacts for mating with the RJ-45 plug and its aligned electrical contacts. The jack contacts are typically spring contacts for biased engagement with the plug.

[0006] Microcontroller based products commonly use serial communication, and it is common to encode the serial communication in an RS-232 [EIA-232] format. It is therefore necessary to convert the serial protocol to ethernet signals to allow LAN access. This is typically accomplished through a serial-to-ethernet converter that takes the RS-232 encoded TTL data, and transparently translates the data to twisted-pair ethernet protocol signals [10/100 Base-T]. In the prior art, signal translation and conditioning, such as the serial-to-ethernet conversion, has been achieved through components mounted to a printed circuit board (PCB) adjacent to the RJ-45 jack or mounted on a PCB with the jack.

[0007] PCB components used in serial to ethernet conversion include electronics such as general purpose microcontrollers, media access controllers, ethernet physical layer devices (PHY), memory chips, voltage regulator chips, supervisory circuits, and various passive components (resistors, capacitors, inductors, and crystals). The PCB also typically includes adjacent status or diagnostic light emitting diodes (LEDs). In addition, the adjacent PCB typically includes components for electrical isolation, electrostatic discharge (ESD) protection, suppression of incoming interfering signals, and suppression of radiated and conducted interference. The components used for these purposes typically consist of magnetic isolation transformers and chokes, capacitors, and resistors. These are commonly referred to as the “magnetics”.

[0008] In known devices, the numerous electronic components associated with a serial-to-ethernet conversion are connected to an RJ-45 connector jack through a series of printed or discrete wires or leads, either remotely or immediately adjacent the RJ-45 jack when the jack is mounted directly on the PCB board. Manufacturers have attempted to provide modular systems for ethernet-to-serial conversion, however, in all instances the electronic circuitry associated with the conversion is mounted to a PCB board outside of the RJ-45 jack housing. Because of the standard arrangement of the RJ-45 jack and attendant electronic circuitry components, known systems require a substantial footprint which takes up critical limited space.

[0009] Connector manufacturers have attempted to place signal conditioning components and LEDs inside the bodies of connectors. For example, isolation and filtering magnetics have been placed within jack housings that have been extended at the back of the connectors to accommodate a PCB and windings. Status LEDs have been mounted in the front of the RJ 45 jack, and controlled through extra leads protruding from the bottom of the connector. An example of integrated LED components may be found at U.S. Pat. No. 4,978,317, the substance of which is incorporated herein by reference. In known devices, manufacturers have failed to place all of the components necessary for a complete conversion from serial to ethernet within the standard jack housing. In this regard, manufacturers have failed to provide a modular RJ 45 jack with complete serial to ethernet conversion.

BRIEF SUMMARY OF THE INVENTION

[0010] The present invention relates to a serial-to-ethernet modular converter jack and a method of fabricating of the same. In the embodiments of the present invention serial-to-ethernet converter electronic components are miniaturized and housed entirely in an RJ-45 jack. All of the necessary components for conversion from serial-to-ethernet, including, but not limited to, controller hardware, magnetic hardware and firmware are included therewith. Controlling communication functions are integrated into an integrated circuit package and miniaturized peripheral chips, including memory, voltage regulators and supervisory circuits are included on one or more PCBs within the housing of a jack. The converter jack of present invention additionally includes enough on board memory, so that all necessary controlling firmware is contained within the converter. Provision is also made for adding control and monitoring functions, as well as ethernet connectivity, to non intelligent devices [which can't work with RS 232 serial data], through the addition of PIO pins. Other communication interfaces can also be added with slight modifications because of the capability of the integrated microcontroller [such as, but not limited to, inter-IC control (I2C), serial peripheral interface (SPI), controller area network (CAN), ProfiBus, universal serial bus (USB), and Dual Port Memory]. This means that the module can act as a converter between ethernet and many other interfaces.

[0011] The device of the present invention allows for adding ethernet connectivity to a new product in a simple and cost-effective manner. The device of the present invention contains all required hardware and firmware for effective serial-to-ethernet conversion and requires very few connections between a product's printed circuit board (typically 10 or less) and requires no more space than a typical RJ-45 jack.

[0012] The serial-to-ethernet converter jack of the present invention is constructed of a shielded housing that defines an open front portion for a connector port. The connector port includes a plurality of electrical contacts positioned within an open cavity of the housing to mate with a plug counterpart. The housing of the present invention also includes a segregated interior chamber, which encases all of the electrical components necessary to complete a serial-to-ethernet conversion of data. First, second and third circuit boards, in common electrical communication with the electrical contacts of the connector port, collectively incorporate the serial-to-ethernet circuitry components. The first and second circuit boards are positioned in generally horizontal parallel relation within the interior chamber. The third circuit board is positioned generally perpendicular in relation to the first and second circuit boards and is structurally connected to said first and second circuit boards, additionally providing structural support for said first and second circuit boards. The third circuit board additionally electrically connects said first and second circuit boards to each other.

[0013] The first circuit board includes magnetic isolation and filtering circuitry components. The second circuit board which defines opposed sides, includes controller circuitry components which are disposed upon the upper and lower of both sides of said second circuit board. The third circuit board connects the other circuit boards and the LEDs together.

[0014] The present invention additionally includes a method of forming an integrated serial-to-ethernet converter jack. The method for creating the conversion jack includes the following steps: providing a housing having an open cavity in segregated interior chambers; positioning an array of electrical contacts within the open cavity to form a connector port; positioning a first and second circuit board within the interior of chamber wherein said circuit boards are positioned in generally horizontal parallel relation; and positioning a third circuit board in generally perpendicular relation to the first and second circuit boards to electrically connect and structurally support said first and second circuit boards.

[0015] Alternative embodiments of the invention are additionally disclosed and include varying ways to position the serial-to-ethernet circuitry within the interior chamber of the housing. A first alternative embodiment discloses two circuit boards, the first being positioned generally horizontal within the interior chamber and the second being positioned at an angle relative to the first circuit board. A third embodiment of the present invention discloses a plurality of circuit board formed on a flexible substrate wherein the flexible substrate is bent to fit within the interior chamber. A fourth embodiment discloses an apparatus and method for forming the connector jack of the present invention wherein a first circuit board is positioned vertically within the interior chamber and a second circuit board is positioned at an angle relative to the first circuit board within the interior chamber of the housing. A fifth embodiment of the present invention provides an interior chamber which is positioned below the connector port, and the serial-to-ethernet circuitry may be positioned within the interior chamber. In the preferred embodiment and in all of the alternatives embodiments, lead pins electrically connected to the circuitry within the interior chamber, protrude from the based of the connector jack providing for a means to mate the jack to a circuit board.

[0016] It should be noted and understood that with respect to the embodiments of the present invention, the materials suggested may be modified or substituted to achieve the general overall resultant high efficiency. The substitution of materials or dimensions remain within the spirit and scope of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

P-0017[0017] These as well as other features of the present invention will become more apparent upon reference to the drawings wherein:

P-0018[0018]FIG. 1 is a front perspective view of the ethernet connector of the present invention;

P-0019[0019]FIG. 2 is a front view of the ethernet connector of the present invention;

P-0020[0020]FIG. 3 is a side, partially cut-away view of the ethernet connector of the present invention;

P-0021[0021]FIG. 4 is a side cross-sectional view of the ethernet connection of the present invention;

P-0022[0022]FIG. 5 is a block diagram of the electrical component circuitry for the serial-to-ethernet conversion for the ethernet connector of the present invention;

P-0023[0023]FIG. 6 is a pin input and output diagram for the ethernet connector of the present invention;

P-0024[0024]FIG. 7 is a side, partially cut-away view of an alternative embodiment of the present invention showing a horizontal circuit board in combination with an angled circuit board positioned within the interior chamber of the housing;

P-0025[0025]FIG. 8 is a side, partially cut-away view of an alternative embodiment of the present invention showing circuit boards placed on a common flexible substrate fitted with the interior chamber of the housing;

P-0026[0026]FIG. 9 is a side, partially cut-away view of an alternative embodiment of the present invention showing a vertically positioned circuit board and an angled circuit board positioned within the interior chamber of the housing; and

P-0027[0027]FIG. 10 is an alternative embodiment of the present invention showing the interior chamber located beneath the connector port.

DETAILED DESCRIPTION OF THE INVENTION

P-0028[0028] The detailed description as set forth below in connection with the appended drawings is intended as a description of the presently preferred embodiments of the present invention, and does not represent the only embodiment of the present invention. It is understood that various modifications to the invention may be comprised by different embodiments and are also encompassed within the spirit and scope of the present invention.

P-0029[0029] Referring particularly to FIGS. 1, 2 and <b>3</b>, FIG. 1 shows a perspective front view of the ethernet connector <b>10</b> of the present invention. FIG. 2 shows a front view of the connector <b>10</b> of the present invention. FIG. 3 shows a cut-away side view of the connector <b>10</b>. Connector <b>10</b> comprises a generally rectangular housing <b>12</b>. The front of the housing includes an open cavity <b>14</b>. A metal Faraday shield covers the top, sides and back of the housing and provides for electromagnetic-radiation (EMR) protection. The connector <b>10</b> additionally includes spring biased grounding tabs <b>16</b> that connect the Faraday shield to chassis (earth) ground by contacting the enclosure in which the connector is mounted. Also shown, are an array of leads <b>20</b> for electrically interconnecting the connector <b>10</b> to a PCB <b>18</b>.

P-0030[0030] The cavity <b>14</b> of the housing <b>12</b> incorporates a planar array of parallel electrical contacts <b>22</b> to provide the necessary electrical contacts to form a connector port within the cavity <b>14</b>. The cavity <b>14</b> is sized and dimensioned and the contacts <b>22</b> are placed within the cavity to compliment a mating plug (not shown). The sized cavity <b>14</b> along with the contacts <b>22</b> form a standard RJ-45 connector jack. The jack contacts <b>22</b> are spring biased for engagement with a mating plug (not shown).

P-0031[0031] The housing <b>12</b> is formed of molded plastic or other suitable material used in the art, covered by a Faraday shield having a front wall <b>24</b>, a rear wall <b>26</b>, a top wall <b>28</b>, a bottom wall <b>30</b> and sidewalls <b>32</b> and <b>34</b>. The references herein of “top”, “bottom”, and “sides” are made for ease of explanation of the invention and should not be interpreted as limiting in any way. It is contemplated that the connector <b>10</b> may be oriented in a multitude of ways on a product.

P-0032[0032] The front wall <b>24</b> includes LEDs <b>36</b> and <b>38</b>. The LEDs provide visual status and fault information for various functions of the serial-to-ethernet conversion, such as (but not limited to) ethernet connection speed, link present/absent, full/half duplex, ethernet activity, serial port activity, and microcontroller error conditions.

P-0033[0033] Referring particularly to FIGS. 3 and 4, the housing <b>12</b> includes a segregated interior chamber <b>40</b>. A first PCB <b>42</b> is disposed within the interior chamber <b>40</b> generally horizontal and parallel relative to the bottom wall <b>30</b>. The first PCB <b>42</b> is soldered (or otherwise electrically connected) to the contact interface <b>44</b>, which are mounted in a plastic insert. The completed insert assembly slides and snaps into the main housing <b>12</b>. The contact interface pins <b>44</b> are formed such that their ends become the wiper contacts <b>22</b>. Thus, the first PCB <b>42</b> is electrically interconnected to the contacts <b>22</b> of the port cavity <b>14</b>. The contact interface <b>44</b> additionally provides structural support to the first PCB <b>42</b>.

P-0034[0034] A second PCB <b>50</b> is also placed within the interior chamber <b>40</b>, positioned generally horizontal and in general parallel relation to the bottom wall <b>30</b>. The third PCB <b>50</b> is soldered (or otherwise electrically connected) to the array of leads <b>54</b>, which are formed such that their ends become the input/output pins <b>20</b> (more specifically, these pins <b>20</b> connect power and ground, reset, serial data input and output, handshake and flow control lines, and PIO lines) that connect to the user's PCB <b>20</b>. The array of leads <b>54</b> are mounted in a plastic insert. After the third PCB <b>50</b> is soldered (or otherwise connected) to the leads <b>54</b>, the completed insert assembly slides and snaps into the main housing <b>12</b>.

P-0035[0035] A third PCB <b>48</b> is placed within the interior chamber <b>40</b> generally vertically, and in general perpendicular relation to the other PCBs <b>42</b> and <b>50</b>. PCB <b>48</b> is positioned adjacent the rear wall <b>26</b> and is structurally and electrically interconnected to the other PCBs <b>42</b> and <b>50</b> by the formed pins <b>49</b> and <b>52</b>. PCB <b>48</b> and formed pins <b>49</b> and <b>52</b> thus provide the electrical connection between PCBs <b>42</b> and <b>50</b>. The LEDs <b>38</b> have leads (not shown) that run close to the top of the enclosure <b>12</b>, and these leads also connect to holes in PCB <b>48</b>. This provides the electrical connection between the LEDs <b>38</b> and the control PCB <b>50</b>.

P-0036[0036] The first, <b>42</b>, and second PCB <b>50</b> collectively incorporate the electronic circuitry component necessary to complete a serial-to-ethernet conversion of data. PCB <b>42</b> includes the magnetics portion of the circuitry which includes, but is not limited, to isolation transformers, common mode chokes, termination resistors, and a high voltage discharge capacitor (for ESD and voltage surges). In this implementation, PCB <b>48</b> is used solely for electrical interconnection, but it could, also be used for circuitry components if required.

P-0037[0037] PCB <b>50</b> incorporates all of the electronic circuitry components necessary for the control function of the serial-to-ethernet conversion. The electronic components on board PCB <b>50</b> include, but are not limited to, a microprocessor and an ethernet controller (combined in an ASIC for the present invention), nonvolatile memory (flash memory in the present invention), voltage regulator, voltage supervisory circuit, crystals, resistors, capacitors, and ferrite beads (surface mount beads in the present invention).

P-0038[0038] In operation, the complete assembly is mounted on a PCB that is a part of some device or equipment. Serial data and general purpose PIO data flows from the device through the array of leads <b>20</b> and is processed by the circuitry collectively incorporated onto PCBs <b>42</b>, <b>48</b> and <b>50</b>. PCB <b>42</b> is interconnected to the contacts <b>22</b> which mate with a plug (not shown) to effectively transmit ethernet data thereto. Ethernet data can also flow from the ethernet port through wiper contacts <b>22</b>, be processed by the circuitry collectively incorporated onto PCBs <b>42</b>, <b>48</b> and <b>50</b>, and flow out as serial data and general purpose PIO data through lead pins <b>20</b> into the external device. It is additionally contemplated by the present invention that the control circuitry, magnetic circuitry and LED circuitry may be interchanged among PCBs <b>42</b>, <b>48</b> and <b>50</b> and that component may be positioned on one or both sides of each PCB's <b>42</b>, <b>48</b> and <b>50</b>.

P-0039[0039] Referring particularly to FIG. 5 there is shown a block diagram of the controller components of PCB <b>50</b>. The controller block <b>56</b> handles all of the conversion between serial and ethernet. This includes processing of the digital (serial) and analog (ethernet) signals, as well as all of the required code protocol translations. The controller block <b>56</b> communicates with ethernet through the ethernet interface <b>58</b>, which is described below in greater detail. The flash memory <b>66</b> stores the software that the controller block <b>56</b> uses to perform its functions. The supervisory circuit <b>68</b> monitors the supply voltage coming in through the PCB <b>10</b> pins <b>64</b>. It resets the controller block if the voltage drops too low, or if a signal from the PCB <b>10</b> pins <b>64</b> requests a system reset. The power filters <b>60</b> remove noise from the input supply voltage, and also reduce any noise that might be transmitted from the serial-to-ethernet converter to the outside world through the voltage supply lines. The 2.5V power supply <b>62</b> supplies a second supply voltage that is required by the controller block in the present invention. Serial data is transmitted to and from the controller block through the PCB <b>10</b> pins <b>64</b> to the external device. The flow control and handshake lines (connected through PCB <b>10</b> pins <b>64</b>) are standard signals used to control the serial data stream. The controller block can also communicate with the external device through the PIO lines connecting through the PCB <b>10</b> pins <b>64</b>. It is understood that although the components as shown in FIG. 5 are specifically identified, it is contemplated by the present invention that any control circuitry that complete the control of function of serial-to-ethernet conversion is contemplated by the present invention.

P-0040[0040] Referring particularly to FIG. 6 there is shown a schematic of the magnetic components incorporated into PCB <b>42</b>. The outgoing ethernet signal <b>70</b><i>a </i>from the controller <b>50</b> passes through the isolation transformer <b>74</b>, which eliminates any DC coupling problems between ethernet devices. The outgoing signals pass through the common mode choke <b>78</b>, which reduces spurious emissions (radiated and conducted). The outgoing signal connects to the ethernet cable through contacts <b>72</b><i>a </i>of the RJ-45 jack. Incoming ethernet signals enter into the jack through contacts <b>72</b><i>c</i>, and pass through a common mode choke <b>80</b> which reduces spurious common mode noise that could be conducted into the device. The signals pass through the isolation transformer <b>76</b>, and then to the controller board <b>50</b> through pins <b>52</b> and <b>26</b>. The center taps <b>70</b><i>b </i>and <b>70</b><i>c </i>of the isolation transformers <b>74</b> and <b>76</b> are used to set the appropriate DC bias levels in the transmit and receive circuitry on the controller board <b>50</b>. These center taps also connect to the controller board <b>50</b> through pins <b>52</b> and <b>26</b>. Four of the RJ-45 contacts <b>72</b><i>c </i>are not used for ethernet signals. They are terminated to ground, through matching resistors <b>82</b><i>c </i>and <b>82</b><i>d </i>and capacitor <b>84</b>, to reduce noise and DC transients. DC transients (“ESD”) on the ethernet cable that are present at the contact <b>72</b><i>a </i>and <b>72</b><i>c </i>are reduced by discharge to ground through resistors <b>82</b><i>a </i>and <b>82</b><i>b. </i>

P-0041[0041] It is understood and contemplated by the present invention that any configuration of like components which would complete the magnetic portion of the overall serial-to-ethernet data conversion is contemplated by the present invention. For purposes of this disclosure, the term magnetics includes the components as described in FIG. 6.

P-0042[0042] Referring specifically to FIG. 7, there is shown an alternate embodiment of the present invention. The alternate embodiment connector as shown in FIG. 7 is structurally similar to the embodiment shown in FIGS. <b>1</b><b>4</b>, with only the distinctions highlighted below. Within the interior chamber <b>40</b><i>a</i>, two PCBs <b>86</b> and <b>88</b> are positioned therein. A first PCB <b>88</b> is positioned generally horizontal in parallel relation to the bottom wall <b>30</b><i>a</i>. A second PCB <b>86</b> is positioned in angular relation to the PCB <b>88</b> to fit within the interior chamber <b>40</b><i>a</i>. PCB <b>86</b> and <b>88</b> collectively incorporate the electric circuitry components to complete a serial to ethernet data conversion. PCB <b>86</b> is interconnected to a lead array <b>20</b><i>a</i>. PCB <b>86</b> includes all of the control circuitry, with components interconnected to the top side and bottom side of said PCB. PCB <b>86</b> is interconnected to PCB <b>88</b>. PCB <b>88</b> includes the magnetic portion of the circuitry formed on the underside of PCB <b>86</b>. The LEDs <b>38</b><i>a </i>and <b>36</b><i>a </i>(not shown) also connect to PCB <b>86</b> through leads <b>14</b><i>a</i>. PCB <b>88</b> is interconnected to contacts <b>22</b><i>a. </i>

P-0043[0043] Referring specifically to FIG. 8 there is shown an alternative embodiment of the present invention. The alternate embodiment connector as shown in FIG. 8 is structurally similar to the embodiment as shown in FIGS. <b>1</b><b>4</b>, with only the distinctions highlighted below. A common flexible substrate (more specifically, a rigid/flexible PCB <b>90</b>, <b>92</b>, <b>94</b>, and <b>96</b>) is formed to fit the interior chamber <b>40</b><i>b</i>. The rigid/flexible PCB <b>90</b>, <b>92</b>, <b>94</b>, and <b>96</b> collectively incorporates the electric circuitry components to complete a serial to ethernet data conversion. Electrical and magnetic components can be mounted on the rigid portions of the PCB <b>92</b>, <b>94</b>, and <b>96</b>. Electrical connections between the rigid portions <b>92</b>, <b>94</b>, and <b>96</b> are made on the flexible portions <b>90</b>. Rigid portion <b>96</b> is electrically connected to the lead array <b>20</b><i>b</i>. Control circuitry may be incorporated onto rigid portion <b>96</b> and possibly <b>94</b>, with magnetic circuitry incorporated on rigid portion <b>92</b> and possibly <b>94</b>. The LEDs connect to rigid portion <b>96</b> through leads <b>14</b><i>b</i>. Rigid portion <b>92</b> is electrically connected to contacts <b>22</b>. It is additionally contemplated that the control circuitry, magnetic circuitry and LED connections may be interchanged among rigid portions <b>92</b>, <b>94</b> and <b>96</b>.

P-0044[0044] Referring specifically to FIG. 9, there is shown an alternative embodiment to the present invention. The alternate embodiment connector as shown in FIG. 9 is structurally similar to the embodiment shown in FIGS. <b>1</b>-<b>4</b>, with only the distinctions highlighted below. Within the interior chamber <b>40</b><i>c</i>, two PCBs <b>98</b> and <b>100</b> are positioned therein. The first PCB <b>98</b> is positioned generally vertically in parallel relation to the rear wall <b>26</b>. A second PCB <b>100</b> is positioned in angular relation to the PCB <b>98</b> to fit within the interior chamber <b>40</b><i>c</i>. PCB <b>98</b> and <b>100</b> collectively incorporate the electric circuitry components to complete a serial-to-ethernet data conversion. PCB <b>100</b> is interconnected to a lead array <b>20</b><i>c</i>. PCB <b>100</b> includes all of the control circuitry with components interconnected to the top side and bottom side of said PCB. PCB <b>98</b> is interconnected to PCB <b>100</b>. PCB <b>98</b> includes a magnetic portion of the circuitry. PCB <b>98</b> is interconnected to contacts <b>22</b><i>c</i>. PCB <b>100</b> is additionally interconnected to LEDs <b>38</b><i>c </i>and <b>36</b><i>c. </i>

P-0045[0045] Referring particularly to FIG. 10 there is shown an alternative embodiment to the present invention. The alternate embodiment connector as shown in FIG. 10 includes a connector port that is structurally similar to the embodiment shown in FIGS. <b>1</b>-<b>4</b>, but which does not include an interior chamber located behind the port. In the alternate embodiment shown in FIG. 10, the interior chamber <b>102</b> is located beneath the port cavity <b>14</b><i>d</i>. Within the interior chamber <b>102</b>, at least one PCB is positioned therein which incorporates the electric circuitry components to complete a serial-to-ethernet data conversion. It is contemplated by the present invention that the serial-to-ethernet circuitry may be incorporated into the interior chamber <b>102</b> in a variety of ways, including those described with respect to the interior chambers of FIGS. <b>4</b>, <b>7</b>-<b>9</b>.

P-0046[0046] Additional modifications to the method of the present invention and the devices used in accordance with the method will be apparent to those skilled in the art. It is understood that such additional modifications are within the scope and spirit of the present invention.