Method and system for waveguide delay based equalization with current and optical summing in optical communication

CROSS-REFERENCE TO RELATED APPLICATIONS/INCORPORATION BY REFERENCE

0001This application claims priority to and the benefit of U.S. Provisional Application 62/356,941 filed on Jun. 30, 2016, which is hereby incorporated herein by reference in its entirety.

FIELD

0002Certain embodiments of the disclosure relate to semiconductor photonics. More specifically, certain embodiments of the disclosure relate to a method and system for waveguide delay based equalization with current and optical summing in optical communication.

BACKGROUND

0003As data networks scale to meet ever-increasing bandwidth requirements, the shortcomings of copper data channels are becoming apparent. Signal attenuation and crosstalk due to radiated electromagnetic energy are the main impediments encountered by designers of such systems. They can be mitigated to some extent with equalization, coding, and shielding, but these techniques require considerable power, complexity, and cable bulk penalties while offering only modest improvements in reach and very limited scalability. Free of such channel limitations, optical communication has been recognized as the successor to copper links.

0004Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present disclosure as set forth in the remainder of the present application with reference to the drawings.

BRIEF SUMMARY

0005A system and/or method for waveguide delay based equalization with current and optical summing in optical communication, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

0006Various advantages, aspects and novel features of the present disclosure, as well as details of an illustrated embodiment thereof, will be more fully understood from the following description and drawings.

BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS

<figref idref="DRAWINGS">FIG. 1A</figref> is a block diagram of a photonically-enabled integrated circuit with waveguide delay based equalization with current and optical summing, in accordance with an example embodiment of the disclosure.

<figref idref="DRAWINGS">FIG. 1B</figref> is a diagram illustrating an exemplary photonically-enabled integrated circuit, in accordance with an example embodiment of the disclosure.

<figref idref="DRAWINGS">FIG. 1C</figref> is a diagram illustrating a photonically-enabled integrated circuit coupled to an optical fiber cable, in accordance with an example embodiment of the disclosure.

<figref idref="DRAWINGS">FIG. 2</figref> illustrates an equalizer, in accordance with an example embodiment of the disclosure.

<figref idref="DRAWINGS">FIG. 3</figref> illustrates signal weighting for an equalizer, in accordance with an example embodiment of the disclosure.

<figref idref="DRAWINGS">FIG. 4</figref> illustrates a one-tap precursor equalizer with optical and electrical weight control, in accordance with an example embodiment of the disclosure.

<figref idref="DRAWINGS">FIG. 5A</figref> Illustrates a one-tap pre-cursor, one-tap post-cursor equalizer, in accordance with an example embodiment of the disclosure.

<figref idref="DRAWINGS">FIG. 5B</figref> Illustrates another example of a one-tap pre-cursor, one-tap post-cursor equalizer, in accordance with an example embodiment of the disclosure.

DETAILED DESCRIPTION

0015As utilized herein the terms “circuits” and “circuitry” refer to physical electronic components (i.e. hardware) and any software and/or firmware (“code”) which may configure the hardware, be executed by the hardware, and or otherwise be associated with the hardware. As used herein, for example, a particular processor and memory may comprise a first “circuit” when executing a first one or more lines of code and may comprise a second “circuit” when executing a second one or more lines of code. As utilized herein, “and/or” means any one or more of the items in the list joined by “and/or”. As an example, “x and/or y” means any element of the three-element set {(x), (y), (x, y)}. In other words, “x and/or y” means “one or both of x and y”. As another example, “x, y, and/or z” means any element of the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}. In other words, “x, y and/or z” means “one or more of x, y and z”. As utilized herein, the term “exemplary” means serving as a non-limiting example, instance, or illustration. As utilized herein, the terms “e.g.,” and “for example” set off lists of one or more non-limiting examples, instances, or illustrations. As utilized herein, circuitry or a device is “operable” to perform a function whenever the circuitry or device comprises the necessary hardware and code (if any is necessary) to perform the function, regardless of whether performance of the function is disabled or not enabled (e.g., by a user-configurable setting, factory trim, etc.).

0016<figref idref="DRAWINGS">FIG. 1A</figref> is a block diagram of a photonically-enabled integrated circuit with waveguide delay based equalization with current and optical summing, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 1A</figref>, there is shown optoelectronic devices on a photonically-enabled integrated circuit <b>130</b> comprising optical modulators <b>105</b>A-<b>105</b>D, photodiodes <b>111</b>A-<b>111</b>D, monitor photodiodes <b>113</b>A-<b>113</b>H, and optical devices comprising couplers <b>103</b>A-<b>103</b>K, optical terminations <b>115</b>A-<b>115</b>D, and grating couplers <b>117</b>A-<b>117</b>H. There are also shown electrical devices and circuits comprising amplifiers <b>107</b>A-<b>107</b>D, analog and digital control circuits <b>109</b>, and control sections <b>112</b>A-<b>112</b>D. The amplifiers <b>107</b>A-<b>107</b>D may comprise transimpedance and limiting amplifiers (TIA/LAs), for example.

0017In an example scenario, the photonically-enabled integrated circuit <b>130</b> comprises a CMOS photonics die with a laser assembly <b>101</b> coupled to the top surface of the IC <b>130</b>. The laser assembly <b>101</b> may comprise one or more semiconductor lasers with isolators, lenses, and/or rotators for directing one or more CW optical signals to the coupler <b>103</b>A. The photonically enabled integrated circuit <b>130</b> may comprise a single chip, or may be integrated on a plurality of die, such as one or more electronics die and one or more photonics die.

0018Optical signals are communicated between optical and optoelectronic devices via optical waveguides <b>110</b> fabricated in the photonically-enabled integrated circuit <b>130</b>. Single-mode or multi-mode waveguides may be used in photonic integrated circuits. Single-mode operation enables direct connection to optical signal processing and networking elements. The term “single-mode” may be used for waveguides that support a single mode for each of the two polarizations, transverse-electric (TE) and transverse-magnetic (TM), or for waveguides that are truly single mode and only support one mode whose polarization is TE, which comprises an electric field parallel to the substrate supporting the waveguides. Two typical waveguide cross-sections that are utilized comprise strip waveguides and rib waveguides. Strip waveguides typically comprise a rectangular cross-section, whereas rib waveguides comprise a rib section on top of a waveguide slab. Of course, other waveguide cross section types are also contemplated and within the scope of the disclosure.

0019In an example scenario, the couplers <b>103</b>A-<b>103</b>C may comprise low-loss Y-junction power splitters where coupler <b>103</b>A receives an optical signal from the laser assembly <b>101</b> and splits the signal to two branches that direct the optical signals to the couplers <b>103</b>B and <b>103</b>C, which split the optical signal once more, resulting in four roughly equal power optical signals.

0020The optical power splitter may comprise at least one input waveguide and at least two output waveguides. The couplers <b>103</b>A-<b>103</b>C shown in <figref idref="DRAWINGS">FIG. 1A</figref> illustrates 1-by-2 splitters, which divide the optical power in one waveguide into two other waveguides evenly. These Y-junction splitters may be used in multiple locations in an optoelectronic system, such as in a Mach-Zehnder interferometer (MZI) modulator, e.g., the optical modulators <b>105</b>A-<b>105</b>D, where a splitter and a combiner are needed, since a power combiner can be a splitter used in reverse.

0021In another example scenario, the Y-junction may be utilized in a parallel multi-channel transmitter, where a cascade of 1-by-2 splitters can be employed to have a single light source feed multiple channels. Interleaver-based multiplexers and demultiplexers constitute a third example where 1-by-2 splitters are among the building blocks.

0022The optical modulators <b>105</b>A-<b>105</b>D comprise Mach-Zehnder or ring modulators, for example, and enable the modulation of the continuous-wave (CW) laser input signal. The optical modulators <b>105</b>A-<b>105</b>D may comprise high-speed and low-speed phase modulation sections and are controlled by the control sections <b>112</b>A-<b>112</b>D. The high-speed phase modulation section of the optical modulators <b>105</b>A-<b>105</b>D may modulate a CW light source signal with a data signal. The low-speed phase modulation section of the optical modulators <b>105</b>A-<b>105</b>D may compensate for slowly varying phase factors such as those induced by mismatch between the waveguides, waveguide temperature, or waveguide stress and is referred to as the passive phase, or the passive biasing of the MZI.

0023In an example scenario, the high-speed optical phase modulators may operate based on the free carrier dispersion effect and may demonstrate a high overlap between the free carrier modulation region and the optical mode. High-speed phase modulation of an optical mode propagating in a waveguide is the building block of several types of signal encoding used for high data rate optical communications. Speed in the several Gb/s may be required to sustain the high data rates used in modern optical links and can be achieved in integrated Si photonics by modulating the depletion region of a PN junction placed across the waveguide carrying the optical beam. In order to increase the modulation efficiency and minimize the loss, the overlap between the optical mode and the depletion region of the PN junction is optimized.

0024The outputs of the optical modulators <b>105</b>A-<b>105</b>D may be optically coupled via the waveguides <b>110</b> to the grating couplers <b>117</b>E-<b>117</b>H. The couplers <b>103</b>D-<b>103</b>K may comprise four-port optical couplers, for example, and may be utilized to sample or split the optical signals generated by the optical modulators <b>105</b>A-<b>105</b>D, with the sampled signals being measured by the monitor photodiodes <b>113</b>A-<b>113</b>H. The unused branches of the directional couplers <b>103</b>D-<b>103</b>K may be terminated by optical terminations <b>115</b>A-<b>115</b>D to avoid back reflections of unwanted signals.

0025The grating couplers <b>117</b>A-<b>117</b>H comprise optical gratings that enable coupling of light into and out of the photonically-enabled integrated circuit <b>130</b>. The grating couplers <b>117</b>A-<b>117</b>D may be utilized to couple light received from optical fibers into the photonically-enabled integrated circuit <b>130</b>, and the grating couplers <b>117</b>E-<b>117</b>H may be utilized to couple light from the photonically-enabled integrated circuit <b>130</b> into optical fibers. The grating couplers <b>117</b>A-<b>117</b>H may comprise single polarization grating couplers (SPGC) and/or polarization splitting grating couplers (PSGC). In instances where a PSGC is utilized, two input, or output, waveguides may be utilized.

0026The optical fibers may be epoxied, for example, to the CMOS chip, and may be aligned at an angle from normal to the surface of the photonically-enabled integrated circuit <b>130</b> to optimize coupling efficiency. In an example embodiment, the optical fibers may comprise single-mode fiber (SMF) and/or polarization-maintaining fiber (PMF).

0027In another example embodiment illustrated in <figref idref="DRAWINGS">FIG. 1B</figref>, optical signals may be communicated directly into the surface of the photonically-enabled integrated circuit <b>130</b> without optical fibers by directing a light source on an optical coupling device in the chip, such as the light source interface <b>135</b> and/or the optical fiber interface <b>139</b>. This may be accomplished with directed laser sources and/or optical sources on another chip flip-chip bonded to the photonically-enabled integrated circuit <b>130</b>.

0028The directional couplers <b>121</b> may receive optical signal in one or more inputs and couple output optical signals to one or more outputs. In this manner, a single optical signal may be split between two output waveguides <b>110</b>, for example. The photodiodes <b>111</b>A-<b>111</b>D may convert optical signals received from the grating couplers <b>117</b>A-<b>117</b>D, via the directional couplers <b>121</b>, into electrical signals that are communicated to the amplifiers <b>107</b>A-<b>107</b>D for processing.

0029In the receiver subsystem implemented in a silicon chip, light is often coupled into a photodetector via a polarization-splitting grating coupler that supports coupling all polarization states of the fiber mode efficiently. The incoming signal is split by the PSGC into two separate waveguides in a polarization-diversity scheme, and therefore both inputs to the waveguide photodetectors are used. If two different PSGCs are required to couple into the same photodetector, then the PD has have four separate waveguide ports.

0030The analog and digital control circuits <b>109</b> may control gain levels or other parameters in the operation of the amplifiers <b>107</b>A-<b>107</b>D, which may then communicate electrical signals off the photonically-enabled integrated circuit <b>130</b>. The control sections <b>112</b>A-<b>112</b>D comprise electronic circuitry that enable modulation of the CW laser signal received from the splitters <b>103</b>A-<b>103</b>C. The optical modulators <b>105</b>A-<b>105</b>D may require high-speed electrical signals to modulate the refractive index in respective branches of a Mach-Zehnder interferometer (MZI), for example. In an example embodiment, the control sections <b>112</b>A-<b>112</b>D may include sink and/or source driver electronics that may enable a bidirectional link utilizing a single laser.

0031In operation, the photonically-enabled integrated circuit <b>130</b> may be operable to transmit and/or receive and process optical signals. Optical signals may be received from optical fibers by the grating couplers <b>117</b>A-<b>117</b>D and converted to electrical signals by the photodetectors <b>111</b>A-<b>111</b>D. The electrical signals may be amplified by transimpedance amplifiers in the amplifiers <b>107</b>A-<b>107</b>D, for example, and subsequently communicated to other electronic circuitry, not shown, in the photonically-enabled integrated circuit <b>130</b>.

0032Integrated photonics platforms allow the full functionality of an optical transceiver to be integrated on a single chip. An optical transceiver chip contains optoelectronic circuits that create and process the optical/electrical signals on the transmitter (Tx) and the receiver (Rx) sides, as well as optical interfaces that couple the optical signals to and from a fiber. The signal processing functionality may include modulating the optical carrier, detecting the optical signal, splitting or combining data streams, and multiplexing or demultiplexing data on carriers with different wavelengths, and equalizing signals for reducing and/or eliminating inter-symbol interference (ISI), which may be a common impairment in optical communication systems.

0033ISI may be introduced by a channel and/or the transmitter/receiver of the optical system, and can limit the maximum speed of the communication system. An equalizer may be utilized to mitigate ISI, and may comprise waveguide delay-based equalization. Equalizers may utilize delay elements and weight elements applied to each delayed signal, which may then be summed for an equalized signal with mitigated ISI. In an example scenario, this delay may be accomplished with optical delay and weight control may be enabled through electrical and/or optical means.

0034<figref idref="DRAWINGS">FIG. 1B</figref> is a diagram illustrating an exemplary photonically-enabled integrated circuit, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 1B</figref>, there is shown the photonically-enabled integrated circuit <b>130</b> comprising electronic devices/circuits <b>131</b>, optical and optoelectronic devices <b>133</b>, a light source interface <b>135</b>, a chip front surface <b>137</b>, an optical fiber interface <b>139</b>, CMOS guard ring <b>141</b>, and a surface-illuminated monitor photodiode <b>143</b>.

0035The light source interface <b>135</b> and the optical fiber interface <b>139</b> comprise grating couplers, for example, that enable coupling of light signals via the CMOS chip surface <b>137</b>, as opposed to the edges of the chip as with conventional edge-emitting/receiving devices. Coupling light signals via the chip surface <b>137</b> enables the use of the CMOS guard ring <b>141</b> which protects the chip mechanically and prevents the entry of contaminants via the chip edge.

0036The electronic devices/circuits <b>131</b> comprise circuitry such as the amplifiers <b>107</b>A-<b>107</b>D and the analog and digital control circuits <b>109</b> described with respect to <figref idref="DRAWINGS">FIG. 1A</figref>, for example. The optical and optoelectronic devices <b>133</b> comprise devices such as the couplers <b>103</b>A-<b>103</b>K, optical terminations <b>115</b>A-<b>115</b>D, grating couplers <b>117</b>A-<b>117</b>H, optical modulators <b>105</b>A-<b>105</b>D, high-speed heterojunction photodiodes <b>111</b>A-<b>111</b>D, and monitor photodiodes <b>113</b>A-<b>113</b>I.

0037<figref idref="DRAWINGS">FIG. 1C</figref> is a diagram illustrating a photonically-enabled integrated circuit coupled to an optical fiber cable, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 1C</figref>, there is shown the photonically-enabled integrated circuit <b>130</b> comprising the chip surface <b>137</b>, and the CMOS guard ring <b>141</b>. There is also shown a fiber-to-chip coupler <b>145</b>, an optical fiber cable <b>149</b>, and an optical source assembly <b>147</b>.

0038The photonically-enabled integrated circuit <b>130</b> comprises the electronic devices/circuits <b>131</b>, the optical and optoelectronic devices <b>133</b>, the light source interface <b>135</b>, the chip surface <b>137</b>, and the CMOS guard ring <b>141</b> may be as described with respect to <figref idref="DRAWINGS">FIG. 1B</figref>.

0039In an example embodiment, the optical fiber cable may be affixed, via epoxy for example, to the CMOS chip surface <b>137</b>. The fiber chip coupler <b>145</b> enables the physical coupling of the optical fiber cable <b>149</b> to the photonically-enabled integrated circuit <b>130</b>. In another example scenario, the IC <b>130</b> may comprise photonic devices on one die, such as a photonics interposer, and electrical devices on an electronics die, both of which may comprise CMOS die.

0040<figref idref="DRAWINGS">FIG. 2</figref> illustrates an equalizer, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 2</figref>, there is shown an equalizer <b>200</b> receiving an input signal u(t), which represents an original clean signal r(t) that is subject to the transfer function h(t) of a channel, either Tx or Rx, resulting in a signal with inter-symbol interference (ISI), which may occur in optical communication systems, and may limit the maximum speed of the communication system.

0041The equalizer <b>200</b> comprises a plurality of delay elements <b>203</b>A-<b>203</b>F, multipliers <b>205</b>A-<b>205</b>E, weight functions <b>207</b>A-<b>207</b>E, and a summer <b>209</b>. The equalizer <b>200</b> may generate a delayed version of the original signal r(t) with unintentional ISI utilizing delay elements <b>203</b>A-<b>203</b>F, resulting in delayed signals s(t). The delayed signals s(t) may each be weighted independently, with W_Nbeing either positive or negative, using the multipliers <b>205</b>A-<b>205</b>E and weight functions <b>207</b>A-<b>207</b>E, and then summed using the summer <b>209</b> generating an output signal v(t). Theoretically, this structure may remove all ISI in a communication system, although in practical situations, non-idealities may be encountered. These may include noise added to the system, non-linearity of elements, variation in delay elements to the symbol period Ts, the weight W_Nmay not be controllable or accurate, or the summation may not be accurate.

0042In an example embodiment of the disclosure, the weight and delay elements may be implemented in the optical domain or a combination of optical and electrical, as described further with respect to <figref idref="DRAWINGS">FIGS. 3-5</figref>.

0043<figref idref="DRAWINGS">FIG. 3</figref> illustrates signal weighting for an equalizer, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 3</figref>, there is shown equalizer <b>300</b> comprising input waveguide <b>301</b>A, a directional coupler <b>303</b>, main and equalized waveguides <b>301</b>B and <b>301</b>C, photodiodes <b>307</b>A and <b>307</b>B, and current mirrors <b>305</b>A and <b>305</b>B coupled to each photodiode <b>307</b>A and <b>307</b>B. The directional coupler <b>303</b> may comprise a stabilized directional coupler with slightly increased length in one arm of the coupler to mitigate process variations or other causes of non-uniformity in optical coupling.

0044The directional coupler <b>303</b> may split the input signal λ_in, into two optical signals, λ_mainand λ_eq, with reasonable precision. Although a single directional coupler with two outputs is shown, the disclosure is not so limited as multiple directional couplers may be utilized to generate multiple output optical signals. The two optical paths may be separately converted into electrical current signals using the photodiodes <b>307</b>A and <b>307</b>B, and the current mirrors <b>305</b>A and <b>305</b>B each may amplify the current signal from its corresponding photodiode.

0045The current mirrors <b>305</b>A and <b>305</b>B may comprise two or more CMOS transistors where a drain current through a first CMOS transistor from the associated photodiode is mirrored to the drain of a second CMOS transistor with common gate coupling. The mirrors <b>305</b>A and <b>305</b>B are shown in <figref idref="DRAWINGS">FIG. 3</figref> as NMOS devices with a supply voltage connected to the photodiode anode, but can also be configured with PMOS devices with ground connected to the photodiode cathode. The current mirrors may be a simple current mirror, or complex current mirror with many devices, where the device mirrors current with a ratio.

0046The amplification by the current mirrors <b>305</b>A and <b>305</b>B may be controlled electrically. The overall weight of the equalizer <b>300</b> may therefore be implemented with optical and electronic means, namely the optical splitting via directional coupler <b>303</b> and electrical amplification of the current mirrors <b>305</b>A and <b>305</b>B. With the weighted optical signals converted to electrical current signals, the currents may be summed by shorting the nodes together, such as at the outputs of the current mirrors <b>305</b>A and <b>305</b>B.

0047In addition, one or more photodetectors with multiple waveguide inputs may be utilized for signal summation, as illustrated by the multi-port photodetector <b>307</b> in the lower inset of <figref idref="DRAWINGS">FIG. 3</figref>. Multi-port photodetectors are described in more detail in U.S. patent application Ser. No. 15/592,774, which is hereby incorporated by reference in its entirety.

0048<figref idref="DRAWINGS">FIG. 4</figref> illustrates a one-tap precursor equalizer with optical and electrical weight control, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 4</figref>, there is shown equalizer <b>400</b> comprising input waveguide <b>401</b>A, main and FFE waveguides <b>401</b>B and <b>401</b>C, a directional coupler <b>403</b>, a waveguide delay <b>409</b>, a pair of photodiodes <b>407</b>A and <b>407</b>B, a current mirror <b>405</b>, and a transimpedance amplifier (TIA) <b>411</b>. The directional coupler <b>403</b>, waveguides <b>401</b>A-<b>401</b>C, current mirror <b>405</b>, photodiodes <b>407</b>A and <b>407</b>B may be share any and all aspects of the directional coupler <b>303</b>, waveguides <b>301</b>A-<b>301</b>C, current mirror <b>305</b>, and photodiodes <b>307</b>A and <b>307</b>B described with respect to <figref idref="DRAWINGS">FIG. 3</figref>.

0049The waveguide delay <b>409</b> may comprise an appropriate length waveguide for creating an accurate delay without significant optical power loss. In a typical silicon photonics system, the waveguide delay may comprise a 3 mm waveguide, for example, which may result in ˜40 ps of delay, suitable for a 25G symbol per second signal. The TIA <b>411</b> may comprise a gain stage with a feedback impedance comprising a resistor and/or active elements, generating an output voltage proportional to the input current I_EQ.

0050In the example scenario of <figref idref="DRAWINGS">FIG. 4</figref>, one-tap precursor equalization may be enabled using summation through current summing and weight control via the directional coupler <b>403</b> and current mirror <b>405</b>. Advantages of this type of weight control are that the current mirror <b>405</b> may be accurately adjustable for accurate weight control of the precursor tap, accurate summing may be possible in the current domain, and an accurate delay between the main and precursor tap may be maintained with less variation and power required compared to delay in the electrical domain.

0051An input optical signal λ_INmay be communicated to the directional coupler <b>403</b> via input waveguide <b>401</b>A, and portions of this input signal may be communicated to each of the output waveguides <b>401</b>B and <b>401</b>C via the directional coupler <b>403</b>. Output waveguide <b>401</b>B may be utilized to couple the directional coupler <b>403</b> to the waveguide delay <b>409</b> and subsequently to the photodiode <b>407</b>A, while the other output waveguide <b>401</b>C is coupled directly to photodiode <b>407</b>B. The resulting electrical signal from photodiode <b>407</b>B may be coupled to current mirror <b>405</b>, with the difference current, I_EQ, between the output I_FFEof the current mirror <b>405</b> and the output I_Mainof the photodiode <b>407</b>A coupled to the output TIA <b>411</b>, resulting in an equalized output voltage V_EQ.

0052As with the equalizer <b>300</b> of <figref idref="DRAWINGS">FIG. 3</figref>, the amplification by the current mirror <b>405</b> in the equalizer <b>400</b> may be controlled electrically. The overall weight of the equalizer <b>400</b> may therefore be implemented with optical and electronic means, namely the optical splitting via directional coupler <b>403</b>, and electrical amplification of the current mirror <b>405</b>, while delay is provided by the delay waveguide <b>409</b>. With the weighted optical signals converted to electrical current signals, the currents may be summed by coupling both nodes at the input of the TIA <b>411</b>.

0053The adjustable current mirror <b>405</b> that provides current amplification enables less signal to be tapped from the main path and eliminates extra loading of the sensitive signal path after current to voltage conversion at the TIA <b>411</b>. This structure also allows the equalization to be powered down completely and can be extended to additional equalization taps if desired. To this end, further directional couplers may be incorporated with additional delay lines, current mirrors, and photodetectors for each additional tap, as illustrated by the multi-tap equalizer schematic in <figref idref="DRAWINGS">FIG. 2</figref>, for example.

0054<figref idref="DRAWINGS">FIG. 5A</figref> Illustrates a one-tap pre-cursor, one-tap post-cursor equalizer, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 5A</figref>, there is shown equalizer <b>500</b> comprising waveguides <b>501</b>A-<b>501</b>E, two directional couplers <b>503</b>A and <b>503</b>B, two waveguide delays <b>509</b>A and <b>509</b>B, two photodiodes <b>507</b>A and <b>507</b>B, a current mirror <b>505</b>, delay lines <b>509</b>A and <b>509</b>B, and a TIA <b>511</b>.

0055The directional couplers <b>503</b>A and <b>503</b>B, waveguides <b>501</b>A-<b>501</b>E, current mirror <b>505</b>, photodiodes <b>507</b>A and <b>507</b>B may share any and all aspects of the directional couplers, waveguides, current mirrors, and photodiodes described with respect to <figref idref="DRAWINGS">FIGS. 3 and 4</figref>, for example.

0056The waveguide delays <b>509</b>A and <b>509</b>B may each comprise an appropriate length waveguide for creating an accurate delay without significant optical power loss. In an example scenario, the <b>509</b>B delay is greater than that of <b>509</b>A to enable post-cursor equalization through the delay <b>509</b>B path. The TIA <b>511</b> may comprise a gain stage with a feedback impedance comprising a resistor and/or active elements, generating an output voltage proportional to the input current I_EQ.

0057An input optical signal λ_inmay be received on input waveguide <b>501</b>A and a portion of the signal may be coupled to each of the output waveguides <b>501</b>B and <b>501</b>C of the first directional coupler <b>503</b>A, with one output waveguide <b>501</b>B coupled to delay waveguide <b>509</b>A and subsequently to photodiode <b>507</b>A. The other output waveguide <b>501</b>C may be coupled to second directional coupler <b>503</b>B whose outputs may be coupled to the photodiode <b>507</b>B via waveguide <b>501</b>D and to second waveguide delay <b>509</b>B via waveguide <b>501</b>E, which is subsequently coupled to the photodiode <b>507</b>B. The photodiode <b>507</b>B comprises a two input port photodiode in this embodiment, as illustrated in the example structure shown in the lower inset of <figref idref="DRAWINGS">FIG. 5A</figref>.

0058As a two-port photodiode, photodiode <b>507</b>B provides optical summing of the input optical signals λ_preand λ_pst. The current of the photodiode <b>507</b>B may be amplified/mirrored by the current mirror <b>505</b>, which may be summed with the current from the photodiode <b>507</b>A at the TIA <b>511</b>. The difference current, I_EQ, between the output I_pre+pstof the current mirror <b>505</b> and the output I_Mainof the photodiode <b>507</b>A may be coupled to the output TIA <b>511</b>, resulting in an equalized output voltage V_EQ.

0059The one-tap pre-cursor, one-tap post-cursor equalization equalizer <b>500</b> may utilize both current and optical summing and provide weight control with directional couplers and a current mirror. Advantages of this embodiment are that the current mirror <b>505</b> may be accurately adjustable for accurate weight control of the precursor tap, accurate summing may be possible in the current domain at the outputs of the photodiodes <b>507</b>A and <b>507</b>B, and an accurate delay between the main and precursor tap may be maintained with less variation and power required than when done in the electrical domain.

0060As with the equalizers <b>300</b> and <b>400</b> of <figref idref="DRAWINGS">FIGS. 3 and 4</figref>, the amplification by the current mirror <b>505</b> in the equalizer <b>500</b> may be controlled electrically. The overall weight of the equalizer <b>500</b> may therefore be implemented with optical and electronic means, namely the optical splitting via directional couplers <b>503</b>A and <b>503</b>B, and electrical amplification of the current mirror <b>505</b>, and optical summing by the photodiode <b>507</b>B while delay is provided by the delay waveguides <b>509</b>A and <b>509</b>B. With the weighted optical signals converted to electrical current signals, the currents may be summed by coupling both nodes at the input of the TIA <b>511</b>.

0061Further advantages of the embodiment shown in <figref idref="DRAWINGS">FIG. 5A</figref> are that an adjustable current mirror <b>505</b> with amplification allows for less signal to be tapped from the main path λ_main, and the equalization path may be shut down completely if desired, eliminating extra loading of the sensitive signal path after current to voltage conversion by the TIA. Finally, the one-tap pre-cursor, one-tap post-cursor equalization equalizer <b>500</b> may achieve multi-tap equalization with a single photodiode/current mirror structure and may be extended to additional equalization steps if desired. To this end, further directional couplers may be incorporated with additional delay lines, current mirrors, and photodetectors for each additional tap, as illustrated by the multi-tap equalizer schematic in <figref idref="DRAWINGS">FIG. 2</figref>, for example.

0062<figref idref="DRAWINGS">FIG. 5B</figref> Illustrates another example of a one-tap pre-cursor, one-tap post-cursor equalizer, in accordance with an example embodiment of the disclosure. Referring to <figref idref="DRAWINGS">FIG. 5B</figref>, there is shown equalizer <b>550</b> comprising waveguides <b>501</b>A-<b>501</b>E, two directional couplers <b>503</b>A and <b>503</b>B, two waveguide delays <b>509</b>A and <b>509</b>B, three photodiodes <b>507</b>A-<b>507</b>C, a current mirror <b>505</b>, delay lines <b>509</b>A and <b>509</b>B, and a TIA <b>511</b>.

0063The directional couplers <b>503</b>A and <b>503</b>B, waveguides <b>501</b>A-<b>501</b>E, current mirror <b>505</b>, photodiodes <b>507</b>A-<b>507</b>C may be share any and all aspects of the directional couplers, waveguides, current mirrors, and photodiodes described with respect to <figref idref="DRAWINGS">FIGS. 3, 4, and 5A</figref>, for example.

0064The waveguide delays <b>509</b>A and <b>509</b>B may each comprise an appropriate length waveguide for creating an accurate delay without significant optical power loss. In an example scenario, the <b>509</b>B delay is greater than that of <b>509</b>A to enable post-cursor equalization through the delay <b>509</b>B path. The TIA <b>511</b> may comprise a gain stage with a feedback impedance comprising a resistor and/or active elements, generating an output voltage proportional to the input current I_EQ.

0065An input optical signal λ_inmay be received on input waveguide <b>501</b>A and a portion of the signal may be coupled to each of the output waveguides <b>501</b>B and <b>501</b>C of the first directional coupler <b>503</b>A, with one output waveguide <b>501</b>B coupled to delay waveguide <b>509</b>A and subsequently to photodiode <b>507</b>A. The other output waveguide <b>501</b>C may be coupled to second directional coupler <b>503</b>B whose outputs may be coupled to the photodiode <b>507</b>B via waveguide <b>501</b>D and to second waveguide delay <b>509</b>B via waveguide <b>501</b>E, which is subsequently coupled to the photodiode <b>507</b>C.

0066In the example shown in <figref idref="DRAWINGS">FIG. 5B</figref>, as compared to the example shown in <figref idref="DRAWINGS">FIG. 5A</figref>, the multi-port photodiode <b>507</b>B is replaced with two photodiodes <b>507</b>B and <b>507</b>C, with their output currents summed by coupling their output terminals, cathodes in this example, and then mirrored by the current mirror <b>505</b>. The resulting current may be summed with the current from the photodiode <b>507</b>A at the TIA <b>511</b>. The difference current, I_EQ, between the output I_pre+pstof the current mirror <b>505</b> and the output I_Mainof the photodiode <b>507</b>A may be coupled to the output TIA <b>511</b>, resulting in an equalized output voltage V_EQ.

0067The one-tap pre-cursor, one-tap post-cursor equalization equalizer <b>550</b> may utilize current summing and provide weight control with directional couplers and a current mirror. Advantages of this embodiment are that the current mirror <b>505</b> may be accurately adjustable for accurate weight control of the precursor tap, accurate summing may be possible in the current domain at the outputs of the photodiodes <b>507</b>A-<b>507</b>C, and an accurate delay between the main and precursor tap may be maintained with less variation and power required than when done in the electrical domain.

0068As with the equalizers <b>300</b> and <b>400</b> of <figref idref="DRAWINGS">FIGS. 3 and 4</figref>, the amplification by the current mirror <b>505</b> in the equalizer <b>550</b> may be controlled electrically. The overall weight of the equalizer <b>550</b> may therefore be implemented with optical and electronic means, namely the optical splitting via directional couplers <b>503</b>A and <b>503</b>B, and electrical amplification of the current mirror <b>505</b>, and current summing of the output currents of the photodiodes <b>507</b>A-<b>507</b>C, while delay is provided by the delay waveguides <b>509</b>A and <b>509</b>B.

0069Further advantages of the embodiment shown in <figref idref="DRAWINGS">FIG. 5B</figref> are that an adjustable current mirror <b>505</b> with amplification allows for less signal to be tapped from the main path λ_main, and the equalization path may be shut down completely if desired, eliminating extra loading of the sensitive signal path after current to voltage conversion by the TIA. Finally, the one-tap pre-cursor, one-tap post-cursor equalization equalizer <b>550</b> may achieve multi-tap equalization with a multiple photodiode/single current mirror structure and may be extended to additional equalization steps if desired. To this end, further directional couplers may be incorporated with additional delay lines, current mirrors, and photodetectors for each additional tap, as illustrated by the multi-tap equalizer schematic in <figref idref="DRAWINGS">FIG. 2</figref>, for example.

0070In an example embodiment, a method and system are disclosed for waveguide delay based equalization with current and optical summing in optical communication. In this regard, aspects of the disclosure may comprise an optoelectronic receiver comprising a directional coupler, two or more photodiodes, and one or more current mirrors. The optoelectronic receiver is operable to: receive an input optical signal; split the input optical signal into first and second optical signals using the directional coupler; generate a first electrical from the first optical signal using a first photodiode; generate a second electrical signal from the second optical signal using a second photodiode; amplify the second electrical signal using the current mirror; and sum the first electrical signal with the amplified second electrical signal.

0071The optoelectronic receiver may be operable to delay the first optical signal before generating the first electrical signal, and may do so by using a waveguide delay. The optoelectronic receiver may be operable to generate an equalized output voltage by coupling the summed first electrical signal and amplified second electrical signal utilizing a transimpedance amplifier. The optoelectronic receiver may be operable to split the second optical signal into third and fourth optical signals using a second directional coupler before generating the second electrical signal.

0072The second photodetector may comprise two inputs for receiving optical signals. The optoelectronic receiver may be operable to delay the fourth optical signal using a waveguide delay. The optoelectronic receiver may be operable to weight the first and second optical signals by configuring a coupling coefficient of the directional coupler. The optoelectronic receiver may be on a silicon complementary metal oxide semiconductor (CMOS) photonic die.

0073In another example embodiment, a method and system are disclosed for waveguide delay based equalization with current and optical summing in optical communication. In this regard, aspects of the disclosure may comprise an optoelectronic receiver comprising first and second directional couplers, first and second photodiodes, first and second waveguide delays, and a current mirror. The optoelectronic receiver is operable to: receive an input optical signal; split the input optical signal into first and second optical signals using the first directional coupler; delay the first optical signal utilizing the first delay waveguide; generate a first electrical from the delayed first optical signal using a first photodiode; split the second optical signal into third and fourth optical signals; delay the fourth optical signal using the second delay waveguide; generate a second electrical signal from the third optical signal and the delayed fourth optical signal using the second photodiode; amplify the second electrical signal using the current mirror; and sum the first electrical signal with the amplified second electrical signal.

0074While the disclosure has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present disclosure. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the present disclosure without departing from its scope. Therefore, it is intended that the present disclosure not be limited to the particular embodiments disclosed, but that the present disclosure will include all embodiments falling within the scope of the appended claims.