TWM302832U

Current mirror and light emitting device with the current mirror

Abstract

This invention provides current mirrors. There are an input current and an output current flowing through a first and second transistor, respectively. The ratio of the input and output current is 1:N. The first and second transistors have equal VGS. With a first and second operational amplifier and a control circuit, VDS of the first and second transistors are set to a control voltage. With a proper control voltage, the first and second transistors can operate in a triode region. In contrast to conventional current mirror, the current mirror of the invention provides larger output current and larger cross voltage for a load. The transistors of the invention can be operated at larger VGS.

TWM302832U, drawing sheet 1
Sheet 1 of 5

Term

No projected expiry on record.

  1. Priority and filed
  2. Granted
  3. Today

12 claims: 12 independent, 0 dependent

  1. 1
    A current mirror includes:an input stage circuit including a first transistor, and the current flowing through the first transistor is an input current;an output stage circuit includes a second transistor, the second transistor Has the same gate-source voltage as the first transistor, and the current flowing through the second transistor is an output current, and there is a fixed ratio between the output current and the input current;a first operational amplifier, according to the The drain-source voltage of the first transistor and the second transistor generate an output signal;a control circuit adjusts the drain-source voltage of the second transistor according to the output signal, so that the first transistor and the second transistor The drain-source voltage of the transistor is equal;and a second operational amplifier controls the first transistor according to a control voltage and the drain-source voltage of the first transistor, so that the drain-source voltage of the first transistor is equal to The control voltage;wherein the first and second transistors can be operated in a triode region by setting the control voltage. Μ3〇38^2θ610 號申請專利範圍修正本 修正日期:95.10.12 九、申請專利範圍: 1. 一種電流鏡,其中包括: 一輸入級電路,包括一第一電晶體,流經該第一電晶體之 - 電流為一輸入電流; . 一輸出級電路,包括一第二電晶體,該第二電晶體與該第 一電晶體具有相同的閘源極電壓’流經該弟二電晶體之電流為 一輸出電流,該輸出電流與該輸入電流之間具有一固定比値; 一第一運算放大器,根據該第一電晶體與該第二電晶體之 鲁汲源極電壓產生一輸出信號; 一控制電路,根據該輸出信號調整該第二電晶體之汲源極 電壓,使該第一電晶體與該第二電晶體之汲源極電壓相等;以 及 一第二運算放大器,根據一控制電壓以及該第一電晶體之 汲源極電壓控制該第一電晶體,使該第一電晶體之汲源極電壓 等於該控制電壓; 其中,藉由設定該控制電壓,可將該第一與第二電晶體操 作在二極體區。 2. 如申請專利範圍第1項所述之電流鏡,其中該控制電路 包括一第三電晶體,該第三電晶體之閘極耦接該第一運算放大 器之輸出端、源極I禺接該第一運算放大器之反相輸入端與該第 二電晶體之汲極,該第三電晶體之汲極為該電流鏡之負載端, 該負載端可柄接一負載’流經該負載的電流即該輸出電流。 3. 如申請專利範圍第1項所述之電流鏡,其中該第一電晶 體之閘極耦接該第二運算放大器之輸出端、汲極耦接該第二運 0119-A21604TWF1(N2);Princeton9507;glorious_tien 12 M302832 算放大器之非反向輸入端。 4. 如申請專利範圍第1項所述之電流鏡,其中該固定比値 可藉由調整該第一電晶體與該第二電晶體之通道區域寬長比 . 來決定。 5. 如申請專利範圍第1項所述之電流鏡,上述電晶體皆為 ' NMOS電晶體。 6. 如申請專利範圍第1項所述之電流鏡,上述電晶體皆為 PMOS電晶體。 φ 7.—種發光裝置,其中包括: 複數個發光二極體;以及 一電流鏡,其中包括: 一輸入級電路,包括一第一電晶體,流經該第一電晶體之 電流為一輸入電流; 一輸出級電路,包括一第二電晶體,該第二電晶體與該第 一電晶體具有相同的閘源極電壓,流經該第二電晶體之電流為 一輸出電流,該輸出電流與該輸入電流之間具有一固定比値; • 一第一運算放大器,根據該第一電晶體與該第二電晶體之 没源極電壓產生一輸出信號; 一控制電路,根據該輸出信號調整該第二電晶體之汲源極 電壓,使該第一電晶體與該第二電晶體之汲源極電壓相等,該 控制電路具有一負載端耦接該等發光二極體並且提供該輸出 . 電流給該等發光二極體;以及 一第二運算放大器,根據一控制電壓以及該第一電晶體之 汲源極電壓控制該第一電晶體,使該第一電晶體之汲源極電壓 等於該控制電壓; 0119-A21604TWF1 (N2);Princeton9507;glorious_tien 13 M302832 其中,藉由設定該控制電壓,可將該第一與第二電晶體操 作在二極體區。 8.如申請專利範圍第7項所述之發光裝置,其中該控制電 _ 路包括一第三電晶體,該第三電晶體之閘極耦接該第一運算放 . 大器之輸出端,該第三電晶體之源極耦接該第一運算放大器之 • 反相輸入端與該第二電晶體之汲極、汲極即該負載端。 * 9.如申請專利範圍第7項所述之發光裝置,其中該第一電 晶體之閘極耦接該第二運算放大器之輸出端、汲極耦接該第二 春運算放大器之非反向輸入端。 10.如申請專利範圍第7項所述之發光裝置,其中該固定比 値可藉由調整該第一電晶體與該第二電晶體之通道區域寬長 比來決定。 ^ 11.如申請專利範圍第7項所述之發光裝置,上述電晶體皆 為NMOS電晶體。 12.如申請專利範圍第7項所述之發光裝置,上述電晶體皆 為PMOS電晶體。 0119-A21604TWF1(N2);Princeton9507;glorious_tien 14 M302832 七、指定代表圖: (一) 本案指定代表圖為:第(3 )圖。 (二) 本代表圖之元件符號簡單說明: 300〜電流鏡; 302〜輸入級電路; 304〜輸出級電路; 306〜第一運算放大器; 308〜控制電路; 310〜第二運算放大器; 312〜輸出信號; I〜輸入電流; 輸出電流; Vc〜控制電壓; Mnl〜第一 NMOS電晶體; Mn2〜第二NMOS電晶體; Mn3〜第三NMOS電晶體; Vdd〜電源; VdSI、Vj)S2〜〉及源極電壓, Vgs〜閘源極電壓。 一種電流鏡,其中包括:一輸入級電路,包括一第一電晶體,流經該第一電晶體之電流為一輸入電流;一輸出級電路,包括一第二電晶體,該第二電晶體與該第一電晶體具有相同的閘源極電壓,流經該第二電晶體之電流為一輸出電流,該輸出電流與該輸入電流之間具有一固定比值;一第一運算放大器,根據該第一電晶體與該第二電晶體之汲源極電壓產生一輸出信號;一控制電路,根據該輸出信號調整該第二電晶體之汲源極電壓,使該第一電晶體與該第二電晶體之汲源極電壓相等;以及一第二運算放大器,根據一控制電壓以及該第一電晶體之汲源極電壓控制該第一電晶體,使該第一電晶體之汲源極電壓等於該控制電壓;其中,藉由設定該控制電壓,可將該第一與第二電晶體操作在三極體區。 0119-A21604TWF1(N2);Princeton9507;glorious_tien 4
  2. 2
    The current mirror according to item 1 of the patent application scope, wherein the control circuit includes a third transistor, the gate of the third transistor is coupled to the output terminal of the first operational amplifier, and the source is coupled to the first transistor. The inverting input of the operational amplifier and the drain of the second transistor, and the drain of the third transistor is the load of the current mirror. The load can be coupled to a load, and the current flowing through the load is the output. Current. 如申請專利範圍第1項所述之電流鏡,其中該控制電路包括一第三電晶體,該第三電晶體之閘極耦接該第一運算放大器之輸出端、源極耦接該第一運算放大器之反相輸入端與該第二電晶體之汲極,該第三電晶體之汲極為該電流鏡之負載端,該負載端可耦接一負載,流經該負載的電流即該輸出電流。
  3. 3
    The current mirror according to item 1 of the scope of patent application, wherein the gate of the first transistor is coupled to the output of the second operational amplifier, and the drain is coupled to the non-inverting input of the second operational amplifier. 如申請專利範圍第1項所述之電流鏡,其中該第一電晶體之閘極耦接該第二運算放大器之輸出端、汲極耦接該第二運算放大器之非反向輸入端。
  4. 4
    The current mirror according to item 1 of the scope of patent application, wherein the fixed ratio can be determined by adjusting a width-to-length ratio of a channel region of the first transistor and the second transistor. 如申請專利範圍第1項所述之電流鏡,其中該固定比值可藉由調整該第一電晶體與該第二電晶體之通道區域寬長比來決定。
  5. 5
    According to the current mirror described in the first item of the patent application scope, the above transistors are all NMOS transistors. 如申請專利範圍第1項所述之電流鏡,上述電晶體皆為NMOS電晶體。
  6. 6
    According to the current mirror described in the first item of the patent application scope, the above transistors are all PMOS transistors. 如申請專利範圍第1項所述之電流鏡,上述電晶體皆為PMOS電晶體。
  7. 7
    A light-emitting device includes:a plurality of light-emitting diodes;and a current mirror, including: an input stage circuit including a first transistor, and a current flowing through the first transistor is an input current;an output A stage circuit includes a second transistor having the same gate-source voltage as the first transistor, and the current flowing through the second transistor is an output current, and the output current and the input current There is a fixed ratio between them;a first operational amplifier generates an output signal according to the drain-source voltage of the first transistor and the second transistor;a control circuit adjusts the voltage of the second transistor according to the output signal Sink source voltage to make the drain voltage of the first transistor equal to that of the second transistor. The control circuit has a load terminal coupled to the light emitting diodes and provides the output current to the light emitting diodes. And a second operational amplifier, which controls the first transistor according to a control voltage and a drain-source voltage of the first transistor, so that the drain-source voltage of the first transistor is equal to the control transistor ;Wherein, by setting the control voltage, the first transistor and the second operation in the triode region. 一種發光裝置,其中包括:複數個發光二極體;以及一電流鏡,其中包括:一輸入級電路,包括一第一電晶體,流經該第一電晶體之電流為一輸入電流;一輸出級電路,包括一第二電晶體,該第二電晶體與該第一電晶體具有相同的閘源極電壓,流經該第二電晶體之電流為一輸出電流,該輸出電流與該輸入電流之間具有一固定比值;一第一運算放大器,根據該第一電晶體與該第二電晶體之汲源極電壓產生一輸出信號;一控制電路,根據該輸出信號調整該第二電晶體之汲源極電壓,使該第一電晶體與該第二電晶體之汲源極電壓相等,該控制電路具有一負載端耦接該等發光二極體並且提供該輸出電流給該等發光二極體;以及一第二運算放大器,根據一控制電壓以及該第一電晶體之汲源極電壓控制該第一電晶體,使該第一電晶體之汲源極電壓等於該控制電壓;其中,藉由設定該控制電壓,可將該第一與第二電晶體操作在三極體區。
  8. 8
    The light-emitting device according to item 7 of the scope of patent application, wherein the control circuit includes a third transistor, and a gate of the third transistor is coupled to an output terminal of the first operational amplifier and a source of the third transistor. A terminal is coupled to the inverting input terminal of the first operational amplifier and the drain terminal of the second transistor, and the drain terminal is the load terminal. 如申請專利範圍第7項所述之發光裝置,其中該控制電路包括一第三電晶體,該第三電晶體之閘極耦接該第一運算放大器之輸出端,該第三電晶體之源極耦接該第一運算放大器之反相輸入端與該第二電晶體之汲極、汲極即該負載端。
  9. 9
    The light-emitting device according to item 7 of the scope of patent application, wherein a gate of the first transistor is coupled to an output terminal of the second operational amplifier, and a drain is coupled to a non-inverting input terminal of the second operational amplifier. 如申請專利範圍第7項所述之發光裝置,其中該第一電晶體之閘極耦接該第二運算放大器之輸出端、汲極耦接該第二運算放大器之非反向輸入端。
  10. 10
    The light-emitting device according to item 7 of the scope of patent application, wherein the fixed ratio can be determined by adjusting a width-to-length ratio of a channel region of the first transistor and the second transistor. 如申請專利範圍第7項所述之發光裝置,其中該固定比值可藉由調整該第一電晶體與該第二電晶體之通道區域寬長比來決定。
  11. 11
    According to the light-emitting device described in item 7 of the scope of patent application, the transistors are all NMOS transistors. 如申請專利範圍第7項所述之發光裝置,上述電晶體皆為NMOS電晶體。
  12. 12
    According to the light-emitting device described in item 7 of the patent application scope, the transistors are all PMOS transistors. 如申請專利範圍第7項所述之發光裝置,上述電晶體皆為PMOS電晶體。