Switch device

switchgear

SWITCH DEVICE

The present invention relates to a switch device, especially a switch device that can reduce the influence of a control signal on a node voltage and/or can accelerate a transition response.

The switch device can be used on the transmission path of the signal, and it can be provided with a plurality of series-connected transistors on the transmission path, so as to avoid signal distortion of relatively high-power signals and avoid device damage caused by excessive power.

However, when each of a plurality of series-connected transistors is turned on and off, the voltage change at the control terminal of the transistors is capacitively coupled, which will cause a problem that the transient response is too slow, causing the transistors It is difficult to turn on or off in time, which makes it difficult to increase the operating speed of the circuit. Therefore, the art still lacks a suitable solution to deal with the related problems and improve the performance of the circuit.

The embodiment provides a switch device, which includes a first radio frequency terminal, a second radio frequency terminal, a first transistor, a second transistor and a variable resistance element. The first radio frequency end is used for receiving radio frequency signals, and is coupled to the bias signal end for providing bias voltage. The second radio frequency terminal is used for receiving the radio frequency signal through a predetermined path, and is coupled to the bias signal terminal. The predetermined path is between the first radio frequency terminal and the second radio frequency terminal. The first transistor includes a first end coupled to the first radio frequency end, a second end, and a control end. The second transistor includes a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the second radio frequency terminal, and a control terminal. The variable resistance element includes a first terminal coupled to the second terminal of the first transistor, and a second terminal coupled to the bias signal terminal. When the first transistor and the second transistor root When the variable resistance element is turned on according to the control signal, the variable resistance element provides a first resistance value, and when the first transistor and the second transistor are turned on according to the control signal, the variable resistance element provides a value greater than the first resistance value. The second resistance value of the resistance value.

Another embodiment provides a switch device, including a first radio frequency terminal, a second radio frequency terminal, a first transistor, a second transistor and a capacitor. The first radio frequency end is used for receiving radio frequency signals, and is coupled to the bias signal end for providing bias voltage. The second radio frequency terminal is used for receiving the radio frequency signal through a predetermined path, and is coupled to the bias signal terminal. The predetermined path is between the first radio frequency terminal and the second radio frequency terminal. The first transistor includes a first end coupled to the first radio frequency end, a second end, and a control end. The second transistor includes a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the second radio frequency terminal, and a control terminal. The capacitor is coupled between the second terminal of the first transistor and a second control signal terminal providing a second control signal. When the first transistor and the second transistor transition according to the first control signal, the first control signal transitions from the first level to the second level, and the second control signal transitions from the third level Change to fourth level.

<p>100,700,800,1000: switchgear</p><p>111, 112, 113: curves</p><p>A,B,C,D,I,II,III,IV: stages</p><p>A1, A2: range</p><p>Cc1, Cc2: capacitance</p><p>L1, L2, L3, L4: level</p><p>N1, N2: nodes</p><p>PTH: path</p><p>R1, R2, Rc1, Rc2: Resistors</p><p>Rds1, Rds2, Rds3: operating resistance</p><p>RF1, RF2: emitter terminal</p><p>Rg1, Rg2, Rg3: Control resistors</p><p>Rrf1, Rrf2: RF resistance</p><p>Rv1, Rv2: variable resistance elements</p><p>Srf: radio frequency signal</p><p>SW1: switch</p><p>T1, T2, T3: Transistor</p><p>TA, TB: time</p><p>VBIAS: bias signal terminal</p><p>Vd: voltage difference</p><p>VG, VGB: control signal terminal</p>

Fig. 1 is a schematic diagram of the switching device in the embodiment.

Fig. 2 is a schematic diagram of the operation of the switch device in Fig. 1.

FIG. 3 to FIG. 6 are schematic diagrams of variable resistance elements in various embodiments.

Fig. 7 is a schematic diagram of a switch device in another embodiment.

Fig. 8 is a schematic diagram of a switch device in another embodiment.

Figure 9 is a schematic diagram of control signals in Figure 8.

Fig. 10 is a schematic diagram of a switch device in another embodiment.

Figure 11 is a graph of the results before and after improvement according to the embodiment.

In order to deal with the aforementioned difficulties, embodiments may provide switching devices as a solution. Herein, when it is mentioned that the first value is substantially equal to the second value, the statement may include the situation that the difference between the first value and the second value is not more than 10% of either of them.

FIG. 1 is a schematic diagram of a switch device 100 in an embodiment. The switch device 100 may include a radio frequency terminal RF1 , a radio frequency terminal RF2 , a first transistor T1 , a second transistor T2 and a variable resistance element Rv1 . The first radio frequency terminal RF1 can be used for receiving the radio frequency signal Srf, and is coupled to the bias signal terminal VBIAS for providing a bias voltage. The second radio frequency terminal RF2 can be used to receive the radio frequency signal Srf through a predetermined path PTH, and is coupled to the bias signal terminal VBIAS, wherein the predetermined path PTH can be between the first radio frequency terminal RF1 and the second radio frequency terminal RF2. The first transistor T1 may include a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the radio frequency terminal RF1, and the control terminal is coupled to the control signal terminal VG providing a control signal. The second transistor T2 includes a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the second terminal of the first transistor T1, the second terminal is coupled to the radio frequency terminal RF2, and the control terminal is coupled to the Control signal terminal VG. The variable resistance element Rv1 includes a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the first transistor T1, and the second terminal is coupled to the bias signal terminal VBIAS. As shown in FIG. 1, for example, both the first terminal of the second transistor T2 and the second terminal of the first transistor T1 can be coupled to the intermediate node N1. In this case, the variable resistance element Rv1 The first terminal is coupled to the intermediate node N1. In the embodiment shown in FIG. 1 , the control terminals of the first transistor T1 and the second transistor T2 are coupled to the same control signal terminal VG, but the disclosure is not limited thereto. In other embodiments, the control terminals of the first transistor T1 and the second transistor T2 can be respectively coupled to different control signal terminals, but the different control signal terminals are used to control the transistors T1 and T2 respectively, so that the transistors Crystals T1 and T2 are simultaneously in transition or steady state.

The first transistor T1 and the second transistor T2 can be controlled according to the control signal provided by the control signal terminal VG A signal (for example, a voltage signal) is in an on state, an off state, switched from an on state to an off state, and/or switched from an off state to an on state, wherein the on state or the off state can be called the steady state of the transistor. When the first transistor T1 and the second transistor T2 switch between the on state and the off state according to the voltage of the control signal provided by the control signal terminal VG, it can be called the transition state of the transistor. For example, when the voltage of the control terminal of transistor T1 (coupled to the control signal terminal VG in Figure 1) changes from a low level to a high level, the transistor T1 switches from an off state to an on state, because the transistor T1 controls The coupling effect of the parasitic capacitance between the terminal and the second terminal (for example, the source terminal), the voltage of the second terminal of the transistor T1 is affected by the voltage level change of the control terminal and is pulled up, so that the control terminal and the second terminal of the transistor T1 The voltage difference between them is reduced, and the transition speed of transistor T1 is slower.

Through the structure of the switching device 100 of the embodiment, on the graph of voltage versus time, the voltage curve of the second terminal of the transistor (for example, transistor T1) is flattened to increase the transition speed of the transistor, thereby accelerating transition response.

According to an embodiment, the first transistor T1 and the second transistor T2 may be N-type transistors or P-type transistors. When the first transistor T1 and the second transistor T2 are N-type transistors, the first terminal, the second terminal and the control terminal can be respectively the drain terminal, the source terminal and the gate ( gate) end. In this case, when the level of the control signal (for example, a voltage signal) provided by the control signal terminal VG is a high level, the first transistor T1 and the second transistor T2 are turned on, and the control signal provided by the control signal terminal VG When the level of is low, the first transistor T1 and the second transistor T2 are cut off. In other embodiments, when the first transistor T1 and the second transistor T2 are P-type transistors, the level of the control signal provided by the first transistor T1 and the second transistor T2 at the control signal terminal VG is high. It is turned off on time, and the level of the control signal provided by the control signal terminal VG is low and turned on on time. According to the embodiment, in FIG. 1, when the first transistor T1 and the second transistor T2 are in a transition state or a steady state, the bias signal terminal VBIAS can provide a fixed voltage bias, and the level of the bias can be It is about 40% to 60% of the high level of the control signal provided by the control signal terminal VG, for example, 50%.

According to an embodiment, when the first transistor T1 and the second transistor T2 are in transition, the variable resistance element Rv1 can provide a first resistance value Ra. When the first transistor T1 and the second transistor T2 are turned on, the variable resistance element Rv1 can provide a second resistance value Rb greater than the first resistance value Ra, that is, Ra&lt;Rb. When the first transistor T1 and the second transistor T2 are turned off, the variable resistance element Rv1 can provide a third resistance value Rc greater than the first resistance value Ra, that is, Ra&lt;Rc. In other words, as shown in Table 1:<tables><img file="TWI802129B_D0001.tif" /></tables>

FIG. 2 is a schematic diagram of the operation of the switch device 100 in FIG. 1 . As shown in Figures 1 and 2, in phase A, the path PTH is turned on, wherein the first transistor T1 and the second transistor T2 are turned on, so that the radio frequency signal can be transmitted from the radio frequency terminal RF1 to the radio frequency terminal RF2, for example, at this time The variable resistance element Rv1 has a larger second resistance value Rb to reduce the loss of the radio frequency signal.

In stage B, the first transistor T1 and the second transistor T2 are in transition, and the path PTH is switched from on to off. In this case, in order to make the first transistor T1 and the second transistor T2 quickly change from the on state In the cut-off state, the variable resistance element Rv1 can provide a small first resistance value Ra, so that the voltages of the second end of the first transistor T1 and the first end of the second transistor T2 (that is, the node N1) quickly Close to the voltage provided by the bias signal terminal VBIAS.

In stage C, the path PTH is cut off, wherein the first transistor T1 and the second transistor T2 are cut off, and at this time the variable resistance element Rv1 has a larger third resistance value Rc to reduce the loss of the radio frequency signal.

In phase D, similar to phase B, the first transistor T1 and the second transistor T2 transition, the path PTH turns from off state to on state. In this case, in order to make the first transistor T1 and the second transistor T2 quickly change from the off state to the on state, the variable resistance element Rv1 can provide a smaller first resistance value Ra , so that the voltages of the second terminal of the first transistor T1 and the first terminal of the second transistor T2 (ie, the node N1 ) quickly approach the voltage provided by the bias signal terminal VBIAS.

In one embodiment, the ideal value of the first resistance value Ra may be 0, and the ideal values of the second resistance value Rb and the third resistance value Rc may be infinite. However, according to the embodiment, the first resistance value Ra, the second resistance value Rb and the third resistance value Rc can be appropriately set according to the structure of the variable resistance element Rv1. According to an embodiment, the third resistance value Rc may be substantially equal to the second resistance value Rb, for example, the difference between the two may not be greater than 10%.

FIG. 3 to FIG. 6 are schematic diagrams of the variable resistance element Rv1 in various embodiments. According to an embodiment, the variable resistance element Rv1 may include a set of resistors R1, and a switch SW1 coupled to the set of resistors R1. The switch SW1 can receive a control voltage signal (not shown in the figure), and is turned on or off according to the control voltage signal. The operation of switch SW1 is shown in Table 2:<tables><img file="TWI802129B_D0002.tif" /></tables>

As shown in Table 1 and Table 2, when the first transistor ( T1 ) and the second transistor ( T2 ) are in transition, the switch SW1 is turned on, and the variable resistance element Rv1 can provide a smaller resistance value Ra. When the first transistor ( T1 ) and the second transistor ( T2 ) are in a steady state (for example, on or off), the switch SW1 is turned off, and the variable resistance element Rv1 can provide a larger resistance value Rb or Rc. For example, during phase B or D, the control terminal of the switch SW1 can receive a short-term high-level control voltage signal (not shown in the figure), so as to turn on the switch SW1 . During phase A or C, the control voltage signal at the control terminal of switch SW1 can be maintained at phase For a low level, the switch SW1 is kept in an off state. Further, the control voltage signal of the switch SW1 may have a pulse waveform.

According to an embodiment, the set of resistors R1 may be coupled between the second terminal of the first transistor T1 (ie, the node N1 in FIG. 1 ) and the switch SW1 (ie, the range A1 in FIG. 3 ), and/or It is coupled between the switch SW1 and the bias signal terminal VBIAS (that is, the range A2 in FIG. 4 ). As shown in FIG. 3 , the set of resistors R1 can be coupled to the range A1, and the switch SW1 can be coupled between the set of resistors R1 and the bias signal terminal VBIAS. As shown in FIG. 4 , the switch SW1 can be coupled between the node N1 and the set of resistors R1 , and the set of resistors R1 can be coupled to the range A2 . 3 and 4 are only examples, and the set of resistors R1 may also include multiple resistors, such as two resistors, and the two resistors are respectively coupled to the range A1 and the range A2.

According to an embodiment, as shown in FIG. 5 and FIG. 6, the variable resistance element Rv1 may further include a resistor R2, wherein the first end of the resistor R2 is coupled to the first end of the switch SW1, and the second end of the resistor R2 Coupled to the second end of the switch SW1. In other words, resistor R2 is connected in parallel with switch SW1. FIG. 5 and FIG. 6 are only examples, and the set of resistors R1 may also include multiple resistors, such as two resistors, and the two resistors are respectively coupled to the range A1 and the range A2.

According to an embodiment, as shown in FIGS. 3 to 6, in the variable resistance element Rv1, the switch SW1 may include a transistor, and the size of the transistor may be smaller than that of the first transistor T1, and may be further smaller than that of the second transistor T1. The size of transistor T2. Therefore, compared with the first transistor T1 and the second transistor T2, the switching speed of the switch SW1 between on and off can be faster, which helps to adjust the voltage level of the node N1 in time.

FIG. 3 to FIG. 6 are only schematic diagrams. According to an embodiment, the switch SW1 may include a plurality of sub-switches connected in series. For example, the switch SW1 includes n sub-switches, wherein the second end of the i-th switch can be coupled to the first end of the i+1-th switch, i and n are positive integers and 0&lt;i&lt;n.

FIG. 7 is a schematic diagram of a switch device 700 in another embodiment. Compared with the switch device 100 in FIG. 1 , the switch device 700 may further include a third transistor T3 and a variable resistance element Rv2 . third transistor T3 can be arranged between the second transistor T2 and the radio frequency terminal RF2, and the third transistor T3 can include a first terminal, a second terminal and a control terminal, wherein the first terminal can be coupled to the first terminal of the second transistor T2 Two terminals (such as the node N2 shown in FIG. 7 ), the second terminal can be coupled to the radio frequency terminal RF2, and the control terminal can be used to receive the control signal from the control signal terminal VG. The variable resistance element Rv2 may include a first terminal and a second terminal, wherein the first terminal may be coupled to the node N2, and the second terminal may be coupled to the bias signal terminal VBIAS. The third transistor T3 can be turned on, off or turned on according to the control signal (eg, voltage signal) provided by the control signal terminal VG. The operation of the switch device 700 in Fig. 7 can be shown in Table 3:<tables><img file="TWI802129B_D0003.tif" /></tables>

Similar to the variable resistance element Rv1, the variable resistance element Rv2 may include a set of resistors and a switch coupled to the set of resistors, wherein the structure of the variable resistance element Rv2 may be similar to that of the variable resistance element Rv1, for example, the third to 6 as shown in Fig. As described above, the variable resistance element Rv1 and the switch of the variable resistance element Rv2 may respectively include transistors, and the size of the transistor included in the switch SW1 of the variable resistance element Rv1 is the same as the size of the transistor included in the switch SW1 of the variable resistance element Rv2. The transistors can be the same or different in size.

According to an embodiment, as shown in FIG. 1 and FIG. 7 , the switching device 100 and the switching device 700 may further include a radio frequency resistor Rrf1 coupled between the radio frequency terminal RF1 and the bias signal terminal VBIAS. The switch device 100 and the switch device 700 may further include a radio frequency resistor Rrf2 coupled between the radio frequency terminal RF2 and the bias signal terminal VBIAS. According to an embodiment, the resistance value of the radio frequency resistor Rrf1 may be substantially equal to the resistance value of the radio frequency resistor Rrf2.

When the switch SW1 is turned on, the variable resistance element Rv1 provides the first resistance value Ra, as shown in Figure 3 As shown, the first resistance value Ra may be substantially equal to the resistance value of the resistor R1. In a further embodiment, please refer to FIG. 1 and FIG. 3, the resistance value of the resistor R1 can be smaller than the resistance value of the radio frequency resistor Rrf1, so the first resistance value Ra of the variable resistance element Rv1 can be smaller than the resistance of the radio frequency resistor Rrf1 value.

According to an embodiment, as shown in FIG. 1 and FIG. 7, the switching device 100 and the switching device 700 may further include an operating resistor Rds1 and an operating resistor Rds2, wherein the operating resistor Rds1 may be coupled to the first end and the second end of the transistor T1. Between the two terminals, and the operation resistor Rds2 can be coupled between the first terminal and the second terminal of the second transistor T2. According to an embodiment, as shown in FIG. 7 , the switching device 700 may further include an operating resistor Rds3 coupled between the first terminal and the second terminal of the third transistor T3 .

According to an embodiment, as shown in FIG. 1 and FIG. 7, the switching device 100 and the switching device 700 may further include a control resistor Rg1 and a control resistor Rg2, wherein the control resistor Rg1 may be coupled to the control terminal of the first transistor T1 and Between the control signal terminals VG, and the control resistor Rg2 can be coupled between the control terminal of the second transistor T2 and the control signal terminal VG. According to an embodiment, as shown in FIG. 7 , the switching device 700 may further include a control resistor Rg3 coupled between the control terminal of the third transistor T3 and the control signal terminal VG.

FIG. 8 is a schematic diagram of a switch device 800 in another embodiment. The switch device 800 may be similar to the switch device 100 in FIG. 1 , the difference is that the switch device 800 may not include the variable resistance element Rv1 , but include the capacitor Cc1 . The capacitor Cc1 can be coupled between the second terminal of the first transistor T1 (ie, the node N1 ) and the control signal terminal VGB providing the control signal.

FIG. 9 is a schematic diagram of the levels of the control signals respectively provided by the control signal terminal VG and the control signal terminal VGB in FIG. 8 .

For example, as shown in FIG. 8 and FIG. 9, according to the voltage level of the control signal provided by the control signal terminal VG, in phase I, the first transistor T1 and the second transistor T2 are turned off and are in a steady state. state. In phase II, the first transistor T1 and the second transistor T2 are in a transition state from being turned off to being turned on. In phase III, the first transistor T1 and the second transistor T2 are turned on and are in a steady state. In the stage IV, the first transistor T1 and the second transistor T2 are in a transition state from being turned on to being turned off. When the first transistor T1 and the second When the transistor T2 transitions, such as stage II, the voltage signal provided by the control signal terminal VG can be changed from the first level L1 to the second level L2, and the voltage signal provided by the control signal terminal VGB can be changed from the third level L3 Transition to the fourth level L4.

According to an embodiment, the influence of the transition of the voltage signal provided by the control signal terminal VGB on the level of the node N1 can be used to reduce the influence of the transition of the voltage signal provided by the control signal terminal VG on the level of the node N1. As shown in FIG. 8 and FIG. 9 , for example, there may be a parasitic capacitance between the control terminal and the second terminal (eg, the source terminal) of the first transistor T1 . In phase II, the voltage signal provided by the control signal terminal VG changes from the low level L1 to the high level L2. Such a change can pull up the node N1 through the coupling effect of the parasitic capacitance between the control terminal and the second terminal of the transistor T1. level. In an embodiment, by setting the capacitor Cc1, the second terminal of the capacitor Cc can receive the voltage signal provided by the control signal terminal VGB, wherein the voltage signal can change from the high level L3 to the low level L4 in the phase II. Therefore, the voltage signal provided by the control signal terminal VGB can pull down the level of the node N1 through the coupling effect of the capacitor Cc1. Since changes in the voltage signals provided by the control signal terminal VG and the control signal terminal VGB have opposite effects on the level of the node N1, the level of the node N1 can be kept relatively stable, or the level of the node N1 can be further reduced appropriately. (Stage II), so that the first transistor T1 enters the conduction state relatively quickly. In other words, the control signal terminal VGB can be used to reduce the influence of the control signal terminal VG, so as to prevent the level of the node N1 from being pulled high by the control signal terminal VG, which will cause the conduction speed of the first transistor T1 to be too slow. Similarly, in the stage IV, the voltage signal provided by the control signal terminal VG changes from the high level L2 to the low level L1, and such a change can pull down the level of the node N1 through the coupling effect of the parasitic capacitance. The voltage signal provided by the control signal terminal VGB can change from the low level L4 to the high level L3 in stage IV, so that the level of the node N1 can be pulled up through the coupling effect of the capacitor Cc1. Since the voltage signal changes provided by the control signal terminal VG and the control signal terminal VGB respectively have opposite effects on the level of the node N1, the level of the node N1 can be kept relatively stable, or the level of the node N1 can be further increased appropriately. (Stage IV), so that the first transistor T1 enters the cut-off state relatively quickly. In other words, the control signal terminal VGB can be used to reduce the influence of the control signal terminal VG to avoid node The level of N1 is pulled down by the control signal terminal VG, and such pulling down will cause the cut-off speed of the first transistor T1 to be too slow. Therefore, the transient response can be accelerated.

According to an embodiment, the voltage signals respectively provided by the control signal terminal VG and the control signal terminal VGB can be mutually inverted and changed synchronously. Therefore, the first level L1 can be substantially equal to the fourth level L4, and the second level L2 can be substantially equal to the third level L3.

The first transistor T1 and the second transistor T2 in FIG. 8 can be N-type transistors, but it is just an example. For another example, if the first transistor T1 and the second transistor T2 are P-type transistors, the first level L1 can be higher than the second level L2, and the third level L3 can be lower than the fourth level. Quasi-L4.

In Fig. 8, when the first transistor T1 and the second transistor T2 transition (for example, from conduction to cutoff, or from cutoff to conduction), according to the voltages provided by the control signal terminal VG and the control signal terminal VGB respectively The level of the signal changes, and through the coupling effect of the parasitic capacitance of the transistor and the capacitance Cc1, the level of the second end of the first transistor T1 can be substantially stable, for example, it is substantially equal to the bias voltage provided by the bias signal terminal VBIAS the voltage level.

As shown in FIG. 8 , the switch device 800 may further include a control resistor Rg1 and a resistor Rc1 , and the control resistor Rg1 may be coupled between the control terminal of the first transistor T1 and the control signal terminal VG. The resistor Rc1 can be coupled between the capacitor Cc1 and the control signal terminal VGB. According to an embodiment, the resistance value of the control resistor Rg1 can be substantially equal to the resistance value of the resistor Rc1, and the capacitance value of the capacitor Cc1 can be substantially equal to the control terminal and the second terminal (for example, the source terminal) of the first transistor T1. The capacitance value of the parasitic capacitance between the control signal terminal VG and the control signal terminal VGB is formed between the control signal terminal VG and the control signal terminal VGB through the control resistance Rg1, the parasitic capacitance, the capacitance Cc1, and the resistance Rc1 to form a substantially symmetrical equivalent centered on the node N1 Circuit configuration. In some embodiments, the capacitor Cc1 and the resistor Rc1 can be implemented by Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET).

FIG. 10 is a schematic diagram of a switch device 1000 in another embodiment. The switching device 1000 can be similar to the switching device 800 of FIG. 8, the difference is that the switching device 1000 can further include a third transistor T3 and Capacitor Cc2. The third transistor T3 can be arranged between the second transistor T2 and the second radio frequency terminal RF2, and can include a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first terminal of the second transistor T2. Two terminals (namely node N2), the second terminal is coupled to the radio frequency terminal RF2, and the control terminal is used to receive the voltage signal provided by the control signal terminal VG. The capacitor Cc2 can be coupled between the node N2 and the control signal terminal VGB. Similar to FIG. 8, when the third transistor T3 transitions according to the voltage signal provided by the control signal terminal VG, the voltage signal provided by the control signal terminal VGB can reduce the change of the voltage signal of the control signal terminal VG to the node N2 through the capacitor Cc2. The influence of level.

As shown in FIGS. 8 and 10, the switch device 800 and the switch device 1000 may further include a control resistor Rg2 and a resistor Rc2, wherein the control resistor Rg2 is coupled between the control terminal of the second transistor T2 and the control signal terminal VG, And the resistor Rc2 is coupled between the capacitor Cc2 and the control signal terminal VGB. The switch device 1000 may further include a control resistor Rg3 coupled between the control terminal of the third transistor T3 and the control signal terminal VG.

FIG. 11 is a graph showing the results before and after improving the response time by using the content disclosed in the present disclosure according to the embodiment. The vertical axis of FIG. 11 corresponds to voltage, and the unit may be volts, and the horizontal axis corresponds to time, and the unit may be microseconds (μsec). The curve 111 shows the change of the voltage signal level provided by the control signal terminal VG, for example, the change of the voltage level of the control terminal of the transistor T1. Due to the level change of the voltage signal provided by the control signal terminal VG , the level of the node N1 changes, wherein the curve 112 shows the level change of the node N1 before improvement, and the curve 113 shows the level change of the node N1 after improvement.

As shown by the curve 111 in FIG. 11 , taking the transistor T1 as an example, the voltage signal level provided by the control signal terminal VG (for example, the voltage level at the control terminal of the transistor T1 ) is changing from a low level to a high level.

As shown in the curve 112, when the switching device of the embodiment is not used, because the level of the voltage signal provided by the control signal terminal VG rises, the level of the node N1 (that is, the voltage level of the source terminal of the transistor T1) will increase. It rises accordingly, and at the time point TB, the voltage difference between the control terminal and the source terminal of the transistor T1 is Vd, the transistor T1 is turned on, and then maintains a steady state, wherein the voltage difference Vd may not be less than the threshold of the first transistor T1 Voltage.

As shown by the curve 113 , when the switching device of the embodiment is used, the influence of the level change of the voltage signal provided by the control signal terminal VG on the level of the node N1 is reduced. For example, the level of the node N1 (that is, the voltage level of the source terminal of the transistor T1 ) will not be significantly pulled up, eg, can remain relatively stable. At the time point TA, the voltage difference between the control terminal and the source terminal of the transistor T1 is Vd, the transistor T1 is turned on, and then maintains a steady state. Since the time TA can be earlier than the time TB, the first transistor T1 can enter a steady state faster by using the switching device of the embodiment. According to the experimental results shown in FIG. 11, it can be seen that the switching device of the embodiment can actually accelerate the transient response.

To sum up, using the switching device provided by the embodiment can speed up the transition response of the transistor on the path for transmitting radio frequency signals. Therefore, it is really helpful for improving the operation speed of the radio frequency switching device and solving the problems in this field. The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.