Capacitor package structure using smt

Capacitor package structure using surface mount technology

Capacitor package structure using SMT

The present invention relates to a capacitor package structure, and more particularly to a capacitor package structure using a surface mount technique.

Capacitors have been widely used in consumer appliances, computer motherboards and their peripherals, power supplies, communication products, and automotive components. Their main functions include: filtering, bypassing, rectification, coupling, decoupling. And turn equal. It is one of the indispensable components in electronic products. Capacitors have different types according to different materials and uses. Including aluminum electrolytic capacitors, tantalum electrolytic capacitors, multilayer ceramic capacitors, film capacitors and so on.

In the prior art, the aluminum foil used for the aluminum electrolytic capacitor is usually divided into a positive foil and a negative foil, and must be subjected to etching and chemical conversion steps to be used for the electrolytic capacitor. Corrosion refers to the use of a series of processes such as electro-erosion, pickling, dechlorination, and water washing in high-purity aluminum to increase the surface area of the aluminum foil to greatly increase the specific capacitance. The increase in specific volume is an important technology for miniaturization of electrolytic capacitors. The etched aluminum foil (positive foil) must be subjected to a chemical conversion treatment to form aluminum oxide on the aluminum foil as a dielectric of the electrolytic capacitor. The thickness of the dielectric is usually proportional to the withstand voltage of the aluminum foil, which is also the main basis for the operating voltage of the electrolytic capacitor. As for the negative foil, a voltage layer of 1 to 3 V is usually formed on the surface thereof, and a negative foil which is not subjected to chemical conversion treatment is also used. However, if the corrosion foil which is not subjected to the pressure treatment is placed in the air, alumina is naturally formed. The corroded and formed aluminum foil is cut into a certain width according to the designed size, and then the guide pin is nailed to the aluminum foil, and then separated by electrolysis paper to form a cylindrical body through the nailing and winding process, It is called a core or a prime. At this time, the core does not have the electrical characteristics of the electrolytic capacitor, and it is necessary to completely impregnate the core with the electrolyte, and the electrolyte is adsorbed therein by the water absorbing ability of the electrolytic paper and penetrates into the corroded structure of the aluminum foil. The fully infiltrated core is placed in a columnar container with an explosion-proof design at the bottom, and a rubber sealing material is arranged at the open end of the columnar container, and a closed columnar structure is formed by mechanical sealing and sealing, and then a closed columnar structure is formed. It is made through casing, charging and aging.

In fact, the negative electrode of the electrolytic capacitor forms an electronic circuit by the movement of ions in the electrolyte, so the conductivity of the electrolyte directly affects the electrical characteristics of the electrolytic capacitor. Therefore, how to improve the electrical conductivity of the electrolyte, so that the electrolytic capacitor can maintain the chemical stability of the electrolyte and aluminum foil, electrolytic paper at high temperature, especially the stability of the electrolyte and aluminum foil, is the development trend of the electrolyte. The electrolyte used in the aluminum electrolytic capacitor mentioned in the general literature is especially used for working voltages below 100V, mainly composed of water, organic solvents, organic acids, inorganic acids and some special additives.

Solid electrolytic capacitors have been attracting attention because of their excellent frequency characteristics in the field of electrolytic capacitors. In the solid electrolytic capacitor, a chemical conversion coating composed of a valve metal such as aluminum or tantalum is mainly used as the anode. A representative structure of a solid electrolytic capacitor using aluminum as an electrode foil is, for example, a configuration in which a chemical conversion foil for an anode aluminum formed with a dielectric oxide film and a cathode aluminum chemical conversion foil are formed by using a separator paper as an intermediary. The capacitor element wound around is immersed in a monomer and an oxidizing agent, and is housed in an aluminum case or a synthetic resin case to be sealed. The solid electrolytic capacitor described above is small in size and can have a large capacitance, and thus can be widely used in general. Further, as the electrolyte, for example, polypyrrole, polythiophene, polyaniline or the like is used, but in order to reduce the ESR (equivalent series resistance), polyethylenedioxythiophene having a low specific resistance is mainly used. The solid electrolytic capacitor is small in size and has a large capacitance. In addition to the low ESR, it is easy to wafer and is suitable for surface mounting. Therefore, it is indispensable for miniaturization, high functionality, and low cost of electronic equipment.

In recent years, with the digitization of electronic devices, electrolytic capacitors have also required large capacity, miniaturization, and low impedance in high frequency regions, and solid electrolytic capacitors have excellent frequency characteristics, making them attractive in electrolytic capacitors. Attention. Further, among the solid electrolytic capacitors, there are a wound solid electrolytic capacitor, a laminated solid electrolytic capacitor, and the like. The conventional laminated solid electrolytic capacitor is provided with an aluminum foil having a valve function, and is provided with an electrolyte layer formed of a polypyrrole by a chemical polymerization method, an electrolytic polymerization method or the like. However, the electrolyte layer composed of polypyrrole has a drawback that it cannot be uniformly formed on the surface of the aluminum foil and is easily damaged. Therefore, the above-mentioned laminated solid electrolytic capacitor has problems such as an increase in leakage current and a short circuit.

Therefore, the present inventors have a space for improvement in the prior art, and based on years of experience in this field, carefully observe and study, and with the use of academics, propose a reasonable design and effective improvement of the knowledge. The invention is missing.

The technical problem to be solved by the present invention is to provide a capacitor package structure using surface adhesion technology, the main purpose of which is to:

1. Capacitor package structure using surface adhesion technology with large area, large capacity, low profile (Low Profile) and low cost.

2, can significantly reduce leakage current (Leakage Current, LC) and short circuit problems.

3. It can reduce the difficulty of soldering and greatly reduce the Equivalent Series Resistance (ESR) of capacitors of the same capacity.

4. The present invention transmits through the use of the substrate unit without the need to additionally provide a lead frame.

In order to solve the above technical problem, in accordance with one aspect of the present invention, a capacitor package structure using a surface mount technology is provided, comprising: a substrate unit, a capacitor module, and a package unit. The substrate unit has an insulative body, at least two first upper conductive layers and a second upper conductive layer separated from each other and formed on the upper surface of the insulating body, and at least two are separated from each other and formed on the lower surface of the insulating body. a first lower conductive layer and a second lower conductive layer, at least two through holes penetrating the insulating body, and at least two intermediate conductive layers respectively formed in the at least two through holes, and one of the intermediate conductive layers The electrically conductive layer is electrically connected between the first upper conductive layer and the first lower conductive layer, and the other intermediate conductive layer is electrically connected between the second upper conductive layer and the second lower conductive layer. The capacitor module has a plurality of capacitor units disposed on the insulative housing, and the positive and negative electrodes of each of the capacitor units are electrically connected to the first upper conductive layer and the second upper conductive layer, respectively. The package unit is disposed on the insulating body and covers the capacitor module.

In order to solve the above technical problem, according to one aspect of the present invention, a capacitor package structure using a surface mount technology is provided, comprising: a substrate unit, a capacitor unit, and a package unit. The substrate unit has an insulative body, at least two first upper conductive layers and a second upper conductive layer separated from each other and formed on the upper surface of the insulating body, and at least two are separated from each other and formed on the lower surface of the insulating body. a first lower conductive layer and a second lower conductive layer, at least two through holes penetrating the insulating body, and at least two intermediate conductive layers respectively formed in the at least two through holes, and one of the intermediate conductive layers The electrically conductive layer is electrically connected between the first upper conductive layer and the first lower conductive layer, and the other intermediate conductive layer is electrically connected between the second upper conductive layer and the second lower conductive layer. The positive electrode and the negative electrode of the capacitor unit are electrically connected to the first upper conductive layer and the second upper conductive layer, respectively. The package unit is disposed on the insulating body and covers the capacitor module.

In order to further understand the technology, the means and the effect of the present invention in order to achieve the intended purpose, refer to the following detailed description of the invention and the accompanying drawings. The detailed description is to be understood as illustrative and not restrictive.

Referring to FIG. 1A to FIG. 1C, a first embodiment of the present invention provides a capacitor package structure using surface mount technology (SMT), which includes: a substrate unit 1a, a capacitor module 2a, and a Encapsulation unit 3a.

The substrate unit 1a has an insulative housing 10a, at least two first upper conductive layers 11a and second upper conductive layers 12a separated from each other and formed on the upper surface of the insulative housing 10a, at least two separated from each other and formed on The first lower conductive layer 13a and the second lower conductive layer 14a on the lower surface of the insulative housing 10a, at least two through holes 15a (for example, semi-perforated) penetrating the insulative housing 10a, and at least two are respectively formed on the at least two The intermediate conductive layer 16a is electrically connected between the first upper conductive layer 11a and the first lower conductive layer 13a, and the other intermediate conductive layer 16a is electrically connected. Connected between the second upper conductive layer 12a and the second lower conductive layer 14a. Furthermore, the at least two through holes 15a are open-type openings, and the at least two intermediate conductive layers 16a are respectively applied only to the inner surfaces of the at least two through holes 15a. In addition, the at least two intermediate conductive layers 16a may also be filled in the at least two through holes 15a, respectively, according to different design requirements.

In addition, the capacitor module 2a has a capacitor unit 20a disposed on the insulative housing 10a. The capacitor unit 20a is a stacked capacitor, and the anode 201a and the cathode 202a of the capacitor unit 20a are electrically connected to each other. The first upper conductive layer 11a and the second upper conductive layer 12a. In addition, the first embodiment further includes: a waterproof layer 4a disposed between the substrate unit 1a and the capacitor module 2a (as shown in FIG. 1C) to prevent external moisture from passing through the substrate unit 1a. It is transmitted to the capacitor module 2a, which affects the quality of the capacitor module 2a.

Furthermore, the package unit 3a is disposed on the insulative housing 10a and covers the capacitor module 2a. In addition, the package unit 3a has a housing 30a and a fixing glue 31a located in the housing 30a. The capacitor module 2a is covered by the fixing glue 31a. The housing 30a may be metal or plastic according to different design requirements, and the fixing colloid 31a may be silicone or epoxy.

In addition, referring to the first D diagram, the present invention can simultaneously manufacture a plurality of capacitor package structures. The capacitor package structure is distinguished by a plurality of V-shaped grooves 5a. When the substrate is cut by the V-shaped grooves 5a, a plurality of single capacitor package structures can be formed, and each of the capacitor package structures includes: A substrate unit 1a, a plurality of capacitor modules 2a and a package unit 3a.

Referring to the second figure, a second embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1b, a capacitor module 2b, and a package unit 3b. The second embodiment has the greatest difference from the first embodiment in that, in the second embodiment, the capacitor module 2b has a plurality of capacitor units 20b disposed on the insulative housing 10b, each of the capacitor units 20b. The positive electrode 201b and the negative electrode 202b are electrically connected to the first upper conductive layer 11b and the second upper conductive layer 12b, respectively, and the capacitor units 20b are juxtaposed with each other on the at least one first upper conductive layer 11b and the at least one Between the second upper conductive layers 12b.

Referring to the third embodiment, a third embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1c, a capacitor module 2c, and a package unit 3c. The maximum difference between the third embodiment and the first embodiment is that, in the third embodiment, the capacitor module 2c has a plurality of capacitor units 20c disposed on the insulative housing 10c, each of the capacitor units 20c. The positive electrode 201c and the negative electrode 202c are electrically connected to the first upper conductive layer 11c and the second upper conductive layer 12c, respectively, and the capacitor units 20c are stacked on each other at the at least one first upper conductive layer 11c and the at least one Between the second upper conductive layers 12c.

As can be seen from the second embodiment and the third embodiment, the capacitive units are selectively slidably stacked or stacked between the at least one first upper conductive layer and the at least one second upper conductive layer. In other words, the capacitor units can be juxtaposed to each other (as shown in the second figure) or stacked (as shown in the third figure) between the at least one first upper conductive layer and the at least one second upper conductive layer. Alternatively, the capacitor units may be juxtaposed with each other and stacked between the at least one first upper conductive layer and the at least one second upper conductive layer (eg, stacked first and then juxtaposed).

Referring to the fourth embodiment, a fourth embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1d, a capacitor module 2d, and a package unit 3d. The greatest difference between the fourth embodiment and the first embodiment is that the at least two perforations 15d of the fourth embodiment are closed openings.

Referring to FIG. 5A and FIG. 5B, a fifth embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1e, a capacitor module 2e, and a capacitor package Encapsulation unit 3e. The fifth embodiment has the greatest difference from the other embodiments described above. In the fifth embodiment, the upper surface of the substrate unit 1e has an annular recess 17e, the at least one first upper conductive layer 11e, and the at least The positions of a second upper conductive layer 12e and the at least two through holes 15e are surrounded by the annular groove 17e, and the bottom end of the package unit 3e is disposed in the annular groove 17e. In addition, the fifth embodiment further includes an annular waterproof layer 5e, wherein the annular waterproof layer 5e is disposed in the annular groove 17e and located between the annular groove 17e and the package unit 3e. Therefore, the use of the annular recess 17e enables the package unit 3e to be securely fastened to the insulative housing 10e, and in addition to the use of the annular waterproof layer 5e, to avoid external moisture from the package unit 3e. The junction with the substrate unit 1e runs into the package unit 3e to affect the quality of the capacitor unit 2e.

Referring to the sixth embodiment, a sixth embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1f, a capacitor module 2f, and a package unit 3f. The maximum difference between the sixth embodiment and the fifth embodiment is that, in the sixth embodiment, the annular waterproof layer 5f is disposed on the insulative housing 10f and located between the annular recess 17f and the package unit 3f. (or between the insulating body 10f and the package unit 3f), so that the sixth embodiment can also prevent the external moisture from running from the joint between the package unit 3f and the substrate unit 1f. The package unit 3f affects the quality of the capacitor unit 2f.

Referring to the seventh embodiment, a seventh embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1g, a capacitor module 2g, and a package unit 3g. The greatest difference between the seventh embodiment and the other embodiments described above is that the capacitor module 2g of the seventh embodiment is a wound capacitor unit 20g. Therefore, the positive electrode 201g and the negative electrode 202g of the capacitor unit 20g are electrically contacted to the first upper conductive layer 11g and the second upper conductive layer 12g, respectively, so that the positive electrode 201g and the negative electrode 202g of the capacitor unit 20g are respectively electrically connected. The first lower conductive layer 13g and the second lower conductive layer 14g are connected.

Referring to the eighth embodiment, an eighth embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1h, a capacitor module 2h, and a package unit 3h. The maximum difference between the eighth embodiment and the seventh embodiment is that in the eighth embodiment, the positive pole 201h and the negative pole 202h of the capacitor unit 20h pass through the two through holes 15h, respectively, and are electrically connected to the two intermediate portions respectively. The conductive layer 16h further electrically connects the positive electrode 201h and the negative electrode 202h of the capacitor unit 20h to the first lower conductive layer 13h and the second lower conductive layer 14h, respectively.

Referring to the ninth embodiment, a ninth embodiment of the present invention provides a capacitor package structure using a surface mount technology (SMT), comprising: a substrate unit 1i, a capacitor module 2i, and a package unit 3i. The maximum difference between the ninth embodiment and the eighth embodiment is that, in the ninth embodiment, the capacitor module 2i has a plurality of capacitor units 20i disposed on the insulative housing 10i, each of the capacitor units 20i. The positive electrode 201i and the negative electrode 202i are electrically connected to the first upper conductive layer 11i and the second upper conductive layer 12i, respectively, and the capacitor units 20i are juxtaposed to each other at the at least one first upper conductive layer 11i and the at least one Between the second upper conductive layers 12i.

In the above embodiments, the capacitor modules of the first to sixth embodiments can adopt any one of the capacitor modules described below to complete the required solid capacitor.

Referring to FIG. 10, the first capacitor module of the present invention has a plurality of capacitor units 1j, and each of the two capacitor units 1j is coated with a conductive layer Sj. Each of the capacitor units 1j is sequentially composed of a negative foil (negative electrode) 100j, a release paper 110j with a conductive polymer adsorbed thereon, a positive foil (positive electrode) 12j, a release paper 111j with a conductive polymer adsorbed thereon, and a negative foil. (Negative electrode) 101j is stacked, and each positive foil (positive electrode) 12j has an oxide layer (not shown) on the surface thereof to serve as a dielectric layer to produce an insulating effect, and two isolations of each capacitor unit 1j The paper (110j, 111j) is integrally formed to form a U-shaped release paper layer 11j such that a portion of the positive foil (positive electrode) 12j of each of the capacitor units 1j is covered by the release paper layer 11j, and The two negative foils (negative electrodes) (100j, 101j) of each of the capacitor units 1j are integrally formed to form a U-shaped negative foil layer 10j such that the release paper layer 11j is covered by the negative foil layer 10j. .

Furthermore, the positive foils 12j of the capacitor units 1j are electrically connected together through a plurality of solder joints Pj, and the negative foils (100j, 101j) of the capacitor units 1j are integrally connected and electrically connected. Together, the positive foils 12j and the negative foils (100j, 101j) are insulated from each other. In addition, the capacitor module has a plurality of insulating layers 4j respectively disposed on a portion of the outer surface of the positive foil 12j and surrounding each of the insulating layers 4j (that is, each insulating layer 4j is formed in a manner surrounding each of the corresponding layers). The upper and lower sides and the opposite sides of a portion of the outer surface of the positive foil 12j) are used to limit the lengths of the negative foils (100j, 101j) and the separators (110j, 111j), and serve as each capacitor unit 1j. Insulated wire of positive electrode and negative electrode.

Referring to FIG. 11 , the second capacitor module of the present invention has a plurality of capacitor units 1 k , and each of the two capacitor units 1 k is coated with a conductive layer Sk. Each of the capacitor units 1k is sequentially composed of a negative foil (negative electrode) 100k, a release paper 110k with a conductive polymer adsorbed thereon, a positive foil (positive electrode) 12k, a release paper 111k with a conductive polymer adsorbed thereon, and a negative foil. The (negative electrode) 101k is stacked, and the surface of each positive foil (positive electrode) 12k has an oxide layer (not shown) to serve as a dielectric layer to produce an insulating effect. In addition, the capacitor module has a plurality of conductive layers 5k electrically connected between two negative foils (100k, 101k) of each capacitor unit 1k, and two negative foils of each capacitor unit 1k ( The two identical end lengths of 100k, 101k) are greater than the length of one end of the positive foil 12k of each of the capacitor units 1k to prevent the positive foils 12k from contacting the conductive layers 5k.

Furthermore, the positive foils 12k of the capacitor units 1k are electrically connected together through a plurality of solder joints Pk, and the negative foils (100k, 101k) of the capacitor units 1k are transmitted through the conductive layers 5k. And electrically connected together, and the positive foils 12k and the negative foils (100k, 101k) are insulated from each other. In addition, the capacitor module has a plurality of insulating layers 4k respectively disposed on a portion of the outer surface of the positive foil 12k and surrounding each of the insulating layers 4k (that is, each insulating layer 4k is formed in a manner to surround each corresponding one. The upper and lower sides and the opposite sides of a portion of the outer surface of the positive foil 12k are used to limit the lengths of the negative foils (100k, 101k) and the separators (110k, 111k), and serve as each capacitor unit 1k. Insulated wire of positive electrode and negative electrode.

Referring to FIG. 12, the third capacitor module of the present invention has a capacitor unit 1m, which has a plurality of negative foils (negative electrodes) 10 m, a plurality of separators 11m with conductive polymers adsorbed thereon, and A plurality of positive foils (positive electrodes) 12m are alternately stacked one on another, wherein each of the separators 11m is disposed between each positive foil (positive electrode) 12m and each negative foil (negative electrode) 10m, each positive foil (positive electrode) The 12m surface has an oxide layer (not shown) to serve as a dielectric layer to create an insulating effect. The positive foil 12m is electrically connected together through a plurality of solder joints Pm. The negative foils 10m are electrically connected together through a conductive layer 5m, and the bottommost negative foil 10m is transmitted through the conductive layer (for example, Silver or silver paste is electrically connected to a substrate, and the positive foils 12m and the negative foils 10m are insulated from each other. Furthermore, the capacitor module has a plurality of insulating layers 4m respectively disposed on a portion of the outer surface of the positive foil 12m and surrounding each of the insulating layers 4m (that is, each insulating layer 4m is formed in a manner surrounding each phase). Corresponding to the upper and lower sides and the opposite sides of the outer surface of the portion of the positive foil 12m, the lengths of the negative foils 10m and the separators 11m are limited, and are used as the insulated wires of the positive and negative electrodes of each of the capacitor units 1m. In addition, the conductive layer 5m is electrically connected to the ends of the negative foils 10m, and the length of the end of each of the negative foils 10m is greater than the length of the end of each of the positive foils 12m to prevent the positive foils 12m from contacting the conductive Layer 5m.

Referring to the thirteenth figure, the fourth capacitor module of the present invention comprises: a plurality of capacitor units 1n, and each of the two capacitor units 1n is coated with a conductive layer Sn, such as silver paste or silver paste. .

Each of the capacitor units 1n is sequentially stacked by a carbon rubber 10n (negative electrode), a conductive polymer 11n, a valve metal foil 12n (positive electrode), a conductive polymer 11n, and a carbon rubber 10n (negative electrode). The surface of each of the valve metal foils 12n has an oxide layer (not shown) for use as a dielectric layer to produce an insulating effect, wherein the two conductive polymers 11n are formed on the valve metal foil. On the oxide layer of the surface of 12n. In addition, the capacitor module further includes: a plurality of conductive layers 5n electrically connected between the carbon glues 10n of each of the capacitor units 1n.

Furthermore, the positive ends of the valve metal foils 12n of the capacitor units 1n are electrically connected through a plurality of solder joints Pn through which the carbon pastes 10n pass through the conductive layers. 5n is electrically connected together, and the valve metal foil 12n and the carbon glue 10n are insulated from each other. In addition, the capacitor module further includes: a plurality of insulating layers 4n respectively disposed on a portion of the outer surface of the valve metal foil 12n and surrounding the insulating layer 4n (that is, each insulating layer 4n is formed in a manner surrounding the insulating layer 4n) Each of the upper and lower sides of the outer surface of the valve metal foil 12n and the opposite sides thereof are arranged to limit the length of the carbon glue 10n and the conductive polymer 11n, and serve as a positive electrode of each of the capacitor units 1n. Insulated wire with negative electrode.

Referring to FIG. 14, the fifth chip capacitor module of the present invention comprises: a plurality of capacitor units 1p. Each of the capacitor units 1p is sequentially stacked by a carbon glue 10p (negative electrode), a conductive polymer 11p, a valve metal foil 12p (positive electrode), a conductive polymer 11p, and a carbon glue 10p (negative electrode). The surface of each of the valve metal foils 12e has an oxide layer (not shown) for use as a dielectric layer to produce an insulating effect, wherein the two conductive polymers 11p are formed on the valve metal foil. On the oxide layer of the surface of 12p, and between each two capacitor units 1p are electrically stacked together through the carbon glue 10p. In addition, the capacitor module further includes: a plurality of conductive layers 5p electrically connected between the carbon glues 10p of each of the capacitor units 1p.

Furthermore, the positive ends of the valve metal foils 12p of the capacitor units 1p are electrically connected through a plurality of solder joints Pp, and the carbon pastes 10p of the capacitor units 1p are transmitted through the conductive layers. 5p is electrically connected together, and the valve metal foil 12p and the carbon glue 10p are insulated from each other. In addition, the capacitor module further includes: a plurality of insulating layers 4p respectively disposed on a portion of the outer surface of the valve metal foil 12p and surrounding each of the insulating layers 4p (ie, each insulating layer 4p is formed in a manner surrounding the insulating layer 4p) Each of the upper and lower sides of the outer surface of the valve metal foil 12p and the opposite sides thereof are arranged to limit the length of the carbon glue 10p and the conductive polymer 11p, and serve as a positive electrode of each of the capacitor units 1p. Insulated wire with negative electrode.

In addition, the above five types of stacked capacitors can adopt the following different embodiments: Please refer to FIG. 15 (a positive lead and a negative lead), and the positive foil 12 of each capacitor unit 1 has an outward lead. The positive electrode pin 120, and the positive electrode pins 120 are electrically stacked together to form a set of positive electrode lead units 120', wherein the positive electrode pins 120 are respectively in the same direction from the positive foils 12 Lead out. In addition, the negative foils (not shown) are directly electrically stacked together through the conductive layers (as shown in the tenth to fourteenth drawings).

Referring to the sixteenth and seventeenth diagrams (multiple positive terminals and one negative terminal), the positive foil 12 of each of the capacitor units 1 has an outer lead pin 120, and the positive leads The pin 120 is divided into a positive array of positive pin units 120' electrically stacked together (the sixteenth embodiment discloses two sets of positive lead units 120'; and the seventeenth view reveals three sets of positive lead units 120') The positive electrode pins 120 are respectively led out from the same direction of the positive foils 12 . The sixteenth figure shows that 8 layers can be stacked, but the height of the four layers can be maintained. In addition, the seventeenth figure shows that 12 layers can be stacked, but the height of the four layers can be maintained. In addition, the negative foils (not shown) are electrically stacked together through the conductive layers (as shown in Figures 11 through 14).

In summary, the capacitor package structure using the surface mount technology of the present invention has the advantage that the capacitor module can be directly disposed on the substrate unit by means of surface mount technology (SMT). In other words, the present invention transmits through the use of the substrate unit without additionally providing a lead frame. Therefore, the capacitor package structure of the present invention is simpler than the conventional structure, and the method of fabricating the capacitor package structure of the present invention is easier and faster than the conventional fabrication method.

All the scope of the present invention is intended to be included in the scope of the present invention, and all those skilled in the art should be included in the scope of the present invention. Variations or modifications that can be readily conceived within the scope of the invention are encompassed by the scope of the patents herein below.

<heading level="1">[First Embodiment]</heading><p>1a. . . Substrate unit</p><p>10a. . . Insulating body</p><p>11a. . . First upper conductive layer</p><p>12a. . . Second upper conductive layer</p><p>13a. . . First lower conductive layer</p><p>14a. . . Second lower conductive layer</p><p>15a. . . perforation</p><p>16a. . . Intermediate conductive layer</p><p>2a. . . Capacitor module</p><p>20a. . . Capacitor unit</p><p>201a. . . positive electrode</p><p>202a. . . negative electrode</p><p>3a. . . Package unit</p><p>30a. . . case</p><p>31a. . . Fixed colloid</p><p>4a. . . Waterproof layer</p><p>5a. . . V-groove</p><heading level="1">[Second embodiment]</heading><p>1b. . . Substrate unit</p><p>10b. . . Insulating body</p><p>11b. . . First upper conductive layer</p><p>12b. . . Second upper conductive layer</p><p>2b. . . Capacitor module</p><p>20b. . . Capacitor unit</p><p>201b. . . positive electrode</p><p>202b. . . negative electrode</p><p>3b. . . Package unit</p><heading level="1">[Third embodiment]</heading><p>1c. . . Substrate unit</p><p>10c. . . Insulating body</p><p>11c. . . First upper conductive layer</p><p>12c. . . Second upper conductive layer</p><p>2c. . . Capacitor module</p><p>20c. . . Capacitor unit</p><p>201c. . . positive electrode</p><p>202c. . . negative electrode</p><p>3c. . . Package unit</p><heading level="1">[Fourth embodiment]</heading><p>1d. . . Substrate unit</p><p>15d. . . perforation</p><p>2d. . . Capacitor module</p><p>3d. . . Package unit</p><heading level="1">[Fifth Embodiment]</heading><p>1e. . . Substrate unit</p><p>10e. . . Insulating body</p><p>11e. . . First upper conductive layer</p><p>12e. . . Second upper conductive layer</p><p>15e. . . perforation</p><p>17e. . . Annular groove</p><p>2e. . . Capacitor module</p><p>3e. . . Package unit</p><p>5e. . . Annular waterproof layer</p><heading level="1">[Sixth embodiment]</heading><p>1f. . . Substrate unit</p><p>10f. . . Insulating body</p><p>17f. . . Annular groove</p><p>2f. . . Capacitor module</p><p>3f. . . Package unit</p><p>5f. . . Annular waterproof layer</p><heading level="1">[Seventh embodiment]</heading><p>1g. . . Substrate unit</p><p>11g. . . First upper conductive layer</p><p>12g. . . Second upper conductive layer</p><p>13g. . . First lower conductive layer</p><p>14g. . . Second lower conductive layer</p><p>2g. . . Capacitor module</p><p>20g. . . Capacitor unit</p><p>201g. . . positive electrode</p><p>202g. . . negative electrode</p><p>3g. . . Package unit</p><heading level="1">[Eighth Embodiment]</heading><p>1h. . . Substrate unit</p><p>13h. . . First lower conductive layer</p><p>14h. . . Second lower conductive layer</p><p>15h. . . perforation</p><p>16h. . . Intermediate conductive layer</p><p>2h. . . Capacitor module</p><p>20h. . . Capacitor unit</p><p>201h. . . positive electrode</p><p>202h. . . negative electrode</p><p>3h. . . Package unit</p><heading level="1">Ninth Embodiment</heading><p>1i. . . Substrate unit</p><p>10i. . . Insulating body</p><p>11i. . . First upper conductive layer</p><p>12i. . . Second upper conductive layer</p><p>2i. . . Capacitor module</p><p>20i. . . Capacitor unit</p><p>201i. . . positive electrode</p><p>202i. . . negative electrode</p><p>3i. . . Package unit</p><heading level="1">[First stacked capacitor]</heading><p>1j. . . Capacitor unit</p><p>10j. . . Negative foil layer</p><p>100j. . . Negative foil</p><p>101j. . . Negative foil</p><p>11j. . . Isolated paper layer</p><p>110j. . . Isolation paper</p><p>111j. . . Isolation paper</p><p>12j. . . Positive foil</p><p>4j. . . Insulation</p><p>Sj. . . Conductive layer</p><p>Pj. . . Solder joint</p><heading level="1">[The second type of stacked capacitor]</heading><p>1k. . . Capacitor unit</p><p>100k. . . Negative foil</p><p>101k. . . Negative foil</p><p>110k. . . Isolation paper</p><p>111k. . . Isolation paper</p><p>12k. . . Positive foil</p><p>4k. . . Insulation</p><p>5k. . . Conductive layer</p><p>Sk. . . Conductive layer</p><p>Pk. . . Solder joint</p><heading level="1">[The third stacked capacitor]</heading><p>1m. . . Capacitor unit</p><p>10m. . . Negative foil</p><p>11m. . . Isolation paper</p><p>12m. . . Positive foil</p><p>4m. . . Insulation</p><p>5m. . . Conductive layer</p><p>Pm. . . Solder joint</p><heading level="1">[Fourth stacked capacitor]</heading><p>1n. . . Capacitor unit</p><p>10n. . . Carbon glue</p><p>10n. . . Carbon glue</p><p>11n. . . Conductive polymer</p><p>11n. . . Conductive polymer</p><p>12n. . . Valve metal foil</p><p>4n. . . Insulation</p><p>5n. . . Conductive layer</p><p>Sn. . . Conductive layer</p><p>Pn. . . Solder joint</p><heading level="1">[Fifth stacked capacitor]</heading><p>1p. . . Capacitor unit</p><p>10p. . . Carbon glue</p><p>10p. . . Carbon glue</p><p>11p. . . Conductive polymer</p><p>11p. . . Conductive polymer</p><p>12p. . . Valve metal foil</p><p>4p. . . Insulation</p><p>5p. . . Conductive layer</p><p>Pp. . . Solder joint</p><heading level="1">[Pin Derivation Example]</heading><p>1. . . Capacitor unit</p><p>12. . . Positive foil</p><p>120. . . Positive pin</p><p>120'. . . Positive lead unit</p>

The first A is a perspective exploded view of the first embodiment of the capacitor package structure using the surface adhesion technology of the present invention;

The first B diagram is a three-dimensional combination diagram of the first embodiment of the capacitor package structure using the surface adhesion technology of the present invention;

The first C diagram is a schematic cross-sectional view of a first embodiment of a capacitor package structure using a surface mount technology of the present invention;

The first D diagram is a perspective view of a first embodiment of a plurality of capacitor package structures using surface adhesion techniques of the present invention;

The second figure is a partial exploded perspective view of a second embodiment of a capacitor package structure using a surface mount technology according to the present invention;

The third figure is a partial exploded perspective view of a third embodiment of the capacitor package structure using the surface mount technology of the present invention;

The fourth figure is a partial exploded perspective view of a fourth embodiment of the capacitor package structure using the surface mount technology of the present invention;

Figure 5A is a partial top plan view showing a fifth embodiment of the capacitor package structure using the surface mount technology of the present invention;

Figure 5B is a schematic cross-sectional view showing a fifth embodiment of the capacitor package structure using the surface mount technology of the present invention;

6 is a schematic cross-sectional view showing a sixth embodiment of a capacitor package structure using a surface mount technology according to the present invention;

7 is a schematic cross-sectional view showing a seventh embodiment of a capacitor package structure using a surface mount technology according to the present invention;

8 is a schematic cross-sectional view showing an eighth embodiment of a capacitor package structure using a surface mount technology according to the present invention;

Figure 9 is a partially exploded perspective view showing a ninth embodiment of a capacitor package structure using a surface mount technology according to the present invention;

The tenth figure is a side view of the first stacked capacitor module of the present invention;

11 is a side view of a second stacked capacitor module of the present invention;

Figure 12 is a side view showing the third stacked capacitor module of the present invention;

The thirteenth figure is a side view of the fourth stacked capacitor module of the present invention;

Figure 14 is a side view showing the fifth stacked capacitor module of the present invention;

The fifteenth figure is a schematic diagram of the first pin-fitting mode of the capacitor package structure using the surface adhesion technology of the present invention;

Figure 16 is a schematic view showing the second pin-fitting mode of the capacitor package structure using the surface mount technology of the present invention;

The seventeenth figure is a schematic diagram of the third pin-fitting mode of the capacitor package structure using the surface mount technology of the present invention.