Display apparatus

Display device

DISPLAY APPARATUS

The present disclosure relates to a display device, and more particularly to a display device and its signal routing design.

In the current market, liquid crystal displays are widely used in computer screens, mobile phones, personal digital assistants (PDAs), tablet computers, e-books, flat-panel televisions, etc. because of their thinness, power saving and no radiation. On electronic products.

The working principle of the liquid crystal display is to change the arrangement state of the liquid crystal molecules in the liquid crystal layer by changing the voltage difference between the two ends of the liquid crystal layer, to change the light transmittance of the liquid crystal layer, and to match the light source provided by the backlight module to display the image. Generally, the display device includes a display area in which the display panel is disposed and a frame area in the periphery. At present, the driving circuit of the display panel is mostly divided into a source driver of a data signal and a gate driver of a scan signal, and is driven by a matrix method.

For a practical example, please refer to FIG. 1 , which illustrates a schematic diagram of a conventional display device 100 . The display area of the display panel 120 of the display device 100 may have a plurality of vertical data lines 122 and a plurality of horizontal gate lines 124 to form a matrix driving grid. Assuming that the input/output interface 140 is disposed under the display device 100, a portion of the signal traces are required to be scanned by the gate drive circuit (not shown) along the left or right sides of the display panel 120 by the input/output interface 140. The signals are transmitted to a plurality of gate lines 124 of the display panel 120. Further, the display panel 120 can control the data signal to be written to the pixel unit according to the scan signal, thereby displaying the image.

As the resolution of the display device increases, the number of gate lines of the display panel continues to increase, so it is necessary to provide a sufficiently wide bezel area to accommodate a large number of signal traces of the scan signals. However, since the display of most portable electronic devices is a small liquid crystal display, how to reduce the area of the frame area to reduce the size of the lower substrate is an important issue for designing a small liquid crystal display. And when the width of the signal trace is too narrow (it is easy to overheat, and it may be difficult to manufacture and there is a yield problem), or when the signal traces are too close to each other (interference of electrical signal transmission), it may also take the signal The quality of the signal transmitted by the line is seriously affected.

In order to solve the above problem, a display device proposed by the present disclosure uses three layers of signal traces at different levels in the frame area, and the frame width of the display device is reduced by using three layers of signal lines overlapping or interlaced. In addition, the narrow signal line width design can be avoided, and the signal lines can be prevented from being too close to each other, thereby improving the signal transmission stability of the signal line, and the gate driving circuit can be used to transmit the scanning of the display panel. Signal.

One aspect of the present disclosure is to provide a display device including a display panel, a first signal trace layer, a second signal trace layer, and a third signal trace layer. The first signal routing layer is disposed in a frame area around the display panel. The second signal routing layer is disposed in the frame area, and the second signal routing layer is at a different level from the first signal routing layer. The third signal routing layer is disposed in the frame area, and the third signal routing layer is at a different level from the first signal routing layer and the second signal routing layer, wherein the first signal routing The layer, the second signal routing layer and the third signal routing layer are used to transmit a control signal to the display panel.

According to an embodiment of the present disclosure, the control signal includes a scan control signal generated by a gate drive circuit for controlling the display panel.

According to an embodiment of the present disclosure, the first signal routing layer includes a plurality of first signal traces of the same level, and the second signal trace layer includes a plurality of second signal traces of the same level. The third signal trace layer includes a plurality of third signal traces of the same level.

According to an embodiment of the present disclosure, the vertical positions of the first signal traces, the second signal traces, and the third signal traces overlap each other.

According to an embodiment of the present disclosure, the first signal traces, the second signal traces, and the third signal traces are respectively set at different levels from low to high, and the first signals are taken. The vertical positions of the lines and the third signal traces overlap each other, and the vertical positions of the first signal traces and the second signal traces are interlaced.

According to an embodiment of the present disclosure, the frame area where the first signal routing layer, the second signal routing layer, and the third signal routing layer are located includes at least one side of the display panel.

Please refer to FIG. 2 , which is a schematic diagram of a display device 300 according to an embodiment of the present disclosure. As shown in FIG. 2 , the display device 300 includes a display panel 320 and a frame 340 .

The present disclosure discloses a signal trace design of the display device 300 on the bezel 340. In this embodiment, the frame area 342 located on the side of the left side of the display panel 320 is exemplified, but the present invention is not limited to the side of the left side of the display panel 320.

Please refer to FIG. 3, which is a schematic cross-sectional view of the frame region 342 along the section line AA in FIG. 2 in an embodiment. As shown in FIG. 3, in the actual application, the bottom surface of the frame region 342 may be a substrate 344, and the first insulating layer 346, the second insulating layer 347, and the third insulating layer 348 are sequentially disposed on the substrate 344. In this embodiment, the first signal wiring layer L1, the second signal wiring layer L2, and the third signal wiring layer L3 are sequentially disposed from the bottom to the top in the frame region 342. The three-layer signal wiring layers (L1 to L3) are respectively disposed in the first insulating layer 346, the second insulating layer 347, and the third insulating layer 348, and have different levels.

As shown in FIG. 3, the first signal trace layer L1 includes a plurality of first signal traces of the same level, as shown in FIG. 3 as the first signal traces G11~G14. The second signal trace layer L2 includes a plurality of second signal traces of the same level, as shown in FIG. 3, the second signal traces G21~G24. The third signal routing layer L3 includes a plurality of third signal traces of the same level, as shown in FIG. 3, the third signal traces G31-G34.

In the embodiment of FIG. 3, the signal traces in the first signal trace layer L1, the second signal trace layer L2, and the third signal trace layer L3 are overlapped. For example, the vertical positions of the first signal trace G11, the second signal trace G21, and the third signal trace G31 overlap each other, and the first signal trace G12, the second signal trace G22, and the third signal trace G32 The vertical positions overlap each other.

Through the above three layers of different levels of signal routing design, in the narrow frame width (such as the width Wd in Figure 2), more signal lines can be accommodated. For example, the present embodiment can accommodate three times the number of signal traces in a unit horizontal width compared to a single level signal trace of the same horizontal height. Therefore, the width of the border area 342 in the present disclosure ( The border width Wd in Figure 2 can be reduced to 1/3 of the single layer signal trace.

In this embodiment, each of the first signal routing layer L1, the second signal routing layer L2, and the third signal routing layer L3 can respectively transmit control signals to the display panel. In practical applications, the control signal can be a scan signal used by the display driver, and the scan control signal is generated by a gate driver to control the display panel 320.

However, in the present disclosure, the vertical positions of the signal traces in the first signal trace layer L1, the second signal trace layer L2, and the third signal trace layer L3 are not limited to an overlapping design. Please refer to FIG. 4, which is a cross-sectional structural view of the frame region 342 along the section line AA in FIG. 2 in another embodiment.

As shown in FIG. 4, the first signal routing layer L4 includes a plurality of first signal traces of the same level, as shown in FIG. 4 as the first signal traces G41-G44. The second signal routing layer L5 includes a plurality of second signal traces of the same level, as shown in FIG. 4, the second signal traces G51-G54. The third signal routing layer L6 includes a plurality of third signal traces of the same level, as shown in FIG. 4, the third signal traces G61-G64.

In the embodiment of FIG. 4, the signal traces in the first signal trace layer L4, the second signal trace layer L5 and the third signal trace layer L6 are staggered. The first signal line G41~G44, the second signal line G51~G54 and the third signal line G61~G64 are respectively set at different levels from low to high.

The vertical positions of the first signal traces G41~G44 and the third signal traces G61~G64 overlap each other. The vertical position of the second signal trace G51~G54 is interleaved with the two sets of signal traces (the first signal trace G41~G44 and the third signal trace G61~G64).

For example, the vertical positions of the first signal trace G41 and the third signal trace G61 overlap each other. The vertical positions of the first signal trace G42 and the third signal trace G62 overlap each other. Second vertical position of the signal traces G52 is located between the first signal and the first signal trace trace G41 G42, and between the third signal and the third signal trace trace G61 G62, whereby the shape staggered the design of.

Since the material of the signal trace is mostly made of metal material, there will be a coupling capacitor phenomenon between the metal traces. If the distance between the two traces is too close to each other, the coupling capacitance between the signal traces will increase, resulting in an increase in the coupling capacitance. The signal transmission quality is degraded. In the embodiment of FIG. 4, the signal traces in the first signal trace layer L4, the second signal trace layer L5 and the third signal trace layer L6 are staggered, so that the first signal can be added. The distance between the trace layer L4, the second signal trace layer L5 and the third signal trace layer L6 signal traces G41~G64 to reduce the coupling capacitance between the metal signal traces.

In the embodiment of FIG. 4, through the above three layers of different levels of signal routing design, more signal traces can be accommodated in a narrower bezel width (such as the width Wd in FIG. 2). In addition, the coupling capacitance between the signal traces can be reduced at the same time.

In the embodiment of FIG. 4, each of the first signal routing layer L4, the second signal routing layer L5, and the third signal routing layer L6 may also be used to transmit control signals. To the display panel, in practical applications, the control signal can be a scan signal used by the display driver, and the scan control signal is generated by a gate driver to control the display panel 320, and the scan control signal can come from The input and output interface (not shown) of the display device 300 or the driving circuit module (not shown).

It should be noted that the frame area 342 where the three-layer signal routing layer is located in the above embodiment may be included on at least one side of the display panel 320. That is, the three-layer signal trace layer of the present disclosure can also be used for the right side edge, the upper side of the display panel 320, or both sides (such as the left and right sides), etc., and The left side frame shown in Figure 2 is limited.

The present disclosure has been disclosed in the above embodiments, but it is not intended to limit the disclosure, and any person skilled in the art can make various changes and refinements without departing from the spirit and scope of the disclosure. The scope of protection of the disclosure is subject to the definition of the scope of the patent application.

<p>100. . . Display device</p><p>120. . . Display panel</p><p>122. . . Data line</p><p>124. . . Gate line</p><p>140. . . Output interface</p><p>300. . . Display device</p><p>320. . . Display panel</p><p>340. . . frame</p><p>342. . . Border area</p><p>L1, L4. . . First signal trace layer</p><p>L2, L5. . . Second signal trace layer</p><p>L3, L6. . . Third signal trace layer</p><p>344. . . Substrate</p><p>346. . . First insulating layer</p><p>347. . . Second insulating layer</p><p>348. . . Third insulating layer</p><p>Wd. . . width</p><p>G11~G14, G41~G44. . . First signal trace</p><p>G21~G24, G51~G54. . . Second signal trace</p><p>G31~G34, G61~G64. . . Third signal trace</p>

The above and other objects, features, advantages and embodiments of the present disclosure will become more apparent and understood.

1 is a schematic view of a conventional display device;

2 is a schematic diagram of a display device according to an embodiment of the present disclosure;

3 is a cross-sectional structural view of the frame region along the section line AA in FIG. 2 in an embodiment;

4 is a cross-sectional structural view of the frame region along the section line AA in FIG. 2 in another embodiment.