Method and apparatus for thermal processing structures formed on a substrate

Method and equipment for heat treatment of structure formed on substrate

METHOD AND APPARATUS FOR THERMAL PROCESSING STRUCTURES FORMED ON A SUBSTRATE

The embodiments of the present invention generally relate to a method of manufacturing a semiconductor device. More specifically, the present invention is directed to a method of heat-treating a substrate.

The integrated circuit (IC) market continues to demand greater memory capacity, faster switching speeds, and smaller feature sizes. One of the main countermeasures taken by the industry to respond to these needs is to change from batch processing of silicon wafers in a large furnace tube to single wafer processing in a small processing chamber.

During such a single wafer processing, the wafer is usually heated to a high temperature, so various chemical and physical reactions can be performed in a plurality of IC components defined in the wafer. It is particularly important that the good electrical properties of the IC components require annealing the implanted area. Annealing regenerates a more crystalline structure from a wafer region that was previously made amorphous, and activates the dopants by incorporating its atoms into the substrate or wafer crystal lattice. Heat treatment, such as annealing, requires a relatively large amount of heat energy to be provided to the wafer in a short time, and then the wafer is rapidly cooled to terminate the heat treatment. Examples of heat treatment currently used include rapid heat treatment (RTP) and instant (impulse or spike) annealing. This type of process is widely used, but the current technology is not the most ideal. The tendency is to make the wafer temperature rise too slowly and expose the wafer to high temperatures for too long. These problems become more serious as the wafer size increases, the switching speed increases, and/or the feature size decreases.

Generally, these thermal processes heat the substrate under controlled conditions according to a predetermined thermal recipe. These thermal recipes basically include: the semiconductor substrate must be heated to a temperature; the rate of temperature change, that is, the rate of temperature rise and fall; and the time for which the heat treatment system is maintained at the specific temperature. For example, a thermal formula may require heating the substrate from room temperature to several certain temperatures of 1200°C or higher, and its process time may be as high as 60 seconds or more.

In addition, in order to meet certain goals, such as minimal cross-diffusion of materials between different semiconductor substrate regions, the time that each semiconductor substrate can withstand high temperatures must be limited. In order to achieve this, the temperature change rate (including both temperature rise and fall) is preferably high. In other words, it tends to be able to adjust the temperature of the substrate from a low temperature to a high temperature in as short a time as possible, and vice versa.

The requirement for a high temperature change rate has led to the development of rapid thermal processing (RTP), where the typical heating rate ranges from 200 to 400°C/sec, compared with the conventional furnace tube of 5-15°C/min. The typical cooling rate ranges from 80 to 150°C/sec. One of the disadvantages of RTP is that it heats the entire wafer, even if the IC components are located only a few microns on top of the silicon wafer. This limits the speed at which the wafer can be heated and cooled. In addition, once the entire wafer is at a high temperature, the heat can only be dissipated into the surrounding space or structure. Therefore, the RTP system in today's art struggles to reach a temperature rise rate of 400°C/sec and a temperature drop rate of 150°C/sec.

In order to solve some of the problems in the conventional RTP type process, several scanning laser annealing techniques are used to anneal the substrate surface. Generally, these technologies deliver a fixed energy flux to a small area on the surface of the substrate, and at the same time move or scan the substrate relative to the energy delivered to the small area. Because of the strict uniformity requirements and the complexity of minimizing the partial overlap of the scanning area on the substrate surface, this type of process is ineffective in heat-treating contact-level components formed on the substrate surface.

In view of the above, there is a need for a method for annealing semiconductor substrates at a high temperature rise and fall rate. This will provide better control over the manufacture of smaller components, which in turn will lead to improved performance.

The present invention generally provides a method for heat-treating a substrate, including: adjusting one or more regions in a substrate formed by a first material by arranging a second material in one or more regions , Wherein the step of adjusting one or more regions in a substrate with the second material is suitable for lowering the melting point of the first material contained in one or more regions; set in one or more regions in the substrate A third material; and transmitting an electromagnetic energy to the surface of a substrate, which is in thermal communication with one or more regions, wherein the electromagnetic energy is suitable for melting the first material in the one or more regions.

The embodiment of the present invention further provides a method for heat-treating a substrate, including: providing a substrate having one or more adjusted first regions, so that the melting point of the material contained in each first region is higher than that of the substrate The melting point of the material contained in the second region is low, where the second region and each first region are usually adjacent to the surface of the substrate; a coating is deposited on the surface of the substrate, wherein the coating is Different absorption and reflection coefficients; removing a part of the coating from the surface of the substrate, which is usually adjacent to each first or second area; and transmitting an electromagnetic energy to the surface of the substrate containing one or more first areas And the area of the second area, where electromagnetic energy preferentially melts one or more materials in the first area.

The embodiment of the present invention further provides a method for heat-treating a semiconductor substrate, including: providing a substrate formed of a substrate material; forming a buried area composed of a first material on the surface of the substrate, wherein the first material has a A first thermal conductivity coefficient; a second layer composed of a second material is deposited on the buried area, wherein the second material has a second thermal conductivity coefficient; a semiconductor element is formed on the surface of the substrate, and a part of the semiconductor element is formed Containing a part of the second layer; and transmitting an electromagnetic energy to the surface of a substrate, which is in thermal communication with the second layer, wherein the electromagnetic energy is adapted to make the part of the second material in thermal communication with the buried area reach its melting point .

The embodiment of the present invention further provides a method for heat-treating a substrate, comprising: placing a substrate on a substrate support, wherein the substrate has a plurality of characteristic structures formed on the surface of the substrate, and the surface of the substrate contains A first area and a second area; deposit a coating on the first and second areas, wherein the material forming the coating has a desired heat capacity; remove a part of the coating, and make the coating on the first area The layer has a desired thickness, wherein the average heat capacity on the surface of the substrate is generally uniform after removing a part of the coating; and transmits an electromagnetic energy to the area containing the first area and the second area, wherein the electromagnetic The energy melts the material in the first zone.

The embodiment of the present invention further provides a method for heat-treating a substrate, including: providing a substrate having a first characteristic structure and a second characteristic structure formed on the surface of the substrate, wherein the second characteristic structure contains a first Area and a second area; placing the substrate on a substrate support; depositing a coating on the first and second features; removing a portion of the coating so that the coating is arranged in the second area And exposing the surface of the first feature structure; and transmitting an electromagnetic energy to the area containing the first feature structure and the second feature structure, wherein the electromagnetic energy makes the second feature structure in the first region The material melts.

The embodiment of the present invention further provides a method for heat-treating a substrate, including: transmitting a first electromagnetic energy to the back surface of the substrate at one or more expected wavelengths, so that one or more regions generally adjacent to the front surface of the substrate The material inside melts, wherein the rear surface and the front surface are located on opposite sides of the substrate, and the front surface of the substrate includes one or more semiconductor elements formed thereon.

An embodiment of the present invention further provides a method for heat-treating a substrate, including: transmitting a first electromagnetic energy to a first area on a surface of a substrate, wherein the first electromagnetic energy melts the substrate material in the first area , And make the crystalline base material become amorphous; implant a second material in the first region of the amorphous; and transmit a second electromagnetic energy to the first region, wherein the second electromagnetic energy makes the first The material in the area melts.

An embodiment of the present invention further provides an apparatus for heat-treating a semiconductor substrate, comprising: a substrate support having a substrate supporting surface; and a heating element suitable for heating the substrate disposed on the substrate support And a strong light source, which is suitable for transmitting a light to an area on the substrate surface provided on the substrate supporting surface.

The embodiment of the present invention further provides an apparatus for heat treatment of a semiconductor substrate, comprising: a first strong light source adapted to transmit a first energy to an area on the surface of the substrate arranged on the supporting surface of the substrate; The second strong light source, which is adapted to transmit a second energy to the area on the substrate surface provided on the substrate supporting surface; and a controller, which is adapted to monitor the transmission to the substrate surface The first energy of the area, and control the time between the first and second energy and the intensity of the second energy to reach the desired temperature in the area.

The embodiment of the present invention further provides an apparatus for heat-treating a semiconductor substrate, including: a substrate support having a substrate support surface and an opening formed in the substrate support; and a first light source, which is suitable After transmitting a light beam to a first area of the substrate through the opening formed in the substrate support, and the back surface of the substrate opposite to the front surface of the substrate, the front surface of the substrate contains one or more formations. There is a semiconductor element on it, and the amount of light is suitable for melting an area contained in the first area.

An embodiment of the present invention further provides a method for heat-treating a substrate, including: disposing a substrate on a substrate support; and transmitting a plurality of electromagnetic energy pulses to a first area on the surface of a substrate, which is related to One of the first regions of the substrate is in thermal communication. The step of transmitting a plurality of electromagnetic energy pulses includes: transmitting a first (electromagnetic energy) pulse to the surface of the substrate; transmitting a second (electromagnetic energy) pulse to the surface of the substrate; and adjusting the start of the first pulse and the second pulse The time between the initiation and melting of the material contained in the first zone.

The embodiment of the present invention further provides a method for heat-treating a substrate, including: disposing a substrate on a substrate support; and transmitting electromagnetic energy to a surface of a substrate, which is connected to a first region of the substrate And a second area is in thermal communication. The step of transmitting electromagnetic energy includes: transmitting a first electromagnetic energy at a first wavelength to preferentially melt the material contained in the first area but not in the second area; and transmitting a second electromagnetic energy at a second wavelength , To preferentially melt the material contained in the first area rather than the second area, where the time for transmitting the second electromagnetic energy and the time for transmitting the first electromagnetic energy overlap.

An embodiment of the present invention further provides a method for heat-treating a substrate, including: disposing a substrate on a substrate support; and transmitting electromagnetic energy to the surface of a substrate, which is connected to a first region of the substrate And a second area is thermally connected, wherein the step of transmitting electromagnetic energy includes: adjusting the waveform of the electromagnetic energy pulse as a function of time to preferentially melt the material contained in the first area.

The present invention generally improves the efficiency of the implantation annealing step used in the process of manufacturing semiconductor devices on a substrate. Generally, the method of the present invention can be used to preferentially anneal selected areas of the substrate by delivering sufficient energy to the selected areas to remelt and then solidify.

Generally speaking, the term "substrate" as used herein can be formed of a material with a certain degree of natural conductivity or a material that can be adjusted to provide conductivity. Typical substrate materials include, but are not limited to, semiconductors, such as silicon (Si) and germanium (Ge), and other compounds exhibiting semiconductor characteristics. Such semiconductor compounds usually include III-V group and II-VI group compounds. Representative III-V group semiconductor compounds include, but are not limited to, gallium arsenide (GaAs), gallium phosphide (GaP), and gallium nitride (GaN). Generally speaking, the term semiconductor substrate includes bulk semiconductor substrates and substrates with deposited layers on them. For this reason, the deposited layers in certain semiconductor substrates processed by the method of the present invention are grown using homoepitaxial (for example, silicon on a silicon layer) or heteroepitaxial (for example, gallium arsenide on a silicon layer). . For example, the method of the present invention can be used in conjunction with gallium arsenide and gallium nitride substrates formed by a heteroepitaxial method. Similarly, the method of the present invention can also be used to form integrated circuits, such as thin film transistors (TFTs), on a relatively thin crystalline silicon layer formed on an insulating substrate (for example, a silicon-on-insulator (SOI) substrate). .

In an embodiment of the present invention, an energy is delivered to the surface of the substrate to preferentially melt certain expected areas of the substrate to remove undesirable damage caused by previous process steps (for example, from the implantation process). Crystal damage) to make the dopants more evenly distributed in each area of the substrate, and/or activate each area of the substrate. Because the dopant atoms have an increased diffusion rate and solubility in the melting zone of the substrate, the preferential melting process allows the dopants to be more evenly distributed in the melting zone. The formation of a melting zone thus allows: 1) the dopant atoms to be redistributed more uniformly, 2) to remove defects caused by previous process steps, and 3) to form regions with hyper-abrupt dopant concentrations. The dopant concentration gradient in the region with ultra-steep dopant concentration is very large (for example, <2nm/decade concentration), because the concentration changes rapidly between different regions in the device.

The use of the technique described here allows the formation of junctions with higher dopant concentrations than conventional devices. This is due to the common negative characteristics of the junctions formed (for example, due to the increased doping level, the defect concentration in the substrate material is caused. The increase) can be easily reduced to an acceptable level using the processing techniques described here. Higher dopant levels and rapid changes in dopant concentration can thus increase the conductivity of each area of the substrate, thereby improving the speed of the device, without negatively affecting the yield of the device, and at the same time allowing the dopant to diffuse into each area of the substrate. The situation in the area is minimized. The resulting higher dopant concentration increases the conductivity of the formed device and improves its performance. Generally, components formed by RTP process will not use more than about 1 x 10¹⁵A dopant concentration of atoms/cm², because a higher dopant concentration cannot easily diffuse into the bulk material of the substrate during a typical RTP process, and instead will cause clusters of dopant atoms and other types of defects. Using one or more of the annealing process embodiments described here, many more dopants can be successfully integrated (up to 5-10 times more dopants, that is, 1 x 10¹⁶Atom/cm²) to the expected substrate surface. Because the substrate regions are preferentially melted, the dopants will be more evenly distributed in the liquid before the liquefied regions solidify.

Figure 1 shows an isometric view of an embodiment of the present invention, in which an energy source 20 is adapted to project an energy onto a predetermined area of the substrate 10, or an annealing area 12, to preferentially melt the annealing area 12 Some expected areas of the country. In an example, as shown in FIG. 1, only one or more predetermined areas of the substrate 10, such as the annealing area 12, are exposed to the radiation from the energy source 20 at any point in time. In an embodiment of the present invention, a plurality of regions of the substrate 10 are sequentially exposed to the expected energy from the energy source 20, so that the expected regions of the substrate 10 are preferentially melted. Generally speaking, the areas on the surface of the substrate can be moved by moving the substrate relative to the output of the electromagnetic radiation source (for example, the conventional X/Y translation stage, precision translation stage), and/or relative to The substrate moves the output of the radiation source to sequentially expose it. Generally, one or more conventional electrical actuators 17 (for example, linear motors, lead screws, and servo motors) are used to control the movement and positioning of the substrate 10, and the actuator 17 may be a separate precision translation Part of the station (not shown). A conventional precision translation stage that can be used to support and position the substrate 10 and the heat exchange element 15 can be purchased from Parker Hannifin Company of Rohnert Park, California.

In one embodiment, the annealing area 12 is customized to conform to the dies 13 formed on the surface of the substrate (for example, 40 dies are shown in FIG. 1), or semiconductor devices (for example, memory chips) )size of. In one embodiment, the boundary of the annealing area 12 is aligned and dimensioned to match the cutting line 10A (scribe or kurf) defining the boundary of each die 13 line). In one embodiment, before performing the annealing process, the substrate is aligned with the output of the energy source 20 using alignment marks that can usually be found on the surface of the substrate and other conventional techniques, so the annealing area 12 It can be properly aligned with the die 13. The annealing area 12 is arranged in order so that it overlaps only at the unused space/boundary that naturally occurs between the dies 13, such as the cutting lines, so as to reduce the energy overlap in the area formed by the elements on the substrate Therefore, the variability of the process results between the overlapping annealing regions is reduced. This technology is superior to the conventional process of sweeping laser energy on the surface of the substrate because it limits the overlap to the unused space between the dies 13, so the need to strictly control the overlap of adjacent scanning areas Ensuring uniform annealing over the intended area of the substrate is not a problem. Compared with the conventional scanning annealing method that uses adjacent overlapping areas spread over all regions of the substrate, the present invention limits the overlap to the unused space/boundary between the dies 13 and also improves the process uniformity result. Therefore, the process variation caused by the difference in the energy exposure of the critical areas of the substrate for processing the substrate transmitted from the energy source 20 is minimized because of any energy transmission between the annealing areas 12 arranged in sequence The overlap can be minimized. In one example, each annealing area 12 arranged in sequence is a rectangular area with a size of about 22 mm by about 33 mm (for example, an area of about 726 square mm). In one embodiment, the area of each sequentially disposed annealing area 12 formed on the surface of the substrate is between about 4 mm2 (for example, 2 mm x 2 mm) and about 1000 mm2 (For example, 25 mm x 40 mm).

The energy source 20 is generally adapted to transmit electromagnetic energy to preferentially melt a portion of the expected area on the surface of the substrate. Typical electromagnetic energy sources include, but are not limited to, optical radiation sources (such as lasers), electron beam sources, ion beam sources, and/or microwave energy sources. In one embodiment, the substrate 10 is exposed to an energy pulse from a laser, which emits light at one or more appropriate wavelengths for a desired period of time. In one embodiment, the energy pulse from the energy source 20 is adjusted so as to optimize the energy transmitted to the annealing area 12 and/or the energy transmitted during the pulse to enhance the preferential melting of some expected areas. In one embodiment, the wavelength of the laser is adjusted so that most of the laser light is absorbed by the silicon layer disposed on the substrate 10. For the laser annealing process performed on silicon-containing substrates, the wavelength of the laser light is usually less than about 800 nanometers, and can be transmitted in deep ultraviolet (UV), infrared (IR) or other desired wavelengths. In one embodiment, the energy source 20 is a strong light source, such as a laser, which is suitable for transmitting light at a wavelength between about 500 nanometers and about 11 micrometers. In both cases, the annealing process is generally performed on a specific area of the substrate for a relatively short period of time, for example, about one second or less.

In one embodiment, the energy delivered to the surface of the substrate is set so that the melting depth does not exceed the amorphous depth defined by the amorphization implantation step. A deeper melting depth promotes the diffusion of dopants from the doped amorphous layer into the undoped melting layer. Such unexpected diffusion can drastically and adversely change the electrical characteristics of the circuit on the semiconductor substrate. In some annealing processes, energy is delivered to the surface of the substrate for a very short period of time to melt the surface of the substrate to a well-defined depth, such as less than 0.5 microns. The actual depth is determined by the size of the electronic components manufactured.

<b><u style="single">Temperature control of the substrate during the annealing process</u></b>

In one embodiment, it may be inclined to control the substrate temperature by placing the surface of the substrate 10 in thermal contact with the substrate supporting surface 16 of a heat exchange element 15 during the heat treatment, as shown in FIG. 1. The heat exchange element 15 is generally suitable for heating and/or cooling the substrate before or during the annealing process. In this configuration, the heat exchange element 15, for example, a conventional substrate heater available from Applied Materials of Santa Clara, California, can be used to improve the post-process characteristics of the substrate annealing area. Generally, the substrate 10 is placed in a closed process environment (not shown) in one of the process chambers (not shown) containing the heat exchange element 15. The process environment in which the substrate stays during the process can be evacuated or contain an inert gas, which has a low partial pressure of undesired gas during the process, such as oxygen.

In one embodiment, the substrate can be preheated before performing the annealing process, so that the energy required to reach the melting point can be minimized, which can reduce any stress caused by rapid heating and cooling of the substrate. And it may also reduce the defect density in the re-cured area of the substrate. In one embodiment, the heat exchange element 15 includes a resistance heating element 15A and a temperature controller 15C, which are suitable for heating a substrate disposed on a substrate supporting surface 16. The temperature controller 15C and the controller 21 are in message communication (discussed later). In one aspect, it may be inclined to preheat the substrate to a temperature between about 20°C and about 750°C. In one aspect, when the substrate is formed of a silicon-containing material, there may be a tendency to preheat the substrate to a temperature between about 20°C and about 500°C.

In another embodiment, it may be inclined to cool the substrate during the process to reduce any cross-diffusion caused by the energy applied to the substrate during the annealing process and/or to increase the rate of re-growth after melting to increase The amorphization of each region during the manufacturing process, for example, as described in conjunction with Figure 8. In one configuration, the heat exchange element 15 includes one or more fluid channels 15B and a low temperature cooler 15D, which is suitable for cooling the substrate disposed on the substrate supporting surface 16. In one embodiment, the conventional low-temperature cooler 15D is in communication with the controller 21 and is suitable for conveying cooling fluid through the one or more fluid passages 15B. In one aspect, there may be a tendency to cool the substrate to a temperature between about -240°C and about 20°C.

The controller 21 (Figure 1) is generally designed to facilitate the control and automation of the heat treatment technology described herein, and may generally include a central processing unit (CPU) (not shown), memory (not shown), And supporting circuits (or input/output) (not shown). The CPU can be used in industrial devices to control various processes and hardware (for example, conventional electromagnetic radiation detectors, motors, laser hardware) and monitor the process (for example, substrate temperature, substrate support temperature, from Any form of the computer processor of the pulsed laser's energy, detector signal). The memory (not shown) is connected to the CPU, and can be one or more easily accessible memories, such as random access memory (RAM), read-only memory (ROM), floppy disk, hard disk, Or any other type of digital storage, in-situ or remote. Software instructions and data can be coded and stored in the memory to instruct the CPU. The supporting circuits (not shown) are also connected to the CPU to support the processor using conventional methods. The supporting circuits may include conventional caches, power supplies, clock circuits, input/output circuits, subsystems, and the like. The program (or computer instruction) that can be read by the controller determines which process is to be performed on the substrate. Preferably, the program is software that can be read by the controller, and contains program codes to monitor and control the position of the substrate, the energy transmitted by each electromagnetic pulse, the time point of one or more electromagnetic pulses, and the time As a function of the intensity and wavelength of each pulse, the temperature of each area of the substrate, and any combination thereof.

<b><u style="single">Selective melting</u></b>

In the efforts to minimize the cross-diffusion between the various regions of the formed element, remove the defects in the substrate material, and make the dopants more evenly distributed in the various regions of the substrate, in the various regions of the substrate One or more process steps are performed to make the regions preferentially melt when exposed to energy from an energy source during the annealing process. After that, the characteristics of the first region of the substrate will be adjusted so that when the first and second regions are exposed to about the same energy during the annealing process, the first region will melt preferentially than the second region of the substrate. The above adjustment process is described later as causing a melting point contrast between these two regions. Generally speaking, the characteristics of the substrate that can be adjusted so that the expected area of the substrate can be preferentially melted include: implantation, intrusion, and/or co-deposition of one or more elements in the expected area of the substrate, The predetermined area of the substrate causes physical damage, and the formed element structure is optimized to produce a melting point contrast in the expected area of the substrate. In the following, each adjustment process will be discussed in turn.

2A-2C show cross-sectional views of the electronic component 200 at different stages of the component manufacturing process including an embodiment of the present invention. Figure 2A shows a side view of a typical electronic component 200 formed on the surface 205 of the substrate 10, and it has two doped regions 201 (such as doped regions 201A-201B) (such as the source and drain of the MOS device). Region), a gate 215, and a gate oxide layer 216. The doped regions 201A-201B are usually formed by implanting expected dopant materials into the surface 205 of the substrate 10. Generally speaking, typical n-type dopants (donor-type species) can contain arsenic (A_s), phosphorus (P), and antimony (Sb), and typical P-type dopants (acceptor type species) can include boron (B), aluminum (Al), and indium (In), which are introduced into the semiconductor The doped regions 201A-201B are formed in the substrate 10. Figure 3A shows an example of dopant material concentration as a function of depth (e.g. curve C₁), and the depth starts from the surface 205 and enters the substrate 10 along a path 203 extending through the doped region 201A. The doped region 201A has a junction depth D after the implantation process₁, Which can be defined as the point where the dopant concentration drops to a negligible amount. It should be noted that FIGS. 2A-2F are only intended to show some implementation aspects of the present invention, and are not intended to limit the types of elements, structure types, or element regions that can be formed by the various embodiments of the present invention described herein. In an example, the doped regions 201 (for example, the source or drain region of a MOS device) can be raised or lowered relative to the position of the gate 215 (for example, the gate of a MOS device), without Depart from the scope of the invention described herein. As the size of the semiconductor device shrinks, the position and geometry of the structural members of the electronic device 200 formed on the surface 205 of the substrate 10 can be changed to improve device manufacturability or device performance. It should also be noted that the adjustment only for a single doped region 201A, as shown in Figures 2A-2E, is not intended to limit the scope of the present invention described here, but only to show how the present invention can be implemented. Examples to manufacture semiconductor components.

Fig. 2B shows a side view of the electronic device 200 shown in Fig. 2A during a process step, which is suitable for selectively adjusting the characteristics of the discontinuous area (for example, the adjustment area 210) of the substrate 10, here In this case, it is a region containing a single doped region 201A to produce a melting point contrast. After the adjustment process is performed, there will be a melting point contrast between the adjusted area 210 and the unadjusted area 211. In one embodiment, the adjustment process includes adding a material to the layer when depositing a layer on the surface of the substrate, wherein the incorporated material is suitable for forming an alloy with the substrate material to reduce the adjustment area 210 The melting point of zone 202. In one embodiment, the incorporated material is added to the deposited layer during an epitaxial layer deposition process.

In another embodiment, the adjustment process includes a step of implanting (see "A" in FIG. 2B) a material suitable for forming an alloy with the base material to lower the melting point of the region 202 in the adjustment region 210. In one embodiment, the adjustment process is suitable for implanting the alloy forming material to a depth D₂, As shown in Figure 2B. Figure 3B shows the concentration of dopant material as a function of depth (e.g. curve C₁) And the implanted alloy forming material concentration (e.g. curve C₂), and the depth starts from the surface 205 and passes through the substrate 10 along the path 203. In one embodiment, the substrate 10 is formed of a silicon-containing material, and the implantable alloy forming materials that can be used include, for example, germanium (Ge), arsenic (As), gallium (Ga), carbon (C) ), tin (Sn), and antimony (Sb). Generally speaking, the alloy forming material can be any material that lowers the melting point of the region 202 in the adjustment region 210 relative to the unregulated regions 211 when heated in the presence of the base material. In one embodiment, a silicon substrate area is adjusted by adding between about 1% and about 20% germanium to reduce the melting point between the adjusted and unadjusted areas. It is believed that adding germanium at these concentrations will lower the melting point of the adjusted zone relative to the unadjusted zone by about 300°C. In one embodiment, the region 202 formed in the silicon substrate contains germanium (Ge) and carbon (C), so Si is formed_xGe_yC_zThe alloy reduces the melting point of the region 202 relative to the unadjusted regions 211. In another embodiment, an area of the silicon substrate is adjusted by adding about 1% or less of arsenic to reduce the melting point between the adjusted and unadjusted areas.

In another embodiment, the adjustment process includes inducing some material damage of the substrate 10 in a number of adjustment regions (for example, the adjustment region 210) to damage the crystalline structure of the substrate, thereby making these regions more amorphous. Inducing damage to the crystalline structure of the substrate (such as destroying the single crystal silicon substrate) will lower the melting point of this region relative to an undamaged region. This is because the bonding structure of the atoms in the substrate changes, thus causing the two Differences in thermodynamic properties between regions. In one embodiment, the damage to the adjustment area 210 in Figure 2B is achieved by bombarding the surface 205 of the substrate 10 with a projectile that can damage the surface of the substrate (see Figure 2B "A") to execute. In one embodiment, the projectile is implanted with silicon (Si) atoms in the silicon-containing substrate to cause damage to the region 202 in the adjustment region 210. In another embodiment, the damage to the substrate material is produced by bombarding the surface with gas atoms such as argon (Ar) and krypton (Kr) by an implantation process, ion beam or biased piezoelectric plasma. , Xenon (Xe) or even nitrogen (N₂) To cause damage to the area 202 of the adjustment area 210. In one embodiment, the adjustment process is suitable for causing damage caused by possession to the depth D₂The area 202 is as shown in Figure 2B. Believe about 5 x 10¹⁴And about 1 x 10¹⁶The dislocation or vacancy density between per square centimeter may be useful for generating the melting point contrast between the adjusted area 210 and the unadjusted area 211. In one embodiment, Figure 3B shows the concentration of the dopant material as a function of depth (for example, curve C₁) And defect density (for example, curve C₂), and the depth starts from the surface 205 and passes through the substrate 10 along the path 203.

It should be noted that although Figures 2A-2B show the process sequence of the adjustment process after the doping process, this process sequence is not intended to limit the scope of the present invention described herein. For example, in one embodiment, it is preferred to perform the adjustment process described in FIG. 2B before performing the doping process described in FIG. 2A.

Figure 2C shows a side view of the electronic component 200 shown in Figure 2B, which is exposed to radiation "B" from an energy source, such as optical radiation from a laser. During this step, the adjusted area (e.g., adjusted area 210) and the unadjusted area (e.g., 211) disposed across the substrate 10 are exposed to an energy, which causes the adjusted area (e.g.) 210 The inner area 202 is selectively melted and re-solidified after the pulse of irradiation "B" is applied, and the unadjusted areas 211 remain solid. The total amount of energy, energy density, and duration of the irradiation "B" can be based on the expected depth of the region 202, the material used to form the region 202, other materials used to form the electronic component 200, and the formed It is set based on the knowledge of the heat transfer characteristics of the components in the electronic component 200 to preferentially melt the regions 202. As shown in Figures 2C and 3C, when exposed to radiation "B", the remelting and solidification of the region 202 causes the concentration of the dopant atoms (for example, curve C₁) And alloy formation atomic concentration (for example, curve C₂) Are more evenly distributed in the region 202. In addition, the dopant concentration between the region 202 and the substrate bulk material 221 has a well-defined boundary (ie, an ultra-steep junction), thus causing undesired diffusion into the substrate bulk material 221. The phenomenon is minimized. In the embodiment discussed above, in which damage is induced in the substrate 10 to improve the melting point contrast, the defect concentration after recuring (for example, curve C₂) Will be reduced to negligible priority.

<b><u style="single">Thermal isolation technology</u></b>

In another embodiment, various thermal properties of different regions of the formed element are adjusted to make one region melt preferentially with respect to another region. In one embodiment, the melting point contrast is produced by forming different regions of the device with materials having different thermal conductivity (k). It should be noted that the heat transfer in conduction mode is determined by the equation: Q=kA T/x where Q is the time rate of heat flowing through a body (time rate), k is the thermal conductivity coefficient that depends on the material properties and material temperature, A is the area through which heat flows, x is the body thickness of the material through which the heat passes, and T is the temperature difference during the temperature transfer. Therefore, because k is a characteristic of the material, the selection or adjustment of the material in each region of the substrate allows controlling the flow of heat into and out of different regions of the substrate to increase the melting point contrast of each region. In other words, when the material in one area of the substrate has a higher thermal conductivity than the material in other areas, it will lose more heat energy through conduction during the laser annealing process, so it will not reach the same thermal conductivity. The same temperature reached by the other lower area. The area in close contact with the area with higher thermal conductivity can avoid melting, while the other area in close contact with the area with lower thermal conductivity will reach its melting point during the laser annealing process. By controlling the thermal conductivity of each area of the electronic component 200, the melting point contrast can be increased. The establishment of regions with different thermal conductivity coefficients can be performed by performing conventional deposition, patterning, and etching techniques on each lower layer of the electronic component 200 to generate these regions with different thermal conductivity coefficients. The underlying layers with different thermal conductivity coefficients can be formed using conventional chemical vapor deposition (CVD) processes, atomic layer deposition (ALD) processes, implant processes, and epitaxial deposition techniques.

FIG. 2D shows a side view of the electronic component 200 having a buried area 224 that has a lower thermal conductivity than the bulk material 221 of the base material. In this example, the radiation "B" emitted by an energy source is absorbed by the substrate surface 205 and conducted through the substrate 10. Therefore, the heat flow in the area above the buried region 224 (for example, the doped region 201A) (Q₁) Is lower than the heat flow (Q₂). Therefore, since the heat loss of the area above the buried area 224 is lower than other areas of the substrate, this area will reach a higher temperature than other areas of the device. By controlling the energy delivered by the energy source 20, the temperature in the area above the buried layer can be raised to a level that will cause it to preferentially melt relative to other areas. In one embodiment, the buried region 224 is made of insulating material, such as silicon dioxide (SiO₂), silicon nitride (SiN), germanium (Ge), gallium arsenide (GaAs), their combinations or their derivatives. Therefore, although the actual melting point of the substrate material in the area to be melted has not changed, there is still a measurable and repeatable thermal behavior contrast with other areas on the surface of the substrate, which allows it to be selectively melted. In another embodiment, the buried region 224 may have a higher thermal conductivity than the bulk material 221 of the base material, so that the region without the buried layer can be preferentially melted relative to the region above the buried layer.

<b><u style="single">Adjust surface properties</u></b>

In one embodiment, the properties of the surface on each area 202 of the substrate 10 are changed to change the melting point contrast between one or more expected areas. In one embodiment, the emissivity of a desired area on the surface of the substrate is changed to change the energy transferred from the surface of the substrate during the process. In this example, the region with a lower emissivity than other regions will reach a higher process temperature because it cannot irradiate the absorbed energy received from the energy source 20 again. When performing an annealing process involving the melting of the substrate surface, the process temperature reached by the substrate surface can be quite high (for example, silicon can reach 1414°C). Therefore, the result of changing the emissivity can cause a great contrast of the melting point. Impact because radiant heat transfer is the main heat loss mechanism. Therefore, the variation of the emissivity of different areas on the surface of the substrate can have a significant effect on the final temperature reached in each area of the substrate. During the annealing process, the region with lower emissivity can rise above the melting point, and the region with higher emissivity that absorbs the same energy can be substantially maintained below the melting point. Changing the emissivity of each surface, or the contrast of emissivity, can be achieved by selectively depositing a low or high emissivity coating on the surface of the substrate, and/or adjusting the surface of the substrate (e.g., surface oxidation, surface roughening) ) To achieve.

In one embodiment, the reflectivity of one or more regions on the surface of the substrate is changed to change the energy absorbed by the substrate 10 when exposed to energy from the energy source. By changing the reflectivity of the surface of the substrate, the energy absorbed by the surface of the substrate and the area below and thus the maximum temperature that the substrate can reach will vary based on the reflectivity. In this case, the surface with lower reflectivity will melt more easily than the surface with higher reflectivity. Changing the reflectivity of the substrate surface can be achieved by selectively depositing a low or high reflectance coating on the substrate surface and/or adjusting the substrate surface (for example, surface oxidation, surface roughening). A highly absorbing (non-reflective) coating can be selectively applied to the area that is intended to be melted during the annealing process.

Figure 2E shows an embodiment in which the coating 225 is selectively deposited, or uniformly deposited and then selectively removed, and the emissivity and/or reflectivity formed on the surface 205 of the substrate 10 is different from other regionsLayer. The layer. In this case, the energy absorbed in other areas of the substrate (Q₂) To adjust the heat flow (Q₁). In this way, the heat loss from the coating 225 (Q₃) Or reflection can be relative to the heat loss from other areas (Q₄) And change. In one embodiment, a CVD deposition process is used to deposit a carbon-containing coating on the surface of the substrate.

Figure 2F shows an embodiment in which a coating that changes the optical properties (e.g. emissivity, reflectivity) of the substrate surface is deposited on the surface of the substrate, for example on the element shown in Figure 2A 226. Then a part of the material is removed to create regions with different optical properties. For example, as shown in Figure 2F, the coating 226 has been removed from the surface of the gate 215, thereby exposing the surface of the coating 226 and the gate surface 205 to the incident radiation "B". In this example, the coating 226 and the gate surface 205 have different optical properties, such as different emissivity and/or different reflectivity. The removal process for exposing or generating regions with different optical properties can be performed using conventional material removal processes, such as wet etching or chemical mechanical polishing (CMP) processes. In this example, the absorption and heat flow (Q₂) To adjust the absorption and heat flow (Q₁). In this way, the heat loss from the coating 226 (Q₃) Or reflection can be relative to the heat loss from the gate 215 area (Q₄) Or change by reflection.

In one embodiment, the coating 226 contains one or more deposited layers with a desired thickness, which act individually or in combination to adjust the optical properties of each area of the substrate exposed to one or more incident radiation wavelengths (such as , Emissivity, absorption, reflectivity). In one embodiment, the coating 226 contains deposited layers that act alone or in combination to preferentially absorb or reflect one or more incident radiation "B" wavelengths. In one embodiment, the coating 226 contains a dielectric material, such as fluorosilicate glass (FSG), amorphous carbon, silicon dioxide, silicon carbide, silicon-carbon-germanium alloy (SiCGe), nitrogen-containing silicon carbide (SiCN), BLOk manufactured using a process available from Applied Materials of Santa Clara, California^TMA dielectric material, or a carbon-containing coating deposited on the surface of the substrate by a chemical vapor deposition (CVD) process or an atomic layer deposition (ALD) process. In one embodiment, the coating 226 contains metal, such as, but not limited to, titanium (Ti), titanium nitride (TiN), tantalum (Ta), cobalt (Co), or ruthenium (Ru).

It should be noted that one or more of the embodiments described herein can be used in combination with each other to further increase the process window. For example, a selective deposition, high absorption coating can be used in conjunction with doping certain defined regions to expand the scope of the annealing process.

<b><u style="single">Adjust energy source output to achieve priority melting</u></b>

As noted above, the energy source 20 is generally adapted to deliver electromagnetic energy to preferentially melt certain expected areas of the substrate 10. Typical electromagnetic energy sources include, but are not limited to, optical radiation sources (for example, lasers (wavelengths such as UV, IR)), electron beam sources, ion beam sources, and/or microwave energy sources. In an embodiment of the present invention, the energy source 20 is adapted to transmit optical radiation, such as a laser, to selectively heat the desired area of the substrate to the melting point.

In one embodiment, the substrate 10 is exposed to an energy pulse from a laser, which emits light at one or more appropriate wavelengths, and the emitted light has the expected energy density (watts/cm²) And/or pulse time to enhance the preferential melting of certain expected areas. For the laser annealing process performed on silicon-containing substrates, the wavelength of light is usually less than about 800 nanometers. In either case, the annealing process is usually performed in a specific area of the substrate for a relatively short period of time, for example, about one second or less. The expected wavelength and pulse waveform used in the annealing process can be determined based on the optical and thermal models made by laser annealing according to the material properties of the substrate.

Figures 4A-4D show several embodiments in which the properties of the pulse energy transmitted from the energy source 20 to the annealing area 12 (Figure 1) are adjusted as a function of time to achieve improved melting point contrast and improve the annealing process results . In one embodiment, it is inclined to change the waveform of the laser pulse as a function of time, and/or change the wavelength of the transmitted energy, so as to enhance the heat input to the area of the substrate to be melted, and to make the heat input to other areas The situation is minimized. In one aspect of implementation, there may also be a tendency to change the energy delivered to the substrate.

FIG. 4A shows a graph of the transmitted energy of a single pulse (for example, pulse 401) of electromagnetic radiation that can be transmitted from the energy source 20 to the substrate 10 (see FIG. 1) versus time. The pulse shown in Figure 4A is usually a rectangular pulse, which is during the entire pulse period (t₁) To transmit fixed energy (E₁ )。

In one embodiment, the waveform of the pulse 410 may change as a function of time when it is delivered to the substrate 10. FIG. 4B shows a plot of two pulses 401A and 401B with different waveforms of electromagnetic radiation that can be transmitted from the energy source 20 to the substrate 10. In this example, each pulse may contain the same total energy output, as represented by the area under each curve, but the effect of the area exposed to the substrate 10 under one pulse relative to another pulse can improve annealing The melting point contrast experienced during the period. Therefore, by changing the waveform, peak power level, and/or delivered energy of each pulse, the annealing process can be improved. In one embodiment, the pulse is a Gaussian waveform.

Figure 4C shows a trapezoidal electromagnetic radiation pulse (e.g., pulse 401). In this example, in two different parts of the pulse 401 (e.g., 402 and 404), the energy delivered changes as a function of time. Although Figure 4C shows a pulse 401 profile, or waveform, in which the energy changes linearly with respect to time, this is not intended to limit the scope of the present invention, because the time variation of the energy delivered by a pulse can, for example, have two levels, Three-level or four-level wave curve. In another embodiment, the energy profile or waveform of a pulse transmitted as a function of time can be a second-order, third-order, or exponential curve. In another embodiment, it may be advantageous to use pulses with different waveforms during the process (for example, rectangular and triangular modulated pulses, sine and rectangular modulated pulses, rectangular, triangular and sine modulated pulses, etc.) to achieve Expected annealing results.

Depending on the nature of each region of the device, the transmitted electromagnetic radiation pulse waveform can be adjusted to improve the annealing process result. Referring to Figure 4B, for example, in some cases where various regions of the substrate to be melted during the annealing process are thermally isolated from other regions of the device by regions with low thermal conductivity, a pulse with a waveform similar to pulse 401B may be advantageous. A pulse with a longer duration may be advantageous, because the more thermally conductive material area of the substrate will have more time to dissipate heat by conduction, and the area to be melted is more insulated, so the temperature of the area to be melted Can rise to the melting point temperature. In this example, the pulse duration, peak power level, and total energy output can be appropriately selected so that the area that is not to be melted will not reach its melting point. The process of adjusting the pulse waveform can also be advantageous when using surfaces with different emissivities to produce melting point contrast.

Referring to Figure 4C, in one embodiment, the slope of the portion 402, the waveform of the portion 402, the waveform of the portion 403, and the time of a power level (for example, the energy level E₁The part 403), the slope of the part 404, and/or the waveform of the part 404 are used to control the annealing process. It should be noted that due to the consideration of particles and process results variability, it is generally not inclined to evaporate the material in the annealing area during the process. Therefore, there is a tendency to adjust the waveform of the energy pulse so that the temperature of the annealing area quickly reaches its melting point, while not overheating the area and causing the material to evaporate. In one embodiment, as shown in Fig. 4G, the waveform of the pulse 401 can be adjusted, so it has multiple parts (ie, parts 402, 403A, 403B, 403C, and 404) to make the annealing area quickly reach Its melting point, and then keep the material in the molten state for a desired period of time (for example, t₁), while avoiding the evaporation of the material in the annealing area. The time length, waveform, and duration of each pulse portion can be changed with changes in size, melting depth, and materials contained in the annealing area.

In another embodiment, multiple wavelengths of radiant energy can be combined to improve the energy delivered to the expected area of the substrate, so as to achieve improved melting point contrast and/or improved annealing process results. In one embodiment, the energy delivered by each combined wavelength is changed to improve the melting point contrast and improve the annealing process result. FIG. 4D shows an example in which the pulse 401 contains two wavelengths, which can deliver different energy to the substrate 10 per unit time to improve the melting point contrast and/or improve the annealing process result. In this example, a frequency F1 is applied to the substrate at a fixed level during the pulse, and another frequency F2 is applied to the substrate 10 at a fixed level during most of the pulse period, except for reaching a peak for a period of time Outside of time.

Figure 4E shows a plot of a pulse 401 with two consecutive parts, which transmits energy at two different frequencies, F3 and F4. Therefore, because each area of the substrate can absorb energy of different wavelengths at different rates, it may be advantageous to use pulses with multiple wavelengths capable of transmitting variable energy, as shown in Figures 4D and 4E, to achieve the desired annealing. Process results.

In one embodiment, two or more electromagnetic radiation pulses are delivered to an area of the substrate at different times, so the temperature of the area on the surface of the substrate can be easily controlled. Figure 4F shows the mapping of two kinds of pulses 401A and 401B, which are delivered at different times, or at different time intervals during period (t), to selectively melt certain areas on the surface of the substrate. In this configuration, by adjusting the period (t) between the consecutive pulses, the peak temperature reached by the area on the substrate surface can be easily controlled. For example, by shortening the period (t) or frequency between pulses, the heat transmitted by the first pulse 401A has a shorter heat dissipation time before the second pulse 401B is transmitted, which will make the peak temperature reached in the substrate It is higher than when the period between pulses increases. In this way, by adjusting the period, the energy and melting temperature can be easily controlled. In one embodiment, it may be inclined to ensure that each pulse does not contain enough energy to bring the substrate to the melting temperature by itself, but the combination of the pulses brings the regions 202 to the melting temperature. The process of delivering multiple pulses (for example, two or more pulses) is easier to reduce the thermal shock experienced by the substrate material than the process of delivering a single energy pulse. Thermal shock can cause damage to the substrate and generate particles, which can cause defects in subsequent processing steps performed on the substrate.

Referring to Fig. 4F, in one embodiment, two or more energy sources, such as lasers, operate in sequence to shape the heat distribution on the surface of the substrate as a function of time. For example, a laser or a laser array can transmit the substrate surface to a temperature T₀Some time t₁The pulse 401A. At t₁Before or at the end, send a second pulse 401B from the second laser, or multiple lasers operated one after the other, which raises the temperature of the substrate to a temperature T₁Some time t₂. Therefore, the heat distribution can be shaped by controlling the continuous energy pulses transmitted from the multiple lasers. This process can have thermal process advantages, such as, but not limited to, the application of controlling dopant diffusion and the direction of dopant diffusion.

<b><u style="single">Electromagnetic radiation pulse</u></b>

In order to transmit sufficient electromagnetic radiation (light) to the surface of the silicon-containing substrate, or the surface of a substrate composed of another material that requires a thermal process, the following process control can be used.

In one embodiment, two or more energy sources, such as lasers, operate in sequence to shape the heat distribution on the surface of the substrate subjected to heat treatment and laser operation in a manner that can correct the energy variation between pulses and pulses. In one embodiment, the source 20 (shown in Figures 1 and 9) contains two or more electromagnetic energy sources, such as, but not limited to, optical radiation sources (such as lasers) and electron beam sources. , Ion beam source, and/or microwave energy source. The energy between pulses and pulses from components such as pulsed lasers may have a percentage variation in each pulse. Variations in pulse energy may be unacceptable for substrate thermal processing. To correct for this pulse variation, one or more lasers are delivered to pulses that raise the temperature of the substrate. Then use an electronic controller (for example, the controller 21 in Figure 1), which is suitable for monitoring the transmitted pulses and the energy of the pulses being transmitted, or the rise time, to calculate the "finishing" or adjust the heat distribution required Energy (for example, the temperature of a region of the substrate as a function of time), and make it fall within the process target, and command a second smaller laser or a series of smaller lasers to deliver the final energy to complete The heat treatment. The electronic controller generally uses one or more conventional radiation detectors to monitor the energy and/or wavelength of the pulses delivered to the substrate. These smaller lasers may also have peak-to-peak variations in pulse output energy, but because in essence they transmit more than the initial pulse (or multiple pulses) at the beginning of the surface treatment. ) Less energy, so this error generally falls within the process limit. The electronic controller is therefore suitable for compensating for variations in the energy delivered by a pulse, thus ensuring that the expected energy level is delivered during the thermal process.

In an implementation aspect, the two or more energy sources discussed above can also use monochromatic (wavelength) laser light with a bandwidth of color frequency, multiple wavelengths, single or multiple time and space laser modes, and flat To implant in the state of change.

The output of the laser or lasers may not have the correct spatial and temporal energy distribution delivered to the surface of the substrate. Therefore, the system that uses micromirrors to form the laser output is used to generate a uniform spatial energy distribution on the surface of the substrate. The selection of the glass type and the geometric configuration of the micromirror can compensate for the thermal lensing effect of the optical train necessary to transmit the pulsed laser energy to the surface of the substrate.

The high frequency variation of pulse energy at the surface of the substrate, called speckle, is caused by the constructive and destructive phase interference of adjacent incident energy. Spot compensation may include the following: a surface acoustic wave element to quickly change the phase at the substrate, so the rapid variation is substantially faster than the thermal processing time of the laser pulse or laser pulses; the pulse addition of the laser pulse ; Change the polarization of the laser pulse, for example, transmit multiple synchronized or delayed pulses, which are linearly polarized but have their polarization state (polarization vector; e-vector) when they are not parallel.

<b><u style="single">Thermally stable structure formed on patterned substrate</u></b>

In one embodiment, as shown in FIGS. 5A-5C, a homogeneous layer (object 120 in FIG. 5B) is deposited on the surface of the substrate to expose the surface of the substrate from an electromagnetic radiation source (not shown) Out) When the transmitted electromagnetic energy is lowered to 150, the depth or volume variation of the molten silicon region 112 is reduced. The depth or volume variation of the melting area is affected by the variation in the mass density of each area of the patterned substrate, the absorption coefficient of the material irradiated by the radiant energy, and several physical and thermal properties of the material (for example, thermal conductivity, heat capacity, material Thickness). Generally, the electromagnetic radiation source is designed to transmit electromagnetic energy to the surface of the substrate to heat-treat or anneal a part of the surface of the substrate. Typical electromagnetic radiation sources may include, but are not limited to, optical radiation sources (for example, lasers), electron beams, ion beams, or microwave sources.

The device structure formed on the surface 102 of the substrate 100 shown in FIGS. 5A-5C and 6A-6C is not intended to be limited to the scope of the present invention described herein. Therefore, for example, the silicon region 112 (e.g., The source or drain region of the MOS device can be raised or lowered relative to the position of the feature structure 101 (for example, the gate of the MOS device) without departing from the scope of the present invention described herein. As the size of the semiconductor device decreases, the position and geometrical structure of the structural members of the device formed on the surface of the substrate also change to improve the manufacturability of the device or the performance of the device.

FIG. 5A shows a cross-sectional view of the substrate 100, which has a plurality of features 101 and silicon regions 112 formed on the surface 102 of the substrate 100. As shown in FIG. 5A, the surface 102 has a plurality of feature structures 101, which are separated by different distances laterally. In one embodiment, the features 101 are "gates", and the silicon regions 112 are "source and drain regions", which are used to form metal oxide semiconductors on the surface of the substrate ( MOS) components. In the configuration shown in FIG. 5A, the incident electromagnetic energy 150 irradiates the surface 102, causing certain areas of the substrate surface 102 to absorb the incident energy, and a melting zone 113 may be formed. The physical, thermal, and optical properties of the materials exposed to the incident electromagnetic energy 150 determine whether the areas on the surface 102 will melt when exposed to the transmitted energy. It is believed that when the feature structure 101 is a polysilicon gate, the energy absorbed by the laser at a wavelength of &lt;800 nm will be significantly lower than that of silicon containing N-type or P-type doping (for example, in the source of MOS devices). The energy absorbed by the silicon region 112 where the pole or drain region is found. Therefore, it is believed that due to the heat capacity and thermal mass of these characteristic structures 101 mass), and its relative position with respect to the silicon region 112, the electromagnetic energy 150 transmitted in the area adjacent to the features 101 will remain relatively cold because of heat diffusion away from the melting region 113. The loss of heat to the features 101 reduces the energy available for forming the melting zone 113, thus affecting the depth and/or volume of the melting zone 113. Therefore, there is a need for a way to reduce the variation of the patterning density on the surface of the substrate.

FIG. 5B shows a cross-sectional view of the substrate 100, which has a plurality of feature structures 101, a silicon region 112, and a homogeneous layer 120 formed on the surface 102 of the substrate 100. Figure 5B is similar to Figure 5A, except that a homogeneous layer 120 is added. Generally, the homogeneous layer 120 is used to make the heat capacity of the surface 102 of the substrate 100 more uniform. In one embodiment, the formation thickness and material of the homogeneous layer 120 are selected to balance the heat capacity of the substrate surface, so as to reduce the influence of the changed mass density on the substrate surface, thereby reducing the depth of the melting zone 113 And/or volume variation. Generally, the material of the homogeneous layer 120 is selected so that it will not melt during the subsequent annealing process, and can be selectively removed from the surface of the substrate after the annealing process is performed. In one embodiment, the homogeneous layer 120 is a material similar in composition to the material forming the features 101, for example, a polysilicon-containing material. In another embodiment, the homogeneous layer 120 is a material or metal containing silicon carbide (for example, titanium, titanium nitride, tantalum, tungsten).

Preferably, the thickness of the homogeneous layer 120 (for example, d₁) Is selected so that the heat capacity of the element structure is uniform. In one embodiment, the thickness of the homogeneous layer 120 is controlled by the following equation: d₁=(α₁ )^0.5x[d₂/((α₂ )^0.5)] where d₂= The thickness of the characteristic structures 101 (see Figure 5B) α₁=κ₁/(ρ₁C_p1) And α₂=κ₂/(ρ₂C_p2) Where κ₁Equal to the thermal conductivity coefficient of the material used to form the homogeneous layer 120, ρ₁Equal to the mass density of the material used to form the homogeneous layer 120, C_p1Equal to the heat capacity of the material used to form the homogeneous layer 120, κ₂Equal to the thermal conductivity coefficient of the material used to form the characteristic structures 101, ρ₂Equal to the mass density of the material used to form the characteristic structures 101, C_p2It is equal to the heat capacity of the material used to form the features 101.

FIG. 6A shows a series of method steps that can be used to form the homogeneous layer 120 on the surface 102 of the substrate 100. In step 190, as shown in FIGS. 6A and 6B, the homogeneous layer 120 is deposited on the surface 102 (for example, the feature structure 101) of the substrate 100 using a conventional deposition process, such as chemical vapor deposition (CVD), and Plasma-assisted CVD, atomic layer deposition (ALD), plasma-assisted ALD, or spin-on deposition process. In step 192, as shown in FIGS. 6A and 6C, a chemical mechanical polishing (CMP) process is used to planarize the surface 102 of the substrate 100 containing the homogeneous layer 120. In step 194, as shown in FIGS. 6A and 6D, the homogeneous layer is selectively etched using a selective material removal process, such as a wet etching or dry etching process, until the desired thickness d is reached.₁until. Then, an incident electromagnetic energy can be transmitted to the surface of the substrate, so that the material contained in the melting zone 113 is uniformly annealed/melted.

<b><u style="single">Absorbent layer on homogeneous layer</u></b>

FIG. 5C is a cross-sectional view of the substrate 100, which contains the elements shown in FIG. 5B, together with an additive layer 125 deposited thereon, to adjust the optical properties of various regions on the surface of the substrate. In one embodiment, the layer 125 is added to improve the absorption of electromagnetic energy 150 transmitted to various regions of the substrate 100. In one embodiment, the layer 125 is the same as the coating 225 or 226 described above. As shown in FIG. 5C, the layer 125 is preferentially formed on the homogeneous layer 120 to improve the selectivity of the energy delivered to the silicon regions 112. The expected thickness of the layer 125 can change as the wavelength of the electromagnetic energy 150 delivered changes.

Referring to FIGS. 6A-6G, in one embodiment, after steps 190 to 194 are performed, steps 196 and 198 can be used to form a selectively deposited absorption layer 125. In step 196, as shown in FIGS. 6E and 6F, the layer 125 is deposited on the features 101 and the homogeneous layer 120 formed in steps 190-194 as described above. In step 198, as shown in FIGS. 6E and 6G, the layer 125 is removed from the upper surface of the features 101 by performing a material removal step, for example, a planarization process usually performed by a chemical mechanical polishing (CMP) process . In one embodiment, the deposited layer 125 is used to change the melting point contrast between one or more expected areas on the substrate surface, and it is by allowing different amounts of heat to be absorbed and transferred to the melting points. The area 113 and the area between the melting areas 113 (which are not in direct contact with the layer 125 and the homogeneous layer 120).

<b><u style="single">Diffraction grating</u></b>

One problem when feature structures of different sizes, shapes and separation distances are exposed to electromagnetic radiation is that depending on the wavelength of the electromagnetic radiation, the energy applied to these features may experience constructive or destructive interference due to diffraction The effect, which unexpectedly changes the energy delivered to the intended area, or the energy density (e.g., watts/meter square). Referring to FIG. 7, the spacing between the feature structures 101 may be different, and the wavelength of the incident laser on the surface may change, resulting in the variation of the energy density transmitted to the surface 102 of the substrate 100.

In one embodiment, as shown in FIG. 7, a layer 726 is grown to a thickness exceeding the height of all the features 101 to reduce the gap between the elements (eg, features 101) formed on the surface of the substrate. Diffraction effect caused by irregular intervals. In one embodiment, not shown, the surface 720 of the layer 726 is further planarized (for example, a CMP process) to reduce any inherent topographical variation of the surface 720 of the substrate 10. Generally speaking, it tends to reduce the configuration variation of the substrate surface to have a peak-to-valley variation of the substrate surface that is less than about a quarter (&lt;1/4 λ) of the wavelength of the energy transmitted during the annealing process (peak-to-valley variation; see "PV" in Figure 7). It also tends to have an average period between the peaks of the substrate surface (see "PP" in Figure 7) that is greater than about five times the wavelength of the energy delivered during the annealing process (for example, &gt;5 λ). In one example, when a laser source with a wavelength of 800 nm is used, it is expected to reduce the inherent configuration variation of the surface 720 to a peak-to-trough variation of less than about 200 nm, and a peak variation of more than about 4000 nm. The cycle. In one embodiment, the layer 726 is a carbon layer deposited by a CVD deposition process, or the material discussed above with respect to the layer 125, the coating 225, and the layer 226.

In one embodiment, the design of the element formed on the surface of the substrate exposed to incident electromagnetic radiation is specially conceived and configured to produce the expected diffraction pattern to improve the melting point contrast between different regions. Therefore, the wavelength or multiple wavelengths of incident radiation "B" (Figure 7) used to anneal the surface of the substrate can adjust the physical configuration of the characteristic structures.

<b><u style="single">Formation of an amorphous region in the substrate</u></b>

In one embodiment, one or more process steps are performed to selectively form the amorphous region 140 in the original single crystal or polycrystalline material, so as to reduce the amount of damage generated during the subsequent implantation process and increase the amorphous The melting point of the mass region 140 is contrasted with that of other regions of the substrate. Implanting dopants in an amorphous region (such as an amorphous silicon layer) is easy to homogenize the expected implantation depth of the dopants under a fixed ion energy. This is because the lack of a crystalline lattice structure (such as a single crystal) (Silicon) can be found in the density variation on each plane. The implantation of an amorphous layer tends to reduce the crystalline damage normally found in the conventional implantation process of crystalline structures. Therefore, when the amorphous region 140 is subsequently remelted using an annealing process (as described above), the formed region can be recrystallized with a more homogeneous doping profile and a reduced number of defects. The remelting process also removes any damage caused by the implantation process. The formation of the amorphous region 140 also reduces the melting point of the affected region, so that the melting point contrast between the amorphous region 140 and the adjacent single crystal region 141 can be improved.

In one embodiment, a short energy dose (object "B" in Figure 7) is delivered to the substrate 10 to selectively adjust and form an amorphous silicon in a desired area (for example, the amorphous region 140) Floor. In one embodiment, a pulse of electromagnetic energy, or dose, is delivered to the expected area for a short enough time to cause rapid melting and cooling of the affected amorphous region 140, so as to produce a pulse in the substrate. Amorphous region. In this example, the time of the energy pulse is so short that it causes a high re-growth rate in the heating zone to produce an amorphous zone. In one embodiment, the re-growth rate in the heating zone is greater than about 12 meters per second.

In one embodiment, the energy pulse is transmitted to the expected area of the silicon substrate for a period of less than about 10^－8Seconds. In this embodiment, the energy pulse can be transmitted from a laser, and its transmission is greater than 10⁹Watt/cm² peak power, and preferably at about 10⁹Up to about 10¹⁰The section between watts/cm2 is less than about 10^－8Seconds. In one embodiment, the power, pulse time, and waveform used to generate the dose delivered by the amorphous silicon layer can be changed to achieve the amorphous region 140 having the desired size, shape, and depth. In one embodiment, the wavelength of the delivered energy dose is selected or changed to achieve the desired melting profile. In one aspect, the wavelength may be a UV or IR wavelength. In one embodiment, the wavelength of the laser may be less than about 800 nanometers. In another aspect, the wavelength may be about 532 nanometers or about 193 nanometers.

In one embodiment, a photomask is used to preferentially form the amorphous regions on regions of the substrate surface.

<b><u style="single">Electromagnetic radiation transmission</u></b>

Figure 9 is a cross-sectional view of an area of the process chamber, which shows that the energy source 20 is adapted to transfer energy from the backside surface 901 to the annealing area 12 of the substrate 10 to preferentially melt certain expectations in the annealing area 12 Examples of regions. In one embodiment, one or more defined areas of the substrate (such as the annealing area 12) are exposed to radiation from the energy source 20 at any particular time. In one embodiment, a plurality of areas of the substrate 10 are sequentially exposed to the expected energy transmitted by the energy source 20 through the back surface 901 to cause preferential melting of the expected area of the substrate. In one embodiment, the annealing area 12 is customized to match the die size (for example, the object 13 in FIG. 1), or to match the size of the semiconductor device formed on the upper surface 902 of the substrate 10. In one embodiment, the boundary of the annealing area 12 is aligned and dimensioned to match the cutting line 10 defining the boundary of each crystal grain. Therefore, due to the difference in the amount of energy exposure from the energy source 20, the amount of process variation is minimized, because any overlap between the annealing regions 12 arranged in sequence can be minimized. In one example, the annealing area 12 is a rectangular area with a size of about 22 mm by about 33 mm.

In one embodiment, the substrate 10 is disposed on a substrate support area 911 formed on a substrate support 910, and the substrate support 910 has a backside surface 901 that allows the substrate 10 to receive from the substrate 10 The opening 912 for the energy transmitted from the energy source 20. In this configuration, the radiation "B" emitted from the energy source 20 heats the area 903 suitable for absorbing a portion of the radiated energy. The energy source 20 is generally adapted to transmit electromagnetic energy to preferentially melt certain desired areas on the surface of the substrate. Typical electromagnetic energy sources include, but are not limited to, optical radiation sources (such as lasers), electron beam sources, ion beam sources, and/or microwave energy sources. In one embodiment, the substrate 10 is exposed to an energy pulse from a laser, which emits light at one or more appropriate wavelengths for a desired period of time. In one embodiment, the energy pulse from the energy source 20 is adjusted so that the energy transmitted through the annealing area 12 and/or the energy transmitted during the pulse is optimized to enhance the priority of certain expected areas. melt. In one embodiment, the wavelength of the laser is adjusted so that most of the laser light is absorbed by the silicon layer disposed on the substrate 10. For the laser annealing process performed on silicon-containing substrates, the wavelength of the light is usually less than about 800 nanometers, and can be transmitted at deep ultraviolet (UV), infrared (IR) or other expected wavelengths. In both cases, the annealing process is generally performed on a specific area of the substrate for a relatively short period of time, for example, about one second or less.

In one embodiment, the wavelength of the light emitted by the energy source 20 is selected so that the bulk material forming the substrate is more important to the incident light than by exposure to the incident emitted light. The area close to the upper surface 902 that is preferentially melted is more penetrable. In one embodiment, the region to be preferentially melted contains materials that absorb energy transmitted through the backside of the substrate, such as dopant materials or ionized crystal damage caused during the implantation process (e.g., crystal defects, Frenkel defects, vacancy). Generally, the dopant material can be boron, phosphorus, or other dopant materials commonly used in semiconductor manufacturing processes. In one embodiment, the bulk material forming the substrate is a silicon-containing material, and the wavelength of the emitted light is greater than about 1 micron. In another embodiment, the energy source 20 contains a carbon dioxide laser, which is suitable for emitting the main wavelength bands centered around 9.4 and 10.6 microns. In yet another embodiment, the energy source 20 is adapted to transmit a wavelength in the infrared region, which is usually between about 750 nanometers and about 1 micrometer.

In one embodiment, an absorbing coating (not shown) is disposed on the annealing area 12 of the substrate 10, so that incident light transmitted through the backside of the substrate can be passed through the substrate before it passes through the substrate. absorb. In one embodiment, the absorptive coating is a metal, such as titanium, titanium nitride, tantalum, or other suitable metal materials. In another embodiment, the absorbing coating is made of silicon carbide material, amorphous carbon material, or other suitable materials commonly used in semiconductor device manufacturing.

In one embodiment, two wavelengths of light are transmitted to the expected area of the substrate, so that the first wavelength of light is used for dopants or other ionized crystals that can be found in the expected annealing area in the substrate. The damage generates free carriers (for example, electrons or holes), and the generated free carriers absorb energy transmitted through the backside of the substrate at the second wavelength. In one embodiment, the first wavelength is a "green light" wavelength (for example, about 490 nanometers to about 570 nanometers) and/or a shorter wavelength. In one embodiment, the first wavelength is transmitted from the second source 920 on the opposite side of the substrate from the energy source 20 at the expected power density (watts/cm²) to the expected area of the substrate. Figure 9 shows. In another embodiment, the two wavelengths (for example, the first and second wavelengths) are transmitted from the source 20 through the backside of the substrate. In yet another embodiment, the two wavelengths (such as the first and second wavelengths) at the expected power density (watts/cm²) are transmitted through the substrate from two different electromagnetic energy sources (not shown) Backside transmission.

Although the foregoing is directed to embodiments of the present invention, other and further embodiments of the present invention can be designed without departing from its basic scope, and its scope is determined by the scope of the following patent applications.

<p>10. 100. . . Substrate</p><p>10A. . . Cutting line</p><p>12. . . Annealing area</p><p>13. . . Grain</p><p>15. . . Heat exchange element</p><p>15A. . . Resistance heating element</p><p>15B. . . Fluid channel</p><p>15C. . . Temperature Controller</p><p>15D. . . Cryogenic cooler</p><p>16. . . Substrate supporting surface</p><p>17. . . Electric actuator</p><p>20. . . (Energy) source</p><p>twenty one. . . Controller</p><p>101. . . Characteristic structure</p><p>102, 205. . . surface</p><p>112. . . Silicon area</p><p>113. . . Melting zone</p><p>120. . . Homogeneous layer</p><p>125. . . (Addition) layer/absorption layer</p><p>140. . . Amorphous region</p><p>141. . . Single crystal area</p><p>150. . . Electromagnetic energy</p><p>200. . . Electronic component</p><p>201, 201A-201B. . . Doped area</p><p>202, 903. . . area</p><p>203. . . path</p><p>210. . . Adjustment area</p><p>211. . . Unadjusted area</p><p>215. . . Gate</p><p>216. . . Gate oxide</p><p>221. . . Substrate bulk material</p><p>224. . . Buried area</p><p>225, 226. . . coating</p><p>401, 401A, 401B. . . pulse</p><p>402, 403, 403A, 403B, 403C, 404. . . (Pulse) part</p><p>720. . . Layer surface</p><p>726. . . Floor</p><p>901. . . Dorsal surface</p><p>902. . . Upper surface</p><p>910. . . Substrate support</p><p>911. . . Substrate support area</p><p>912. . . Opening</p><p>920. . . Second source</p><p>C₁, C₂. . . curve</p><p>D₁. . . Junction depth</p><p>D₂. . . depth</p><p>F1, F2, F3, F4. . . frequency</p>

Therefore, it is possible to understand in detail the manner in which the above-mentioned features of the present invention are described, that is, the more specific description of the present invention briefly outlined above can be obtained by referring to the embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the drawings only show general embodiments of the present invention, and therefore should not be considered as limiting its scope, as the present invention may allow other equivalent embodiments.

Figure 1 shows an isometric view of an energy source, which is suitable for projecting an energy onto a predetermined area of the substrate described in an embodiment of the present invention; Figures 2A-2F show one of the present invention A schematic side view of a region on the surface of the substrate described in the embodiment; Figure 3A shows a plot of concentration versus the depth in a region of the substrate shown in Figure 2A in an embodiment of the present invention ; Figure 3B shows the concentration versus the depth in a region of the substrate shown in Figure 2B in an embodiment of the present invention; Figure 3C shows the concentration versus the first in an embodiment of the present invention Figure 2C shows the mapping of the depth in a region of the substrate; Figures 4A-4G are schematic diagrams of the electromagnetic energy pulse described in an embodiment of the present invention; Figures 5A-5C show the present invention A brief side view of an area on the surface of the substrate described in an embodiment; Figure 6A shows a method of forming one or more expected deposition layers on the surface of the substrate described in an embodiment of the present invention; Figures 6B-6D show a schematic side view of a region of one of the substrates described in the method described in Figure 6A in one of the embodiments described herein; Figure 6E shows an embodiment of the present invention The method of forming one or more expected deposition layers on the surface of the substrate described in; Figures 6F-6G show one of the substrates described in the method shown in Figure 6E in one of the embodiments described herein A schematic side view of the area; Figure 7 shows a schematic side view of an area on the surface of the substrate according to an embodiment of the present invention; Figure 8 shows the substrate according to an embodiment of the present invention A schematic side view of an area on the surface; Figure 9 shows a schematic side view of a system having an energy source suitable for projecting energy onto a defined area of the substrate described in an embodiment of the present invention.