A novel nitride barrier layer to prevent metal (Cu) leakage issue in a dual damascene structure

Nitride barrier layer to prevent leakage of metal (copper) of double metal damascene structure

The present invention relates to the manufacturing field of integrated circuits and other electronic components, and in particular to an improved method for forming a composite barrier layer, which reduces the leakage current of copper interconnects manufactured in the inlay process .

The manufacturing of integrated circuits in microelectronic devices includes forming several patterned metal layers, which are sequentially covered on another patterned metal layer to provide horizontal and vertical electronic paths. These paths are usually referred to as metal lines, and they are generally in the form of horizontal lines and vias and contact windows that form vertical connections between the metal lines. Inner metal dielectric (IMD) layers are usually formed between metal lines to isolate electronic paths and prevent interference from degrading device performance by slowing down the circuit speed.

With the continued demand for higher-efficiency microelectronic components, the industry is moving towards a mode of reducing the width and thickness of the metal layer of component circuits. In addition, because copper has higher conductivity, copper is used instead of aluminum as the metal choice for circuit systems. Unfortunately, copper microelectronic components have some obstacles in manufacturing. Copper is not as easy to etch as aluminum. Therefore, the copper layer is generally produced by a damascene process. In the damascene process, an opening is etched in the inner dielectric (ILD) layer, and then copper is deposited to fill the opening. Copper ions have a relatively high tendency to migrate into adjacent dielectric layers, so a barrier layer is usually formed between an inner dielectric layer and a copper layer. Since silicide cannot block copper ions, it may easily react with copper to produce copper oxides that are undesirable and reduce the conductivity of the copper layer. Therefore, the barrier layer often includes nitrogen atoms and is a metal nitride or silicon nitride. Type.

In the damascene process, the second copper layer is usually covered on the first copper layer in the substrate, so that when a current is applied, electrical contact may be formed between the two layers. However, in a series of steps of forming openings in the inner dielectric layer above the first copper layer, the first copper layer will be exposed to etchants or chemicals, and these etchants or chemicals may attack or interact with copper. reaction. Therefore, the barrier layer also functions as an etch stop layer, and is deposited on the first copper layer before the formation of the inner dielectric layer. Part of the barrier layer remains in the device to block the copper ions so that the copper ions will not diffuse into the upper inner dielectric layer. Part of the barrier layer as the etch stop layer is exposed to fluorocarbon-based plasma etching during the formation of openings in the inner dielectric layer, and is exposed during the ashing step to remove the photoresist pattern on the inner dielectric layer In oxygen plasma. The important feature is that the etch stop layer can prevent oxygen atoms from attacking copper to form copper oxide. For example, the subsequent etching step used to remove the exposed part of the silicon nitride barrier layer may use difluoromethane (CH₂F₂) Chemicals, and just before the deposition of the second copper layer.

In the popular method of using a plasma-enhanced chemical vapor deposition (PECVD) process to deposit a silicon nitride barrier layer on the first copper layer, there is a problem. The plasma-enhanced chemical vapor deposition process usually includes the use of silicon methane (SiH₄), nitrogen and ammonia are used as etchant gases, and radio frequency (RF) power is used to form plasma, where the chemical bonds of the reactant gases are broken, and the reaction formula is reorganized to form a stable silicon nitride layer on the substrate. In the plasma-enhanced chemical vapor deposition process, silicon methane is easily converted into reactive silicon ions (Si⁺⁴) Form, in which silicon ions easily react with the exposed copper layer in the substrate, and copper silicide (CuSi_x). The thin copper silicide layer located on the first copper layer is the cause of the metal leakage problem of the product components.

Another problem with the silicon nitride barrier layer is the poor adhesion of silicon nitride to copper. Insufficient adhesion may cause the silicon nitride barrier layer to peel off, which will adversely affect the performance and reliability of the device. Therefore, there is a need for a method to avoid the copper adhesion problem and the problem of copper silicide formation, so as to maintain the good barrier properties of the silicon nitride layer.

An additional requirement for the barrier layer is that the barrier layer should function as a dielectric layer and help isolate one metal layer from another metal layer. In this way, the dielectric constant (k value) should be as low as possible. Most nitrogen-containing barrier layers, such as silicon nitride (k=7) or silicon oxynitride, have a k value that is not lower than that of the conventional silicon oxide (K=4) inner dielectric layer.

U.S. Patent No. 6,593,653 describes a barrier layer of silicon carbide nitride (SiCN) with low leakage current. Although the k value can be reduced to about 4.9 in nitrogen-doped silicon carbide (SiCN), the barrier ability of this material is not as good as that of silicon nitride, and it may still lead to the production of copper silicide.

In US Patent No. 6,465,366, a silicon carbide layer has been used as a barrier layer in the damascene process. However, in the copper damascene structure, silicon carbide is not as effective as silicon nitride in preventing the diffusion of copper.

In US Patent No. 6,570,256, a series of carbon-doped silicon dioxide layers with increasing carbon content are formed between the substrate and the insulating layer. Although these intermediate layers improve the adhesion of the insulating layer, it is impossible to expect these intermediate layers to function as a good copper diffusion barrier layer in the copper damascene structure.

US Patent No. 6,602,806 discloses a dual damascene design, including a silicon nitride hard mask layer formed on an oxide layer on a silicon substrate. However, when an oxide layer is formed on a substrate, the substrate contains an exposed conductive layer, such as copper, which results in the formation of copper oxide, which in turn increases the resistance of the device. Therefore, such a step is generally undesirable.

In US Patent No. 6,597,081, a composite etch stop layer composed of a very thin silicon nitride layer and a thicker silicon oxynitride layer is described. The design of the composite layer is mainly during the plasma etching process where openings are formed in the inner dielectric layer of the damascene process, so that better end point detection is possible when it ends on the etch stop layer.

In US Patent No. 6,455,417, another composite etch stop layer is formed. The composite etch stop layer includes a carbon-doped silicon dioxide layer on a carbon-doped silicon nitride layer. The thickness of the two layers is between 10<img file="TWI246730B_D0001.tif" />Up to 1000<img file="TWI246730B_D0002.tif" />In between, they are all deposited using a damascene plasma-enhanced chemical vapor deposition process.

US Patent No. 6,479,391 describes a dual damascene method, which includes forming a dual hard mask on an organic dielectric layer. Vias and trenches are formed in these hard masks, and then the pattern is etched and transferred to the underlying dielectric layer. However, there is no description about forming a non-reactive barrier layer on the surface of the copper layer.

One objective of the present invention is to provide a composite barrier layer which has good adhesion to copper and can prevent copper ions from diffusing into adjacent dielectric layers.

Another object of the present invention is to provide a method for forming a composite barrier layer in a damascene process, wherein the barrier layer is made of silicon nitride and has good adhesion to copper.

Another object of the present invention is to provide a method for forming a composite barrier layer made of silicon nitride on a copper layer without forming copper silicide, so it can avoid copper silicide (CuSi_x) Leakage problem.

Another object of the present invention is to provide a composite barrier layer, wherein the composite barrier layer also functions as an etch stop layer to prevent oxygen atoms or other chemicals from attacking the underlying copper layer during the damascene process.

Another object of the present invention is to provide a composite barrier layer with a damascene structure, which has a lower dielectric constant and leakage current than silicon nitride.

The above objective is achieved by providing a substrate, wherein the first copper layer is formed in the first dielectric layer, and the first copper layer has an exposed upper surface. An important feature of the present invention is that a composite barrier layer is deposited on the first dielectric layer and the first copper layer. The composite barrier layer is composed of the bottom silicon carbide layer, and the thickness of the bottom silicon carbide layer is about 100<img file="TWI246730B_D0003.tif" />Up to 150<img file="TWI246730B_D0004.tif" />The deposition of the bottom silicon carbide layer uses a plasma-enhanced chemical vapor deposition process, and the deposition of the bottom silicon carbide layer preferably includes the use of trimethylsilane or tetramethylsilane as the source gas of silicon and carbon. And use helium as a carrier gas. In the silicon carbide source gas, minimize the number of silicon-hydrogen bonds to prevent silicon ions (Si⁴⁺)form. In a preferred embodiment, silane, nitrogen, and ammonia are used as etchant gases to deposit a silicon nitride layer as the upper layer of the composite barrier layer. The silicon nitride layer should be kept as thin as possible to minimize the dielectric constant of the composite barrier layer.

The composite barrier layer is preferably applied in a single or dual damascene structure, wherein the second dielectric layer is deposited on the composite barrier layer. In the dual damascene process flow, a conventional patterning and plasma etching sequence is used to form a via opening in the second dielectric layer, where the plasma etching is terminated on the silicon nitride layer. A trench is formed above the via opening in the second dielectric layer using the second patterning and etching sequence. Next, a plasma etching process is used to remove the silicon nitride layer and the silicon carbide layer located at the bottom of the via opening. The damascene process is completed by using a series of depositing a conformal diffusion barrier layer on the sidewalls and bottoms of the via openings and trenches; depositing a second metal layer to fill the vias openings and trenches; and planarizing the second metal layer to make The second metal layer is coplanar with the second dielectric layer.

The present invention also provides a mosaic structure, including at least a substrate; a composite barrier layer is formed on the substrate; an inner dielectric layer is formed on the composite barrier layer; an opening is formed in the inner dielectric layer, wherein the opening extends Passing through the composite barrier layer; and a copper layer is formed in the above-mentioned opening, wherein the copper layer is coplanar with the upper surface of the inner dielectric layer. In a preferred embodiment, the copper layer is formed on the conformal diffusion barrier layer in the opening. The composite barrier layer includes a silicon carbide layer and a silicon nitride layer on the silicon carbide layer. In one embodiment, the opening is formed in the first copper layer, and the second copper layer is formed in the opening to contact the first copper layer.

The present invention is particularly useful for forming microelectronic components. In this microelectronic component, the conductive layer is formed on the copper layer, and the component includes a composite barrier layer between the copper layer and the inner dielectric layer. The composite barrier layer can also be used as an etching stop layer in the damascene process. Although the figure shows a double metal etching process, the composite barrier layer of the present invention can be formed on a single damascene process or other barrier layers that are also applied as an etching stop layer. One point is understood that the illustrations provided are for example, and not to limit the scope of the present invention. In addition, the various elements in the illustration are not necessarily drawn to scale, and their relative sizes may be different from the sizes of real microelectronic elements.

The present invention will firstly describe the method of forming the composite barrier layer and its application in the damascene process. Next, the damascene structure with this composite barrier layer is described. Those skilled in the art will understand that the method and the damascene structure of the present invention can be repeated multiple times on the substrate to form a device with several copper layers arranged in a stacked arrangement.

Please refer to FIG. 1, which shows a substrate 10, which is generally single crystal silicon, but can be selectively built on a technology such as silicon or silicon germanium on an insulating layer. The substrate 10 may further include active and passive components, which are not shown in Figure 1 for the sake of simplicity. In addition, a first dielectric layer 11 is provided, and the first dielectric layer 11 has been deposited on the substrate 10 by chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition, or spin coating. The first dielectric layer 11 is preferably made of a low dielectric constant material, such as fluorine-doped silicon dioxide, which is known as fluorosilicate glass (FSG), carbon-doped silicon dioxide, and polysquardyl ether [ poly(arylether)], silsesquioxane polymer, or benzocyclobutene. The first dielectric layer 11 may alternatively be composed of silicon dioxide, phosphosilicate glass (PSG), or borophosphosilicate glass (BPSG). In the demonstration method, conventional patterning and plasma etching techniques are used to form an opening composed of a via 12 and an upper trench 13 in the first dielectric layer 11.

The first conformal diffusion barrier layer 14 is formed by plasma-enhanced chemical vapor deposition, atomic layer deposition (ALD) or metal organic chemical vapor deposition processes on the sidewalls and bottom of the via 12 and the trench 13. Next, the first copper layer 15 is deposited by, for example, electroplating or electroless plating to fill the via 12 and the trench 13. Generally, a chemical mechanical polishing (CMP) process is used to planarize the first copper layer 15 and the first conformal diffusion barrier layer 14. Although the first copper layer 15 shown in Figure 1 fills the trench 13 and the via 12, it is the same as other shapes known to those skilled in the art, such as trenches or single damascene formed over a plurality of vias. The ditch of the structure itself is also permissible.

The key feature of the present invention is the formation of a composite barrier layer, wherein the composite barrier layer is composed of a silicon carbide layer 16 located below and a silicon nitride layer 17 located above, and the composite barrier layer is formed on the first copper The layer 15 and the first dielectric layer 11 are on. The composite barrier layer is preferably in a chemical vapor deposition machine, such as the process response provided by Applied Materials in Santa Clara, California or Novellus Systems in San Jose, California. Formed in the chamber. It is understood that a chemical vapor deposition machine can have multiple process reaction chambers, in which the first film can be deposited on the substrate in the first reaction chamber, and the second film can be deposited in the second reaction chamber. On the first film without exposing the substrate to air or removing the substrate from the chemical vapor deposition machine.

Thickness between 100<img file="TWI246730B_D0005.tif" />Up to 150<img file="TWI246730B_D0006.tif" />The silicon carbide layer 16 therebetween is preferably deposited by a sequence of processes, where the sequence of processes first includes placing a first dielectric layer 11, a first conformal diffusion barrier layer 14 and a first copper layer thereon. The substrate 10 of the layer 15 is loaded on the supporting tray of the chemical vapor deposition reaction chamber (not shown). A vacuum device is used to remove air through the air outlet to stabilize the process reaction chamber under reduced pressure. At the same time, the temperature of the process reaction chamber is increased to provide a faster deposition rate in the subsequent process sequence. The source gas of silicon and carbon flows into the reaction chamber through the dispersion disc, etc., wherein the source gas of silicon and carbon is preferably trimethylsilane (3MS) or tetramethylsilane (4MS). Minimize the number of silicon-hydrogen bonds in the source gas of silicon and carbon to prevent silicon ions (Si⁴⁺) Is formed during subsequent deposition. It should be noted that the bonding energy of the silicon-hydrogen bond (98 eV) is less than the bonding energy of the silicon-methyl bond (102 eV), so the silicon-hydrogen bond is easier to break. In this way, when tetramethylsilane does not form the form of silicon ions, silyl methane (SiH₄) Is easily converted into silicon ions.

Optionally, use other silicon and carbon source gases that do not form silicon ions during the silicon carbide deposition process. In addition, it is preferable to introduce helium or argon into the reaction chamber as a carrier gas for silicon and carbon source gases. Plasma is generated by applying radio frequency power. It is understood that helium or argon and silicon and carbon source gases can flow into the process reaction chamber for a few seconds before applying radio frequency power to stabilize the pressure in the process reaction chamber.

The preferred deposition state is: the flow rate of trimethylsilane/tetramethylsilane is between about 300 standard cubic centimeters to 500 standard cubic centimeters per minute (sccm); the flow rate of helium is between about 600sccm to 1000sccm; radio frequency power Between about 300 watts (watts) to 500 watts; the pressure of the reaction chamber is between 10 torrs (torrs) to 12 torr; and the temperature of the reaction chamber is between about 200°C to 450°C. In the above state, the deposition rate of the silicon carbide layer 16 is about 300 per minute<img file="TWI246730B_D0007.tif" />Up to 800<img file="TWI246730B_D0008.tif" />. The deposition of the silicon carbide layer 16 usually lasts for a predetermined period, wherein the predetermined period is about 6 to 20 seconds. In another alternative embodiment, the amorphous silicon carbide (α-SiC:H) layer 16 can be formed under similar process conditions.

In one embodiment, the silicon nitride layer 17 is deposited in the same chemical vapor deposition process reaction chamber as the silicon carbide layer 16. Once the acceptable thickness of the silicon carbide layer 16 is reached, the RF power is turned off, and silicon methane, nitrogen, and ammonia flow into the reaction chamber for about 10 to 20 seconds, until the helium and trimethylsilane/tetramethylsilane are purified and reached Stabilize the pressure. RF power is applied again to start the deposition of silicon nitride. The deposition step continues until the acceptable thickness of the silicon nitride layer 17 is reached, wherein the acceptable thickness of the silicon nitride layer 17 is about 300<img file="TWI246730B_D0009.tif" />Up to 500<img file="TWI246730B_D0010.tif" />between. The preferred process state for depositing silicon nitride is: the flow rate of silyl methane is between 60 sccm and 100 sccm; the flow rate of nitrogen is between 3000 sccm and 5000 sccm; the flow rate of ammonia is between 25 ccm and 45 sccm; The electric power is approximately between 350 watts and 500 watts; the pressure of the reaction chamber is between 2 Torr and 5 Torr; and the temperature of the reaction chamber is between 200°C and 450°C. In the above state, the silicon nitride layer 17 is about 2500 per minute<img file="TWI246730B_D0011.tif" />Up to 3500<img file="TWI246730B_D0012.tif" />The rate of deposition. The deposition temperature of silicon nitride is preferably similar to the deposition temperature of silicon carbide, so that there is no delay in waiting for the temperature to stabilize the silicon nitride deposition step.

Once an acceptable silicon carbide layer 16 is obtained, the substrate 10 can alternatively be removed from the process reaction chamber and the substrate 10 can be switched to the same chemical vapor deposition process as the silicon nitride layer 17 deposited using the above process conditions In another process reaction chamber of the machine. It should be noted that silicon nitride deposition is usually performed for a predetermined period of time, wherein the predetermined period of time is between about 5 seconds and 15 seconds.

Compared with the conventional technology, the composite barrier layer of the present invention has the advantage that since less required properties are weakened, the best barrier properties of silicon carbide and silicon nitride are maintained. For example, the silicon carbide layer 16 provides excellent adhesion to the first copper layer 15 and combines the excellent barrier ability of the silicon nitride layer 17. Since in the deposition sequence, the silicon carbide layer 16 is formed first, and the copper silicide (CuSi_x) The problem of formation is usually related to the deposition of silicon nitride, so there is no question about copper silicide (CuSi_x) The generated problem occurs. Secondly, during the deposition step, silicon ions are not generated when the silicon carbide layer 16 is formed, so copper silicide (CuSi_x) Is formed on the first copper layer 15. Minimizing the number of silicon-hydrogen bonds in the source gas of silicon and carbon also allows the deposited silicon carbide layer to have fewer suspended silicon bonds, thus making the silicon carbide layer 16 more stable and making the silicon carbide layer 16 less It is possible to search for oxygen atoms to form unstable silicon-hydrogen-oxygen bonds. Furthermore, the composite barrier layer provides excellent etch stop performance, and can prevent the first copper layer 15 from being oxidized during the subsequent process. In the description of the application of the composite barrier layer in the damascene process, other advantages of this composite barrier layer will be more obvious.

The improvement in adhesion achieved by using a silicon carbide layer to replace the silicon nitride layer on the copper layer can be confirmed in the traditional Stud Pull Test. First stick the studs on the upper surface of the barrier film, and the barrier film has been deposited on the copper layer, and then pull the studs in a direction perpendicular to the barrier film until the barrier layer separates from the copper layer . Record the load required to separate the barrier layer from the copper layer, and convert the required load into a stress value, as shown in Table 1. The recorded results show that a higher load (higher pressure) is required to separate the copper layer from the composite barrier layer of the present invention than separating the conventional silicon nitride barrier layer from the copper surface.

<tables><img file="TWI246730B_D0013.tif" /></tables>

Please refer to FIG. 2, the second dielectric layer 18 is deposited on the silicon nitride layer 17 by a chemical vapor deposition method, a plasma-enhanced chemical vapor deposition method, or a spin coating method to continue the damascene process. The second dielectric layer 18 is selected from the same material group as the first dielectric layer 11. In one embodiment, the first dielectric layer 11 and the second dielectric layer 18 have a thickness of about 4000<img file="TWI246730B_D0014.tif" />Up to 10000<img file="TWI246730B_D0015.tif" />It is composed of fluorosilicone glass. After the fluorosilicate glass dielectric layer is deposited, the post-deposition process known to those skilled in the art, including tempering under an inert gas environment at about 300°C to 450°C, or plasma treatment, can be used to make the fluorine The silica glass layer is denser to prevent moisture absorption in subsequent steps. In addition, a cover layer (not shown) composed of silicon carbide, silicon nitride, or silicon oxynitride can be deposited on the second dielectric layer 18. This covering layer serves as a stop layer in the subsequent planarization step, and can serve as an anti-reflection coating (ARC) layer in the subsequent patterning step.

Then, the first photoresist layer 19 is covered on the second dielectric layer 18, and the first photoresist layer 19 is patterned, so as to form a via opening 20 on the first copper layer 15. When selectively not forming a cover layer on the second dielectric layer 18, before coating the first photoresist layer 19, spin coating and baking a commercial anti-reflective cover material can be used on the second dielectric layer. To form an organic anti-reflective coating. A plasma etching process is used to transfer the via opening 20 to the second dielectric layer 18, wherein the plasma etching process is generally based on fluorocarbon chemicals. Since the oxide etching has a high selectivity to the nitride layer, the plasma etching step is terminated on the silicon nitride layer 17. Compared with other etching stop layers made of oxide or silicon carbide, silicon nitride has an advantage because silicon nitride has a higher etching selection ratio to the second dielectric layer 18 whose main component is oxide. In addition, on the end signal of the etching process, the silicon nitride etch stop layer is more obvious than the etch stop layer made of oxide, which can prevent excessive etching from damaging the first copper layer 15.

Please refer to FIG. 3, the first photoresist layer 19 is stripped off using an oxygen ashing process. It is already understood that the oxygen ashing process can include other oxidants, such as carbon dioxide (CO₂). The composite barrier layer composed of the silicon nitride layer 17 and the silicon carbide layer 16 can protect the first copper layer 15 by preventing the reactive oxygen formula from attacking copper and forming undesired copper oxide. In this embodiment, the organic anti-reflective coating layer is formed on the second dielectric layer 18, and the organic anti-reflective coating layer and the first photoresist layer 19 are removed at the same time.

Table 2 lists that during the oxygen ashing step, the silicon carbide etch stop layer provides better protection than the silicon nitride layer to prevent copper oxidation. The results listed in Table 2 are obtained from the test shown in Figure 6. In FIG. 6, a copper layer 31 is deposited on the substrate 30. Next, a barrier layer 32 is formed on the copper layer 31 by a plasma-enhanced chemical vapor deposition process. Carry out the carbon dioxide plasma treatment step lasting 15 seconds under the following conditions to simulate the real ashing process: the flow rate of carbon dioxide is between 300sccm and 500sccm; the RF power is between 100W and 400W; the pressure of the reaction chamber is between Between 2 Torr and 4 Torr; and the substrate temperature is between 200°C and 450°C. Before and after the deposition of the barrier layer 32 and after the carbon dioxide plasma treatment 33, the reflectance of the copper layer 31 was measured using a NanoSpec 9100 machine provided by Nanometrics of Milpitas, California. The result of the measurement indicated that the reflectivity drop after the carbon dioxide treatment showed 120<img file="TWI246730B_D0016.tif" />The thick barrier layer 32 made of silicon nitride will slightly oxidize the copper layer 31. On the other hand, a thickness of 80<img file="TWI246730B_D0017.tif" />Or 120<img file="TWI246730B_D0018.tif" />The silicon carbide film prevents oxidation of the copper layer 31, and after the carbon dioxide treatment, it shows a similar or slightly higher copper reflectance.

<tables><img file="TWI246730B_D0019.tif" /></tables>Table 2 The effectiveness of barrier layer in preventing copper oxidation

By combining the aforementioned silicon nitride etching selection ratio with the high oxidation resistance provided by the silicon carbide layer, the composite layer of the present invention has two valuable properties that cannot be provided by a single barrier layer or an etching stop layer. Please again Referring to FIG. 3, a second photoresist layer 21 is coated on the second dielectric layer 18, and the second photoresist layer 21 is patterned, and a trench 22 is formed above the via opening 20. Optionally, an inert plug (not shown) can be formed in the via opening 20 by a method known to those skilled in the art, so as to make the coating of the second photoresist layer 21 more even. In addition, a second organic anti-reflective coating layer may be formed on the second dielectric layer 18 before the second photoresist layer 21 is coated to control the reflectivity during the patterning step. The trench 22 is transferred to the second dielectric layer 18, and the trench depth d is approximately 2500<img file="TWI246730B_D0020.tif" />Up to 4000<img file="TWI246730B_D0021.tif" />between. When the trench 22 is etched, fluorocarbon-based plasma is used, and the silicon nitride layer 17 is used as an etching stop layer to prevent possible damage to the first copper layer 15 underneath by over-etching.

Please refer to FIG. 4, the second photoresist layer 21 is stripped off using oxygen plasma. In another alternative embodiment, the second organic anti-reflective coating layer and the selectively formed inert plug are removed at the same time as the second photoresist layer 21. As mentioned earlier, the silicon carbide layer 16 is particularly effective in blocking the reactive oxygen from reaching the first copper layer 15 during the ashing process, thereby preventing the formation of copper oxide. Then, for example, five carbon octafluoride (C₅F₈Plasma etching of )/argon/carbon monoxide chemicals transfers the via opening 20 to the silicon nitride layer 17, and preferably uses nitrogen/fluoromethane/argon plasma etching in a mild state to remove The via opening 20 is transferred to the silicon carbide layer 16 to avoid damage to the first copper layer 15. The etching of the silicon nitride layer 17 and the silicon carbide layer 16 can be performed in the same step. In this etching step, the nitrogen flow rate is about 40 sccm to 100 sccm, the flow rate of fluoromethane is about 50 sccm to 150 sccm, and the reaction chamber pressure From 100mTorr to 200mTorr.

Referring to FIG 5, using a plasma enhanced chemical vapor deposition process, metal metal organic chemical vapor deposition process, or diffusion of atoms conformal layer deposition process is deposited on the barrier layer 23 via sidewalls 22 of the trench 20 and the opening And on the bottom, where the material of the diffusion barrier layer 23 is preferably tantalum (Ta), tantalum nitride (TaN), titanium, titanium nitride (TiN), tantalum silicide (TaSiN), tungsten (W) or nitride One or more materials such as tungsten (WN). The diffusion barrier layer 23 can be selectively formed on the sidewall and bottom of the trench 22 and the sidewall of the via opening 20. Then, using traditional methods, such as depositing a seed layer (not shown) on the diffusion barrier layer 23 before depositing the conductive layer 24 by electroplating or electroless plating process, and depositing the conductive layer 24 on the diffusion barrier layer 23 Above, the material of the conductive layer 24 is preferably copper. The conductive layer 24 is deposited to the height of filling the via opening 20 and the trench 22. A subsequent planarization process is used to reduce the height of the conductive layer 24 and the diffusion barrier layer 23 to be coplanar with the upper surface of the second dielectric layer 18, wherein the planarization process usually uses a chemical mechanical polishing step. In this embodiment, the cover layer is formed on the second dielectric layer 18, and the cover layer can remain on the second dielectric layer 18 after the planarization process.

Another advantage of the composite barrier layer of the present invention is that the conductive layer adjacent to the composite barrier layer has low leakage current. Referring to FIG. 7, the curve 41 represents the leakage current of the conductive layer 24 formed by a damascene process according to the method of the present invention. In this embodiment, the conductive layer 24 is copper, and the composite layer includes a thickness of 300<img file="TWI246730B_D0022.tif" />Up to 500<img file="TWI246730B_D0023.tif" />The silicon nitride layer 17 is located at a thickness of 100<img file="TWI246730B_D0024.tif" />Up to 150<img file="TWI246730B_D0025.tif" />On the silicon carbide layer 16, as shown in Figure 5. Curve 40 represents the use of traditional thickness 500<img file="TWI246730B_D0026.tif" />The higher leakage current caused by the silicon nitride barrier layer to replace the composite barrier layer. Please refer to Figure 8, it can be observed: Compared with the traditional silicon nitride barrier layer (curve 43) to the adjacent M1 copper layer, it is made to include the resistance shown in Figures 2 to 5 The M1 copper layer of the conductive layer of the damascene structure of the barrier layer has a lower leakage current (curve 42).

The present invention also provides a damascene structure including a composite barrier layer, wherein the composite barrier layer is composed of an upper silicon nitride layer and a lower silicon carbide layer formed on a substrate. Although Figure 9 shows a single damascene structure, the composite barrier layer can also be part of a dual damascene structure. In addition, in the dual damascene structure, the present invention considers various designs, including a first composite barrier layer, a first dielectric layer, a second composite barrier layer, and a second dielectric layer that are sequentially formed on the substrate. Floor. In this form, as known to those skilled in the art, the second composite barrier layer is mainly used to provide an etching stop layer during trench fabrication.

Please refer to Fig. 9, the substrate 50 shown is usually monocrystalline silicon, but silicon germanium (Si-Ge), silicon-on-insulator (SOI) or other materials can be optionally used. The substrate used in this industry. The substrate 50 may further include active and passive components having a conductive layer and a dielectric layer (not shown). In a preferred embodiment, the substrate 50 has a first conductive layer (not shown), wherein the first conductive layer has an exposed upper surface.

The key feature of the present invention is that the composite barrier layer includes a silicon carbide layer 51 located below and a silicon nitride layer 52 located above. The composite barrier layer is preferably manufactured according to the previously described plasma-enhanced chemical vapor deposition process sequence, wherein the silicon carbide layer 51 and the silicon nitride layer 52 are in the same process chamber of the chemical vapor deposition machine Carry out deposition. The silicon carbide layer 51 has about 100<img file="TWI246730B_D0027.tif" />Up to 150<img file="TWI246730B_D0028.tif" />The thickness is particularly advantageous in this embodiment, in which, since silicon carbide has excellent adhesion to copper, copper is used for the first conductive layer with an exposed surface in the substrate 50. The silicon carbide layer 51 incorporates the silicon nitride layer 52 into the composite barrier layer without considering the adhesion of silicon nitride to copper, where the adhesion of silicon nitride to copper is usually problematic. In another alternative embodiment, the bottom layer of the composite barrier layer is an amorphous silicon carbide (α-SiC:H) layer.

The silicon nitride layer 52 has about 250<img file="TWI246730B_D0029.tif" />Up to 500<img file="TWI246730B_D0030.tif" />The thickness. When the composite barrier layer is formed on the lower first conductive layer, the silicon nitride layer 52 acts as a barrier to prevent the metal from diffusing into the upper dielectric layer. The thickness of the silicon nitride layer 52 is as thin as possible to reduce the dielectric constant of the composite barrier layer.

A dielectric layer 53 is formed on the silicon nitride layer 52. The dielectric layer 53 is preferably made of a low-k dielectric material, such as carbon-doped silicon dioxide, fluorine-doped silicon dioxide, and sesquioxide It is composed of silsesquioxane polymer, poly(arylether), or benzocyclobutene. The thickness of the dielectric layer 53 is about 4000<img file="TWI246730B_D0031.tif" />Up to 10000<img file="TWI246730B_D0032.tif" />between. In another alternative embodiment, the dielectric layer 53 may be composed of silicon nitride, phosphosilicate glass, or borophosphosilicate glass.

In the dielectric layer 53, there are openings 54 that may be vias, contact holes, or trenches. In another alternative embodiment, the composite barrier layer is formed in a dual damascene structure, and the opening 54 is a trench formed on the via. The opening 54 passes through the composite barrier layer. In this embodiment, the first conductive layer is coplanar with the upper surface of the substrate 50, and the opening 54 is aligned with the first conductive layer, so that a part of the first conductive layer is exposed. A conformal diffusion barrier layer 55 is located on the sidewall and bottom of the opening 54. The diffusion barrier layer 55 is made of one of tantalum, tantalum nitride, titanium, titanium nitride, tantalum silicide, tungsten, or tungsten nitride. Or more. The diffusion barrier layer 55 can be selectively formed on the sidewall of the opening 54. A second conductive layer 56 is formed on the conformal diffusion barrier layer 55, wherein the second conductive layer 56 fills the opening 54 and the upper surface of the second conductive layer 56 is coplanar with the upper surface of the dielectric layer 53. The material of the second conductive layer 56 is preferably copper, but can also be aluminum/copper, tungsten or another conductive material used in this art.

In the single-layer barrier layer, there are no valuable characteristics such as excellent adhesion (from silicon carbide) and excellent barrier capability (from silicon nitride). The damascene structure with composite layers of the present invention has the advantages of low leakage current. Advantage. As shown in Figure 7, the curve 41 represents the leakage current generated by the second conductive layer 56 of the damascene structure of the present invention, and the curve 40 represents the larger leakage current generated by the second conductive layer of the traditional damascene structure. In the damascene structure, a conventional silicon nitride barrier layer is used to replace the silicon carbide layer 51 and the silicon nitride layer 52 of the present invention. Referring to Figure 8, it can be observed that the M1 copper layer of the barrier layer of the damascene structure of the present invention has a lower leakage current (curve 42), and the curve 43 shows the traditional damascene structure with a silicon nitride barrier layer The M1 copper layer in has a higher leakage current.

Although the present invention has been specifically disclosed and described above based on its preferred embodiments, those skilled in the art will understand that various forms or details can be changed without departing from the spirit and scope of the present invention.

<p>10. . . Substrate</p><p>11. . . First dielectric layer</p><p>12. . . Via</p><p>13. . . ditch</p><p>14. . . First conformal diffusion barrier</p><p>15. . . First copper layer</p><p>16. . . Silicon carbide layer</p><p>17. . . Silicon nitride layer</p><p>18. . . Second dielectric layer</p><p>19. . . First photoresist layer</p><p>20. . . Via opening</p><p>twenty one. . . Second photoresist layer</p><p>twenty two. . . ditch</p><p>twenty three. . . Diffusion barrier</p><p>twenty four. . . Conductive layer</p><p>30. . . Substrate</p><p>31. . . Copper layer</p><p>32. . . Barrier layer</p><p>33. . . Carbon dioxide plasma treatment</p><p>40. . . curve</p><p>41. . . curve</p><p>42. . . curve</p><p>43. . . curve</p><p>50. . . Substrate</p><p>51. . . Silicon carbide layer</p><p>52. . . Silicon nitride layer</p><p>53. . . Dielectric layer</p><p>54. . . Opening</p><p>55. . . Diffusion barrier</p><p>56. . . Second conductive layer</p><p>d. . . depth</p>

FIG. 1 is a cross-sectional view of the composite barrier layer of the present invention, wherein the composite barrier layer is formed on a substrate, and the substrate includes a dielectric layer and a first metal layer.

FIGS. 2 to 5 are cross-sectional views of the process of incorporating the composite barrier layer of the present invention in a dual damascene process to form a second metal layer on the first metal layer.

Figure 6 shows a cross-sectional view of the oxygen/carbon dioxide plasma applied on the barrier layer to determine the effectiveness of the barrier layer in preventing the oxidation of the copper layer underneath.

FIGS. 7 to 8 are graphs showing the lower leakage current of the device including the composite barrier layer of the present invention compared with the conventional silicon nitride barrier layer.

Figure 9 is a cross-sectional view of a single damascene structure with a composite barrier layer of the present invention