TW587239B

Electric device

Abstract

There is provided an electric device which can prevent a deterioration in a frequency characteristic due to a large electric power external switch connected to an opposite electrode and can prevent a decrease in the number of gradations. The electric device includes a plurality of source signal lines, a plurality of gate signal lines, a plurality of power source supply lines, a plurality of power source control lines, and a plurality of pixels. Each of the pluraltty of pixels includes a switching TFT, an EL driving TFT, a power source controlling TFT, and an ELelement, and the power source controlling TFT controls a potential difference between a cathode and an anode of the EL element.

TW587239B, drawing sheet 1 — Sheet 1 of 19

Term

No projected expiry on record.

33 claims: 33 independent, 0 dependent

1
一種電裝置包含：多個來源訊號線；多個閘訊號線；多個電源來源供應器線；多個電源來源控制線；以及多個像素，各多個像素包括：一切換式薄膜電晶體，一EL驅動薄膜電晶體，一電源來源控制薄膜電晶體，以及一EL元件，且其中電源來源控制薄膜電晶體控制EL元件的陰極與陽極間之電位差。
2
一種電裝置包含：多個來源訊號線；多個閘訊號線；多個電源來源供應器線；多個電源來源控制線；以及多個像素，各多個像素包括：一切換式薄膜電晶體，一EL驅動薄膜電晶體，一電源來源控制薄膜電晶體，以及一EL元件，其中一框期之發光期由數位資料訊號控制，該發光期被定義作EL元件發光之周期且其中電源來源控制薄膜電晶體控制EL元件的陰極與陽極間之電位差。
3
一種電裝置包含：多個來源訊號線；多個閘訊號線；多個電源來源供應器線；多個電源來源控制線；以及多個像素，各多個像素包括：一切換式薄膜電晶體，一EL驅動薄膜電晶體，一電源來源控制薄膜電晶體，以及一EL元件，其中一框期包括n子框期SF 1 , SF 2 ,…, SF n ，其中該n子框期包括寫入期Ta 1 ,Ta 2 ,…, Ta n 與顯示期Ts 1 , Ts 2 ,…, Ts n ，其中多個數位資料訊號係輸入至寫入期Ta 1 , Ta 2 ,…, Ta n 之所有多個像素中，不管多個EL元件是否在由數位資料訊號選擇之顯示期Ts 1 , Ts 2 ,…, Ts n 中發光，其中寫入期Ta 1 , Ta 2 ,…, Ta n 的長度都完全一致，其中顯示期Ts 1 , Ts 2 ,…, Ts n 的長度的比例由2 0 :2 - 1 :…:2 - ( n - 1 ) 表示，且其中電源來源控制薄膜電晶體控制EL元件的陰極與陽極間之電位差。
4
根據申請專利範圍第1項之裝置，其中切換式薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個來源訊號線，且其它係連接至EL驅動薄膜電晶體的閘電極，其中EL驅動薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個電源來源供應器線，且其它係連接至電源來源控制薄膜電晶體的其中之一來源區域與汲極區域，其中電源來源控制薄膜電晶體的其它來源區域與汲極區域係連接至EL元件的其中之一陰極與陽極，以及其中電源來源控制薄膜電晶體的閘電極係連接至其中之一多個電源來源控制線。
5
根據申請專利範圍第1項之裝置，其中切換式薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個來源訊號線，且其它係連接至EL驅動薄膜電晶體的閘電極，其中EL驅動薄膜電晶體的其中之一來源區域與汲極區域係連接至電源來源控制薄膜電晶體的其中之一來源區域與汲極區域，且其它係連接至EL元件的其中之一陰極與陽極，其中電源來源控制薄膜電晶體的其它來源區域與汲極區域係連接至其中之一多個電源來源供應器線，以及其中電源來源控制薄膜電晶體的閘電極係連接至其中之一多個電源來源控制線。
6
根據申請專利範圍第1項之裝置，進一步包含EL驅動薄膜電晶體的閘電極與其中之一多個電源來源供應器線間之電容。
7
根據申請專利範圍第1項之裝置，其中各多個EL元件包括陽極與陰極間之EL層，以及其中EL層包括一選自低分子有機材質與聚合有機材質組成之群組。
8
根據申請專利範圍第7項之裝置，其中低分子有機材質是一選自由A1q 3 (三-8-quinolilite-鋁)與TPD(三苯胺衍生物)組成之群組。
9
根據申請專利範圍第7項之裝置，其中聚合有機材質是一選自由PPV(聚合三苯乙烯)，PVK(聚合乙烯碳)，或聚合碳。
10
根據申請專利範圍第1項之裝置，其中一框期為1/60秒或更少。
11
根據申請專利範圍第1項的電裝置，其中該電裝置係結合於電腦。
12
根據申請專利範圍第1項的電裝置，其中該電裝置係結合於影像攝影機。
13
根據申請專利範圍第1項的電裝置，其中該電裝置係結合於DVD播放裝置。
14
根據申請專利範圍第2項之裝置，其中切換式薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個來源訊號線，且其它係連接至EL驅動薄膜電晶體的閘電極，其中EL驅動薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個電源來源供應器線，且其它係連接至電源來源控制薄膜電晶體的其中之一來源區域與汲極區域，其中電源來源控制薄膜電晶體的其它來源區域與汲極區域係連接至EL元件的其中之一陰極與陽極，以及其中電源來源控制薄膜電晶體的閘電極係連接至其中之一多個電源來源控制線。
15
根據申請專利範圍第2項之裝置，其中切換式薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個來源訊號線，且其它係連接至EL驅動薄膜電晶體的閘電極，其中EL驅動薄膜電晶體的其中之一來源區域與汲極區域係連接至電源來源控制薄膜電晶體的其中之一來源區域與汲極區域，且其它係連接至EL元件的其中之一陰極與陽極，其中電源來源控制薄膜電晶體的其它來源區域與汲極區域係連接至其中之一多個電源來源供應器線，以及其中電源來源控制薄膜電晶體的閘電極係連接至其中之一多個電源來源控制線。
16
根據申請專利範圍第2項之裝置，進一步包含EL驅動薄膜電晶體的閘電極與其中之一多個電源來源供應器線間之電容。
17
根據申請專利範圍第2項之裝置，其中各多個EL元件包括陽極與陰極間之EL層，以及其中EL層包括一選自低分子有機材質與聚合有機材質組成之群組。
18
根據申請專利範圍第17項之裝置，其中低分子有機材質是一選自由Alq 3 (三-8-quinolilite-鋁)與TPD(三苯胺衍生物)組成之群組。
19
根據申請專利範圍第17項之裝置，其中聚合有機材質是一選自由PPV(聚合三苯乙烯)，PVK(聚合乙烯碳)，或聚合碳。
20
根據申請專利範圍第2項之裝置，其中一框期為1/60秒或更少。
21
根據申請專利範圍第2項的電裝置，其中該電裝置係結合於電腦。
22
根據申請專利範圍第2項的電裝置，其中該電裝置係結合於影像攝影機。
23
根據申請專利範圍第2項的電裝置，其中該電裝置係結合於DVD播放裝置。
24
根據申請專利範圍第3項之裝置，其中切換式薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個來源訊號線，且其它係連接至EL驅動薄膜電晶體的閘電極，其中EL驅動薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個電源來源供應器線，且其它係連接至電源來源控制薄膜電晶體的其中之一來源區域與汲極區域，其中電源來源控制薄膜電晶體的其它來源區域與汲極區域係連接至EL元件的其中之一陰極與陽極，以及其中電源來源控制薄膜電晶體的閘電極係連接至其中之一多個電源來源控制線。
25
根據申請專利範圍第3項之裝置，其中切換式薄膜電晶體的其中之一來源區域與汲極區域係連接至其中之一多個來源訊號線，且其它係連接至EL驅動薄膜電晶體的閘電極，其中EL驅動薄膜電晶體的其中之一來源區域與汲極區域係連接至電源來源控制薄膜電晶體的其中之一來源區域與汲極區域，且其它係連接至EL元件的其中之一陰極與陽極，其中電源來源控制薄膜電晶體的其它來源區域與汲極區域係連接至其中之一多個電源來源供應器線，以及其中電源來源控制薄膜電晶體的閘電極係連接至其中之一多個電源來源控制線。
26
根據申請專利範圍第3項之裝置，進一步包含EL驅動薄膜電晶體的閘電極與其中之一多個電源來源供應器線間之電容。
27
根據申請專利範圍第3項之裝置，其中各多個EL元件包括陽極與陰極間之EL層，以及其中EL層包括一選自低分子有機材質與聚合有機材質組成之群組。
28
根據申請專利範圍第27項之裝置，其中低分子有機材質是一選自由Alq 3 (三-8-quinolilite-鋁)與TPD(三苯胺衍生物)組成之群組。
29
根據申請專利範圍第27項之裝置，其中聚合有機材質是一選自由PPV(聚合三苯乙烯)，PVK(聚合乙烯碳)，或聚合碳。
30
根據申請專利範圍第3項之裝置，其中一框期為1/60秒或更少。
31
根據申請專利範圍第3項的電裝置，其中該電裝置係結合於電腦。
32
根據申請專利範圍第3項的電裝置，其中該電裝置係結合於影像攝影機。
33
根據申請專利範圍第3項的電裝置，其中該電裝置係結合於DVD播放裝置。

Independent claims33

358 paragraphs, as filed

Electric device

Field of invention

The present invention relates to an EL (electro-optical) display formed by incorporating EL elements on a substrate. More specifically, the invention relates to EL displays using semiconductor elements (using semiconductor thin films). Furthermore, the present invention relates to an electric appliance (EL display device), and the EL display is used in its display part.

Description of related skills

In recent years, the technology of forming a thin film transistor (hereinafter, TFT) on a substrate has been greatly improved, and the application of TFT has been developed to an active matrix display device. In particular, TFTs using silicon films have higher field-effect mobility than conventional amorphous silicon films. Therefore, the former TFT may perform high-speed operation. Therefore, the pixel control that has been conducted on the drive circuit outside the substrate may be conducted on the drive circuit formed on the same substrate as the pixel.

Such an active matrix display device can obtain various advantages such as reducing manufacturing costs, reducing the size of the display device, increasing its output, and reducing its production capacity by incorporating various circuits and components on the same substrate.

Furthermore, research on active matrix EL display devices with EL elements as self-luminous devices is becoming more active. EL displays are called organic EL displays (OELD) or organic light emitting diodes (OLED).

The EL display is a self-luminous type unlike a liquid crystal display device. The EL element is constructed in such a way that the EL layer is sandwiched between a pair of electrodes. However, EL The layer normally has a laminated structure. Typically, Tang et al. of Eastman Kodak Company. The proposed laminated structure of "hole transport layer/luminescence/electron transport layer" can be cited. This structure has very high luminous efficiency, and this structure, which is used in almost all EL displays, is currently being researched and developed.

In addition, there may be a structure on the pixel electrode, hole injection layer/hole transport layer/luminescence/electron transport layer, or hole injection layer/hole transport layer/luminescence/electron transport layer/electron injection layer Stack the sheets in the stated order. Phosphorescent dyes or the like may be incorporated to emit light.

In this specification, all layers provided between the pixel electrode and the counter electrode are generally referred to as EL layers. Therefore, the hole injection layer, the hole transport layer's light emission, the electron transport layer, the electron injection layer and similar are all included in the EL layer.

A predetermined voltage is applied from a pair of electrodes to the EL layer of the above structure, and as a result, carrier recombination occurs in the light-emitting layer to emit light. It should be noted that in this specification, the light emitted by the EL element is referred to as driving the EL element. In addition, in this specification, the light-emitting element formed by the anode, the EL layer, and the cathode are referred to as the EL element. In addition, the potential difference generated between the anode and cathode of the EL element is called the EL drive voltage.

Fig. 23 is a block diagram of a conventional multi-stage change system EL display. The EL display shown in FIG. 23 uses a TFT formed on a substrate and includes a pixel portion 101, and a source signal side driving circuit 102 and a gate signal side driving circuit 103 arranged around the pixel portion. An external switch 116 that controls the EL voltage is connected to the pixel portion 101.

The source signal side driving circuit 102 basically includes a shift register 102a, latch (A) 102b, and latch (A) 102c. Further, the clock signal CK and the start pulse SP are input to the shift register 102a, the digital data signal is input to the latch (A) 102, and the latch signal is input to the latch (B) 102c.

The digital data signal input to the pixel portion 101 is formed by the time-sharing stage data signal generating circuit 114. The image signal (signal including image information) composed of analog signals or digital signals is converted into a digital data signal for executing the time-sharing stage in the time-sharing stage data signal generating circuit 114. At the same time, the timing pulse that needs to perform the time-sharing phase display is generated in this circuit.

In particular, the time-sharing stage data signal generation circuit 114 includes a mechanism: divide a frame period into multiple sub-frame periods equivalent to n-bit (n is an integer greater than or equal to 2) stage; Select the write-in period and display period in the frame period; and set the length of the display period.

The structure of the pixel portion 101 shown in FIG. 18 is already common. In Fig. 18 on the left, gate signal lines as input gate signals and source signal lines (also called data signal lines) (S1 to Sn) as input digital data signals are provided in the pixel portion 101. It should be noted that the digital data signal means a digital image signal.

In addition, power source supply lines (V1 to Vn) parallel to the source signal lines (S1 to Sn) are provided. The potential of the power source supply line (V1 to Vn) is called the power source potential. In addition, wiring (Vb to Vbn) parallel to the gate wires (G1 to Gn) is provided. catch The wires (Vb to Vbn) are connected to the external switch 116.

A plurality of pixels 104 are constructed in the pixel portion 101 in a matrix form. FIG. 19 is an enlarged view of the pixel 104. In FIG. 19, reference number 1701 denotes a TFT (hereinafter referred to as a switching TFT) which functions as a switching element (current control element); 1702, which functions as a TFT as an element supplied to the EL element 1703; and 1704, a capacitor ( Reserve current capacity).

Separately, the gate electrode of the switching TFT 1701 is connected to the gate signal line 1705 which is one of the gate signal lines (G1 to Gn) of the input gate signal. One of the source area and the drain area of the switch TFT 1701 is connected to the source signal line 1706 which is one of the source signal lines (S1 to Sn) of the input digital data signal, and the other is connected to the EL driver TFT 1702 Gate electrode and capacitor 1704.

One of the source area and the drain area of the driving TFT 1702 is connected to the power source supply line 1707 of one of the power source supply lines (V1 to Vn), and the other is connected to the EL element 1703. The capacitor 1704 is connected to the power source supply line 1707 of one of the power source supply lines (V1 to Vn).

The EL element 1703 is formed of an anode, a cathode, and an EL layer provided between the anode and the cathode. In the case where the anode is connected to the source region or the drain region of the EL driving TFT 1702, in other words, in the case where the anode is the pixel electrode, the cathode becomes the opposite electrode. On the contrary, the cathode system is connected to the source of the EL driver TFT 1702 In the case of the region or drain region, in other words, in the case where the cathode is the pixel electrode, the anode becomes the counter electrode. In this specification, the potential of the opposite electrode is called the opposite potential. The potential difference between the potential of the counter electrode and the potential of the pixel electrode is called the EL driving voltage, and the EL driving voltage is applied to the EL layer.

The opposite electrode of the EL element is connected to the external switch 116 (FIG. 18) through one of the wires (Vb to Vbn).

Next, the driving of the multi-stage system EL display will be described. Here, by n-bit drive system 2nThe stage display will be described.

Figure 5 shows the timing chart of the digital system time-sharing stage display in the multi-stage system EL display. A frame period is divided into n subframe periods (SF1To SFn). It should be noted that the period of displaying an image in the pixel portion of all pixels is called a frame period (F). The period obtained by driving a frame period is called a sub-frame period. When the number of stages becomes larger, the number of divisions of a frame period also becomes larger, and the driving circuit must be driven by high frequency.

A subframe period is divided into a writing frame period (Ta) and a display period (Ts). The writing period is the period during which the digital data signal is input to all pixels in a sub-frame period. The display period (also called the bright light period) is a period during which the emission or non-emission state of the EL element is selected and the display is performed.

In addition, the EL driving voltage shown in FIG. 5 represents the EL driving voltage of the EL element whose emission state is selected. That is, the emission state is selected to be the EL driving voltage of the EL element that becomes 0 volts during the writing period (FIG. 5), and there is such an intensity that the EL element emits light during the display period.

The opposite potential is controlled by the external switch 116. During the write period, oppose The potential is kept equal to the power source potential, and during the display period, there is a potential difference between the opposing potential and the power source potential such that the EL element emits light (grounding in FIG. 18).

First, the writing period and the display period of each sub-frame will be described using the symbols in FIGS. 18 and 19, and then, the time-sharing phase display will be described.

First, the gate signal is input to the gate signal line G1, and all the switching TFTs 1701 connected to the gate signal line G1 are turned on. The digital data signals are sequentially input to the source signal lines (S1 to Sn). The opposite potential is maintained equal to the power source potential of the power source supply line (V1 to Vn). The digital data signal includes the information of "0" and "1". The digital data signals of "0" and "1" respectively mean signals with high or low voltage.

The digital data signal input to the source signal lines (S1 to Sn) is input to the gate electrode of the EL driving TFT 1702 through the switching TFT 1701 in the ON state. The digital data signal is also input to the capacitor 1704 and is retained.

The gate signal is sequentially input to the gate signal lines G2 to Gn, so that the aforementioned operation is repeated, the digital data signal is input to all pixels, and the input digital data signal is retained in individual pixels. The period during which the digital data signal is input to all pixels is called the writing period.

When the digital data signal is input to all pixels, all switch 1701 is turned off. By the external switch connected to the opposite electrode, a potential difference such as the light emission of the EL element is generated between the opposite potential and the power source potential.

In the case where the digital data signal includes "0" information, the EL driver The TFT 1702 is turned off, and the EL element 1703 does not emit light. Conversely, in the case where the digital data signal includes information of "1", the EL driver TFT 1702 is turned on. As a result, the pixel electrode of the EL element 1703 is retained at the power source potential, and the EL element 1703 emits light. Like this, according to the digital data signal, the emission or non-emission state of the EL element is selected, and the displayed information is executed simultaneously with each pixel, and the image image is executed. The period during which the pixels perform display is called the display period.

N subframe period (SF1To SFn) Of the writing period (Ta1To TanThe lengths of) are fixed numbers respectively. Each subframe period (SF1To SFn) Display period (Ts) becomes display period (Ts1To Tsn)。

The length of the display period is set to become Ts1:Ts2:Ts3:...:Ts(n-1):Tsn=20:2-1:2-2:…:2-(n-2):2-(n-1). Note that SF1To SFnIt may appear in any order. The desired stage shows that since 2nBetween the stages, it can be executed by the combined display period.

Display period is from Ts1To TsnOf any cycle. The predetermined pixel is here in TsnThe cycle is turned on.

The writing period starts again, and after the data signal is input to all pixels, the display period starts. Any Ts1To Ts(n-1)The period becomes the display period at this point. The predetermined pixel is here in Ts(n-1)The cycle is turned on.

Similar operations are repeated in the remaining (n-2) subframe periods, Ts(n-2),Ts(n-3),..., and Ts1The display period is sequentially set, and the predetermined pixels are opened in individual sub-frame periods here.

One frame period is complete after the appearance of n sub-frame periods. By adding pixels The length of the open display period determines the pixel stage. For example, when n=8, and the brightness of the case where it is considered as a 100% period pixel light emission in all display periods, when it is at Ts1With Ts2When the middle pixel emits light, the brightness of 75% can be expressed, and when Ts3,Ts5With TS8When selected, 16% brightness can be expressed.

Regarding the aforementioned multi-stage system EL display, in the case where the size of the EL display device is enlarged, the number of pixels is increased, and a large current flows through the EL display device. Because this current flows through the external switch that controls the EL drive voltage, a high-current power supply is required for the external switch that controls the EL drive voltage.

In the EL display device, 200cd/m2In the case of the amount of luminescence, several mA/cm are required2ofcurrent. For example, when using 5mA/cm2In the case of a 40-inch display device made of EL material, the current value required by the display becomes approximately 25A, which is a considerable value.

Generally, the predetermined standard of the current power supply is determined by the external switch. And the upper limit of the current power supply has avoided the enlargement of the EL display of the multi-stage system.

In addition, in the aforementioned multi-stage system EL display, when the number of stages becomes larger, the number of divisions of one frame period is also increased, and the driving circuit must be driven by a high frequency. On the other hand, when the current power source becomes higher, there is a tendency for the external switching frequency characteristics to be deteriorated. As a result, when the multi-stage system EL display is enlarged, the frequency characteristics are deteriorated and the number of possible stages is reduced.

The key to the invention

The present invention has the object of providing a mechanism for solving the problems related to the enlargement of the EL display device. That is, the purpose of the present invention is to remove the limitation of the current value of the external switch that controls the EL driving voltage, so as to prevent the frequency characteristics of the EL drive circuit from deteriorating due to the external switch that controls the EL driving voltage, and to avoid reducing the number of stages.

As a mechanism for solving the above problems, according to the present invention, the TFTs recently provided in the source area and the drain area of one of the EL driving TFTs are not connected to the power source supply line and the EL element. Respectively, the source region and the drain region of one of the TFTs are connected to the EL driving TFT and the other is connected to the EL element. The gate electrode is connected to an external switch through a wiring system. The TFT function is a switching element that controls the EL driving voltage (hereinafter referred to as power source control TFT).

According to the above structure, the control method of using the power source to control the EL driving voltage of the TFT is a voltage driving system, and current hardly flows through the external switch connected to the gate electrode of the power source controlling TFT. Therefore, in the external switch connected to the gate electrode of the power source control TFT, the limitation of the current value does not become a problem, and the deterioration of the frequency characteristic is almost ignored.

Due to the above-mentioned structure, it becomes possible to control the EL driving voltage through an external switch connected to the gate electrode of the power source control TFT, and it becomes possible to remove the conventional external switch connected to the counter electrode as a control EL driving voltage. Therefore, it becomes possible to remove the limitation of the current value of the EL drive voltage due to the external switch connected to the opposite electrode, and to prevent the frequency characteristics of the EL drive circuit from deteriorating due to the external switch connected to the opposite electrode, and It becomes possible to avoid reducing the number of stages.

It should be noted that the power source control TFT can be formed as a switching TFT and an EL driving TFT at the same time.

The structure of the present invention will be described as follows.

According to the present invention, an electrical device including multiple source signal lines, multiple gate signal lines, multiple power source supply lines, multiple power source control lines, and multiple pixels is provided, which is characterized in

Each of the multiple pixels includes a switching TFT, an EL driving TFT, a power source control TFT, and an EL element, and

The power source control TFT controls the potential difference between the anode and the cathode of the EL element.

Each pixel includes a switching TFT, an EL driving TFT, a power source control TFT, and an EL element,

The EL element controls the period of light emission by the use of digital data signals in a frame period, and

The power source control TFT controls the potential difference between the anode and the cathode of the EL element.

Each of the multiple pixels includes switching TFT, EL driving TFT, and Source control TFT, and EL element;

One frame includes n sub-frames SF1,SF2,...,SFn;

n subframe period includes writing period Ta1,Ta2,...,TanAnd display period Ts1,Ts2,...,Tsn;

The digital data signal is in the writing period Ta1,Ta2,...,TanIs input to all multiple pixels;

Regardless of whether multiple EL elements are in the display period TS1,TS2,...,TSnThe middle light is selected by the digital data signal;

Write period Ta1,Ta2,...,TanThe lengths are exactly the same;

Display period Ts1,Ts2,...,TsnThe ratio of the length is 20:2-1:2-2:…:2-(n-2):2-(n-1)Means; and

The power source control TFT controls the potential difference between the anode and the cathode of the EL element.

The electrical device according to the present invention may have a structure in which one of the source regions and drain regions of the switching TFT is connected to one of the multiple source signal lines, and the other is connected to the gate electrode of the EL driving TFT;

The source area and the drain area of one of the switching TFTs are connected to one of the multiple source signal lines, and the other is connected to the source area and the drain area of one of the power source control TFTs;

The other source and drain regions of the power source control TFT are connected to the cathode or anode of one of the EL elements; and

The gate electrode of the power source control TFT is connected to one of a plurality of power source control lines.

The source region and the drain region of one of the switching TFTs are connected to one of the multiple source signal lines, and the other are connected to the cathode or anode of one of the EL elements;

The other source and drain regions of the power source control TFT are connected to the cathode or anode of one of the EL elements; and

The gate electrode of the power source control TFT is connected to one of a plurality of power source control lines.

The electrical device according to the present invention may include the capacitance between the EL driving TFT and one of the multiple power source supply lines.

The electrical device according to the present invention may have a structure in which each of the plurality of EL elements includes an EL layer between the anode and the cathode, and the EL layer is made of a low-molecular organic material or a polymerized organic material.

The electrical device according to the present invention may have a low-molecular-weight organic material, which is selected from A1q3The group of (tris-8-quinolilite-aluminum) or TPD (triphenylamine derivative) constitutes such a structure.

The electrical device according to the present invention may have a structure in which the polymerized organic material is selected from the group consisting of PPV (polymerized tristyrene), PVK (polymerized vinyl carbon), or polymerized carbon.

The electrical device according to the present invention may have a structure with a frame period of 1/60 or less.

The electrical device according to the present invention may have a computer, a video camera, or The DVD projector is characterized by the use of the above-mentioned electrical device.

The electrical devices referred to as EL elements included in this specification include triplet-based light-emitting devices and/or single-based light-emitting devices.

101. . . Pixel part102. . . Source signal side drive circuit103. . . Gate signal side drive circuit116. . . External switch102a. . . Shift register102b. . . Bolt (A)102c. . . Bolt (B)114. . . Time-sharing stage data signal generating circuitCK. . . Clock signalSP. . . Start pulse104. . . Pixel1701. . . Switching TFT1702. . . EL driver TFT1704. . . capacitance1703. . . EL element1707. . . Power source supply cable1705. . . Gate signal line1706. . . Source signal line117. . . Low power external switch105. . . Switching TFT106. . . Gate signal line107. . . Source signal line108. . . capacitance109. . . EL driver TFT110. . . Power source supply cable111. . . EL element112. . . Power source control TFT113. . . Power source control line1000. . . Pixel1001. . . Switching TFT1002. . . Gate signal line1003. . . Source signal line1004. . . EL driver TFT1008. . . capacitance1005. . . Power source supply cable1009. . . Power source control TFT1006. . . EL element1010. . . Power source control line1100. . . Pixel1101. . . Switching TFT1103. . . Source signal line1104. . . EL driver TFT1108. . . capacitance1105. . . Power source supply cable1109. . . Power source control TFT1106. . . EL element1110. . . Power source control line1102. . . Gate signal line1200. . . Pixel1201. . . Switching TFT1211. . . Switching TFT1202. . . Gate signal line1203. . . Source signal line1204. . . EL driver TFT1208. . . capacitance1210. . . Pixel1209. . . Power source control TFT1205. . . EL element1207. . . Power source control line1213. . . Source signal line1214. . . EL driver TFT1218. . . capacitance1220. . . Power source supply cable1219. . . Power source control TFT1215. . . EL element1300. . . Pixel1301. . . Switching TFT1302. . . Gate signal line1303. . . Source signal line1304. . . EL driver TFT1305. . . EL element1307. . . Power source control line1308. . . capacitance1309. . . Power source control TFT1310. . . Pixel1311. . . Switching TFT1312. . . Gate signal line1314. . . EL driver TFT1315. . . EL element1318. . . capacitance1319. . . Power source control TFT1320. . . Power source supply cable1400. . . Pixel1401. . . Switching TFT1402. . . Gate signal line1403. . . Source signal line1404. . . EL driver TFT1405. . . EL element1407. . . Power source supply cable1408. . . capacitance1409. . . Power source control TFT1410. . . Pixel1411. . . Switching TFT1413. . . Source signal line1414. . . EL driver TFT1415. . . EL element1418. . . capacitance1419. . . Power source control TFT1420. . . Power source control line1500. . . Pixel1501. . . Switching TFT1502. . . Gate signal line1503. . . Source signal line1504. . . EL driver TFT1505. . . EL element1507. . . Power source supply cable1508. . . capacitance1509. . . Power source control TFT1510. . . Pixel1511. . . Switching TFT1512. . . Gate signal line1514. . . EL driver TFT1515. . . EL element1518. . . capacitance1519. . . Power source control TFT1520. . . Power source control line1600. . . Power source control line1610. . . Power source supply cable1700. . . Power source control line1710. . . Power source supply cable1800. . . Pixel1801. . . Switching TFT1802. . . Gate signal line1803. . . Source signal line1804. . . EL driver TFT1805. . . Power source supply cable1806. . . EL element1808. . . capacitance1809. . . Power source control TFT1810. . . Power source supply cable1111. . . Power source control TFT4010. . . Base4011. . . Pixel part4012. . . Source signal side drive circuit4013. . . Gate signal side drive circuit4014. . . wiring4015. . . wiring4016. . . wiring4017. . . FPC6000. . . Cover material7000. . . Seal material7001. . . Hermetic sealing material4022. . . Driver circuit TFT4023. . . Pixel part TFT4021. . . Basement membrane4010. . . Base4027. . . Pixel electrode4026. . . Inner insulating film4028. . . Insulating film4029. . . EL layer4030. . . cathode4031. . . area4032. . . Conductive paste material6003. . . Passivation film6004. . . Fill material3501. . . Base3502. . . Switching TFT3503. . . EL driver TFT3504. . . Power source control TFT35. . . Drain wire36. . . wiring37b. . . Gate electrode40a. . . Drain wiring40b. . . Source wiring38. . . Gate signal line34. . . wiring37a. . . Gate electrode39a. . . Gate electrode39b. . . Gate electrode41. . . Passivation film42. . . Leveling film44a. . . Touch row44b. . . Touch row45. . . Luminescent layer43. . . Pixel electrode46. . . Electric hole injection layer47. . . anode50. . . Pixel electrode51a. . . Touch row51b. . . Touch row52. . . Luminescent layer53. . . Electron beam layer54. . . cathode3701. . . EL element801. . . Source side drive circuit802. . . Gate side drive circuit803. . . Pixel part804. . . Shell component805. . . First sealing member806. . . Second sealing member807. . . Filler808. . . Connection wiring809. . . Soft printed circuit800. . . Base851. . . Power source control TFT852. . . Pixel electrode853. . . n-channel TFT854. . . p-channel TFT855. . . Color filter (R)856. . . Color filter (G)857. . . Insulating film858. . . Luminescent layer859. . . Luminescent layer860. . . cathode861. . . Hygroscopic material901. . . Pixel part902. . . Power source control TFT903. . . Pixel electrode904. . . Transparent conductive film905. . . Color filter (R)906. . . Color filter (G)501. . . Base502. . . Amorphous silicon film504. . . Protective film505. . . Floor53a. . . open circuit53b. . . open circuit506a. . . area506b. . . area507. . . Polysilicon film508a. . . area508b. . . area509. . . Polysilicon film510. . . Active layer511. . . Active layer512. . . Active layer513. . . Active layer514. . . Gate insulating film515a. . . Impedance mask515b. . . Impedance mask516. . . Impurity area517. . . Impurity area519a. . . Impedance mask519b. . . Impedance mask520. . . n-type impurity element522. . . Gate electrode523. . . Gate electrode524. . . Gate electrode525. . . Gate electrode524a. . . Gate electrode524b. . . Gate electrode526. . . Impurity area527. . . Impurity area528. . . Impurity area529. . . Impurity area530. . . Impurity area531. . . Impurity area532. . . Impurity area533. . . Impurity area534a. . . Impedance mask534b. . . Impedance mask534c. . . Impedance mask534d. . . Impedance mask542. . . Impedance mask540. . . Impurity area541. . . Impurity area543a. . . Impurity area543b. . . Impurity area544a. . . Impurity area544b. . . Impurity area546. . . First inner insulating film547. . . Source line548. . . Source line549. . . Source line550. . . Source line551. . . Drain wiring552. . . Drain wiring553. . . Drain wiring554. . . First passivation film555. . . Second passivation film556. . . Pixel electrode557. . . Third passivation film558. . . EL layer559. . . cathode560. . . Guard electrode561. . . Second passivation film201. . . Switching TFT202. . . EL driver TFT203. . . Power source control TFT204. . . Driving circuit n-channel type TFT205. . . Drive circuit p-channel type TFT801. . . Shift register802. . . Bolt (A)803. . . Bolt (B)804. . . Part of the bolt (A)832a. . . Active layer832b. . . Active layer836. . . Gate electrode837a. . . Gate electrode837b. . . Gate electrode833a. . . Active layer833b. . . Active layer838a. . . Gate electrode838b. . . Gate electrode839. . . Gate electrode840. . . Gate electrode841. . . Gate electrode834a. . . Active layer834b. . . Active layer2001. . . Host2002. . . shell2003. . . Display part2004. . . keyboard2101. . . Host2102. . . Display device2103. . . Voice input section2104. . . Operation switch2105. . . Battery2106. . . Image receiving part2301. . . Host2302. . . Signal cable2303. . . Head-fixed elastic band2304. . . Display monitor2305. . . Optical system2306. . . Display device2401. . . Host2402. . . Recording medium2403. . . Operation switch2404. . . Display part (a)2405. . . Display part (b)2501. . . Host2502. . . camera2503. . . Image receiving part2504. . . Operation switch2505. . . Display part

Figure 1 is a diagram showing the circuit structure of the EL display of the present invention;

2 is a circuit diagram of the pixel portion of the EL display of the present invention;

Fig. 3 is a circuit diagram of a pixel of the EL display of the present invention;

4A and 4B are circuit diagrams of the pixel portion of the EL display of Embodiment 1;

Figure 5 is a timing chart showing the driving method of the EL display;

6A and 6B are circuit diagrams of the pixel portion of the EL display of Embodiment 1;

7A and 7B are circuit diagrams of the pixel portion of the EL display of Embodiment 1;

8A and 8B are circuit diagrams of the pixel portion of the EL display of Embodiment 1;

9A and 9B are top views of a cross-sectional view of the EL display of Example 3;

10A and 10B are top views of a cross-sectional view of the EL display of Example 3;

11 is a schematic diagram of the cross-sectional structure of the EL display of Example 4;

12 is a schematic diagram of the cross-sectional structure of the EL display of Example 5:

13A and 13A and 13E are diagrams showing the manufacturing process of the EL display of Embodiment 10;

14A to 14D are diagrams showing the manufacturing process of the EL display of Embodiment 10;

15A to 15D are diagrams showing the manufacturing process of the EL display of Embodiment 10;

16A to 16C are diagrams showing the manufacturing process of the EL display of Embodiment 10;

17A to 17E are diagrams respectively showing electric appliances using the EL display of Embodiment 12;

FIG. 18 is a circuit diagram of a pixel portion of a conventional EL display;

FIG. 19 is a circuit diagram of a pixel of a conventional EL display;

20A and 20B are circuit diagrams of the pixel portion of the EL display of Embodiment 2;

21 is a circuit diagram of the source signal side driving circuit used in Embodiment 11;

Figure 22 is a top view of the latch circuit used in Embodiment 11;

FIG. 23 is a diagram showing the circuit structure of a conventional EL display;

24A and 24B are a top view and a cross-sectional view of the EL display of Embodiment 6; and

FIG. 25 is a cross-sectional view of the EL display of Example 7. FIG.

Detailed description of the preferred embodiment

[Example Mode]

Fig. 1 is a block diagram of the EL display of the present invention. The EL display shown in FIG. 1 uses TFTs formed on a substrate and includes a pixel portion 101, and a source signal side driving circuit 102 and a gate signal side driving circuit 103 constructed around the pixel portion. In addition, a low-power external switch 117 that controls the EL driving voltage is connected to the pixel portion 101. Although the block diagram of the EL display shown in FIG. 1 is the same as the conventional one, the low-power external switch l17 connected to the pixel portion 101 is essentially It is different from the conventional external switch. Naturally, the structure of the pixel portion is also different from the previous technique. It should be noted that in this mode, although the EL display includes a source signal side driving circuit and a gate signal side driving circuit, in the present invention, two source signal side driving circuits may be provided. In addition, a two-gate signal side drive circuit may be provided.

The source signal side driving circuit 102 basically includes a displacement register 102a, a latch (A) 102b, and a latch (B) 102c. Further, the clock signal CK and the start pulse SP are input to the shift register 102a, the digital data signal is input to the latch (A) 102, and the latch signal is input to the latch (B) 102c.

The time-sharing stage data signal generating circuit 114 may be formed externally to the EL display of the present invention. In this case, it becomes a structure that externally forms a digital data signal to be input to the EL display of the present invention. Komoto The invented EL display is used as the electronic equipment of the display (EL display device), which then includes the inventive EL display and the time-sharing stage data signal generating circuit as individual components.

Further, the time-sharing stage data signal generating circuit 114 may also be manufactured in the form of an IC chip in the EL display of the present invention. In this case, it becomes a structure in which a digital data signal formed by an IC chip is input to the EL display of the present invention. The EL display device of the present invention is used as a display electric appliance including the EL display device of the present invention, which is used as a component in the manufacture of an IC chip containing a time-sharing stage data signal generating circuit.

Furthermore, the time-sharing stage data signal generating circuit 114 may be formed by TFTs on the same substrate such as the pixel portion 101, the source signal side driving circuit 102, and the gate signal side driving circuit 103 are formed. In this case, an image signal that provides image information is input to the EL display, and all processing can be performed on the substrate. The time-sharing stage data signal generating circuit may be formed by a TFT with a polysilicon film as the active layer. Further, the time-sharing stage data signal generation circuit is built into the EL display itself which has the EL display of the present invention as the electric appliance of the display, and it is possible to minimize the electric appliance.

FIG. 2 shows the structure of the pixel portion 101. The signal lines (G1 to Gn) between the input gate signals and the source signal lines (also referred to as data signal lines) (S1 to Sn) of the input digital data signals are provided in the pixel portion 101. It should be noted that the digital data signal means a digital image signal.

In addition, it provides power parallel to the source signal line (S1 to Sn) Source source supply line (V1 to Vn). Perhaps a power source supply line (V1 to Vn) parallel to the gate line (G1 to Gn) is provided. The potential of the power source supply line (V1 to Vn) is called the power source potential.

In addition, a power source control line (C1 to Cn) parallel to the gate line is provided. The power source control lines (C1 to Cn) are connected to the external switch 117. Perhaps a power source control line (C1 to Cn) parallel to the source line is provided.

A plurality of pixels 104 are constructed in the pixel portion 101 in a matrix manner. FIG. 3 is an enlarged view of the pixel 104. As shown in FIG. In FIG. 3, reference numeral 105 denotes a switching type TFT. The gate electrode of the switching TFT 105 is connected to the gate signal line 106 of one of the gate signal lines (G1 to Gn) of the input gate signal. Respectively, the source area and the drain area of one of the switchable TFTs 105 are connected to the source signal line 107 of one of the source signal lines (S1 to Sn) of the input digital data signal, and the other are connected to the EL driving TFT 109's gate electrode and capacitor 108. It should be noted that in this mode, the capacitor 108 may not be provided.

One of the source area and drain area of the EL driver TFT 109 is connected to the power source supply line 110 of one of the power source supply lines (V1 to Vn), and the other is connected to the source area of the power source control TFT 112 Or drain area. The source and drain regions of the other power source control TFT 112 are connected to the EL element 111, and the gate electrode is connected to one of the power source control lines (C1 to Cn) power source control line 113. The power source control lines (C1 to Cn) are connected to the low-power external switch 117. The capacitor 108 is connected to the power source supply line 110 of one of the power source supply lines (V1 to Vn).

The EL element includes an anode, a cathode, and an EL layer provided between the anode and the cathode. In the case where the anode is connected to the source region or the drain region of the power source control TFT 112, in other words, in the case where the anode is the pixel electrode, the cathode becomes the opposite electrode. Conversely, in the case where the cathode is connected to the source region or the drain region of the power source control TFT 112, in other words, in the case where the cathode is the pixel electrode, the anode becomes the opposite electrode. It should be noted that in this specification, the potential of the opposite electrode is called the opposite potential. The potential difference between the potential of the counter electrode and the potential of the pixel electrode is called the EL driving voltage, and this EL driving voltage is applied to the EL layer.

It should be noted that the resistance may be provided between the drain region or source region of the power source control TFT 112 and the EL element 111. By providing a resistor, it becomes possible to control the amount of current supplied from the power source control TFT to the EL element and avoid the influence of the fluctuation of the characteristics of the power source control TFT and the EL driving TFT. The resistance must only be an element that is sufficiently larger than the on resistance of the power source control TFT 112 and the EL driving TFT 109, and there is no limitation in the structure or the like. It should be noted that when the TFT is in the on state, the on-resistance means the value obtained by dividing the drain region of the TFT by the drain current at that time. The resistance value of the resistor may be selected from 1kΩ to 50MΩ (preferably, 10kΩ to 10 MΩ, 50kΩ to 1MΩ is better). When a semiconductor layer with a high resistance value is used as a resistor, its molding is simple and such a semiconductor is preferable.

The driving of the EL display of the present invention is explained next. Perform 2 according to the n-bit digital driving methodnThe stages are explained here.

The timing chart displayed in the time-sharing phase of the digital system of the EL display of the present invention is shown in FIG. 5. First, a frame period (P) is divided into n sub-frame periods (SF1To SFn). It should be noted that the period during which the pixel portion displays all pixels of an image is called a frame period (F). In normal EL displays, the oscillation frequency is equal to or greater than 60 Hz. In other words, 60 or more frames are formed in one second, and 60 or more images are displayed in one second. If the number of images displayed in one second becomes less than 60, the questions will start to become prominent if the images flicker. It should be noted that a frame period is additionally divided into multiple periods called sub-frame periods. When the number of stages increases, the number of frame divisions increases, and the drive circuit must be driven at a high frequency.

A subframe period is divided into a writing period (Ta) and a display period (Ts). The write-in period is the period in which the input digital data signal enters all pixels during a sub-frame period. The display period (also referred to as the on period) represents a period for determining whether the EL element emits light or not, and performs display.

The EL driving voltage shown in FIG. 5 represents the EL driving voltage of the EL element whose emission state is selected. That is, the EL drive voltage (FIG. 5) of the EL element whose emission state is selected becomes 0 V during the writing period, and the EL element emits light at such an intensity during the display period.

In the present invention, the power source control TFT controls the EL driving voltage . More accurately, the EL driving voltage is controlled by the power source control TFT connected to the power source control line through the power source control line. In the writing period, the power source control TFT is in the off state, and the EL driving voltage becomes 0V. In the display period, the power source control TFT is in the on state, and the EL driving voltage of the EL element whose emission state is selected has such an intensity that the EL element emits light.

First, the writing period and the display period of each sub-frame will be described in detail by using the symbols in Figs. 2 and 3, and then, the time-sharing phased data display will be described.

First, in the writing period, the power source control TFT 112 is in the off state, and the EL driving voltage is maintained at 0V. It should be noted that although the EL drive voltage is caused by the closed current of the EL drive TFT 109 or the power source controlling the TFT 112 (the drain current is regarded as the switch TFT is closed), the leakage current can have some value, not if the value is too small As a result, the EL element does not emit light. Then the gate signal is input to the gate signal line G1 and all the switching TFTs 105 connected to the gate signal line G1 are turned on. Then the digital data signal is input to the source signal line (S1 to Sn). The digital data signal includes the information of "0" and "1". The digital data signal of "0" and "1" means a signal with high or low voltage.

The digital data signal input to the source signal line (S1 to Sn) is input to the gate electrode of the EL driving TFT 109 through the switching TFT 105 in the on state. In the case where the capacitor 108 exists, the digital data signal is input in the same way and retained.

Next, the gate signal is input to the gate signal line G2, and all the switching TFTs 105 connected to the gate signal line G2 are turned on. Then count The bit data signal is input to the source signal line (S1 to Sn).

The digital data signal input to the source signal line (S1 to Sn) is input to the EL driving TFT 109 through the switching TFT 105 in the on state. In the case where the capacitor 108 exists, the digital data signal is input in the same way and retained.

The gate signal is sequentially input to the gate signal lines G3 to Gn to repeat the foregoing operation, so that the digital data signal is input to all pixels, and the input digital data signal is retained in individual pixels. The period in which the digital data signal is input to all pixels is the write period.

At the same time, when the writing period ends, the display period starts. When the display period starts, all the switching TFTs 105 are turned off. Then the power source control TFT 112 is turned on by the low-power external switch 117 connected to the power source control line 113, and the EL driving voltage of the selected EL element 111 in the emission state reaches such an intensity that the EL element emits light.

In the case where the digital data signal includes the information of "0", the EL driving TFT 109 is turned off and the EL element 111 does not emit light. On the contrary, the digital data signal includes the information of "0" and the EL driving TFT 109 is turned on. At this time, because the power source control TFT 112 is also in the on state, the pixel electrode of the EL element 111 is retained as the power source potential at the same level, and the EL element 111 emits light. In this way, according to the information of the digital data signal, the emission or non-emission state of the EL element is selected, and each pixel performs display at the same time. Each pixel performs display, so that an image is formed. The period during which the pixels perform display is called the display period.

n subframe period (SF1To SFn) Separately included all writing periods (Ta1To TanThe length of) is a fixed number. Subframe SF1To SFnThe display period included separately is made Ts separately1To Tsn。

The length of the display period is set as Ts1:Ts2:Ts3:...:Ts(n-1):Tsn=20:2-1:2-2:…:2(n-2):2-(n-1). However, SF1To SFnThe order of appearance may be arbitrary. By the combination of the display period, in 2nThe desired stage display between stages can be executed.

Display period is any since Ts1To TsnThe cycle. The predetermined pixel is turned on here for Tsncycle.

The writing period starts again, and after the data signal is input to all pixels, the display period starts, any period Ts1To Ts(n-1)At this point it becomes the display period. Here in Ts(n-1)The pixels scheduled during the week are turned on.

In the remaining n-2 subframe period Ts(n-2),Ts(n-3),..., and Ts1Similar operations are repeated, in sequence, the display period is set, and the predetermined pixels are turned on in individual sub-frame periods.

A frame period is completed after the appearance of n sub-frame periods. By adding the length of the display period in which the pixel is turned on, the stage of the pixel is determined. For example, when n=8, and the brightness of the case where the pixel emits light during all display periods is regarded as 100%, when the pixel is at Ts1With Ts2When emitting light, 75% of the brightness can be expressed, and when Ts3,Ts5, And Ts8When selected, 16% brightness can be expressed.

It should be noted that in the embodiment of the invention, during the writing period, because the power source control TFT is in the off state and the EL driving voltage remains 0V, The EL element does not emit light. However, the present invention is not limited to this structure. Such a modification may be made that the power source control TFT is left in the on state, and the EL drive voltage with the intensity of the EL element's light emission is always supplied to the EL element whose emission state is selected, so that even during the writing period, the display It is made similar to the display period. However, in this case, because the entire sub-frame period becomes actually a light-emitting period, the length of the sub-frame period is set so as to become SF1:SF2:SF3:...:SF(n-1):SFn=20:2-1:2-2:…:2-(n-2):2-(n-1). With the above structure, as compared with the driving method that does not emit light during the writing period, a high-brightness image can be obtained.

In the present invention, with the above structure, it becomes possible to remove the limitation of the current value of the external switch due to the conventional control of the EL driving voltage. In addition, in the frequency characteristics of the EL drive circuit, it is avoided that the external switch that controls the EL drive voltage is deteriorated and the number of stages is reduced.

It should be noted that the power source control TFT can be formed as a switching TFT and an EL driving TFT at the same time.

[Example 1]

In this embodiment, the structure of the pixel of the EL display will be explained according to the present invention.

According to the present invention, in the pixel portion of the EL display, a plurality of pixels are constructed in a matrix-like configuration. Fig. 7A shows an example of a circuit diagram of a pixel.

In the pixel 1000, a switching TFT 1001 is provided in FIG. 7A. It should be noted that in the present invention, it is not an n-channel type TFT is a p-channel type TFT used as a switching TFT 1001. In FIG. 7A, an n-channel type TFT is used as a switching type TFT 1001.

The gate electrode of the switching TFT 1001 is connected to a gate signal line as an input gate signal. One of the source area and the drain area of the switchable TFT 1001 is connected to a source signal line (also referred to as a data signal line) 1003 as an input digital image signal, and the other is input to the gate electrode of the EL driving TFT 1004 or the capacitor 1008. In this embodiment, the capacitor 1008 can be omitted.

The source area and the drain area of the EL driving TFT 1004 are connected to the power source supply line 1005 and the others are connected to the source area or the drain area of the power source control TFT 1009. One of the source regions or drain regions of the power source control TFT 1009 is connected to the EL element 1006, and the gate electrode of the power source control TFT 1009 is connected to the power source control line 1010. And the capacitor 1008 is connected to the power source supply line 1005.

The EL element includes an anode, a cathode, and an EL layer provided between the anode and the cathode. According to the present invention, in the case where the anode is the pixel electrode and the cathode is the counter electrode, the source region or drain region of the power source control TFT 1009 is connected to the anode of the EL element 1006. Conversely, in the case where the anode is the opposite electrode and the cathode is the pixel electrode, the source region or the drain region of the power source control TFT 1009 is connected to the cathode of the EL element 1006. The opposite electrode of the EL element is always Definite electron potential.

It should be noted that either the n-channel type TFT or the p-channel type TFT may be used as the EL driver TFT 1004 and the power source control TFT 1009. However, in the case where the anode of the EL element 1006 is the pixel electrode and the cathode is the opposite electrode, it is preferable that each EL driving TFT 1004 and the power source control TFT 1009 are p-channel type TFTs. Furthermore, on the contrary, in the case where the anode of the EL element 1006 is the opposite electrode and the cathode is the pixel electrode, it is preferable that each EL driving TFT 1004 and the power source control TFT 1009 are n-channel TFTs. In FIG. 7A, the p-channel TFT is used as the EL driving TFT 1004 and the power source control TFT 1009. The anode of the EL element 1006 is the pixel electrode, and the cathode is the opposite electrode.

In the circuit diagram shown in FIG. 7A, the power source supply line 1005 is constructed parallel to the source signal line 1003. And the power source control line 1010 is constructed in parallel with the gate signal line 1002.

Furthermore, the LDD region may be provided on the active layer of the EL driver TFT 1004, and a region (referred to as the Lov region) may be formed in which the LDD region and the gate electrode overlap via the gate insulating film. When the EL driver TFT 1004 is either an n-channel type TFT or a p-channel type TFT, the Lov region is formed on the drain region side of the active layer. As a result, a capacitor can be further formed between the gate electrode of the EL driver TFT 1004 and the Lov region. The gate electrode of the EL driving TFT 1004 may be left.

It should be noted that in the circuit diagram shown in FIG. 7A, instead of the switching TFT 1001, the EL driver TFT 1004 or the power source control TFT 1009 may be formed into a multi-gate structure (including an active layer with two or more channel formation regions connected in series). The structure). By forming a switching TFT 1001 into a multi-gate structure, the off current can be reduced. In addition, in the case where the EL driver TFT 1004 or the power source control TFT 1009 is formed into a multi-gate structure, the deterioration by heating the EL driver TFT or the power source control TFT can be suppressed.

In FIG. 7A, when the power source supply line 1005 and the source signal line 1003 are provided without overlapping each other, if they are formed in different layers, they can be provided via an insulating film overlapping. In this case, the pixel portion is more accurate, because the power source supply line 1005 and the source signal line 1003 belong to a common mutually exclusive area.

In FIG. 7A, when the power source control line 1010 and the gate signal line 1002 are provided without overlapping each other, if they are formed in different layers, they can be provided via the fringe film overlapping. In this case, the pixel portion is more accurate because the power source control line 1010 and the gate signal line 1002 belong to a common mutually exclusive area.

Next, FIG. 7B shows another example of the circuit diagram of the pixel according to the present invention. In FIG. 7B, a switching TFT 1101 is provided in the pixel 1100. It should be noted that in the present invention, either an n-channel type TFT or a p-channel type TFT may be used as the switching TFT 1101. In Figure 7B, the n-channel TFT is used Used as a switching TFT 1101. The gate electrode of the switching TFT 1101 is connected to a gate signal line 1102 as an input gate signal. One of the source area and the drain area of the switch TFT 1001 is connected to a source signal line (also called a data signal line) 1003 as an input digital image signal, and the other is input to the gate electrode of the EL driving TFT 1104 or the capacitor 1108. In this embodiment, the capacitor 1108 can be omitted.

Then, one of the source area and the drain area of the EL driver TFT 1004 is connected to the power source supply line 1105 and the other is connected to the source area or the drain area of the power source control TFT 1009. One of the source regions or drain regions of the power source control TFT 1109 is connected to the EL element 1106, and the gate electrode of the power source control TFT 1109 is connected to the power source control line 1110. And the capacitor 1108 is connected to the power source supply line 1105. The capacitor 1108 can be omitted.

The EL element 1106 includes an anode, a cathode, and an EL layer provided between the anode and the cathode. It should be noted that in the present invention, in the case where the anode is the pixel electrode and the cathode is the counter electrode, the source region or drain region of the power source control TFT 1109 is connected to the anode of the EL element 1106. Conversely, in the case where the EL element 1106 is an anode and a counter electrode and its cathode is a pixel electrode, the source region or the drain region of the power source control TFT 1109 is connected to the cathode of the EL element 1106. In addition, the opposite electrode of the EL element is always maintained at a predetermined electron potential.

It should be noted that either the n-channel type TFT or the p-channel type TFT may be used as the EL driver TFT 1104 and the power source control TFT 1109. However, in the case where the anode of the EL element 1106 is the pixel electrode and the cathode is the opposite electrode, it is preferable that each EL driving TFT 1104 and the power source control TFT 1109 are p-channel type TFTs. Furthermore, on the contrary, in the case where the anode of the EL element 1106 is the opposite electrode and the cathode is the pixel electrode, it is preferable that each EL driving TFT 1104 and the power source control TFT 1109 are n-channel TFTs. In FIG. 7B, the p-channel type TFT is used as the EL driving TFT 1104 and the power source control TFT 1109. The anode of the EL element 1106 is the pixel electrode, and the cathode is the counter electrode.

In the circuit diagram shown in FIG. 7B, the power source supply line 1105 is constructed in parallel with the gate signal line 1102. And the power source control line 1110 is constructed parallel to the source signal line 1103.

In addition, the LDD region may be provided on the active layer of the EL driving TFT 1104, and a region (referred to as the Lov region) may be formed in which the LDD region and the gate electrode overlap via the gate insulating film. When the EL driver TFT 1104 is either an n-channel type TFT or a p-channel type TFT, the Lov region is formed on the drain region side of the active layer. As a result, a capacitor can be further formed between the gate electrode of the EL driver TFT 1104 and the Lov region. The gate electrode of the EL driving TFT 1104 may be left.

It should be noted that in the circuit diagram shown in Figure 7B, it is not a switching type The TFT 1101, the EL driver TFT 1104 or the power source control TFT 1109 may be formed into a multi-gate structure (including a structure with an active layer connected in series with two or more channel formation regions). By forming a switching TFT 1101 into a multi-gate structure, the off current can be reduced. In addition, in the case where the EL driver TFT 1104 or the power source control TFT 1109 is formed into a multi-gate structure, the deterioration of the EL driver TFT or the power source control TFT by heating can be suppressed.

In FIG. 7B, when the power source supply line 1105 and the gate signal line 1102 are provided without overlapping each other, if they are formed in different layers, they can be provided via an insulating film overlapping. In this case, the pixel portion is more accurate, because the power source supply line 1105 and the gate signal line 1102 belong to a common mutually exclusive area.

In FIG. 7B, when the power source control line 1110 and the source signal line 1103 are provided without overlapping each other, if they are formed in different layers, they can be provided via an insulating film overlapping. In this case, the pixel portion is more accurate, because the power source control line 1110 and the source signal line 1103 belong to a common mutually exclusive area.

Next, FIG. 8 shows another example of a circuit diagram of a pixel according to the present invention. In FIG. 8A, the pixel 1200 and the pixel 1210 are provided adjacent to each other. In FIG. 8A, reference numerals 1201 and 1211 denote switching TFTs. It should be noted that in the present invention, either the n-channel type TFT or the p-channel type TFT may be used as the switching TFTs 1201 and 1211. In Figure 8A, the n-channel type The TFT is used in each of the switching TFT 1201 and the switching TFT 1211. The gate electrodes of the switching TFTs 1201 and 1211 are connected to a gate signal line 1202 as an input gate signal. One of the source area and the drain area of the switching TFT 1201 is connected to the source signal line 1203 as the input digital image signal, and the other is input to the EL driving TFT 1204 and the capacitor 1208. One of the source area and the drain area of the switching TFT 1211 is connected to the source signal line 1213 as the input digital image signal, and the other is input to the EL driving TFT 1214 and the capacitor 1218. In this embodiment, the capacitors 1208 and 1218 can be omitted.

Then, one of the source area and the drain area of the EL driver TFTs 1204 and 1214 is connected to the power source supply line 1220, and the other is connected to the source area or the drain area of the power source control TFTs 1209 and 1219. One of the other source regions or drain regions of the power source control TFTs 1209 and 1219 is connected to the EL elements 1205 and 1215, and the gate electrodes of the power source control TFTs 1209 and 1219 are connected to the power source control line 1207. And the capacitors 1208 and 1218 are connected to the power source supply line 1220. In this way, in this embodiment, two adjacent pixels share a power source supply line 1220. As a result, when compared with the structure shown in FIG. 7A, the number of power source supply lines can be reduced. When the ratio of the wiring to the entire pixel portion is small, the light shielding by the wiring can be suppressed in the wiring An example of the direction of light emission in the EL layer is provided.

Next, FIG. 8B shows another example of the circuit diagram of the pixel according to the present invention. In FIG. 8B, the pixel 1300 and the pixel 1310 are provided adjacent to each other. In FIG. 8B, reference numerals 1301 and 1311 denote switching TFTs. It should be noted that in the present invention, either the n-channel type TFT or the p-channel type TFT may be used as the switching TFT 1301 and 1311. In FIG. 8B, n-channel TFTs are used in each of the switching TFT 1301 and the switching TFT 1311. The gate electrodes of the switching TFTs 1301 and 1311 are connected to gate signal lines 1302 and 1312 as input gate signals. One of the source area and the drain area of the switch TFT 1301 is connected to the source signal line 1303 as the input digital image signal, and the other is input to the EL driving TFT 1304 and the capacitor 1308. One of the source area and the drain area of the switching TFT 1311 is connected to the source signal line 1303 as the input digital image signal, and the other is input to the EL driving TFT 1314 and the capacitor 1318. In this embodiment, the capacitors 1308 and 1318 can be omitted.

Then, one of the source and drain regions of the EL driver TFTs 1304 and 1314 is connected to the power source supply line 1320, and the other is connected to the source or drain regions of the power source control TFTs 1309 and 1319. One of the source regions or drain regions of the power source control TFTs 1309 and 1319 is connected to the EL elements 1305 and 1315, The gate electrodes of the power source control TFTs 1309 and 1319 are connected to the power source control line 1307. And the capacitors 1308 and 1318 are connected to the power source supply line 1320. In this way, in this embodiment, two adjacent pixels share a power source supply line 1320. As a result, when compared with the structure shown in FIG. 7B, the number of power source supply lines can be reduced. When the ratio of the wiring with respect to the entire pixel portion is small, the light shielding by the wiring can be suppressed in the case where the wiring is provided in the light emitting direction of the EL layer.

Next, FIG. 4A shows another example of the circuit diagram of the pixel according to the present invention. In FIG. 4A, the pixel 1400 and the pixel 1410 are provided adjacent to each other. In FIG. 4A, reference numerals 1401 and 1411 denote switching TFTs. It should be noted that in the present invention, either an n-channel type TFT or a p-channel type TFT may be used as the switching TFT 1401 and 1411. In FIG. 4A, n-channel TFTs are used in the switching TFTs 1401 and 1411. The gate electrodes of the switching TFTs 1401 and 1411 are connected to a gate signal line 1402 as an input gate signal. One of the source regions and drain regions of the switchable TFTs 1401 and 1411 is connected to the source signal lines 1403 and 1413 as input digital image signals, and the others are input to the EL driving TFTs 1404 and 1414, and the capacitors 1408 and 1418. In this embodiment, the capacitors 1408 and 1418 can be omitted.

Then, one of the source area and the drain area of the EL driver TFTs 1404 and 1414 is connected to the power source supply line 1407, and the others are connected to the source or drain regions of the power source control TFTs 1409 and 1419. The other source regions or drain regions of the power source control TFTs 1409 and 1419 are connected to the EL elements 1405 and 1415. The gate electrodes of the power source control TFTs 1409 and 1419 are connected to the power source control line 1420. And the capacitors 1408 and 1418 are connected to the power source supply line 1407. In this way, in this embodiment, two adjacent pixels share a power source supply line 1420. As a result, when compared with the structure shown in FIG. 7B, the number of power source supply lines can be reduced. When the ratio of the wiring with respect to the entire pixel portion is small, the light shielding by the wiring can be suppressed in the case where the wiring is provided in the light emitting direction of the EL layer.

In the circuit diagram shown in FIG. 4A, the power source control line 1420 is constructed parallel to the source signal lines 1403 and 1413. And the power source supply line 1407 is constructed in parallel with the gate signal line 1402.

Next, FIG. 4B shows another example of the circuit diagram of the pixel according to the present invention. In FIG. 4B, the pixel 1500 and the pixel 1510 are provided adjacent to each other. In FIG. 4B, reference numerals 1501 and 1511 denote switching TFTs. It should be noted that in the present invention, either an n-channel type TFT or a p-channel type TFT may be used as the switching TFT 1401 and 1411. In FIG. 4B, n-channel type TFTs are used as switching type TFTs 1501 and 1511. The gate electrodes of the switching TFTs 1501 and 1511 are connected to gate signal lines 1502 and 1512 as input gate signals. Switching One of the source regions and drain regions of the TFTs 1501 and 1511 is connected to the source signal line 1503 as the input digital image signal, and the others are input to the EL driving TFTs 1504 and 1514, and the capacitors 1508 and 1518. In this embodiment, the capacitors 1508 and 1518 can be omitted.

Then, one of the source area and the drain area of the EL driver TFTs 1504 and 1514 is connected to the power source supply line 1507, and the other is connected to the source area or the drain area of the power source control TFTs 1509 and 1519. The other source regions or drain regions of the power source control TFTs 1509 and 1519 are connected to the EL elements 1505 and 1515. The gate electrodes of the power source control TFTs 1509 and 1519 are connected to the power source control line 1520. And the capacitors 1508 and 1518 are connected to the power source supply line 1507. In this way, in this embodiment, two adjacent pixels share a power source supply line 1520. As a result, when compared with the structure shown in FIG. 7A, the number of power source supply lines can be reduced. When the ratio of the wiring with respect to the entire pixel portion is small, the light shielding by the wiring can be suppressed in the case where the wiring is provided in the light emitting direction of the EL layer.

Next, another example of the circuit diagram of the present invention is shown in FIG. 6A. In this embodiment, the two pixels shown in FIG. 4A and the aforementioned pixel in which the power source supply line is inverted are constructed to share the power source supply line. FIG. 6B can be constructed from two pixels and an inverted pixel on the power source control line to share the power source control line shown in FIG. 8B. TFT structure and The connection of each element is based on the description of FIG. 4A and FIG. 8B.

As shown in FIG. 6A, two adjacent pixels symbolizing a gate line share a power source control line 1600, and two adjacent pixels symbolizing a source line share a power source supply line 1610. As a result, compared with the structure shown in FIGS. 7A and 7B, the number of power source control lines and power source supply lines can be reduced. When the ratio of the wiring with respect to the entire pixel portion is small, the light shielding by the wiring can be suppressed in the case where the wiring is provided in the light emitting direction of the EL layer.

Another example of the circuit diagram of the present invention is shown in FIG. 6B. In this embodiment, the two pixels shown in FIG. 8A and the aforementioned pixel where the power source supply line is inverted are constructed to share the power source supply line. FIG. 6B can be constructed from two pixels and an inverted pixel on the power source control line to share the power source control line shown in FIG. 4B. The connection between the TFT structure and each element is based on the description of FIG. 8A or FIG. 4B.

As shown in FIG. 6B, two adjacent pixels symbolizing a gate line share a power source control line 1700, and two adjacent pixels symbolizing a source line share a power source supply line 1710. As a result, compared with the structure shown in FIGS. 7A and 7B, the number of power source control lines and power source supply lines can be reduced. When the ratio of the wiring with respect to the entire pixel portion is small, the light shielding by the wiring can be suppressed in the case where the wiring is provided in the light emitting direction of the EL layer.

It should be noted that in the circuit diagrams shown in FIGS. 8A, 8B, 4A, 4B, 6A, and 6B, the EL element includes an anode, a cathode, and an EL layer provided between the anode and the cathode, respectively. It should be noted that according to the present invention In the case where the anode is the pixel electrode and the cathode is the counter electrode, the source region or drain region of the power source control TFT is connected to the anode of the EL element. Conversely, in the case where the anode is the opposite electrode and the cathode is the pixel electrode, the source region or drain region of the power source control TFT is connected to the cathode of the EL element. Furthermore, the opposite electrode of the EL element is always maintained at a predetermined potential.

It should be noted that in the circuit diagrams shown in FIGS. 8A, 8B, 4A, 4B, 6A and 6B, either n-channel type TFT or p-channel type TFT may be used as EL driver TFT and power source control TFT. However, in the case where the anode of the EL element is the pixel electrode and the cathode thereof is the opposite electrode, it is preferable that each EL driving TFT and the power source control TFT are p-channel type TFTs. In addition, on the contrary, in the case where the anode of the EL element is the opposite electrode and the cathode is the pixel electrode, it is preferable that each EL driving TFT and the power source control TFT are n-channel TFTs. In FIGS. 8A, 8B, 4A, 4B, 6A, and 6B, p-channel TFTs are used as EL driving TFTs and power source control TFTs, so that the anode of the EL element is the pixel electrode and the cathode is the opposite electrode.

It should be noted that in the circuit diagrams shown in FIGS. 8A, 8B, 4A, 4B, 6A and 6B, the LDD region is provided on the active layer of the EL driver TFT, and a region (called Lov region) may be formed in which the LDD region and The gate electrode overlaps via the gate insulating film. When the EL driver TFT 1004 is either an n-channel type TFT or a p-channel type TFT, the Lov region is formed on the drain region side of the active layer, and the junction If the capacitor can be further formed between the gate electrode of the EL driving TFT and the Lov region, the gate electrode of the EL driving TFT can be retained.

It should be noted that in the circuit diagrams shown in FIGS. 8A, 8B, 4A, 4B, 6A and 6B, among one or more switching TFTs, the EL driving TFT and the power source control TFT may be formed into a multi-gate structure. By forming a switching TFT into a multi-gate structure, the closed current can be reduced. In addition, in the case where the EL driver TFT and the power source control TFT are formed into a multi-gate structure, the deterioration of the heated EL driver TFT or the power source control TFT can be suppressed.

It should be noted that in this embodiment, the resistance may be provided between the drain region or source region of the current control TFT and the EL element. By providing a resistor, the amount of current supplied from the power source control TFT to the EL element is controlled so that the influence of the characteristics of the power source control TFT and the EL driving TFT may be avoided. The resistance may be a resistance value that is sufficiently larger than the on-resistance of the power source control TFT and the EL driving TFT. Therefore, there is no limitation in the structure or the like. It should be noted that when the TFT is turned on, the on-resistance is a value obtained by dividing the drain area of the TFT by the drain current at that time. For example, the resistance value of the resistor may be selected in the range of 1kΩ to 50MΩ (preferably, 10kΩ to 10MΩ, and 50kΩ to 1MΩ is better). When a semiconductor layer with a high resistance value is used as a resistor, the molding is simple and preferable.

[Example 2]

In this embodiment, the pixel structure of the EL display of the present invention will be is described.

In this embodiment, the power source control TFT is arranged between the EL driving TFT and the power source supply line. An example of the circuit diagram of the pixel is shown in FIG. 20A.

In FIG. 20A, a switching TFT 1801 is provided in the pixel 1800. In the present invention, n-channel TFT and p-channel TFT may be used as the switching TFT 1801. In this embodiment, in FIG. 20A, an n-channel TFT is used as a switching TFT 1801.

The gate electrode of the switching TFT 1801 is connected to the gate signal line 1802 for inputting the gate signal. One of the source area and drain area of the switchable TFT 1801 is connected to the source signal line (also called the data signal line) 1803 input to the digital image signal, and the other is connected to the gate electrode and the capacitor 1808 of the EL driving TFT 1804 .

One of the source region and the drain region of the EL driving TFT 1804 is connected to the source region or the drain region of the power source control TFT 1809, and the other is connected to the EL element 1806. The other source regions or drain regions of the power source control TFT 1809 are connected to the power source supply line 1805, and the gate electrode of the power source control TFT 1809 is connected to the power source control line 1810. The capacitor 1808 is connected to the power source supply line 1805. Capacitor 1808 can be provided.

The EL element 1806 includes an anode, a cathode, and an EL layer provided between the anode and the cathode. It should be noted that in the present invention, the anode is the pixel electricity In the case where the electrode and the cathode are opposite electrodes, the source region or the drain region of the EL driving TFT 1804 is connected to the anode of the EL element 1806. Conversely, in the case where the anode is the opposite electrode and the cathode is the pixel electrode, the source region or the drain region of the EL driving TFT 1804 is connected to the cathode of the EL element 1806. In addition, the opposite electrode of the EL element is always maintained at a predetermined potential level.

Although n-channel TFT and p-channel TFT can be used as the EL driving TFT 1804 and the power source control TFT 1809, in the case where the anode of the EL element 1806 is the pixel electrode and the cathode is the counter electrode, the EL driving TFT 1804 and the power source The source control TFT 1809 is preferably a p-channel TFT. Conversely, in the case where the anode of the EL element 1806 is the opposite electrode and the cathode is the pixel electrode, the EL driving TFT 1804 and the power source control TFT 1809 are preferably n-channel TFTs. In FIG. 20A, the p-channel TFT is used as the EL driving TFT 1804 and the power source control TFT 1809, and the anode of the EL element 1806 is the pixel electrode and the cathode is the counter electrode.

The circuit diagram shown in FIG. 20A can also be represented in the same way as the circuit diagram shown in FIG. 7A (Embodiment 1). The power source control TFT 1009 arranged between the EL driving TFT 1004 and the EL element 1006 is removed, and the power source control The TFT is re-arranged between the EL driver TFT 1004 and the power source supply line 1005. In this case, the power source controls one of the TFTs One source area and drain area are connected to the power source supply line 1005, and the other are connected to the EL driving TFT 1004. In addition, the gate electrode is connected to the power source control line 1010.

Next, another example of the circuit diagram of the pixel of the present invention is shown in FIG. 20B. The circuit diagram shown in FIG. 20B can be represented by the circuit diagram shown in FIG. 7B (Embodiment 1). The power source control TFT 1109 disposed between the EL driver TFT 1104 and the EL element 1106 is removed, and the power source control TFT 1111 is reconfigured between the EL driver TFT 1104 and the power supply line 1105. It should be noted that one of the source area and the drain area of the power source control TFT is connected to the power source supply line 1105, and the other is connected to the EL driving TFT 1104. In addition, the gate electrode is connected to the power source control line 1110.

Like this, in this embodiment, the power source control TFT is arranged between the EL driving TFT and the power source supply line. In the case of any of the circuit diagrams of FIGS. 7A, 7B, 8A, 8B, 4A, 4B, 6A, and 6B in Embodiment 1, when the power source control TFT disposed between the EL driver TFT and the EL element is removed, and the power source control When the TFT is relocated between the EL driver TFT and the power source supply line, such a structure becomes reasonable. It should be noted that one of the source area and the drain area of the power source control TFT is connected to the power source supply line, and the other is connected to the EL driving TFT. The gate electrode is connected to the power source control line.

In this embodiment, the LDD region is provided on the active layer of the EL driver TFT, and a region (referred to as the Lov region) may be formed in which the LDD region and the gate electrode overlap via the gate insulating film. Even if the EL driver TFT 1004 is an n-channel type TFT or a p-channel type TFT, the Lov region is formed on the drain region side of the active layer, and the capacitor can be formed between the gate electrode of the EL driver TFT and the Lov region. The EL driver TFT The gate electrode can be retained.

Switching TFT, EL driver TFT, or power source control TFT may be made into a multi-gate structure (including a structure with two or more channel formation regions connected in series with each other). By making the switching TFT have a multi-gate structure, the closed current of the switching TFT can be reduced. In addition, if the EL driver TFT or the power source control TFT has a multi-gate structure, the deterioration of the EL driver TFT or the power source control TFT due to heat can be suppressed.

In the case to be noted, two parallel lines between the power source supply lines, the source signal line, the power source control line and the gate signal line, are adopted so that they do not overlap each other. However, if the two are wires formed in different layers, they may be provided through an insulating film so as to overlap each other. In this case, because the occupied area can be made common to the two lines provided overlapping each other, the pixel portion can be made smaller.

It should be noted that in this embodiment, the resistance may be provided between the drain region or source region of the EL driving TFT and the EL element. By providing resistance, it becomes possible to control the amount of current supplied from the EL driving TFT to the EL element and avoid the influence of the fluctuation of the characteristics of the power source control TFT and the EL driving TFT. The resistance may be sufficiently larger than the power source control The on-resistance element of TFT and EL driver TFT is made, and there is no limitation in the structure or the like. It should be noted that when the TFT is in the on state, the on-resistance means the value obtained by dividing the drain region of the TFT by the drain current at that time. The resistance value of the resistor may be selected in the range of 1kΩ to 50MΩ (preferably, 10kΩ to 10MΩ, and 50kΩ to 1MΩ is better). When a semiconductor layer with a high resistance value is used as a resistor, its molding is simple and preferable.

[Example 3]

An example of manufacturing an EL display using the present invention is explained in Embodiment 3.

9A is a top view of the EL display device using the present invention. Reference number 4010 is the substrate, reference number 4011 is the pixel part, reference number 4012 is the source signal side drive circuit, and reference number 4013 is the gate signal side drive circuit through which the drive circuit Connections 4014 to 4016, through FPC 4017, are connected to external equipment.

Covering material 6000, sealing material (also called cover material) 7000, and airtight sealing material (also called second sealing material) 7001 are formed to seal at least the pixel portion at this point, preferably the drive circuit and the pixel portion .

Further, FIG. 9B is a cross-sectional structure of the EL display device of the present invention. The driving circuit TFT 4022 (the CMOS circuit combining n-channel TFT and p-channel TFT is shown here), the pixel part TFT 4023 (only the EL driving TFT that controls current flows to The EL element is shown here) 4021 is formed on the base film of the substrate 4010. The TFT may be formed using a known structure (top gate structure or bottom gate structure).

After the driver circuit TFT 4022 and the pixel portion TFT 4023 are completed, the pixel electrode 4027 is formed on the inner insulating film (layer film) 4026 made of resin material. The pixel electrode 4027 is formed from a transparent conductive film that is electrically connected to the drain of the pixel TFT 4023. Indium oxide or tin oxide compound (called ITO) or indium oxide or zinc oxide compound can be used as a transparent conductive film. The insulating film 4028 is formed after the pixel electrode 4027 is formed, and the open portion is formed on the pixel electrode 4027.

Next, the EL layer is formed. The EL layer 4029 may be formed to have a laminated structure or a single structure, by freely combining known EL materials (such as a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer). Known techniques may be used to determine which structure will be used. Furthermore, there are EL materials such as low-molecular-weight materials and high-molecular-weight (polymer) materials. When using low molecular weight materials, evaporation is used, but when using high molecular weight materials, simple methods such as spin coating, printing, and inkjet printing are possible.

In this embodiment, the EL layer is formed by using a shadow mask. For pixels using shadow masks, it is possible to display the color of the light-emitting layers (red light-emitting layer, green light-emitting layer, and blue light-emitting layer) with different wavelengths of light-emitting capabilities. In addition, methods such as the method of combining the charge coupling layer (CCM) and the color filter, and the method of combining the white light-emitting layer and the color filter Law may also be used. Of course, the EL display device can also be made to emit monochromatic light.

After the EL layer 4029 is formed, a cathode 4030 is formed on the EL layer. It is best to remove any moisture or oxygen existing between the cathode 4030 and the EL layer 4029 as much as possible. Therefore, it is necessary to use a method of continuously depositing the EL layer 4029 and the cathode 4030 under vacuum, or forming the EL layer 4029 under a passive gas pressure without air exposure to form the cathode 4030. The above-mentioned membrane precipitation is performed by using a multi-chamber method (cluster tool method) membrane precipitation equipment in this embodiment.

It should be noted that the laminated structure of the LiF (lithium fluoride) film and the Al (aluminum) film is used as the cathode 4030 in this embodiment. In particular, 1 nm thick LiF (lithium fluoride) is formed by evaporation on the EL layer 4029, and a 300 nm thick aluminum film is formed on the LiF film. The MgAg electrode, known as the cathode material, is of course also used. The cathode 4030 is then connected to the wiring 4016 in the area indicated by the reference number 4031. The wire 4016 is a power source supply wire that provides a predetermined voltage to the cathode 4030, and is connected to the FPC 4017 through the conductive paste material 4032.

In order to electrically connect the cathode 4030 and the wiring 4016 in the area indicated by the reference number 4031, it is necessary to form a contact hole between the inner layer insulating film 4026 and the insulating film 4028. The contact holes may be formed at the time of etching the inner layer insulating film 4026 (when forming the contact holes of the pixel electrode) and the time of etching the insulating film 4028 (when the opening is formed before the EL layer is formed). Further, when the insulating film 4028 is etched, a The etching of the inner layer insulating film 4026 may be performed completely at any time. A good contact hole can be formed in this case, except that the inner insulating film 4026 and the insulating film 4028 are made of the same resin material.

The passivation film 6003, the filling material 6004, and the covering material 6000 are made to cover the surface of the EL element.

In addition, the sealing material 7000 is formed between the covering material 6000 and the base 4010 so as to surround the EL element part, and the sealed sealing material (second sealing material) 7001 is formed on the outside of the sealing material 7000.

The function of the filling material 6004 is to connect the covering material 6000 adhesive at this point. PVC (polyvinyl chloride), PVB (polyvinyl butyral), and EVA (ethyene vinyl acetate) can be used as the filling material 6004. If the desiccant is formed inside the filling material 6004, it can continuously maintain the moisture absorption effect, which is the best.

Further, spacers may be included in the filling material 6004. Spacers may be powdered substrates such as BaO, giving the spacers their own ability to absorb moisture.

When spacers are used, the passivation film 6003 can reduce the spacer pressure. Further, a film such as a resin film can be formed separately from the passivation film 6003 to reduce the gap pressure.

Furthermore, glass plate, aluminum plate, stainless steel plate, FPR (glass fiber reinforced plastic) plate, PVF (polyvinyl fluoride) film, Mild film, polymer film, and acrylic film are used as covering material 6000. To note The point is that if PVB or EVA is used as the filling material 6004, it is better to use a sheet of aluminum foil structure with a thickness of tens of μm sandwiched by PVF film or Mild film.

However, according to the light emission direction (light radiation direction) from the EL device, the covering material 6000 needs to have light transmission characteristics.

Furthermore, the wiring 4016 is electronically connected to the FPC 4017 through the gap between the sealed sealing material 7001 and the base 4010. It should be noted that although the explanation of the wiring 4016 has been completed here, the wiring 4014 and 4015 are similarly electrically connected to the FPC 4017 through the bottom and sealing material 7000 and the airtight sealing material 7001.

In the left figures 9A and 9B, the covering material 6000 is connected after the filling material 6004 is formed, and the sealing material 7000 is added to cover the side (exposed surface) of the filling material 6004, but the filling material 6004 may also add covering material 6000 and sealing Formed after material 7000. In this case, the filling material frequency injection open circuit is formed by the gap formed by the base 4010, the covering material 6000, and the sealing material 7000. The gap is set to a vacuum state (pressure equal to or less than 10-2Tower), and when the frequency injection open circuit is immersed in a box that retains the filling material, the atmospheric pressure outside of the gap is made higher than the atmospheric pressure in the gap, and the filling material fills the gap.

Next, an example of manufacturing an EL display device having a structure different from that of FIGS. 9A and 9B is explained using FIGS. 10A and 10B. With reference numbers like Figures 9A and 9B denote the parts of the same part, and therefore the solutions of those parts Explanation was omitted.

FIG. 10A is a top view of the EL display device of this embodiment, and FIG. 10B shows a cross-sectional view of FIG. 10A cut along the line AA'.

According to FIGS. 9A and 9B, manufacturing is performed through the step of forming a passivation film 6003 covering the EL element.

In addition, the filling material 6004 is formed so as to cover the EL element. Filling material 6004 also functions as an adhesive of 6000 covering material. PVC (polyvinyl chloride), epoxy resin, silicon resin, PVB (polyvinyl butyral), and EVA (vinyl acetate) can be used as filling material 6004. If the desiccant is provided inside the filling material 6004, it can continuously maintain the moisture absorption effect, which is the best.

Further, spacers may be included in the filling material 6004. Spacers may be powdered substrates such as BaO, giving the spacers their own ability to absorb moisture.

Furthermore, glass plate, aluminum plate, stainless steel plate, FPR (glass fiber reinforced plastic) plate, PVF (polyvinyl fluoride) film, Mild film, polymer film, and acrylic film are used as covering material 6000. It should be noted that if PVB or EVA is used as the filling material 6004, it is best to use a sheet of aluminum foil structure with tens of μm sandwiched by PVF film or Mild film.

However, according to the light emission direction (light radiation direction) from the EL device, the covering material 6000 needs to have light transmission characteristics.

After the tower is connected with the covering material 6000 of the filling material 6004, the frame material 6001 is added to cover the side (exposed surface) of the filling material 6004. The frame material 6001 is connected by a sealing material (whose function is like an adhesive) 6002 tower. At this point, it is best to use phototherapy resin as the sealing material 6002, but in addition to the thermal resistance characteristics of the EL layer, thermotherapy resin may also be used. It should be noted that it is best that the sealing material 6002 is a material that does not transmit moisture and oxygen as much as possible. Further, a desiccant may also be added to the inner part of the sealing material 6002.

The wiring 4016 is electronically connected to the FPC 4017 through the gap between the sealing material 6002 and the substrate 4010. It should be noted that although the wiring 4016 has been explained here, the wiring 4014 and 4015 are similarly electrically connected to the FPC 4017 through the bottom of the sealing material 6002.

It should be noted that the covering material 6000 is connected to the tower, and the frame material 6001 is added to cover the side (exposed surface) of the filling material 6004. After the filling material 6004 of Figures 10A and 10B is formed, the filling material 6004 may also be added It is formed after covering material 6000 and frame material 6001. In this case, the filling material frequency injection open circuit is formed by the gap formed by the base 4010, the covering material 6000, and the frame material 6001. The gap is set to a vacuum state (pressure equal to or less than 10-2 Tower), and when the frequency injection open circuit is immersed in a box that retains the filling material, the atmospheric pressure outside of the gap is made higher than the inside of the gap. Atmospheric pressure, and the filling material fills the gap.

[Example 4]

A more detailed cross-sectional structure of the pixel portion is shown in FIG. 11 here. The switching TFT 3502 formed on the substrate 3501 is manufactured using a known method. The double gate structure is used in this embodiment. It should be noted that although a double-gate structure is used in this embodiment, a single-gate structure, a triple-gate structure, and a multi-gate structure with a larger number of gates may also be used.

Each EL driving TFT 3503 and power source control TFT 3504 are n-channel TFTs and are manufactured using known methods. The drain wire 35 of the switching TFT 3502 is electrically connected to the gate electrode 37b of the EL driver TFT by a wire 36. The source wiring 40b of the EL driving TFT 3503 is connected to the drain wiring 40a of the power source control TFT. Further, the wiring indicated by reference numeral 38 is a gate signal that electrically connects the gate electrodes 39a and 39b of the switching TFT 3502. Furthermore, the drain wiring 34 of the EL driver TFT 3503 is connected to the power source supply line (not shown in the figure), and always uses a certain voltage. The gate electrode 37a of the power control TFT 3504 is connected to the power source control line (not shown in the figure).

In this embodiment, the structure is that the source wiring of the power source control TFT is connected to the cathode of the EL element, and the drain wiring is connected to the source wiring of the EL driving TFT, and the drain wiring of the EL driving TFT is connected to the power source Supply line. The structure can also be EL driver TFT The source wire of is connected to the cathode of the EL element, the drain wire is connected to the source wire of the power source control TFT, and the drain wire of the power source control TFT is connected to the power source supply wire. Therefore, it is possible to perform the structure combination with Embodiment 2.

The single-gate structure of the EL driver TFT 3503 and the current control TFT 3504 are shown in this embodiment, but a multi-gate structure in which multiple TFTs are connected in series may also be used. In addition, the structure of multiple TFTs in parallel is effectively divided into multiple channel formation regions, and it can perform high-efficiency heat radiation, which may also be used. This structure is effective in reducing the deterioration due to heat.

The first passivation film 41 is formed on the switching TFT 3502, the EL driving TFT 3503, and the power source control TFT 3504, and the leveling film 42 is formed on top of the insulating resin film. The step of leveling the TFT due to the use of the leveling film 42 is extremely important. The EL layer formed later is extremely thin, so there are cases of poor light emission caused by this step. Therefore, to form the EL layer with the surface as level as possible, it is better to perform leveling before forming the pixel electrode.

Furthermore, the reference number 43 denotes a pixel electrode (the cathode of the EL element) made of a highly reflective conductive film, and is electrically connected to the drain region of the power source control TFT 3504. It is preferable to use a low-resistance conductive film, such as an aluminum alloy film, a copper alloy film, a silver alloy film, or a laminate of such films. Of course, another laminated structure of conductive film may also be used.

In addition, the light-emitting layer 45 has grooves (equivalent to pixels) formed by banks 44a and 44b formed by insulating films (preferably resin) form. It should be noted that only one pixel is shown in this figure, but the light-emitting layer may be formed and divided into corresponding colors R (red), G (green), and B (blue). The π-conjugated polymer material is used as the organic EL material. Polytristyrene (PPV), polymerized vinyl carbon (PVK), or polyfluoranes can be designated as typical polymer materials.

It should be noted that there are several PPV organic EL materials, and, for example, recorded in Shenk, H., Becker, H., Gelsen, O., Kluge, E., Kreuder, W., and Spreitzer, H. as luminescence Diode Polymer", Euro Display Bulletin, 1999, pp. 33-37, and the material in Japanese Patent No. Hei 10-92576 may be used.

As a specific light-emitting layer, cyanopolystyrene may be used as a red light-emitting layer, polystyrene may be used as a green light-emitting layer, and polystyrene or polyalkylphenylene may be used as a blue light-emitting layer. The film thickness may be 30 and 150 nm (40 and 100 nm is best).

However, the above example is an example of an organic EL material that can be used as a light-emitting layer, and it is not limited to these materials. The EL layer (as a layer for emitting light and as a layer for performing such carrier movement) is also freely formed by a combination of a light emitting layer, an electron charging transport layer, and an electron charging injection layer.

For example, this embodiment shows an example of using polymeric materials as the light-emitting layer, but low molecular weight organic EL materials may also be used. Furthermore, it is possible to use inorganic materials such as silicon-carbon compounds as the electron charging transport layer or the electron charging frequency injection layer. Known materials can be used as these organic EL materials or inorganic materials.

From PEDOT (polythiophene) or The EL layer of the laminated structure of the hole injection layer 46 made of PAni (polyaniline) is formed on the light-emitting layer 45 and is used in this embodiment. The anode 47 is then formed on the hole injection layer 46 of the self-permeable conductive film. The light generated by the light-emitting layer 45 is emitted to the upper surface (toward the top of the TFT) in this embodiment, and therefore the anode must be transparent to emit light. A compound of indium oxide and tin oxide, or a compound of indium oxide and zinc oxide may be used as the permeable conductive film. However, because it is formed after the formation of the low thermal impedance luminescence and hole injection layer, it is best to use a material that can be deposited as low as possible.

The EL element 3505 is completed at the point where the anode 47 is formed. It should be noted that the so-called EL element 3505 is formed by the pixel electrode (cathode) 43, the light emitting layer 45, the hole injection layer 46, and the cathode 47 here. The pixel electrode 43 is almost equal to the pixel in area, and therefore the entire pixel functions like an EL device. Therefore, the luminous coefficient is extremely high, and bright image display becomes possible.

In addition, the second passivation film 48 is subsequently formed on the anode 47 in this embodiment. It is preferable to use a silicon nitride film or a silicon oxynitride film as the second passivation film 48. The purpose is to separate the EL element from the outside, and to avoid deterioration due to oxidation of the organic EL material, and it is meaningful to control the gas emitted from the organic EL material. The reliability of EL displays can therefore be improved.

The EL display of the present invention has a pixel portion made of pixels with the structure of FIG. 11, and a switching type TFT with a relatively low off current value, and the EL driving TFT is strong with respect to hot carrier frequency injection. An EL display with high reliability, its good image display is possible and can be obtained.

It is to be noted that it is possible to manufacture the configuration of this embodiment by freely combining the configurations of any of Embodiments 1 to 3.

[Example 5]

In this embodiment, the structure of the pixel portion shown in Embodiment 4 will be described, and the structure of the EL element 3505 is reversed. Figure 12 is used as a description. It should be noted that the difference from the structure of FIG. 11 (Embodiment 4) is only the EL element parts, the EL driving TFT and the power source control TFT, and the description of the other parts is omitted.

In FIG. 12, the EL driving TFT 3503 and the power source control TFT 3504 are p-channel TFTs and can be formed by well-known methods. It should be noted that in this embodiment, although the source wiring of the power source control TFT is connected to the anode of the EL element, the structure in which the drain wiring of the EL driving TFT is connected to the power source supply line is adopted, and the EL driving TFT A structure in which the source wire of is connected to the anode of the EL element, the drain wire is connected to the source wire of the power source control TFT, and the drain wire of the power source control TFT is connected to the power source supply line may be adopted. That is, this embodiment can be combined with the structure of Embodiment 2 to realize the present invention.

In this embodiment, a transparent conductive film is used as the pixel electrode (anode) 50. In particular, a conductive film made of a compound of indium oxide or zinc oxide is used. Of course, a conductive film made of a compound of indium oxide or tin oxide may be used.

Then, after forming the contact banks 51a and 51b from the insulating film, it emits light The layer 52 is formed of a solvent coating from carbazole. The electron beam injection layer 53 is formed from potassium acetylacetoneate (represented by acacK) on the light-emitting layer and the cathode 54 is formed from aluminum alloy. In this case, the cathode 54 also functions as a passivation film. The EL element 3701 is thus formed.

The light generated by the light-emitting layer 52 is directed toward the substrate forming the TFT in Example 5, as shown by the arrow.

It is to be noted that it is possible to manufacture the configuration of Embodiment 5 by freely combining any of the configurations of Embodiments 1 to 3.

[Example 6]

In this embodiment, an example of manufacturing an EL display using the present invention will be described in FIGS. 24A and 24B. Fig. 24A is a top view showing a state where the sealing of the EL element has been achieved on the active matrix substrate forming the EL element. Reference number 801, the part represented by the dotted line, represents the source side driving circuit; 802, the gate side driving circuit; and 803, the pixel part. In addition, reference numeral 804 denotes a housing member; 805, a first sealing member; and 806, a second sealing member. The filler 807 (see FIG. 24B) is provided between the housing member surrounded by the inner side of the first sealing member 805 and the active matrix substrate.

Reference number 808 indicates the connection wiring of the signal input to the source side driving circuit 801, the gate side driving circuit 802, and the pixel portion 803 as a transmission input, and the FPC (soft printed circuit) that receives the image signal and becomes the connection terminal to the external command. ) The clock signal of 809.

Here, FIG. 24B is a cross-sectional view corresponding to the section along AA' of FIG. 24A. The same parts in FIGS. 24A and 24B are denoted by the same symbols.

As shown in FIG. 24B, the pixel portion 803 and the source side driving circuit 801 are formed on the substrate 800. The pixel portion 803 is composed of a plurality of TFTs (not shown) (hereinafter referred to as EL driving TFTs) that control the current flowing through the EL element as TFTs (hereinafter referred to as power source control TFTs) 851 for controlling the EL driving voltage, which are electronically connected The pixel portion 852 up to its drain area has a similar composition. In this embodiment, the power source control TFT 851 is a p-channel TFT. The source side driving circuit 801 is formed of a CMOS circuit using a complementary combination of an n-channel TFT 853 and a p-channel TFT 854.

In this embodiment, although the drain wiring of the power source control TFT is connected to the pixel electrode of the EL element and the source wiring is connected to the drain wiring of the EL driving TFT, a structure is adopted, the drain wiring of the EL driving TFT is adopted. A structure in which the pixel electrode of the EL element is connected, and the source wiring is connected to the drain wiring of the power source control TFT may be adopted. This is equivalent to the case of the combined structure of Embodiment 1.

Each pixel includes a color filter (R) 855, a color filter (G) 856, and a color filter (B) (not shown) under the pixel electrode. Here, the color filter (R) is a filter that captures red light, the color filter (G) is a filter that captures green light, and the color filter (B) is One as a filter for capturing blue light. It should be noted that the color filter (R) 855 is provided as a pixel that emits red light, and the color filter The lighter (G) 856 is provided as a pixel that emits green light, and the color filter (B) is provided as a pixel that emits blue light.

As the effect of the case where these filters are provided, first of all, it is pointed out that it is possible to improve the color purity of the luminous color. For example, in a pixel that emits red light, red light is emitted from the EL element (in this embodiment, it is emitted to the side of the pixel electrode), and when this red light is made to pass through the color filter that captures the red light The purity of the red light can be improved. This is the same as the case of green light and blue light.

In the conventional structure that does not use a color filter, a problem may occur that the light emitting layer of the EL element is excited from the outside of the EL display device, so that the visible light of the desired color may not be obtained. However, as in this embodiment by providing a color filter, only specific wavelength light enters the EL element. That is, it is possible to avoid the disadvantage that the EL element is excited by light from the outside.

Although a structure to provide a color filter has been conventionally proposed, an EL element that emits white light has been used. In this case, other wavelengths of light have been cut off to capture red light, and the brightness has been reduced. However, in this embodiment, for example, the red light emitted from the EL element is made to pass through a color filter that captures the red light so as not to cause a decrease in brightness.

Next, the pixel electrode 852 is composed of a transparent conductive film, which functions as the anode of the EL element. Insulating films 857 are formed on both ends of the pixel electrode 852, and further, a light emitting layer 858 emitting red light and a light emitting layer 859 emitting green light are provided on adjacent pixels, and the color display is equivalent to red, green, and blue. Pixel made. Of course, the color filter for capturing blue is provided as the pixel of the light emitting layer that provides blue light.

Not only organic materials but also inorganic materials can be used as EL materials. In addition, a laminated structure including an electron injection layer, an electron transport layer, a hole transport layer or a hole injection layer, in addition to the light-emitting layer, may be used.

On the individual light-emitting layer, the cathode 860 of the EL element is composed of a conductive film with light-shielding properties. The cathode 860 is common to all pixels and is electrically connected to the FPC 809 through the connection wire 808.

Next, the sealing member 805 is formed by a distributor or the like, and spaces (not shown) are spread to connect the housing member 804 to the tower. The filter 807 is filled in the area surrounded by the active matrix substrate, the housing member 804, and the first sealing member 805 by the vacuum frequency injection method.

In this embodiment, barium oxide used as the moisture-absorbing material 861 is previously added to the filler 807. Although a moisture-absorbing material is added to the filler and used in this embodiment, it is possible to seal the moisture-absorbing material in groups by dispersing and sealing the moisture-absorbing material in the filter. Although not shown, it is possible to use hygroscopic materials as spacer materials.

Next, the filler 807 is irradiated with ultraviolet rays or heated to harden, and the open portion (not shown) formed in the first sealing member 805 is closed. When the open circuit part (not shown) of the first sealing member 805 is closed, the connecting wire 808 and the FPC 809 are electrically connected to each other by using a conductive material 862. Further, the second sealing material 806 is provided to cover the exposed part of the first sealing member 805 and the part of the FPC 809. The second sealing material 806 may be made of the same material as the first sealing member 805.

Seal the EL element of the filler 807 using the above method, The EL element can be completely closed from the outside, and it is possible to prevent materials that cause the oxidation of organic materials, such as moisture or oxygen outside, to enter. Therefore, it is possible to manufacture an EL display device with high reliability.

It is to be noted that the structure of this embodiment can be freely combined with any of the structures of Embodiments 1 to 3.

[Example 7]

In this embodiment, an example of the case of the EL display device shown in Embodiment 6 will be described, in which the emission direction of light emitted from the EL element and the construction of the color filter are changed. Although FIG. 25 is used as a description, because the basic structure is the same as that of FIG. 24B, new symbols are added to the modified part and will be described.

In this embodiment, the n-channel TFT is used as the power source control TFT 902 and the EL driving TFT (not shown) in the pixel portion 901. In addition, the pixel electrode is electronically connected to the drain of the power source control TFT 902, and the pixel electrode 903 is formed of a conductive film with light-shielding properties. In this embodiment, the pixel electrode 903 becomes the cathode of the EL element.

The transparent conductive film 904 common to each pixel is formed on the light-emitting layer 858 that emits red light and the light-emitting layer 859 that emits green light. This permeable conductive film 904 becomes the anode of the EL element.

This embodiment is characterized in that a filter (R) 905, a filter (G) 906, and a filter (B) (not shown) are formed in the housing member 804. The case where the structure of the EL element of this embodiment is adopted Since the light emission direction of the self-luminous layer is guided to the side of the housing member, if the structure of FIG. 25 is adopted, the color filter can be arranged in the light path.

When the filter (R) 905, the filter (G) 906, and the filter (B) (not shown) are formed on the housing member 804, the steps of the active matrix substrate can be reduced, and the yield and production capacity can be achieved The advantages of being improved.

It is to be noted that the structure of this embodiment can be freely combined with any of the structures of Embodiments 1 to 3.

[Example 8]

The material used for the EL layer of the EL element of the EL display of the present invention is not limited to organic EL materials, and the present invention can be made using inorganic EL materials. However, this inorganic EL material has a very high driving voltage, so TFTs with voltage resistance characteristics such as those capable of resisting such high voltages must be used.

On the other hand, if inorganic EL materials with low driving voltage are developed in the future, it is possible to apply such materials to the present invention.

Furthermore, it is possible to freely combine the configuration of this embodiment with any of the configurations of Embodiments 1 to 7.

[Example 9]

In the present invention, the organic material used as the EL layer may be a low-molecular-weight organic material or a polymerized (high-molecular) organic material. The known concentration is in Alq3(tris-8-quinolilite-aluminum), TPD (triphenylamine derivative Materials) or similar materials are regarded as low-molecular organic materials. π-cooperative polymeric materials can be designated as polymeric organic materials. Typically, PPV (Poly Tristyrene), PVK (Poly Vinyl Carbon), Polymeric Carbon or the like can be specified.

Polymeric (polymer) organic materials can be formed by simple film forming methods such as spin coating method (also called solvent application method), immersion method, dispersion method, printing method, inkjet method or the like. Polymeric organic materials have low molecular weight organic materials with high heat resistance.

Furthermore, in the case where the EL element incorporated in the EL display according to the present invention has an electron transport layer and a hole transport layer in the EL layer, the electron transport layer and the hole transport layer may be made of inorganic materials such as, for example, non- Crystalline Si or Amorphous Si1-xCxOr similar formation of amorphous semiconductors.

In the amorphous semiconductor, a large number of trap levels are present, and at the same time, the amorphous semiconductor forms a large number of interface planes at the interface where the amorphous semiconductor contacts other layers. As a result, the EL element can emit light at a low voltage, and at the same time, an attempt can be made to provide a high lamination.

In addition, dopants (impurities) are added to the organic EL layer, and the color of light emission of the organic EL layer may be changed. These adulterants include DCM1, Nile Red, lubren, coumarin 6, TPB and quinaquelidon.

[Example 10]

In this embodiment, FIGS. 13A to 16C show the simultaneous manufacturing of images The switching type TFT of the pixel part, the description of the method of forming the EL driving TFT and the driving circuit part TFT in the surrounding part of the power source control TFT and the pixel part. Regarding the drive circuit, the CMOS circuit is shown in the figure and is described as a section.

First, a base film (not shown) arranged on the surface of the substrate 501 is prepared as shown in FIG. 13A. In this embodiment, a silicon oxynitride film with a thickness of 100 nm and another silicon oxynitride film with a thickness of 200 nm are laminated and used as a base film on the crystal glass. At this time, it is preferable that the nitrogen concentration of the film contacting the crystallized glass substrate is maintained at 10-25 wt%. It is possible to form the element directly on the quartz substrate without any base film.

Therefore, the amorphous silicon film 502 with a thickness of 45 nm is formed on the substrate 501 by a well-known film forming method. There is no need to limit it to an amorphous silicon film. Alternatively, semiconductor films (including microcrystalline semiconductor films) having an amorphous structure may be used in this embodiment. The compound semiconductor film has an amorphous structure, such as an amorphous silicon germanium film, which can also be used here.

The steps from this to FIG. 13C can be understood from the field of the present invention self-citing Japanese Laid-open Patent No. 10-247735. This publication discloses the technology of the method of using elements such as nickel as a catalyst for crystalline semiconductor films.

First, a protective film 504 with open circuits 53a and 53b is formed. A silicon oxide film of 150 nm is used in this embodiment. The layer 505 containing nickel (Ni) (nickel-containing layer) is formed on the protective film 504 by a spin coating method. Regarding the formation of the nickel-containing layer, the above publications can be used as a reference.

After that, as shown in Figure 13B, the temperature was kept at 570°C for 14 hours. The heat treatment is performed in a passivation gas, and the amorphous silicon film 502 is crystallized. At this time, the crystallization process is substantially parallel to the substrate, starting from areas 506a and 506b (hereinafter referred to as nickel addition areas) that are in contact with nickel. As a result, a polymer film 507 where the rod crystals aggregate and form a line is formed.

After that, as shown in FIG. 13C, when the leveling protective film 504 is used as a mask, an element belonging to the 15 group (preferably phosphorus) is added to the nickel addition regions 506a and 506b. Phosphorus is added at a high concentration to the regions 508a and 508b (hereinafter referred to as phosphorus addition regions) and thus are formed.

After that, heat treatment at 600°C for 12 hours is performed in a passivated gas as shown in FIG. 13C. The nickel stored in the polysilicon film 507 is removed by the heat treatment, and almost all of them are finally captured by the phosphorus addition regions 508a and 508b indicated by the arrows. It is believed that this is a phenomenon caused by the gettering effect of a getter containing phosphorus metal elements.

By this process, the concentration of nickel remaining in the polysilicon film 509 by SIMS (mass secondary ion analysis) based on the measured value is reduced by at least 2x1017atoms/cm3. Although nickel is a life cycle killer for semiconductors, when it is reduced to this level, it has no adverse effect on TFT characteristics. In addition, because this concentration in the current state of the art is the measurement limit of SIMS analysis, in fact it will show a lower concentration (less than 2x1017atoms/cm3)。

The polysilicon film 509 can therefore be obtained by crystallization of the catalyst and reduced to the extent that the catalyst hinders the operation of the TFT. After that, the active layers 510-513 using the polysilicon film 509 are formed only by pattern processing. At this time, the mark that guides the mask adjustment in the next pattern is changed from using the above-mentioned multiple A silicon film (Figure 13sD) is formed.

After that, a silicon oxynitride film with a thickness of 50 nm is formed by the plasma CVD method as shown in FIG. 13E, the heating treatment is performed at 950° C. for 1 hour and then in an oxidizing gas, and the thermal oxidation treatment is performed. The oxidizing gas can be oxygen or another oxygen with halogen added.

In this thermal oxidation process, the oxidation progress of the interface between the active layer and the silicon oxynitride film, and the polysilicon film with a thickness of about 15 nm is oxidized, so that a silicon oxide film with a thickness of about 30 nm is formed. That is, a silicon oxide film with a thickness of 30 nm and a silicon nitride film with a thickness of 50 nm are laminated to form a gate insulating film 514 with a thickness of 80 nm. The film thickness of the active layers 510-513 is made 30 nm by thermal oxidation treatment.

Then, as shown in FIG. 14A, resistance masks 515a and 515b are formed, and p-type impurity elements (hereinafter, denoted as p-type impurity elements) through the gate insulating film 514 are added as p-type impurities element. Representative elements belonging to group 13 elements, represented by boron or gallium, may be used. This step (called the channel doping step) is a process of controlling the threshold voltage of the TFT.

In this embodiment, the boron is excited by plasma to hexahydrodiboride (B2H6) The ion doping method is added. Of course, the ion transfer method that performs mass separation can be used. According to this process, including 1x1015-1x1018atoms/cm3(As 5x1016-5x1017atoms/cm3Representative) boron impurity regions 516 and 517 are formed.

After that, the impedance masks 519a and 519b are shown in FIG. 14B An impurity element that is formed and imparted to an n-type through the gate insulating film 514 (hereinafter, referred to as an n-type impurity element) is added as an n-type impurity element. Representative elements belonging to group 15 elements, represented by phosphorus or arsenic, may be used. In this embodiment, the plasma excitation is performed without mass separation of phosphorus hydride (PH3) The ion doping method is used. Phosphorus 1x1018atoms/cm3The concentration is added. Of course, the ion transfer method that performs mass separation can be used.

Adjust the amount of doping so that it is treated as 2x1016-5x1019atoms/cm3(As 5x1017-5x1018atoms/cm3The n-type impurity element 520 formed at a concentration of representative) includes an n-type impurity element.

After that, processing is performed as activating the added n-type impurity element and the added p-type impurity element as shown in FIG. 14C. There is no need to limit the activation mechanism, but since the gate insulating film 514 is doped, it can be expected to use the furnace method of an electronic hot melting furnace. In addition, it is better to perform the heat treatment at as high a temperature as possible because there is a possibility of damaging the interface between the gate insulating film and the active layer in the portion of the channel formation region of the process of FIG. 14A.

Since crystallized glass with high thermal resistance is used in this embodiment, the activation treatment is performed by furnace treatment at 800°C for 1 hour. Thermal oxidation may be performed to maintain the processing gas pressure in an oxidizing gas, or the heat treatment may be performed in a passivation gas.

This process clarifies the edge of the n- type impurity element 520, and the boundary between the n- type impurity element 520 and the region (the p-type impurity element formed by the process of FIG. 14A) surrounds the n-type impurity element without adding the n-type impurity element. Type impurity element 520. This means that when the TFT is completed later, the LDD region and the channel formation region can form an optimal junction.

After that, a 200-400nm thick conductive film is formed, and the pattern is performed, so that the gate electrodes 522-525 are formed. The length of each TFT channel is determined by the line width of those gate electrodes 522-525.

The gate electrode may be composed of a single-layer conductive film, however, it is preferable to use a laminated film such as a two-layer or three-layer film when necessary. A known conductive film can be used as the material of the gate electrode. Especially, the film that can be used is made of conductive titanium (Ta), antimony (Ti), manganese (Mo), tungsten (W), chromium (Cr), and silicon (Si); Nitride film (represented by titanium nitride film, tungsten nitride film, or antimony nitride film); alloy film of a combination of the foregoing elements (represented by tungsten-manganese alloy or titanium-manganese alloy); or, of the foregoing elements A film made of elements of the group consisting of silicide (represented by tungsten silicide film or titanium silicide film). Of course, they can have a single layer structure or a laminated layer structure.

In this embodiment, a laminated film made of 50nm thick tungsten nitride (WN) and 350nm thick tungsten (W) film is used. This can be formed by the sputtering method. By adding blunt gas, such as argon or neon, as a splashing gas, the film can be prevented from falling off due to pressure.

At this time, the gate electrode 523 is formed to overlap the portion of the n-type impurity region with the gate insulating film 514 therebetween, respectively. The overlapping part is later made to overlap the LDD area of the gate electrode. According to the cross-sectional view of the figure, the gate electrodes 524a and 524b are considered to be separated. In fact, they Are electronically connected to each other. Further, the gate electrodes 522 and 524 are considered to be separated, in fact, they are electrically connected to each other.

After that, since the gate electrodes 522-525 are used as masks, the n-type impurity element (phosphorus in this embodiment) is added in a self-tuning manner, as shown in FIG. 15A. At this time, calibration is performed so that phosphorus is added to the impurity regions 526-533 formed as such at a concentration of 1/2-1/10 (represented by 1/3-1/4) of the n-type impurity region 520. . Actually, the concentration is 1x1016-5x1018atoms/cm3(In 3x1017-3x1018atoms/cm3to represent).

Then, as shown in FIG. 15B, impedance masks 534a-534b are formed to cover the gate electrodes, and n-type impurity elements (phosphorus in this embodiment) are then added, and include high-concentration phosphorus impurity regions 535-539 Was formed. Use Phosphorus Hydrogen (PH3The ion doping method of) is also applied here, and the calibration is performed so that the concentration of phosphorus in these areas is 1x1020-1x1021atoms/cm3(As 2x1020-5x1020atoms/cm3to represent).

The source region or the drain region of the n-channel TFT is formed through this process, and the switching TFT leaves a part of the n-type impurity regions 528-531 formed in the process of FIG. 15A. The remaining part reaches the LDD area of the switching TFT.

After that, as shown in FIG. 15C, the impedance masks 534a-534b are removed, and the impedance mask 542 is newly formed. The p-type impurity element (boron in this example) is then added, including a high concentration of boron The impurity regions 540, 541, 543a, 543b, 544a and 544b are formed. Here, according to the use of hexahydroboride (B2H6) Ion doping method, boron is added to obtain 3x1020-3X1021atoms/cm3(As 5x1020-1x1021atoms/cm3to represent).

Phosphorus is already 1x1020-1x1021atoms/cm3The concentration of is added to the impurity regions 540, 541, 543a, 543b, 544a, and 544b. The boron added here has a concentration at least three times as high as the phosphorus added. Therefore, the n-type impurity region formed in advance is completely changed into a p-type impurity region, and functions as a p-type impurity region.

After that, as shown in FIG. 15D, the impedance mask 542 is removed, and then the first inner layer insulating film 546 is formed. The insulating film including silicon in the form of a single-layer structure or a stacked-layer structure is used as the first inner-layer insulating film 546 as a combination thereof. Preferably, the film thickness is 400nm-1.5μm. In this embodiment, an 800nm thick silicon oxide film is stacked on a 200nm thick silicon oxynitride film to build a structure.

After that, the n-type or p-type impurity elements added at various concentrations are activated. The furnace method is expected to be used as an activation mechanism. In this embodiment, the heat treatment is performed at 550°C for 4 hours in an electronic furnace in nitrogen.

The heat treatment is further performed at 300-450°C for 1-12 hours in an atmosphere including 3-100% hydrogen as hydrogenation. The hydrogen-terminated unpaired bond of this pair of semiconductors is a process of hydrogen-terminated unpaired bond which is excited by heat. Plasma hydrogenation (using electricity (Pulp-excited hydrogen) can be implemented as another mechanism for hydrogenation.

The hydrogenation may be performed during the molding of the first inner layer insulating film 546. In more detail, a 200nm thick silicon oxynitride film is formed, and hydrogenation is performed as described above, so the remaining 800nm thick silicon oxynitride film can be formed.

After that, as shown in FIG. 16A, contact holes are formed in the first inner insulating film 546, and source lines 547-550 and drain lines 551-553 are formed. In this embodiment, the electrode is formed with a 100nm thick antimony film, a 300nm thick aluminum film including antimony, and a 150nm thick antimony film successively formed by a three-layer laminated film according to the sputtering method. Of course, other conductive films can be used.

After that, a first passivation film 554 with a thickness of 50-500 nm (represented by a thickness of 200-300 nm) is formed. In this embodiment, a 300 nm thick silicon oxynitride film is used as the first inner layer insulating film 554. Silicon nitride film can replace this.

At this time, before the formation of the silicon oxynitride film, hydrogen is used, such as H2Or NH3The plasma treatment of the gas is effective. The hydrogen excited by the pre-processing is supplied to the first inner layer insulating film 546, and through the heat treatment, the film quality of the first passivation film 554 is improved. At the same time, since the hydrogen added to the first inner layer insulating film 546 diffuses on the lower side, the active layer can be effectively hydrogenated.

After that, as shown in FIG. 16B, a second inner layer insulating film 555 made of organic resin is formed. Polythioimide, acrylic fiber, or BCB (cyclophenylbutene) can be used as the organic resin. Especially because the second inner layer The insulating film 555 needs to flatten the position difference formed by the TFT, and an acrylic film with the best smoothness is expected. The acrylic film was formed to 2.5 μm in this embodiment.

After that, contact holes touching the drain wiring 553 are formed in the second inner layer insulating film 555 and the first passivation film 554, and then the pixel electrode (anode) 556 is formed. In this embodiment, the indium tin oxide film (ITO) is formed to be 110 nm thick and the pattern is used as the pixel electrode. The transparent conductive film can be used in the tin indium oxide film mixed with 2-20% zinc oxide. The pixel electrode is the anode of the EL element 203.

After that, an insulating film including silicon is formed to a thickness of 500 nm, an open circuit is then formed at a position corresponding to the pixel electrode 556, and a third inner layer insulating film 557 is formed. When an open circuit is formed, it is possible to easily form the inclined sidewall by using a wet etching method. If the sidewall of the open circuit does not have a sufficiently gentle slope, the deterioration of the EL layer caused by the position difference will cause important problems.

Next, the EL layer 558 and the cathode (MgAg electrode) 559 are formed by a vacuum deposition method that does not need to release air. The thickness of the EL layer is 80-200nm (represented by 100-200nm); the cathode 559 is 180-300nm (represented by 200-250nm).

In this process, the EL layer and the cathode are sequentially formed with pixels corresponding to red, pixels corresponding to green, and pixels corresponding to blue. However, because the EL layers have poor resistance to solvents, they must be formed independently for each color without using light technology. Therefore, it is best to use metal masks to mask pixels in addition to the desired pixels, and to selectively form the desired pixels. The EL layer of the pixel.

In detail, the mask is first set to hide all pixels except for the pixels corresponding to red, and the cathode and the EL layer that emit red light are selectively formed by the mask. After that, another mask is set to hide all pixels except the pixels corresponding to green, and the cathode and the EL layer that emit green light are selectively formed by the mask. After that, as above, another mask is set to hide all pixels except for the pixels corresponding to blue, and the blue-emitting cathode and the EL layer are selectively formed by the mask. In this case, different masks are used as individual colors. Alternatively, the same mask for them may be used. Preferably, it is not necessary to break the vacuum to perform the processing until the EL layer and the cathode of all pixels are formed.

A known material can be used as the EL layer 558. Considering that the EL driving voltage is preferably an organic material, for example, the EL layer can be formed in a four-layer structure consisting of a hole injection layer, a hole transport layer, a luminescence layer, and an electron frequency injection layer. In this embodiment, a MgAg electrode is used as an example of the cathode of the EL element 203, although other well-known materials can also be used.

A conductive layer containing aluminum as the main component can be used as the protective electrode 560. The protective electrode 560 is formed by using a vacuum deposition method and another mask when forming the EL layer and the cathode. Furthermore, after the EL layer and the cathode are formed, the protective electrode is formed successively without releasing the air.

Finally, a second passivation film 561 made of a silicon nitride film is formed to a thickness of 300 nm. In fact, the protective electrode 560 plays the role of protecting the EL layer from water. Furthermore, the reliability of the EL element 203 can be improved by forming the second passivation film 561.

The active matrix EL display device constructed as shown in Figure 16C is completed. The device is composed of a switching type TFT 201, an EL driving TFT 202, a power source control TFT 203, a driving circuit n-channel type 204 and a driving circuit p-channel type 205.

After the structure shown in Figure 16C is completed, in order not to expose to the air, in fact, it is best to have a highly airtight protective film (laminated film, ultraviolet cured resin film that generates ultraviolet rays, etc.) or The outer cover is made of ceramic sealing to encapsulate (seal) the device.

[Example 11]

The detailed structure of the source signal side driving circuit 102 shown in FIG. 1 is explained in this embodiment. An example circuit diagram of the source signal side driving circuit used in this embodiment is shown in FIG. 21.

As shown in the figure, the displacement register 801, the latch (A) 802, and the latch (B) 803 are constructed. It should be noted that in the first embodiment, a group of latches (A) 802 and latches (B) 803 are equivalent to four source signal lines Sline_1 to Sline_4. Further, a level shifter that changes the amplitude width of the signal voltage is not formed in this embodiment, but it may also be formed by the designer appropriately.

The clock signal CK, the clock signal CKb with the polarity of CK reversed, the start pulse SP, and the drive direction switching signal SL/R are respectively input to the shift register 801 through the wiring shown in the figure. Furthermore, the digital data signal VD input from the outside is input to the latch (A) 802 through the wiring shown in the figure. The polarity of the latch signals S_LAT and S_LAT are reversed The signal S_LATb is input to the latch (B) 803 through the wiring shown in the figure.

Based on the detailed structure of the latch (A) 802, an example of the part 804 of the latch (A) 802 that stores the digital data signal corresponding to the source signal line Sline_a is explained. The part 804 of the latch (A) 802 has two clock inverters and two inverters.

The top view of the part 804 of the latch (A) 802 is shown in FIG. 22. The reference numbers 831a and 831b each represent the active layer of the TFT of the inverter that forms the part 804 of a latch (A) 802, and the reference number 836 represents the common gate electrode of the TFT that forms an inverter. Further, reference numbers 832a and 832b each represent an active layer of a TFT forming a portion 804 of a latch (A) 802, and reference numbers 837a and 837b respectively represent gate electrodes formed on the active layers 832a and 832b. It should be noted that the gate electrodes 837a and 837b are electrically connected.

Reference numerals 833a and 833b each indicate the active layer of the TFT of the clock inverter forming part 804 of a latch (A) 802. The gate electrodes 838a and 838b are formed on the active layer 833a, and become a double structure. Further, the gate electrodes 838b and 839 are formed on the active layer 833b, which becomes a double gate structure.

Reference numerals 834a and 834b each indicate an active layer of a TFT forming a part 804 of a latch (A) 802 of the clock inverter. The gate electrodes 839 and 840 are formed on the active layer 834a and become a double gate structure. Further, the gate electrodes 840 and 841 are on the active layer 834b Formed on top, it becomes a double gate structure.

[Example 12]

The EL display device (EL module) formed by the implementation of the present invention has better visibility in bright places than a liquid crystal display device because of its self-luminous characteristics. Therefore, the present invention can be used as a display part of a direct-view EL display (including a display equipped with an EL module). There are personal computer monitors, television viewing monitors, advertising display monitors, etc., which are used as EL displays.

The present invention can operate on all electrical appliances including a display as a component part, including the aforementioned EL display.

As electrical equipment, there are EL displays, video cameras, digital cameras, portable displays, car navigators, personal computers, portable information terminals (mobile computers, mobile phones, e-books, etc.), and there are pictures of recording media Image reproducers (especially, devices that can reproduce recorded media and are equipped to display images such as compact discs (CD), electro-optical discs (LD), or digital video discs (DVD)). Examples of electric appliances are shown in Figures 17A to 17E.

FIG. 17A depicts a personal computer, which includes a host 2001, a housing 2002, a display portion 2003, and a keyboard 2004. The EL display of the present invention can be used as a display section.

FIG. 17B depicts a video camera, which includes a host 2101, a display device 2102, a sound input part 2103, an operation switch 2104, a battery 2105, and an image receiving part 2106. Book The invented EL display can be used as a display part.

FIG. 17C depicts a part of a head-mounted EL display (right side), which includes a host 2310, a signal cable 2302, a head fixing elastic band 2303, a display monitor 2304, an optical system 2305, and a display device 2306. The EL display of the present invention can be used as a display section.

Figure 17D depicts an image regenerator with a recording medium (especially a DVD reproduction and playback device), which includes a host 2401, a recording medium 2402 (CD, LD, DVD, etc.), an optical switch 2403, and a display part (a) 2404 , And the display part (b) 2405. The display part (a) mainly displays image information, and the display part (b) displays characteristic information. The EL display of the present invention can be used as the display parts (a) and (b) of an image regenerator provided with a recording medium. The present invention can be applied to a CD player or game machine as an image regenerator provided with a recording medium.

FIG. 17E depicts a portable (mobile) computer, which includes a host 2501, a camera 2502, and an image receiving part 2503. Operation switch 2504, and display part 2505. The EL display of the present invention can be used as a display part of a portable (mobile) computer.

If the luminescence brightness of EL material is enhanced in the future, the present invention can be applied to front or rear projectors.

As mentioned above, the present invention has a wide range of applications and can be applied to electrical appliances in all fields. The electric appliance of this embodiment can be obtained by using any real The free combination of Examples 1 to 11 is realized.

According to the above structure, it becomes possible to control the EL driving voltage through the external switch connected to the gate electrode of the power source control TFT, and it becomes possible to remove the conventional large power external switch connected to the counter electrode that controls the EL driving voltage. Therefore, it becomes possible to remove the limitation of the current value of the EL driving circuit caused by the counter electrode connected to the control EL driving voltage, and to avoid the deterioration of the frequency characteristics of the counter electrode connected to the control EL driving voltage, and to avoid Reduction of the number of stages becomes possible.

It should be noted that the power source control TFT can be formed as a switching TFT and an EL driver TFT at the same time.

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Document	Office	Kind	Date
11341272	Japan	–	1999-11-30
34127299	Japan	A	1999-11-30
2000260061	Japan	–	2000-08-30
2000260061	Japan	A	2000-08-30

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Document	Office	Kind
US2001002703A1	United States of America	A1	2001-06-07
EP1107220A2	European Patent Office (EPO)	A2	2001-06-13
KR20010051967A	Republic of Korea	A	2001-06-25
CN1304182A	China	A	2001-07-18
JP2002149112A	Japan	A	2002-05-24
EP1107220A3	European Patent Office (EPO)	A3	2002-08-28
US6730966B2	United States of America	B2	2004-05-04
TW587239BThis record	Taiwan Province of China	B	2004-05-11
US2005001215A1	United States of America	A1	2005-01-06
US6982462B2	United States of America	B2	2006-01-03
KR20060004883A	Republic of Korea	A	2006-01-16
CN1722921A	China	A	2006-01-18
US2006033161A1	United States of America	A1	2006-02-16
KR100678703B1	Republic of Korea	B1	2007-02-02
KR100678700B1	Republic of Korea	B1	2007-02-05
US7525119B2	United States of America	B2	2009-04-28
US2009218573A1	United States of America	A1	2009-09-03
CN102176303A	China	A	2011-09-07
US8017948B2	United States of America	B2	2011-09-13
JP4831862B2	Japan	B2	2011-12-07
US2012061674A1	United States of America	A1	2012-03-15
CN102176303B	China	B	2013-07-10
EP1107220B1	European Patent Office (EPO)	B1	2014-09-03
US8890149B2	United States of America	B2	2014-11-18
CN1722921B	China	B	2015-05-13

Electric device

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