Internal power supply for an integrated circuit having a temperature compensated reference voltage generator
Abstract
The present invention provides a temperature-compensating reference voltage generator, including a temperature-compensating voltage divider, or variable voltage generator, for dividing an input reference voltage in order to generate a temperature-compensated output voltage. Preferably included, are a first differential amplifier for amplifying a voltage difference between a first reference voltage and a first feedback voltage in order to output an internal reference voltage, a first voltage divider for generating and outputting a first feedback voltage in response to the temperature-compensated voltage, the first voltage divider further including, two resistive elements for controlling a magnitude of reference voltage. In an embodiment of the present invention, operation of MOS transistors in a weak inversion region compensates for changes in temperature, thereby generating a temperature-independent voltage reference, and thus a temperature-independent power supply voltage, thereby reducing fluctuations in performance of semiconductor devices caused by variations in temperature.

Term
No projected expiry on record.
- Priority
- Filed
- Granted
- Today
26 claims: 26 independent, 0 dependent
- 1一種在一半導體內之內部參考電壓產生器,包含:一用於產生一溫度補償之電壓之溫度補償可變電壓產生器;一用於對一連接性耦合至第一差動放大器之第一輸入之第一參考電壓與一連接性耦合至第一差動放大器之第二輸入之第一反饋電壓之間之一電壓差予以放大以便輸入一內部參考電壓之第一差動放大器;一用於響應溫度補償之電壓以產生及輸出一第一反饋電壓之第一分壓器,該第一分壓器進一步包括:一在該第一差動放大器之一輸出端子與第二輸入端子之間連接性耦合之第一電阻性元件;及一在該第一差動放大器之第二輸入端子與一第二參考電壓之間連接性耦合之第二電阻性元件;及且其中第一反饋電壓係視溫度補償電壓之大小而定。
- 2如申請專利範圍第1項之內部參考電壓產生器,其中第一電阻性元件之一阻抗值為動態變動之阻抗值。
- 3如申請專利範圍第1項之內部參考電壓產生器,其中第一電阻性元件包含一電晶體;及一連接性耦合至溫度補償之電壓之電晶體控制端子。
- 4如申請專利範圍第1項之內部參考電壓產生器,其中第二電阻性元件之阻抗值為動態變動之阻抗值。
- 5如申請專利範圍第1項之內部參考電壓產生器,其中第二電阻性元件包含一電晶體;及一連接性耦合至溫度補償之電壓之電晶體控制端子。
- 6如申請專利範圍第1項之內部參考電壓產生器,其中溫度補償可變電壓產生器進一步包含:一用於對一連接性耦合至一第二差動放大器之一第一輸入端子之第三參考電壓與連接性耦合至第二差動放大器之一第二輸入端子之第二回饋電壓之間之一電壓差予以放大以便輸出一輸出電壓之第二差動放大器;一用於產生第二反饋電壓之第二分壓器進一步包含:一連接性耦合至第二差動放大器之一輸出端子與第二差動放大器之第二輸入端子之間之第三電阻元件;一連接性耦合至第二差動放大器之一輸出端子與第二差動放大器之第二輸入端子之間之第四電阻性元件;及一用於將來自第二差動放大器之輸出電壓產生溫度補償之電壓之可變電壓產生器。
- 7如申請專利範圍第6項之內部參考電壓產生器,其中第三參考電壓與第一參考電壓相等。
- 8如申請專利範圍第6項之內部參考電壓產生器,其中第二參考電壓為接地電壓。
- 9如申請專利範圍第6項之內部參考電壓產生器,其中第三及第四電阻性元件包含電晶體。
- 10如申請專利範圍第6項之內部參考電壓產生器,其中溫度補償可變電壓產生器包含:一第一電晶體,輸出電壓加至第一電晶體之一第一端子,及第一電晶體之一閘極連接至第一電晶體之一第二端子; 一第二電晶體,第二電晶體之一第一端子連接至第一電晶體之第二端子,及第二電晶體之一第二端子及一閘極二者連接至為一輸出溫度補償之電壓之輸出節點;及一第三電晶體,第三電晶體之一第一端子連接至輸出節點,第三參考電壓加至第三電晶體之一閘極,及第二參考電壓加至第三電晶體之源極。
- 11如申請專利範圍第6項之內部參考電壓產生器,其中第一及第二電晶體為PMOS電晶體及第三電晶體作為一NMOS電晶體。
- 12如申請專利範圍第11項之內部參考電壓產生器,其中第一及第二電晶體作為在一弱反轉區域內操作內及第三電晶體在一強反轉區域內操作。
- 13一種溫度補償參考電壓產生器,包含一用於除以一輸入參考電壓以便在分壓器之一輸出節點上產生一溫度補償之輸出電壓之溫度補償分壓器。
- 14如申請專利範圍第13項之溫度補償參考電壓產生器,其中溫度補償分壓器包含:至少一具有一顯示一正溫度係數之第一輸出阻抗之第一電子元件;及至少一具有一顯示一負溫度係數之第二輸出阻抗之第二電子元件;第一及第二電子元件合併成使得在溫度補償之輸出電壓上之一變化為溫度上變化之函數。
- 15如申請專利範圍第14項之溫度補償參考電壓產生器,其 中第一電子元件為一PMOS電晶體及第二電子元件為一NMOS電晶體。
- 16如申請專利範圍第15項之溫度補償參考電壓產生器,其中PMOS電晶體在一弱反轉區域內操作及NMOS電晶體在一強反轉區域內操作。
- 17如申請專利範圍第14項之溫度補償參考電壓產生器,其中在溫度補償之輸出電壓上之變化為直接比例於溫度上之一變化。
- 18如申請專利範圍第14項之溫度補償參考電壓產生器,其中在溫度補償之輸出電壓上之變化為反比於溫度上一變化。
- 19一種溫度補償電源供應器,包含:一溫度補償之參考電壓,其係產生自至少二參考電壓;及一自一輸出電壓由溫度補償之參考電壓所控制而用於產生一輸出電壓之調整元件;藉此在溫度增加時輸出電壓上升及在溫度減低時輸出電壓下降。
- 20如申請專利範圍第19項之溫度補償電源供應器,其中至少二個參考電壓之一個為一溫度補償之參考電壓。
- 21如申請專利範圍第20項之溫度補償電源供應器,其中溫度補償之參考電壓為由使用至少一電晶體在一弱反轉區域內操作及使用至少一電晶體在一強反轉區域內操作所產生。
- 22如申請專利範圍第19項之溫度補償電源供應器,其中二個參考電壓為約相同或相同。
- 23一種溫度補償電源供應器,包含:一來自至少二個參考電壓而產生之溫度補償之參考電壓;及一用於來自一由溫度補償之參考電壓所控之輸入電壓而產生一輸出電壓之調整元件;藉此在溫度增加時輸出電壓下降及溫度減低時輸出電壓上升。
- 24如申請專利範圍第23項之溫度補償電源供應器,其中至少二個參考電壓之一個為一溫度補償之參考電壓。
- 25如申請專利範圍第24項之溫度補償電源供應器,其中溫度補償之參考電壓為由使用至少一個電晶體在一弱反轉區域內操作及由使用至少一個電晶體在一強反轉區域內操作而產生者。
- 26如申請專利範圍第23項之溫度補償電源供應器,其中二個參考電壓為約相同或相同。
Independent claims26
64 paragraphs, as filed
Internal power supply for integrated circuits with temperature-compensated reference voltage generator
Background of the invention
1. Scope of invention
The present invention belongs to a semiconductor device, and more particularly belongs to an internal reference voltage generator and an internal power supply voltage generator in the semiconductor.
2. Description of related technologies
In traditional semiconductor devices, especially in semiconductor memory devices, in order to provide stable, low-power operation, an internal power supply voltage is generated from an external power supply voltage and used as the power supply for each circuit on the chipDevice Power Supply. In semiconductor devices, the current in a transistor changes in accordance with changes in temperature and the performance of the circuit has transistor fluctuations. For example, when the temperature increases, the carrier mobility of the transistor decreases during a strong reversal. Therefore, the current is reduced and the circuit operation speed is reduced.
In order to reduce such fluctuations in the performance of semiconductor devices caused by temperature changes, a conventional internal power supply may include a feature that increases its output supply voltage when there is an increase at a higher temperature, thereby increasing the flow through The current of the chip transistor and the output supply voltage is reduced at a lower temperature, accompanied by a reduced current. In this way, the current of the transistor can be kept at a constant value and has nothing to do with temperature changes.
One of such methods is the use of a band-gap reference generator that changes the voltage of the internal power supply according to temperature. Figure 1 shows a conventional band-gap reference generator in which a reference voltage VREF is provided to a circuit for generating an internal power supply voltage. The band-gap reference generator shown in FIG. 1 can independently adjust the temperature coefficient of an anti-control reference device on a chip and therefore can change the value of the reference voltage as a function of the same temperature. shortcoming Therefore, the variation of the reference voltage VREF may be significantly larger than the normal variation of an external power supply voltage EVDD.
In an alternative way, as discussed above, instead of using a reference voltage change, a supplementary metal oxide semiconductor (CMOS) reference voltage generator is used instead of a band-gap reference generator to provide independent changes from the external power supply. Stable voltage operation. Figure 2 shows one such conventional CMOS reference voltage generator. The CMOS reference voltage generator shown in FIG. 2 is not affected by changes in the external power supply and has a stable operation. However, the disadvantage is that the temperature dependence cannot be controlled arbitrarily in the combined circuit.
Figure 3 shows a circuit diagram of a conventional internal power supply voltage generator. Referring to FIG. 3, the conventional internal power supply voltage generator includes an internal reference voltage generator 31 for receiving a reference voltage VREF and generating an internal reference voltage VREFP. One for combining an internal reference voltage VREFP with an internal power supply A comparator 33 for comparing the supply voltage IVDD, and a driver 35 for receiving an external power supply voltage EVDD to generate and output the internal power supply voltage IVDD. The reference voltage is a voltage that can be derived from the bandgap reference generator shown in FIG. 1 or the CMOS reference voltage generator shown in FIG. 2. The internal reference voltage generator 31 includes a differential amplifier 31a, a first resistor R1 and a second resistor R2. The internal reference voltage generator 31 generates the internal reference voltage VREFP according to the ratio of the resistance values of the resistors R1 and R2 and the reference voltage VREF. The internal reference voltage VREFP is determined by the following formula: VREFP=VREF(1+R1/R2) [1] and is not affected by the manufacturing process and temperature.
Since the aforementioned traditional internal power supply voltage generator is not affected by temperature, the value of the internal reference voltage VREFP cannot be controlled by changes in temperature. As a result, the value of the internal power supply voltage IVDD cannot be controlled according to changes in temperature.
Summary of the invention
To solve the above-mentioned problem, the first feature of an embodiment of the present invention is to provide an internal power supply voltage generator in a semiconductor device, and the generator controls the value of the internal reference voltage according to the temperature change.
The second feature of an embodiment of the present invention is to provide an internal power supply voltage generator in a semiconductor, and the generator controls an internal power supply voltage according to temperature changes.
The third feature of an embodiment of the present invention is to provide a temperature-compensated reference voltage divider for dividing an input reference voltage to generate a temperature-compensated output voltage at an output node of the voltage divider Temperature compensation reference voltage generator.
According to a first embodiment of the present invention to implement the first feature, an internal reference voltage generator in a semiconductor device preferably includes a first reference for inputting a first input terminal of the differential amplifier Voltage and a first differential amplifier that differentially amplifies an input voltage input to a second input terminal of the first differential amplifier so as to output an internal reference voltage to an output terminal of the first differential amplifier; A first resistor connected between the output terminal of the first differential amplifier and the input terminal of the first differential amplifier; and a first resistor connected between a second reference voltage and the second input terminal of the first differential amplifier Two resistors, the first and second resistors form a first For the voltage divider, the impedance value of the first resistor is preferably dynamically changed by a voltage in accordance with changes in temperature. Since the variable impedance device is generally implemented using an active device, it is preferable that the first resistor includes one or more PMOS transistors, and the gate of the PMOS transistor is controlled by a voltage that changes according to temperature.
According to the second embodiment of the present invention to implement the first feature, an internal reference voltage generator in a semiconductor device preferably includes a first input terminal for inputting a first differential amplifier A reference voltage and an input voltage input to the second input terminal of the first differential amplifier are differentially amplified so as to output an internal reference voltage to an output terminal of the first differential amplifier; a first differential amplifier connected to A first resistance between the output terminal of the differential amplifier and the second input terminal of the first differential amplifier; and a second resistance connected between the second reference voltage and the second input terminal of the first differential amplifier, The first and second resistors form a first distributor. The impedance value of the first voltage is preferably dynamically changed by a voltage that changes in accordance with a change in temperature.
Preferably, the second resistor is composed of one or more NMOS transistors and the voltage of the gate of the NMOS transistor changes according to temperature. Preferably, the internal reference voltage generator further includes a temperature-compensated variable voltage generator for generating the reference voltage to vary in accordance with changes in temperature.
And preferably, the temperature-compensated variable voltage generator also includes a third reference voltage to be input to a first input terminal of the second differential amplifier and a third reference voltage to be input to a second input terminal of the third differential amplifier. A voltage differential amplifier so as to output an output voltage from one of the output terminals of the second differential amplifier The second differential amplifier, a third resistor connected between the output terminal of the second differential amplifier and the second input terminal of the second differential amplifier, and a third resistor connected between the second reference voltage and the second input of the differential amplifier A fourth resistor between the terminals and a variable voltage generator for generating a voltage that changes according to temperature in response to the output voltage of the differential amplifier and the third reference voltage. The third and fourth resistors form a second voltage divider.
According to a third embodiment of the present invention to implement the second feature, an internal power supply voltage generator in a semiconductor device preferably includes an internal reference voltage generator for generating an internal reference voltage that changes in accordance with temperature changes. A comparator for comparing an internal reference voltage with an internal power supply voltage; and a comparator for receiving an external power supply voltage in response to an output signal of the comparator and outputting the internal supply voltage driver.
According to a fourth embodiment of the present invention to implement the third feature, a temperature-compensated reference voltage generator with a temperature-compensated voltage divider is provided. The temperature-compensated reference voltage divider preferably includes at least one first electronic element having a first output impedance showing a positive temperature coefficient and at least one second electronic element having a second output impedance showing a negative temperature coefficient , The first and second electronic components are combined so that the change in the output of temperature compensation is a function of the change in temperature. The first electronic element may be a PMOS transistor and the second resistance element may be an NMOS transistor. In this case, the PMOS transistor should operate in a weak inversion region and the NIOS transistor should operate in a strong inversion region. In the fourth embodiment, the output voltage of temperature compensation is either directly proportional to the change in temperature or inversely proportional to the change in temperature change.
Another feature of the present invention is implemented by the fifth embodiment of the present invention, which provides a temperature-compensated power supply: it includes a reference voltage for temperature compensation generated by at least two reference voltages and a reference for temperature compensation Under voltage control, an adjustable element that generates an output voltage from an input voltage and its characteristics are that the output voltage rises when the temperature increases and the output voltage decreases when the temperature decreases. Alternatively, in a sixth embodiment of the present invention, the output voltage decreases when the temperature increases and the output voltage increases when the temperature decreases.
Preferably, in the fifth and sixth embodiments, one of the at least two reference voltages is a temperature-compensated reference voltage.
Preferably, the reference voltage for the temperature compensation is generated by using at least one resistor to operate in a weak inversion region and using at least one resistor to operate in a strong inversion region. In some cases, the two reference voltages are approximately the same or the same.
These and other features of the present invention will be understood by reading the following detailed description on the basis of this skill.
The above-mentioned features and advantages of the present invention can be more clearly understood by referring to the attached drawings with specific embodiments described in detail. Among them: Figure 1 shows a circuit diagram of a conventional band-gap reference generator; Figure 2 shows a circuit diagram of a conventional band-gap reference generator. A circuit diagram of a conventional CMOS reference voltage generator; Fig. 3 shows a circuit diagram of a conventional internal power supply voltage generator; Fig. 4 shows an internal parameter according to a first embodiment of the present invention The circuit diagram of the test voltage generator; Figure 5 shows a graph showing the variation of current corresponding to the gate voltage and temperature in a conventional transistor; Figure 6 shows an internal reference voltage according to a second embodiment of the present invention Fig. 7 shows a circuit diagram of an internal reference voltage generator according to a third embodiment of the present invention; Fig. 8 shows a circuit diagram of an internal reference voltage generator according to a fourth embodiment of the present invention A circuit diagram; and FIG. 9 shows a circuit diagram of an internal power supply voltage generator using an internal reference voltage generator according to the present invention according to the present invention.
Detailed description of the invention
The present invention is a Korean patent application No. 01-39760 filed on July 4, 2001 and the name is "Internal reference voltage generator capable of controlling the value of internal reference voltage according to temperature changes and including the same internal power supply voltage generationDevice", is incorporated into this article by reference.
The present invention will be fully explained below with reference to specific examples selected for the invention and with reference to the accompanying drawings. Hereinafter, the selected specific embodiments of the present invention will be described in detail with reference to the accompanying drawings. The same reference numbers apply to the same components in all drawings.
4 shows a circuit diagram of an example of an internal reference voltage generator according to a first embodiment of the present invention. 4, the internal reference voltage generator preferably includes a differential amplifier 41, a resistor R2, a PMOS transistor P4 used as a resistor, and a temperature-dependent variable voltage The generator 43, the resistor R2 and the PMOS transistor P4 are combined to form a resistive voltage divider.
The differential amplifier 41 inputs a first reference voltage VREF1 in a first input terminal I1 and an input voltage VIN in a second input terminal I2. The differential amplifier 41 outputs a reference voltage VREFP to an output. Terminal O1. The differential amplifier 41 is a conventional negative feedback type differential amplifier and may include a PMOS transistor P1 via P3 and an NMOS transistor N1 via N3. The resistor R2 is connected between a second reference voltage which is a ground voltage VSS and the second input terminal I2 of the differential amplifier 41. The PMOS transistor P4 is connected between the output terminal O1 of 41 and the second input terminal I2 of the differential amplifier 41. A variable output voltage VTEMP of the temperature-dependent variable voltage generator 43 is applied to the gate of the PMOS transistor P4.
The temperature-dependent variable voltage generator 43 receives a third reference voltage VREF2 to generate a variable output voltage VTEMP that varies according to temperature changes, thereby changing the equivalent resistance/impedance of the PMOS transistor P4. The third reference voltage VREF2 may be the same as or different from the first reference voltage VREF1. The temperature-dependent variable voltage generator 43 preferably includes a differential amplifier 43a, a PMOS transistor P10 as a resistor, a PMOS transistor P11 as a resistor, and a variable voltage Generator 43b.
The differential amplifier 43a inputs a third reference voltage VREF2 in a first input terminal I3 and inputs a voltage differential amplifier in a second input terminal I4 to output an output voltage to an output terminal O2. The differential amplifier 43a is a negative feedback type differential amplifier similar to the differential amplifier 41 The device may include a PMOS transistor P5 via P7 and an NMOS transistor N4 via N6.
The PMOS transistor P10 used as a resistor is connected between the output terminal O2 of the differential amplifier 43a and the second input terminal I4 of the differential amplifier 43a. Both the gate and drain of the PMOS transistor P10 are connected to the second input terminal I4. The PMOS transistor P11 used as a resistor is connected between a second reference voltage, which is a ground voltage VSS, and the second input terminal I4 of the differential amplifier 43a. A gate and drain of the PMOS transistor P11 are connected to the ground voltage VSS.
If the size and output impedance of PMOS transistor P10 and PMOS transistor P11 are equal. Then the voltage output to the output terminal O2 of the differential amplifier 43a is 2xVREF2. Since the PMOS transistor P10 and the PMOS transistor P11 are optimally matched and have the same thermal characteristics under the same environment, this impedance combination has no effect on the manufacturing process steps and temperature changes. A pair of NMOS transistors or a pair of resistors can be used instead of PMOS transistors P10 and P11 to have the same result.
The variable voltage generator 43b generates a variable output voltage VTEMP that varies according to temperature changes. This temperature change is affected by the voltage output from the output terminal O2 of the differential amplifier 43a and the third reference voltage VREF2. The variable voltage generator 43b preferably includes a PMOS transistor P8, a PMOS transistor P9, and an NMOS transistor N7.
The source of the PMOS transistor P8 is connected to the output terminal O2 of the differential amplifier 43a, and a gate of the PMOS transistor P8 is connected to the drain of the PMOS transistor P8. One source of PMOS transistor P9 is connected to PMOS transistor P8 The source, and the gate and drain of the PMOS transistor P9 are both connected to a node of an output variable output voltage VTEMP. A drain of the NMOS transistor N7 is connected to the VTEMP node, a third reference voltage VREF2 is applied to the gate of the NMOS transistor N7, and the ground voltage VSS is applied to a source of the NMOS transistor N7.
In particular, PMOS transistor P8 and PMOS transistor P9 are designed to operate in a weak inversion region. For this purpose, the W/L ratio of PMOS transistors P8 and P9 increases and the W/L ratio of NMOS transistor N7 decreases, where W refers to the width of a gate of a transistor, and L refers to the length of the gate of a transistor. Alternatively, an NMOS transistor or a resistor can be used instead of PMOS transistors P8 and P9.
FIG. 5 shows a graph showing the variation of current corresponding to gate voltage and temperature in a conventional transistor. Referring to FIG. 5, the operation of the internal reference voltage generator according to the first embodiment of the present invention shown in FIG. 4 will be described in detail.
The temperature relative to the current Ids varies according to the threshold voltage Vth. In the case where a voltage Vgs (the voltage between a gate of a transistor and a source) is smaller than the threshold voltage Vth, that is, in a weak inversion region, the on-voltage of a transistor will increase in temperature Becomes smaller, and therefore the current Ids becomes larger. On the other hand, when the voltage Vgs is larger than the threshold voltage Vth, that is, in a strong inversion area, the mobility of the download body decreases as the temperature increases, thereby reducing the current Ids. The weak reversal area can also be called the sub-threshold area.
Thus, in the first specific embodiment of the present invention as shown in FIG. 4 Part of the reference voltage generator, the variation of the internal reference voltage VREFP is consistent with the temperature variation of the selected implementation using the weak reversal characteristics of the transistor. That is, as mentioned above, it is better to design the PMOS transistors P8 and P9 of the variable voltage generator 43b to operate with PMOS transistors P8 and P9. The voltage Vgs varies according to temperature (that is, a higher voltage The Vgs component decreases, and the voltage Vgs increases at a lower temperature in the weak reversal region. This will cause the variable output voltage VTEMP of the variable voltage generator 43b to increase at a higher temperature and decrease at a lower temperature. As a result, the equivalent resistance value of the PMOS transistor P4 that receives the variable output voltage VTEMP via its own gate changes according to temperature.
Similarly, when the temperature increases, the variable voltage generator 43b is variable, the output voltage VTEMP increases, the equivalent resistance value of the PMOS transistor P4 increases, and the internal reference voltage VREFP increases. On the other hand, when the temperature decreases, the variable output voltage VTEMP of the variable voltage generator 43b decreases, the equivalent resistance value of the PMOS transistor P4 decreases, and the internal reference voltage VREFP decreases.
FIG. 6 shows a circuit diagram of an example of an internal reference voltage generator according to a second embodiment of the present invention. Referring to FIG. 6, the internal reference voltage generator preferably includes a differential amplifier 41, a resistor R2, a PMOS transistor P4 as a resistor, and a temperature-dependent variable voltage generator 43. The internal reference voltage generator of the second embodiment of the present invention further includes a resistor R1 that is not shown in FIG. 4 of the circuit of the first embodiment.
Differential amplifier 41, resistor R2, PMOS transistor P4, and temperature-phase The variable voltage generator 43 is the same as that in the circuit of the first embodiment. The resistor R1 and the PMOS transistor P4 are connected in parallel between the output terminal O1 and the second input terminal I2 of the differential amplifier 41, thereby limiting the maximum impedance value after the combination of R1-P4.
FIG. 7 shows a circuit diagram of an example of an internal reference voltage generator of the third embodiment of the present invention. It includes a differential amplifier 41, a resistor R1, an NMOS transistor N8 used as a resistor, and a temperature-dependent variable voltage generator 43. The differential amplifier 41 and the temperature-dependent variable voltage generator 43 are the same as those in the circuit of the first embodiment shown in FIG. 4. The resistor R1 is connected between an output terminal O1 of the differential amplifier 41 and a second input terminal I2. The NMOS transistor N8 is connected between the second input terminal I2 of the differential amplifier 41 and the ground voltage VSS, and the variable output voltage VTEMP of the temperature-dependent variable voltage generator 43 is applied to a gate of the NMOS transistor N8 . The temperature-dependent variable voltage generator changes in accordance with the temperature change and the change in the equivalent resistance value of one of the NMOS transistors N8 of the variable output voltage VTEMP.
FIG. 8 shows a circuit diagram of an example of an internal reference voltage generator according to a fourth embodiment of the present invention, which includes a differential amplifier 41, a resistor R1, and an NMOS transistor N8 as a resistor And a temperature-dependent variable voltage generator 43. The internal reference voltage generator according to the fourth embodiment of the present invention further includes a resistor R2 that is not present in the circuit of the third embodiment shown in FIG. 7. The differential amplifier 41, the resistor R1, the NMOS transistor N8, and the temperature-dependent variable voltage generator 43 are the same as those in the circuit of the third embodiment shown in FIG. 7. The resistor R2 is connected between the second input terminal I2 of the differential amplifier 41 and the ground voltage VSS.
The operation of the internal reference voltage generator according to the second to fourth embodiments is basically the same as that of the first embodiment shown in FIG. 4 and detailed descriptions are omitted. The difference between the specific embodiments is for providing The difference in the special resistive element on the output reference voltage.
9 shows a circuit diagram of an internal power supply voltage generator according to any specific embodiment of the internal reference voltage generator according to the present invention. Referring to FIG. 9, the internal power supply voltage generator according to the present invention preferably includes an internal reference voltage generator 100, a comparator 63, and a driver 65. As previously discussed, the internal reference voltage generator of the internal power supply in Figure 9 is shown in Figure 9. It can be coupled to the two inputs of the internal reference voltage generator from two separate reference voltages VREF1 and VREF2 or one for one. The single reference voltage of the node is controlled.
The internal reference voltage generator 100 is one of the previously described internal reference voltage generators in specific embodiments 1-4 of the present invention. The internal reference voltage generator 100 preferably increases an internal reference voltage VREFP when the temperature increases and decreases the internal reference voltage VREFP when the temperature decreases. The comparator 63 compares the internal reference voltage VREFP with a power supply voltage IVDD from the driver 65. The driver 65 includes a PMOS transistor, and responds to an output signal of the comparator 63 to receive an external power supply voltage EVDD and output an internal supply voltage IVDD.
If the temperature increases, the internal reference voltage VREFP increases, and the internal power supply voltage IVDD increases. If the temperature drops, the internal reference The voltage VREFP decreases and the internal power supply voltage IVDD decreases.
As mentioned above, the implementation of any internal reference voltage generator and internal power supply voltage generator according to the present invention can vary the value of the internal power supply voltage according to changes in temperature in order to reduce fluctuations in semiconductor characteristics . That is, the internal reference voltage generator and the internal power supply voltage generator can increase the value of the internal power supply voltage at a higher temperature, thereby increasing the current flowing through the transistor circuit. Furthermore, the lower temperature of the internal reference voltage generator and the internal power supply voltage generator reduces the value of the internal power supply voltage, thereby reducing the current of the transistor circuit. Therefore, the current in the transistor circuit can maintain a certain value in terms of temperature fluctuations. Similarly, the internal reference voltage generator and the internal power supply voltage generator according to the specific embodiment of the present invention can prevent the influence of temperature on the French semiconductor and its characteristics.
The specific embodiments of the present invention selected here have been disclosed in a specific manner, but these are only described in a general manner and the thinking of the description, and are not intended for limitation. Similarly, those who are familiar with this technique should understand that different changes in form and detail can be made without departing from the spirit and scope of the present invention stated in the scope of the patent application below.
Schematic element symbol description
31. . . Internal reference voltage generator
31a. . . Differential amplifier
33. . . Comparators
35. . . driver
41. . . Differential amplifier
43. . . Temperature-related variable voltage generator
43a. . . Differential amplifier
43b. . . Variable voltage generator
63. . . Comparators
65. . . driver
100. . . Internal reference voltage generator
1 sheet
Sheet 1
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US8026709B2 | Cited by | United States of America | Applicant |
| TWI549406B | Cited by | Taiwan Province of China | Examiner |
10 members in 6 offices
Priority claims1
| Document | Office | Kind | Date |
|---|---|---|---|
| 20010039760 | Republic of Korea | A |
Members10
| Document | Office | Kind | |
|---|---|---|---|
| KR20030003904A | Republic of Korea | A | |
| US2003011351A1 | United States of America | A1 | |
| CN1395310A | China | A | |
| DE10230346A1 | Germany | A1 | |
| JP2003114728A | Japan | A | |
| KR100393226B1 | Republic of Korea | B1 | |
| TW577190BThis record | Taiwan Province of China | B | |
| US6791308B2 | United States of America | B2 | |
| CN1316619C | China | C | |
| JP4574938B2 | Japan | B2 |
1 legal event, as the office reported them to INPADOC
Events
| Event | Code | |
|---|---|---|
| Annulment or lapse of patent due to non-payment of feesLapsedMM4A | MM4A |
Numbers
- Publication
- 577190
- Application
- 91113259
Titles4
- Chinese
- 用於具有溫度補償參考電壓產生器之積體電路的內部電源供應器
- English
- "INTERNAL POWER SUPPLY FOR AN INTEGRATED CIRCUIT HAVING A TEMPERATURE COMPENSATED REFERENCE VOLTAGE GENERATOR"
- Unlabeled
- 用於具有溫度補償參考電壓產生器之積體電路的內部電源供應器
- Unlabeled
- Internal power supply for integrated circuits with temperature-compensated reference voltage generator
Classification
- CPC, 3
- G05F3/245
- G11C5/14
- Y10S323/907
- IPC, 6
- H10D84 00
- H10D99 00
- G05F3 24
- G11C5 14
- H03F3 45
- H10D84 03