Method for fabricating semiconductor integrated circuit device

Manufacturing method of semiconductor integrated circuit device

Technical field

The present invention relates to a manufacturing method of semiconductor integrated circuit devices (semiconductor devices, etc.), and particularly to an effective technology for forming gate oxide films (insulating films) such as MOSFETs (metal oxide semiconductor field effect transistors).

Background technique

In the early stage of the semiconductor industry, bubbling by passing a carrier gas such as oxygen through water in a bubbling chamber (Bubbler) was widely used. Although this method has the advantages of being able to cover a wide range of water, it cannot avoid the pollution problem, and it has hardly been used recently.

Therefore, recently, as a way to avoid the shortcomings of the bubbling chamber, the oxyhydrogen combustion method, that is, the pyrolysis method (Pyrogenic system) has been widely used.

(Revelation of known technical documents, etc.)

Regarding the thermal oxidation improvement that is the subject of this case and the water generation method for this, the following prior art is known:

(1) Japanese Patent Application Laid-Open No. 6-163517 of Okonomitsu No. 6-163517 discloses a low-temperature oxidation technology for low-temperature semiconductor processing. In the same embodiment 1, the following method is disclosed: adding hydrogen from 100 ppm to 1% in an atmosphere composed of about 99% argon and about 1% oxygen, and the combustion temperature of hydrogen is below 700 degrees Celsius, that is, below 450 degrees Celsius. The action of stainless steel catalyst produces water vapor. In the same embodiment 2, it is disclosed that silicon is thermally oxidized at an oxidation temperature of 600 degrees Celsius under normal pressure or high pressure in an atmosphere composed of 99% oxygen and 1% water vapor generated by the catalyst.

(2) JP 7-321102 Bulletin (Yoshietsu) discloses: In order to avoid moisture The various problems are high temperature thermal oxidation of the silicon surface in the extremely low moisture concentration, that is, the ultra-low moisture area of 0.5 ppm or the dry area, the oxidation temperature is 850 degrees Celsius.

(3) Japanese Patent Publication No. 60-107840 by Honma et al. discloses a thermal oxidation method of silicon: in order to reduce the dispersion of moisture due to dry oxidation of environmental moisture, it is intended to add a few tens of ppm of moisture generated by a conventional method. .

(4) JP 5-152282 (Da see I) discloses a thermal oxidation device: in order to prevent the generation of particles from the front end of the quartz tube, it is equipped with Ni (nickel) or a material containing Ni to form the inner surface of the hydrogen introduction tube, and at the same time The mechanism for heating the hydrogen inlet pipe. This thermal oxidation device makes hydrogen contact Ni in the hydrogen introduction pipe heated to 300°C or higher (to contain Ni material) to generate hydrogen active species, by reacting the hydrogen active species with oxygen (or oxygen-containing gas) , Generate water. That is, since water is produced by a catalytic method that does not involve combustion, there is no case where hydrogen is introduced into the tip of the quartz tube to melt and generate particles.

(5) Japanese Patent Laid-Open No. 6-115903 (Dajian II) discloses a catalyst-based moisture generation method: a mixed gas is contained to make the process: oxygen, hydrogen and inert gas are mixed to make the first mixed gas; and, moisture Production process: by introducing the first mixed gas into the tube of the reaction furnace while heating the tube of the reaction furnace, the tube of the reaction furnace is made of a material that has the function of a catalyst that can group hydrogen and oxygen to make the first mixture The hydrogen contained in the gas reacts with oxygen to produce water.

According to this method, since a catalyst material that lowers the reaction temperature is used in the reaction tube for reacting hydrogen and oxygen, the reaction temperature is lowered, and as a result, moisture can be generated at a low temperature. Therefore, it is supplied to heat the mixture of hydrogen, oxygen, and inert gas In the case of a gas reaction tube, hydrogen and oxygen completely react at a temperature below 500°C in the reaction tube, so a gas containing moisture can be obtained at a lower temperature than the combustion method.

In addition, at this time, the plastic material is completely eliminated from the vent, and only metal materials are used. When passivation is applied to the metal surface, the gas (moisture, hydrocarbon, etc.) from the surface is very small, so it can be higher. Pure water is produced with higher accuracy and a wide range (ppb to %) concentration. The stainless steel subjected to electrolytic polishing or electrolytic composite polishing is heat-treated in an oxidizing or weakly oxidizing atmosphere with an impurity concentration of several ppb or less to perform passivation treatment.

(6) Japanese Patent Laid-Open No. 5-141871 (Da see III) discloses a heat treatment device: at least a furnace core tube: a switchable opening for carrying in and out of the object to be processed and a gas introduction port for introducing gas into the interior; furnace core tube Heating mechanism: the inside of the furnace core tube; gas introduction pipe: connect it with the gas introduction port; and, heating mechanism: heating gas introduction pipe; at least the inner surface of the gas introduction pipe is made of Ni (or material containing Ni).

This thermal oxidation device is provided with a hydrogen-active species generating mechanism that generates hydrogen-active species from hydrogen gas or hydrogen-containing gas without plasma and is arranged upstream of the position of the to-be-processed inside the furnace core tube. Gas is introduced into this hydrogen-active species generating mechanism to generate hydrogen-active species. Therefore, if a silicon substrate on which an oxide film is formed is placed in the furnace tube as the object to be processed, the hydrogen active species diffuses in the oxide film and terminates the dangling bonds in the oxide film and the oxide film/silicon interface. A gate oxide film with high reliability can be expected.

(7) Japanese Patent Laid-Open No. 5-144804 of Dajianzhi discloses a heat treatment technique for producing a silicon oxide film with hydrogen active species generated by a nickel catalyst.

(8) Nakamura et al. in the 45th Symposium on Semiconductor Integrated Circuit Technology hosted by the Electronic Materials Committee of the Electrochemical Society held from December 1st to 2nd, 1993. Applied to the silicon oxide process in the tunnel oxide film of flash memory under a strong reducing atmosphere where hydrogen radicals generated by catalysts and hydrogen generated by moisture are the main components.

(9) Japanese Patent Application Laid-Open No. 6-120206 of Dajianzhi discloses a sintering technology using hydrogen active species generated by a nickel catalyst for an insulating film of an insulating separation selective epitaxial growth region.

(10) Kobayashi et al. JP-A No. 59-132136 discloses a redox process of silicon and high melting point metal in a redox mixed atmosphere of water and hydrogen generated by a common method.

Disclosure of invention

(Conventional technology and investigations on the present invention, etc.)

The cutting-edge MOS devices manufactured according to the design rules of sub-micron depth require that the gate oxide film be formed with an extremely thin film thickness of 10 nm or less in order to maintain the electrical characteristics of the components to be miniaturized. For example, when the gate length is 0.35 μm, the required gate oxide film thickness is about 9 nm, but the gate length becomes 0.25 μm, which is expected to be as thin as about 4 nm.

Thermal oxide film formation is generally carried out in a dry oxygen atmosphere. However, when forming gate oxide film, the wet oxidation method (generally a water partial pressure ratio of tens of% or more) has been used for the reason that the defect density in the film can be reduced. In this wet oxidation method, hydrogen is combusted in an oxygen atmosphere to generate water, and this water and oxygen are supplied to the surface of a semiconductor wafer (a wafer for manufacturing integrated circuits or just an integrated circuit wafer) to form an oxide film. But because it burns hydrogen, it is necessary to use it first in order to avoid the risk of explosion. After the oxygen has flowed sufficiently, the hydrogen is ignited. In addition, the water concentration of the water+oxygen mixed gas that will be the oxidizing species is increased to 40% (the partial pressure of the water in the total atmospheric pressure).

However, the above-mentioned combustion method is to ignite the hydrogen sprayed from the nozzle installed at the front end of the quartz hydrogen introduction pipe to burn. If the amount of hydrogen is excessively reduced, the flame approaches the nozzle, and the nozzle melts due to the heat to generate particles, which is pointed out as a semiconductor The problem of wafer contamination sources. (In addition, if the amount of hydrogen is excessively increased, the flame will reach the end of the combustion tube, melting the quartz wall and becoming the cause of particles.) In addition, the above combustion method is due to the high water concentration of the water + oxygen mixed gas of the oxidizing species, so it is Hydrogen or OH groups are taken in the gate oxide film, and structural defects such as Si-H bonding or Si-OH bonding are likely to occur in the film or the interface with the silicon substrate. These bonds are interrupted by the applied voltage stress such as injection of hot carriers to form charge traps, and become the cause of the decrease in the electrical characteristics of the film due to the fluctuation of the threshold voltage.

In addition, the details of this range and the details of the improvement of the hydration device using the new catalyst are detailed in the Japanese Patent Laid-open No. 9-172011 of the inventor of the present invention and the International Publication of the Inventor and Oken et al. PCT/JP 97/00188 (International filing date 1997.1.27).

According to the review of the present inventors, it is difficult to form a high-quality ultra-thin gate oxide film with a thickness of 5 nm or less (of course the same effect can be expected for 5 nm or more) with a uniform film thickness with good reproducibility in the conventional oxide film forming method. Of course, there are also various shortcomings in the above film thickness.

To form an extremely thin oxide film with a uniform film thickness with good reproducibility, it is necessary to reduce the growth rate of the oxide film compared to when a thicker oxide film is formed, so as to obtain a more stable oxygen. The film is formed under chemical conditions, but for example, using the oxidation film formation method of the aforementioned combustion method, the water concentration of the water+oxygen mixed gas that is an oxidizing species can only be controlled in a high concentration range of about 18% to 40%. Therefore, the growth rate of the oxide film is fast, and when the oxide film is thin, the film is formed in a very short time. On the other hand, to reduce the growth rate of the oxide film and reduce the wafer temperature to below 800°C for oxidation, the quality of the film is reduced. (If other parameters are adjusted appropriately in the temperature range below 800 degrees Celsius, the present invention can of course be applied)

In addition, to form a clean oxide film, the low-quality oxide film formed on the surface of the semiconductor wafer must be removed by wet cleaning. However, during the process from the wet cleaning process to the oxidation process, it will inevitably form on the wafer surface. Thin natural oxide film. Furthermore, in the oxidation process, an undesirable initial oxide film is formed on the surface of the wafer due to contact with oxygen in the oxidizing species before the original oxidation is performed. Especially in the case of the oxidation film formation method using the combustion method, in order to avoid the danger of hydrogen explosion, the oxygen is fully flowed and then the hydrogen is burned. Therefore, the surface of the wafer is exposed to oxygen for a longer time, and the initial oxide film is formed thickly. . (It is generally believed that explosive combustion of hydrogen will occur when the temperature is above 560 degrees Celsius, hydrogen is above 4%, and there is sufficient oxygen under normal pressure, that is, "explosion")

In this way, the actual oxide film has a structure including a natural oxide film and an initial oxide film in addition to the oxide film formed by the original oxidation. However, these natural oxide films or the initial oxide film are more than the original oxide film intended for the purpose. Low quality. Therefore, in order to obtain a high-quality oxide film, it is necessary to minimize the proportion of these low-quality films in the oxide film. However, the use of conventional oxide film forming methods to form extremely thin oxide films increases the proportion of these low-quality films. .

For example, a conventional oxide film forming method is used to form an oxide film with a thickness of 9nm When the thickness of the natural oxide film and the initial oxide film in this oxide film are respectively 0.7nm and 0.8nm, the film thickness of the original oxide film becomes 9-(0.7+0.8)=7.5nm, so this oxide film The proportion of the original oxide film in it is about 83.3%. However, using this conventional method to form an oxide film with a thickness of 4nm, the thickness of the natural oxide film and the initial oxide film are 0.7nm and 0.8nm, respectively, unchanged, so the original oxide film has a thickness of 4^﹡0.7+0.8)=2.5nm, the ratio is reduced to 62.5%. That is, in order to form an extremely thin oxide film by a conventional oxide film forming method, not only the uniformity or reproducibility of the film thickness cannot be ensured, but the quality of the film is also reduced.

In order to solve these problems, the present inventors paid attention to the method of generating water in catalysts such as Okon. According to the review conducted by the inventors, these researches focus on the strong reduction of hydrogen radicals based on the premise of "long life of hydrogen radicals", so if it remains the same, it is obviously not suitable for the mass production process of semiconductor integrated circuits. In other words, the inventors of the present invention clarified that, to be applied to the semiconductor process, it is necessary to review the premise that "the life of hydrogen and other groups is very short, and it is generated on the catalyst to return to the compound or basic state on or near it." Structure.

Furthermore, the inventors clarified that in terms of the partial pressure ratio of water, 0 to 10 ppm belong to the dry area, showing the properties of so-called dry oxidation. Regarding the film quality required for gate oxide films in future micro-processes, there is no need for the so-called wetformulaoxidation.

In addition, the inventor clarified that the water partial pressure ratio is 10 ppm or more and 1.0×10³The ultra-low moisture range below ppm (0.1%) basically shows almost the same properties as dry oxidation.

In addition, the inventor clarified that the same applies to the low-moisture area where the water partial pressure ratio is 0.1% to 10% (in particular, the water partial pressure ratio is 0.5% to 5%). The thermal oxidation of the following low-moisture area) is compared with other areas (dry area, 10% or more in the area commonly used by the combustion method, and high-moisture areas with a water concentration of tens of% or more in bubbling chambers, etc.). Good properties show properties.

(Object of the present invention, etc.)

The object of the present invention is to provide a technology capable of forming a high-quality ultra-thin oxide film with uniform film thickness and good reproducibility.

The foregoing and other objectives and novel features of the present invention can be understood from the description of this specification and the accompanying drawings.

(Outline of the present invention, etc.)

Here is a brief description of the representative ones among the inventions disclosed in this case as follows:

The manufacturing method of the semiconductor integrated circuit device of the present invention includes the following processes (a) and (b):

(a) The process of producing water from hydrogen and oxygen as a catalyst,

(b) Supply low-concentration oxygen containing the aforementioned water to or near the main surface of the semiconductor wafer heated to a predetermined temperature to ensure at least the reproducibility of the oxide film and the uniformity of the oxide film thickness. Process of oxide film below 5nm.

The manufacturing method of the semiconductor integrated circuit device of the present invention is that the aforementioned oxide film is a gate oxide film of a MOSFET.

In the method of manufacturing a semiconductor integrated circuit device of the present invention, the thickness of the oxide film is 3 nm or less.

The manufacturing method of the semiconductor integrated circuit device of the present invention is the aforementioned semiconductor The bulk wafer heating temperature is 800 to 900°C.

In the method of manufacturing a semiconductor integrated circuit device of the present invention, after the (b) process, the main surface of the semiconductor wafer is treated with nitrogen oxide to separate the nitrogen from the interface between the oxide film and the substrate.

The method of manufacturing a semiconductor integrated circuit device of the present invention is to form the aforementioned oxide film by a single chip process.

The method for manufacturing a semiconductor integrated circuit device of the present invention is to perform the formation of the aforementioned oxide film in a batch process.

The manufacturing method of the semiconductor integrated circuit device of the present invention includes the following processes (a) and (b):

(a) The process of producing water from hydrogen and oxygen as a catalyst,

(b) By supplying oxygen to the main surface of the semiconductor wafer heated to a predetermined temperature or its vicinity, the oxygen system can obtain a higher concentration of the initial withstand voltage than an oxide film formed in a dry oxygen atmosphere that does not contain at least water The process of forming an oxide film with a film thickness of 5nm or less by containing the aforementioned water-oxygen.

In the method of manufacturing a semiconductor integrated circuit device of the present invention, the concentration of the aforementioned water is 40% or less.

In the method of manufacturing a semiconductor integrated circuit device of the present invention, the concentration of the aforementioned water is 0.5 to 5%.

The manufacturing method of the semiconductor integrated circuit device of the present invention includes the following processes (a) to (c):

(a) A process in which the semiconductor wafer with the first oxide film formed on the main surface is transported to the washing section, and the first oxide film is removed by explicit washing.

(b) Do not expose the aforementioned semiconductor wafer to the atmosphere, but move it from the aforementioned washing part to The process of oxidation treatment part in inert gas atmosphere,

(c) Supply low-concentration oxygen containing water generated from hydrogen and oxygen due to the action of a catalyst to the main surface of the semiconductor wafer or its vicinity heated to a predetermined temperature to ensure at least the reproducibility of the oxide film formation and the thickness of the oxide film A process of forming a second oxide film with a film thickness of 5 nm or less at a uniform oxide film growth rate.

In the method of manufacturing a semiconductor integrated circuit device of the present invention, the second oxide film includes a natural oxide film and an initial oxide film in a part of the second oxide film, and the natural oxide film is formed after the first oxide film is removed until the second oxide film is formed However, it is not desirable to be formed on the surface of the semiconductor wafer. The initial oxide film is undesirably formed on the surface of the semiconductor wafer due to the contact with the oxygen. The total film thickness of the natural oxide film and the initial oxide film is the aforementioned The second oxide film is less than half of the total film thickness.

In the method of manufacturing a semiconductor integrated circuit device of the present invention, the total film thickness of the natural oxide film and the initial oxide film is one-third or less of the total film thickness of the second oxide film.

The manufacturing method of the semiconductor integrated circuit device of the present invention includes a process of removing the first oxide film formed in the first region of the semiconductor wafer after forming the first oxide film in the first region and the second region of the semiconductor wafer And a process of forming a second oxide film on the first insulating film remaining in the first region and the second region of the semiconductor wafer, forming at least one of the first and second oxide films by the aforementioned method.

The main outline of the present invention is divided into items as follows: 1. The manufacturing method of a semiconductor integrated circuit device composed of the following processes: (a) The process of synthesizing water from oxygen and hydrogen using a catalyst at a temperature of 500 degrees Celsius; (b) Under the following conditions: The proportion of the synthesized water partial pressure in the total atmospheric pressure is in the range of 0.5% to 5%, and the silicon surface on the wafer is heated in an oxidizing atmosphere not dominated by hydrogen To above 800 degrees Celsius; the process of forming a silicon oxide film that should be the gate insulating film of the field-effect transistor by thermal oxidation on the above-mentioned silicon surface.

2. The method for manufacturing a semiconductor integrated circuit device according to the above item 1, wherein the oxidizing atmosphere contains oxygen as a main component.

3. The method for manufacturing a semiconductor integrated circuit device according to the above item 1 or 2, wherein the catalyst is made to act on a mixed gas of oxygen and hydrogen to synthesize the water.

4. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 1 to 3, wherein the oxidizing atmosphere is supplied to the periphery of the wafer while the thermal oxidation is performed.

5. The manufacturing method of semiconductor integrated circuit devices composed of the following processes: (a) The process of synthesizing water from oxygen and hydrogen using a catalyst at a temperature below 500 degrees Celsius; (b) Under the following conditions: the total atmospheric pressure The synthesized water partial pressure ratio is in the range of 0.5% to 5%, and the silicon surface on the wafer is heated to over 800 degrees Celsius in an oxidizing atmosphere containing oxygen; the silicon surface is thermally oxidized to form a stress The manufacturing process of silicon oxide film which becomes the gate insulating film of field effect transistor.

6. The method for manufacturing a semiconductor integrated circuit device according to the above item 5, wherein the thermal oxidation is performed using a hot fireplace.

7. The method of manufacturing a semiconductor integrated circuit device according to the above item 5, wherein the thermal oxidation is performed using a lamp heating furnace.

8. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 5 to 7, wherein the gas containing the moisture synthesized above is diluted with a gas other than moisture and supplied as the oxidizing atmosphere.

9. The method for manufacturing the semiconductor integrated circuit device according to any one of the above items 5 to 8 further comprises the following process: (c) not exposing the wafer on which the oxide film is formed to outside air or other oxidizing properties In the atmosphere, the surface treatment process is applied in an atmosphere containing nitrogen oxide.

10. The manufacturing method of the semiconductor integrated circuit device composed of the following processes: (a) The process of using a catalyst to generate water at a temperature below 500 degrees Celsius; (b) Under the following conditions: the synthesized atmosphere is occupied by the entire atmospheric pressure The above water partial pressure ratio is in the range of 0.5% to 5%. In an oxidizing atmosphere containing oxygen, the silicon surface on the wafer is heated to above 800 degrees Celsius; the silicon surface is formed by thermal oxidation and should become field effect electricity. The manufacturing process of the silicon oxide film of the gate insulating film of the crystal.

11. The method for manufacturing a semiconductor integrated circuit device according to the above item 10, wherein the oxidizing atmosphere contains oxygen as a main component.

12. The method for manufacturing a semiconductor integrated circuit device according to the above item 10 or 11, wherein the oxidizing atmosphere is supplied to the periphery of the wafer on one side, and the thermal oxidation is performed on the other side.

13. The manufacturing method of semiconductor integrated circuit devices composed of the following processes: (a) The process of synthesizing water from oxygen and hydrogen using a catalyst at a temperature of 500 degrees Celsius; (b) the synthesis of the total atmospheric pressure occupied by the supply atmosphere The above-mentioned water partial pressure ratio is in the range of 0.5% to 5% and an oxidizing atmosphere containing oxygen will give The silicon surface is heated to over 800 degrees Celsius on the periphery of the wafer, and the silicon surface is thermally oxidized to form a silicon oxide film that should be the gate insulating film of the field-effect transistor.

14. The method for manufacturing a semiconductor integrated circuit device according to the above item 13, wherein the oxidizing atmosphere contains oxygen as a main component.

15. The method of manufacturing a semiconductor integrated circuit device according to the above item 13 or 14, wherein the above-mentioned catalyst is allowed to act on a mixed gas of oxygen and hydrogen to synthesize the above-mentioned water.

16. The manufacturing method of a semiconductor integrated circuit device composed of the following processes: (a) The process of synthesizing moisture from oxygen and hydrogen using a catalyst at the moisture synthesis section below 500 degrees Celsius; (b) One side is installed in the moisture synthesis section The narrow part of the supply atmosphere between the oxidation treatment part and the oxidation treatment part accounts for the above-mentioned moisture partial pressure ratio of the total pressure in the range of 0.5% to 5%, and the oxidizing atmosphere containing oxygen heats the silicon surface to 800 degrees Celsius or more. The process of forming a silicon oxide film that should be the gate insulating film of the field-effect transistor by thermal oxidation on the surface of the silicon in the oxidation treatment section on the periphery of the wafer.

17. The method for manufacturing a semiconductor integrated circuit device according to the above item 16, wherein the oxidizing atmosphere contains oxygen as a main component.

18. The method for manufacturing a semiconductor integrated circuit device according to the above item 16 or 17, wherein the catalyst is made to act on a mixed gas of oxygen and hydrogen to synthesize the water.

19. The manufacturing method of the semiconductor integrated circuit device composed of the following processes: (a) The process of synthesizing water from oxygen and hydrogen using a catalyst; (b) A process of diluting the first gas containing the synthesized moisture with a second gas other than moisture; (c) a process of introducing the diluted first gas into a processing area; (d) in the processing area, A process of thermally oxidizing the silicon surface on the wafer in the introduced first gas atmosphere to form a silicon oxide film that should be the gate insulating film of the field effect transistor.

20. The method for manufacturing a semiconductor integrated circuit device according to the above item 19, wherein the oxidizing atmosphere contains oxygen as a main component.

21. The method of manufacturing a semiconductor integrated circuit device according to the above item 19 or 20, wherein the thermal oxidation is performed at a temperature of 800 degrees Celsius or more.

22. The method for manufacturing a semiconductor integrated circuit device according to any one of items 19 to 21, wherein the oxidizing atmosphere is supplied to the periphery of the wafer while the thermal oxidation is performed.

23. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process in which a moisture synthesis catalyst acts on a mixed gas of oxygen and hydrogen to generate a first gas containing moisture; (b) In addition to moisture The process of diluting the first gas with the second gas; (c) the process of introducing the diluted first gas into the processing area; (d) in the processing area, in the introduced first gas atmosphere in the wafer The silicon surface on the upper surface is thermally oxidized to form a silicon oxide film that should become the gate insulating film of the field-effect transistor.

24. The method for manufacturing a semiconductor integrated circuit device according to the above item 23, wherein the oxidizing atmosphere contains oxygen as a main component.

25. The manufacturer of the semiconductor integrated circuit device according to item 23 or 24 above Method in which the above-mentioned thermal oxidation is performed at a temperature above 800 degrees Celsius.

26. The method of manufacturing a semiconductor integrated circuit device according to any one of the above items 23 to 25, wherein the oxidizing atmosphere is supplied to the periphery of the wafer on one side, and the thermal oxidation is performed on the side.

27. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) a process of generating a first gas containing moisture by the action of a catalyst; (b) diluting the first gas with a second gas other than moisture (C) The process of introducing the diluted first gas into the processing area; (d) In the processing area, the silicon surface on the wafer is thermally oxidized in the introduced first gas atmosphere to form a response The manufacturing process of silicon oxide film which becomes the gate insulating film of field effect transistor.

28. The method of manufacturing a semiconductor integrated circuit device according to the above item 27, wherein the oxidizing atmosphere contains oxygen as a main component.

29. The method of manufacturing a semiconductor integrated circuit device according to the above item 27 or 28, wherein the thermal oxidation is performed at 800 degrees Celsius or more.

30. The method for manufacturing a semiconductor integrated circuit device according to any one of items 27 to 29, wherein the oxidizing atmosphere is supplied to the periphery of the wafer while the thermal oxidation is performed.

31. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process in which a moisture synthesis catalyst acts on a mixed gas of oxygen and hydrogen to generate a first gas containing moisture; (b) Using oxygen as The process of diluting the first gas with the second gas of the main component; (c) the process of introducing the diluted first gas into the processing area; (d) A process of forming a silicon oxide film that should be the gate insulating film of the field effect transistor by thermal oxidation on the silicon surface on the wafer in the introduced first gas atmosphere in the above-mentioned processing area.

32. The method for manufacturing a semiconductor integrated circuit device according to the above item 31, wherein the oxidizing atmosphere contains oxygen as a main component.

33. The method of manufacturing a semiconductor integrated circuit device according to the above item 31 or 32, wherein the thermal oxidation is performed at a temperature of 800 degrees Celsius or more.

34. The method of manufacturing a semiconductor integrated circuit device according to any one of the above items 31 to 33, wherein the oxidizing atmosphere is supplied to the periphery of the wafer on one side, and the thermal oxidation is performed on the side.

35. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process in which surface treatment is applied to the silicon surface on the wafer to wash the surface or remove the surface film; (b) After the above process, no The above-mentioned wafer is actually exposed to an oxidizing atmosphere and transferred to a process of oxidation treatment part; (c) A process of synthesizing moisture from oxygen and hydrogen using a catalyst; (d) In an atmosphere containing the above-mentioned synthesized moisture, The process of forming a silicon oxide film on the silicon surface by thermal oxidation.

36. The method for manufacturing a semiconductor integrated circuit device according to the above item 35, wherein the silicon oxide film should be the gate of the MOS transistor.

37. The method for manufacturing the semiconductor integrated circuit device according to the above item 36 is further composed of the following process: (e) The wafer on which the oxide film is formed is not exposed to outside air or other oxidizing atmosphere, but contains Surface treatment in an atmosphere of nitric oxide Procedure.

38. The method for manufacturing the semiconductor integrated circuit device according to the above item 37 is further composed of the following process: (f) The wafer subjected to the surface treatment is not exposed to the outside air or other oxidizing atmosphere, but The process of vapor deposition forming the electrode material that should become the gate electrode.

39. The method for manufacturing the semiconductor integrated circuit device according to the above item 36 is further composed of the following process: (f) not exposing the wafer on which the oxide film is formed to outside air or other oxidizing atmosphere, but using air The process of phase deposition to form the electrode material that should become the gate electrode.

40. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 35 to 39, wherein the oxidation process is performed by heating with a lamp.

41. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process in which surface treatment is applied to the silicon surface on the wafer to clean the surface or remove the surface film; (b) After the above process, no The above-mentioned wafer is actually exposed to an oxidizing atmosphere and transferred to the process of oxidation treatment part; (c) A process of generating moisture using a catalyst; (d) In an atmosphere containing the above-mentioned synthesized moisture, on the surface of the silicon The process of forming a silicon oxide film by thermal oxidation.

42. The method for manufacturing a semiconductor integrated circuit device according to the above item 41, wherein the silicon oxide film should be the gate of the MOS transistor.

43. The manufacturer of the above-mentioned semiconductor integrated circuit device according to the above item 42 The method further consists of the following processes: (e) a process of applying surface treatment in an atmosphere containing nitrogen oxide without exposing the wafer on which the oxide film is formed to outside air or other oxidizing atmosphere.

44. The method for manufacturing the above-mentioned semiconductor integrated circuit device according to the above-mentioned item 43 further comprises the following process: (f) not exposing the above-mentioned wafer subjected to the above-mentioned surface treatment to outside air or other oxidizing atmosphere, but The process of vapor deposition forming the electrode material that should become the gate electrode.

45. The method for manufacturing the semiconductor integrated circuit device according to the above item 42 is further composed of the following process: (f) not exposing the wafer on which the oxide film is formed to outside air or other oxidizing atmospheres, but using air The process of phase deposition to form the electrode material that should become the gate electrode.

46. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 41 to 45, wherein the oxidation process is performed by lamp heating.

47. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process of synthesizing moisture from oxygen and hydrogen using a catalyst; (b) In an atmosphere containing the above-mentioned synthesized moisture, on a wafer The silicon surface is thermally oxidized to form the silicon oxide film that should become the gate insulating film of the field-effect transistor; (c) After the above process, the silicon oxide film is formed on the silicon oxide film without contacting the outside air. A process of surface treatment in a nitrogen oxide gas atmosphere.

48. The method for manufacturing a semiconductor integrated circuit device according to the above item 47, wherein the silicon oxide film should be the gate of the MOS transistor.

49. The method for manufacturing the semiconductor integrated circuit device according to the above item 48 is further composed of the following process: (e) The wafer on which the oxide film is formed is not exposed to outside air or other oxidizing atmospheres, but contains A process of surface treatment in an atmosphere of nitrogen oxide.

50. The method for manufacturing the semiconductor integrated circuit device according to the above item 49 is further composed of the following process: (f) The wafer subjected to the surface treatment is not exposed to the outside air or other oxidizing atmosphere, but The process of vapor deposition forming the electrode material that should become the gate electrode.

51. The method for manufacturing the semiconductor integrated circuit device according to the above item 48 is further composed of the following process: (f) not exposing the wafer on which the oxide film is formed to outside air or other oxidizing atmospheres, but using air The process of phase deposition to form the electrode material that should become the gate electrode.

52. The method of manufacturing a semiconductor integrated circuit device according to any one of the above items 47 to 51, wherein the oxidation process is performed by heating with a lamp.

53. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) a process of forming element separation grooves on the silicon surface of a wafer; (b) a process of forming an external insulating film in the aforementioned element separation grooves (C) The process of flattening the silicon surface and exposing the part where the thermal oxide film on the silicon surface should be formed; (d) A process of synthesizing moisture with a catalyst, and forming a thermal oxide film that should become the gate insulating film of the field-effect transistor on the exposed part in an atmosphere containing the moisture.

54. The method of manufacturing a semiconductor integrated circuit device according to the above item 53, wherein the planarization is performed by a chemical mechanical method.

55. The method for manufacturing a semiconductor integrated circuit device according to the above item 53 or 54, wherein the planarization is performed by chemical mechanical polishing.

56. The method of manufacturing a semiconductor integrated circuit device according to any one of the above items 53 to 55, wherein the insulating film from the outside is formed by CVD (Chemical Vapor Deposition).

57. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) a process of forming element separation grooves on the silicon surface on a wafer; (b) a process of depositing an insulating film in the aforementioned element separation groove; (c) A process of synthesizing moisture with a catalyst, and forming a thermal oxide film that should become the gate insulating film of the field effect transistor on the silicon surface surrounded by the element separation groove in an atmosphere containing the moisture.

58. The method for manufacturing the semiconductor integrated circuit device according to the above item 57 further comprises the following process: (d) after the process (b), the surface of the silicon is flattened to expose a thermal oxide film that should form the surface of the silicon Part of the manufacturing process.

59. The method for manufacturing a semiconductor integrated circuit device according to the above-mentioned item 57 or 58, wherein the above-mentioned planarization is performed by a chemical mechanical method.

60. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 57 to 59, wherein the planarization is performed by chemical mechanical polishing.

61. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 57 to 60, wherein the insulating film from the outside is formed by CVD (Chemical Vapor Deposition).

62. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) In an oxidizing atmosphere with a water partial pressure ratio of 0.5% to 5% in the total atmospheric pressure, heating the crystal with a lamp The silicon surface on the circle is thermally oxidized on the silicon surface to form a silicon oxide film that should be the gate insulating film of the field-effect transistor.

63. The method for manufacturing a semiconductor integrated circuit device according to the above item 62, wherein the oxidizing atmosphere contains oxygen as a main component.

64. A method for manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process in which a catalyst acts on a mixed gas of oxygen and hydrogen to generate a first gas containing moisture; (b) A first gas other than moisture The process of diluting the first gas with two gases; (c) the process of introducing the diluted first gas into the processing area; (d) in the processing area, in the first gas atmosphere introduced on the wafer The process of forming a silicon oxide film that should be the gate insulating film of the field effect transistor by thermal oxidation of the silicon surface heated by a lamp.

65. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process of preheating to the extent that moisture does not condense, and introducing unprocessed wafers into an oxidation treatment section that is actually kept in a non-oxidizing atmosphere; ( b) In the oxidation treatment section, in an oxidizing atmosphere where the water partial pressure ratio of the total atmospheric pressure is 0.1% or more, the silicon surface on the introduced wafer is heated by a lamp, and the silicon Thermal oxidation The process of forming a silicon oxide film that should be the gate insulating film of a field effect transistor.

66. The method for manufacturing a semiconductor integrated circuit device according to the above item 65, wherein the non-oxidizing atmosphere is mainly nitrogen gas and a small amount of oxygen gas is added.

67. The method of manufacturing a semiconductor integrated circuit device according to the above item 65 or 66, wherein the preheating temperature is from 100 degrees Celsius to 500 degrees Celsius.

68. The method of manufacturing a semiconductor integrated circuit device according to any one of the above items 65 to 67, wherein the surface temperature of the wafer during the oxidation treatment is 700 degrees Celsius or more.

69. The method for manufacturing the semiconductor integrated circuit device according to any one of the above items 65 to 68, wherein the non-oxidizing atmosphere is preheated to the extent that moisture does not condense, and then introduced into the oxidation treatment section.

70. The method of manufacturing the semiconductor integrated circuit device according to any one of the above items 65 to 69, wherein the wafer is preheated to the extent that moisture does not condense, and then introduced into the oxidation treatment section.

71. The method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) Under the following conditions: the proportion of the partial pressure of water in the total pressure of the atmosphere is in the range of 0.5 to 5%, in an oxidizing atmosphere containing oxygen In this process, the silicon surface on the wafer is heated to above 800 degrees Celsius; the silicon surface is thermally oxidized to form a silicon oxide film with a thickness of less than 5nm, which should become the gate insulating film of the field-effect transistor.

72. The method for manufacturing a semiconductor integrated circuit device according to the above item 71, wherein the oxidizing atmosphere contains oxygen as a main component.

73. The method of manufacturing a semiconductor integrated circuit device according to the above item 71 or 72, wherein one side supplies the above-mentioned oxidizing atmosphere to the periphery of the above-mentioned wafer, and one side Perform the above thermal oxidation.

74. The manufacturing method of a semiconductor integrated circuit device composed of the following process: (a) The proportion of the partial pressure of water in the total atmospheric pressure is in the range of 0.5% to 5%. In an oxidizing atmosphere containing oxygen, the crystal A process in which the silicon surface on the circle is thermally oxidized to form a silicon oxide film that should become the tunnel insulating film of the flash memory.

75. The method for manufacturing a semiconductor integrated circuit device according to the above item 74, wherein the oxidizing atmosphere contains oxygen as a main component.

76. The method for manufacturing a semiconductor integrated circuit device according to the above item 74 or 75, wherein the oxidizing atmosphere is supplied to the periphery of the wafer on one side, and the thermal oxidation is performed on the other side.

77. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process in which moisture is generated by a catalyst; (b) At the same time, an atmosphere gas containing moisture generated by the catalyst is supplied to the first oxidation treatment section, A process of forming a first thermal oxide film on the first silicon surface area on the wafer in the first oxidation treatment section; (c) before the process (a) or after the process (b), by making oxygen and The process of generating water by burning hydrogen; (d) supplying an atmosphere gas containing the moisture generated by combustion to the first or second oxidation treatment part, and the second oxidation treatment part in the second oxidation treatment part, and the second oxidation treatment part on the above-mentioned wafer The process of forming a second thermal oxide film on the silicon surface area.

78. The manufacturing method of a semiconductor integrated circuit device composed of the following processes: (a) In an oxidizing atmosphere with a water partial pressure ratio of 0.5% to 5% in the total atmospheric pressure, the wafer master is maintained The surface actually becomes water In a flat state, the silicon surface on the main surface of the wafer is thermally oxidized to form a silicon oxide film that should be the gate insulating film of the MOS transistor.

79. The manufacturing method of semiconductor integrated circuit device composed of the following processes: (a) Under the condition of non-explosive temperature, use a non-stoichiometric mixed gas of oxygen and hydrogen rich in oxygen than the stoichiometric ratio corresponding to water The process of synthesizing moisture by the catalyst; (b) the process of forming a silicon oxide film by thermal oxidation on the silicon surface on the wafer in an oxidizing atmosphere containing the synthesized moisture.

80. A method of manufacturing a semiconductor integrated circuit device composed of the following processes: (a) A process in which the processed wafer is introduced into an oxidation treatment section, which is maintained in a non-oxidative environment that contains a small amount of oxygen to the extent that the oxidation does not actually proceed. The high temperature of oxidizing atmosphere above 700 degrees Celsius; (b) The process of synthesizing moisture from oxygen and hydrogen using catalysts below 500 degrees Celsius; (c) In the above oxidation treatment section, under the following conditions: in the overall atmospheric pressure In an oxidizing atmosphere where the proportion of the synthesized water partial pressure is 0.5% to 5%, and the silicon surface on the wafer is heated to 700 degrees Celsius or more; the thermal oxidation on the silicon surface should become a field-effect electricity The manufacturing process of the silicon oxide film of the gate insulating film of the crystal.

(Other outlines of the invention in this case, etc.)

The summary of the above and other inventions in this case are shown as follows:

A. A method of manufacturing a semiconductor integrated circuit device, characterized in that it includes the following processes (a), (b):

(a) The process of producing water from hydrogen and oxygen as a catalyst,

(b) Supply low-concentration oxygen containing the aforementioned water to or near the main surface of the semiconductor wafer heated to a predetermined temperature to ensure at least the reproducibility of the oxide film formation and the uniformity of the oxide film thickness. A process that forms an oxide film with a thickness of 5nm or less on the main surface of the wafer.

B. The method for manufacturing a semiconductor integrated circuit device according to the above item A, wherein the aforementioned oxide film is a gate oxide film of a MOSFET.

C. The method of manufacturing a semiconductor integrated circuit device according to the above item A, wherein the thickness of the oxide film is 3 nm or less.

D. The method of manufacturing a semiconductor integrated circuit device according to the above item A, wherein the heating temperature of the semiconductor wafer is 800 to 900°C.

E. The method of manufacturing a semiconductor integrated circuit device according to the above item A, wherein after the (b) process, the main surface of the semiconductor wafer is treated with nitrogen oxide to separate the nitrogen from the interface between the oxide film and the substrate .

F. The method of manufacturing a semiconductor integrated circuit device according to the above item A, wherein the formation of the aforementioned oxide film is performed by a single chip process.

G. The method for manufacturing a semiconductor integrated circuit device according to the above item A, wherein the formation of the aforementioned oxide film is performed in a batch arrangement.

H. A method for manufacturing a semiconductor integrated circuit device, characterized in that it includes the following manufacturing processes:

(a) The process of producing water from hydrogen and oxygen as a catalyst,

(b) By supplying oxygen to or near the main surface of the semiconductor wafer heated to a predetermined temperature, the oxygen system can obtain a concentration that is superior to that of an oxide film formed in a dry oxygen atmosphere that does not contain at least water. The process of forming an oxide film with a thickness of 5nm or less on the main surface of the semiconductor wafer containing the aforementioned water and oxygen By.

I. The method for manufacturing a semiconductor integrated circuit device according to the above item H, wherein the concentration of the aforementioned water is 40% or less.

J. The method for manufacturing a semiconductor integrated circuit device according to the above item H, wherein the concentration of the aforementioned water is 0.5 to 5%.

K. The method for manufacturing a semiconductor integrated circuit device according to the above item H, wherein the thickness of the oxide film is 3 nm or less.

L. A method of manufacturing a semiconductor integrated circuit device, characterized in that it includes the following manufacturing processes (a) to (c);

(a) A process in which the semiconductor wafer with the first oxide film formed on the main surface is transported to the cleaning section, and the first oxide film is removed by wet cleaning,

(b) The process of transporting the semiconductor wafer from the cleaning part to the oxidation treatment part in an inert gas atmosphere without exposing the aforementioned semiconductor wafer to the atmosphere,

(c) Supply low-concentration oxygen containing water generated from hydrogen and oxygen due to the action of a catalyst to the main surface of the semiconductor wafer or its vicinity heated to a predetermined temperature to ensure at least the reproducibility of the oxide film formation and the thickness of the oxide film A process of forming a second oxide film with a thickness of 5 nm or less on the main surface of the semiconductor wafer at a uniform oxide film growth rate.

M. The method for manufacturing a semiconductor integrated circuit device according to the above item L, wherein the thickness of the oxide film is 3 nm or less.

N. The method of manufacturing a semiconductor integrated circuit device according to the above item L, wherein the second oxide film contains a natural oxide film and an initial oxide film in a part thereof, and the natural oxide film is formed after the first oxide film is removed to the formation of the natural oxide film Between the second oxide films, it is undesirable to be formed on the surface of the aforementioned semiconductor wafer, The initial oxide film is undesirably formed on the surface of the semiconductor wafer due to the contact with the oxygen. The total film thickness of the natural oxide film and the initial oxide film is less than half of the total film thickness of the second oxide film .

O. The method for manufacturing a semiconductor integrated circuit device according to the above item L, wherein the total film thickness of the natural oxide film and the initial oxide film is less than one-third of the total film thickness of the second oxide film.

P. A method of manufacturing a semiconductor integrated circuit device, comprising: after forming a first oxide film in a first region and a second region of a semiconductor wafer, removing the first oxide film formed in the first region of the semiconductor wafer The process of forming an oxide film and the process of forming a second oxide film on the first insulating film left in the first region and the second region of the semiconductor wafer may include the processes (a), ( The method of b) forms at least one of the aforementioned first and second oxide films.

FIG. 1 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 2 is a plan view showing the main parts of the method of manufacturing the semiconductor integrated circuit device according to the first embodiment of the present invention.

FIG. 3 is a plan view showing the main parts of the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 4 is a plan view showing the main parts of the method of manufacturing the semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 5 is a plan view showing the main parts of the method of manufacturing the semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 6 is a plan view showing the main parts of the method of manufacturing the semiconductor integrated circuit device according to the first embodiment of the present invention.

FIG. 7 is a plan view showing the main part of the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 8 is a plan view showing the main parts of the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 9 is a schematic diagram of a monolithic oxide film forming apparatus for forming a gate oxide film.

Fig. 10 is a plan view showing the main parts of the manufacturing method of the semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 11 (a) is a schematic plan view showing an example of the structure of the oxide film forming chamber, and (b) is a cross-sectional view taken along the line BB' of (a).

Fig. 12 (a) is a schematic plan view showing another example of the structure of the oxide film forming chamber, and (b) is a cross-sectional view taken along the line BB' of (a).

Fig. 13 is a schematic diagram showing a catalyst-based moisture generator connected to a chamber of the oxide film forming chamber.

Fig. 14 is a schematic diagram showing a part of Fig. 13 enlarged.

FIG. 15 is an explanatory diagram showing an example of the sequence of forming a gate oxide film.

Fig. 16 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 17 is a graph showing the dependence of the moisture concentration on the growth rate of the oxide film.

FIG. 18 is a graph showing the dependence of the moisture concentration on the initial withstand voltage of the oxide film of the MOS diode.

FIG. 19 is a graph showing the correlation between the water concentration and the amount of voltage change when a constant current flows between the electrodes of the MOS diode.

FIG. 20 is an explanatory diagram showing the film thickness distribution in the wafer surface of the gate oxide film.

Fig. 21 is a graph showing the composition details of the gate oxide film.

Fig. 22 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention.

FIG. 23 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention.

FIG. 24 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention.

FIG. 25 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention.

FIG. 26 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the first embodiment of the present invention.

Fig. 27 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention.

Fig. 28 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention.

Fig. 29 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention.

Fig. 30 is a cross-sectional view showing another example of the structure of the oxide film forming chamber.

FIG. 31 is an explanatory diagram showing an example of the sequence of forming a gate oxide film.

Fig. 32 is a cross-sectional view of a main part showing a method of manufacturing a semiconductor integrated circuit device according to the second embodiment of the present invention.

Fig. 33 is a schematic diagram showing another example of the oxide film forming method according to the present invention.

34 is a cross-sectional view of the main part showing another example of the method of manufacturing the semiconductor integrated circuit device according to the present invention.

The best form of invention

Hereinafter, embodiments of the present invention will be described in detail based on the drawings. In addition, in all the drawings describing the embodiment, the same reference numerals are attached to members having the same function, and repeated descriptions thereof will be omitted.

In addition, for the convenience of description, the description will be divided into several embodiments or items. Of course, these embodiments or items are not loose, but have some other variants, some process details, and devices used in some processes. relation. That is, when the various devices or unit processes described in a series of embodiments are generally applicable to other embodiments, they will not be repeated one by one. In addition, on the contrary, when each device or unit manufacturing process described independently is generally applicable to other embodiments, it will not be repeated one by one.

(Semiconductor Process A)

1 to FIG. 26 (mainly FIGS. 1 to 8, 10, 16 and 22 to 26) are used to illustrate the CMOSFET (Complementary Metal Oxide Semiconductor Field Effect Transistor) manufacturing method of this embodiment.

First, as shown in FIG. 1, a semiconductor substrate 1 made of single crystal silicon with a resistivity of about 10 Ωcm is heat-treated to form a thin silicon oxide film 2 with a thickness of about 10 nm on its main surface (thermal oxidation process A1), and then oxidized there. A silicon nitride film 3 with a film thickness of about 100 nm is deposited on the silicon film 2 by a CVD method. Next, as shown in FIG. 2, a photoresist for opening the element separation area is formed on the silicon nitride film 3. 4. Using the photoresist 4 as a mask, the silicon nitride film 3 is patterned.

Next, after removing the photoresist 4, as shown in FIG. 3, using the silicon nitride film 3 as a mask, the silicon oxide film 2 and the semiconductor substrate 1 are sequentially etched to form a groove 5a with a depth of approximately 350 nm in the semiconductor substrate 1, and then apply A silicon oxide film 6 is formed on the inner wall of the groove 5a by thermal oxidation treatment at 900 to 1150°C (thermal oxidation process A2).

Secondly, as shown in Figure 4, for example, ozone (O₃) And tetraethoxysilane ((C₂H₂H₅O)₄Si) The CVD method used for the source gas deposits the silicon oxide film 7 with a film thickness of about 800 nm on the semiconductor substrate 1. As shown in FIG. 5, the silicon oxide film 7 is polished by the chemical mechanical polishing (CMP) method, By using the silicon nitride film 3 as a polishing stopper and leaving only the silicon oxide film 7 inside the groove 5a, the element separation groove 5 is formed. Next, a heat treatment of about 1000° C. is applied to make the silicon oxide film 7 inside the element separation groove 5 dense.

Next, after the silicon nitride film 3 is removed by wet etching using hot phosphoric acid, as shown in FIG. 6, the photoresist 8 in the p-channel MOSFET formation region (left side of the figure) is used as a mask, and the semiconductor substrate 1 Ion implantation of impurities that form an n-type well, and ion implantation of impurities that adjust the threshold voltage of a p-channel MOSFET. The impurity used to form the n-type well is, for example, P (phosphorus), with energy = 360 keV and dose = 1.5×10¹³/cm²Ion implantation. In addition, the impurity for adjusting the threshold voltage is, for example, P, with energy=40keV, dose=2×10¹²/cm²Ion implantation.

Next, after the photoresist 8 is removed, as shown in FIG. 7, the photoresist 9 in the n-channel MOSFET formation region (right side of the figure) is used as a mask, and the semiconductor substrate 1 is ion-implanted to form a p-type well. Impurities, and ion implantation Impurities that adjust the threshold voltage of n-channel MOSFETs. The impurity used to form the p-type well is, for example, B (boron), with energy=200keV, dose=1.0×10¹³/cm²Ion implantation. In addition, the impurity for adjusting the threshold voltage, such as boron fluoride (BF₂), with energy=40keV, dose=2×10¹²/cm²Ion implantation.

Next, after the photoresist 9 is removed, as shown in FIG. 8, the n-type and p-type impurities are extended and diffused by heat-treating the semiconductor substrate 1 at a temperature of 950°C for 1 minute. The semiconductor substrate 1 in the p-channel MOSFET formation region An n-type well 10 is formed, and a p-type channel region 12 is formed near its surface. In addition, at the same time, a p-type well 11 is formed in the semiconductor substrate 1 in the n-channel type MOSFET formation region, and an n-type channel region 13 is formed near the surface thereof.

Next, a gate oxide film is formed on each surface of the n-type well 10 and the p-type well 11 by the following method (thermal oxidation process A3).

Fig. 9 is a schematic diagram of a monolithic oxide film forming apparatus for forming a gate oxide film. As shown in the figure, the oxide film forming apparatus 100 is connected to the back stage of the cleaning apparatus 101, which removes the oxide film on the surface of the semiconductor wafer 1A by a wet cleaning method before forming the gate oxide film. By adopting this cleaning-oxidation continuous processing system, the semiconductor wafer 1A delivered for cleaning in the cleaning device 101 can be transported to the oxide film forming device 100 in a short time without contacting the atmosphere. Therefore, the oxide film is removed before the gate is formed. Between the oxide films, it is possible to suppress the formation of a natural oxide film on the surface of the semiconductor wafer 1A as much as possible.

The semiconductor wafer 1A loaded into the loader 102 of the washing device 101 is first moved to the washing chamber 103 and delivered, for example, NH₄OH+H₂O₂+H₂After the washing treatment of O and other washing liquid, it is moved to the hydrofluoric acid washing chamber 104, and the dilute hydrofluoric acid (HF+H₂O) The washing process removes the silicon oxide film on the surface (Figure 10). After that, half The conductor wafer 1A is moved to the drying chamber 105, and is subjected to a drying process to remove moisture on the surface. The moisture remaining on the surface of the semiconductor wafer 1A can cause structural defects such as Si-H and Si-OH in the gate oxide film or the gate oxide film/silicon interface to form charge traps, and therefore needs to be sufficiently removed.

The semiconductor wafer 1A after the drying process passes through the buffer 106 and is immediately transferred to the oxide film forming apparatus 100.

The oxide film forming apparatus 100 is configured in a multi-chamber system. The multi-chamber system includes, for example, an oxide film forming chamber 107, a nitrogen oxide film forming chamber 108, a cooling table 109, a loading and unloading device 110, and the like. Circle 1A carries in and carries out the robot hand 113 of each of the above-mentioned processing chambers. In order to minimize the formation of a natural oxide film on the surface of the semiconductor wafer 1A due to the intrusion of the atmosphere, the inside of the transport system 112 is maintained in an inert gas atmosphere such as nitrogen. In addition, in order to minimize the adhesion of moisture to the surface of the semiconductor wafer 1A, the inside of the conveying system 112 maintains an ultra-low moisture atmosphere at the ppb (parts per billion) level. The semiconductor wafer 1A loaded into the oxide film forming apparatus 100 is first transferred to the oxide film forming chamber 107 in units of one piece or two pieces through the robot 113.

FIG. 11(a) is a schematic plan view showing an example of a specific structure of the oxide film forming chamber 107, and FIG. 11(b) is a cross-sectional view taken along the line BB' of FIG. 11(a).

The oxide film forming chamber 107 includes a chamber 120 composed of a multi-walled quartz tube, and heaters 121a and 121b for heating the semiconductor wafer 1A are provided at the upper and lower portions thereof. The chamber 120 contains a disc-shaped heat equalizing ring 122, which distributes the heat supplied by the heaters 121a and 121b evenly to the entire surface of the semiconductor wafer 1A, and the upper part of the disc-shaped heat equalizing ring 122 is mounted to maintain the level of the semiconductor wafer 1A of the base 123. The soaking ring 122 is made of quartz or SiC (silicon carbide), etc. It is made of a heat-resistant material and is supported by a support arm 124 extending from the wall surface of the chamber 120. A thermocouple 125 is provided near the heat equalizing ring 122, and the thermocouple 125 measures the temperature of the semiconductor wafer 1A held on the susceptor 123. In addition to the heating method of the heaters 121a and 121b, the heating method of the semiconductor wafer 1A may also be a lamp 130 heating method such as that shown in FIG. 12.

A part of the wall surface of the chamber 120 is connected to one end of a gas introduction pipe 126 that introduces water, oxygen, and purge gas into the chamber 120. The other end of this gas introduction pipe 126 is connected to a catalyst-based moisture generator described later. A partition wall 128 having a large number of through holes 127 is provided near the gas introduction pipe 126, and the gas introduced into the chamber 120 passes through the through holes 127 of the partition wall 128 to uniformly spread into the chamber 120. The other part of the wall surface of the chamber 120 is connected to one end of an exhaust pipe 129 for discharging the gas introduced into the chamber 120.

13 and FIG. 14 are schematic diagrams showing a catalyst-based moisture generator connected to the chamber 120 described above. This moisture generator 140 is equipped with a reactor 141 composed of a heat-resistant and corrosion-resistant alloy (for example, a nickel alloy known as the product name "Hastelloy", etc.), and contains Pt (platinum), Ni (nickel) ) Or Pd (palladium) and other catalytic metal composed of a coil 142 and a heater 143 that heats the coil 142.

A process gas composed of hydrogen and oxygen and a purge gas composed of an inert gas such as nitrogen or Ar (argon) are introduced from the gas storage tanks 144 a, 144 b, and 144 c into the above-mentioned reactor 141 through the pipe 145. In the middle of the piping 145, mass flow controllers 146a, 146b, 146c for adjusting the amount of gas and on-off valves 147a, 147b, 147c for opening and closing the gas flow path are installed to precisely control the amount and composition of the gas introduced into the reactor 141. Compare.

The process gas (hydrogen and oxygen) introduced into the reactor 141 contacts the coil 142 heated to about 350 to 450°C and is excited to generate hydrogen radicals (H₂2H^﹡), from oxygen molecules to generate oxygen (O₂2O^﹡). These two groups are chemically extremely reactive, so they react quickly to produce water (2H^*+O^﹡H₂O). This water is mixed with oxygen in the connection part 148 to be diluted to a low concentration, and is introduced into the chamber 120 of the oxide film forming chamber 107 through the aforementioned gas introduction pipe 126.

The above-mentioned catalyst-based moisture generator 140 can control the amount of hydrogen and oxygen involved in water production with high precision, so it can range from ultra-low concentrations below ppt (parts per trillion) to high concentrations of tens of%. The concentration of water introduced into the chamber 120 of the oxide film forming chamber 107 together with oxygen is controlled with high precision. In addition, since the process gas is introduced into the reactor 141 to instantly generate water, the desired water concentration can be obtained in real-time. Therefore, hydrogen and oxygen can be introduced into the reactor 141 at the same time, and there is no need to introduce oxygen before the introduction of hydrogen, as is the case with the conventional moisture generation system using a combustion method. In addition, if the catalyst metal in the reactor 141 is capable of grouping hydrogen or oxygen, materials other than the aforementioned metals may also be used. In addition, in addition to being processed into a coil shape, the catalyst metal can also be processed into a hollow tube or a thin fiber filter, etc., and the process gas can be passed through the inside of the catalyst metal.

Referring to FIG. 15, an example of the gate oxide film formation sequence using the above-mentioned oxide film forming apparatus 100 will be described.

First, the chamber 120 of the oxide film forming chamber 107 is opened, while the purge gas (nitrogen) is introduced into it, and the semiconductor wafer 1A is mounted on the susceptor 123. The time from when the semiconductor wafer 1A is loaded into the chamber 120 until it is mounted on the susceptor 123 is 55 seconds. After that, the chamber 120 is closed, and then the purge gas 30 is introduced Second, the gas exchange in the chamber 120 is fully performed. The susceptor 123 is first heated by heaters 121a and 121b to quickly heat the semiconductor wafer 1A. The heating temperature of the semiconductor wafer 1A is set to be in the range of 800 to 900°C, for example, 850°C. If the wafer temperature is below 800°C, the quality of the gate oxide film will decrease. On the other hand, at 900°C or higher, surface cracks of the wafer are likely to occur.

Next, oxygen and hydrogen are introduced into the reactor 141 of the moisture generator 140 for 15 seconds, and the surface of the semiconductor wafer 1A is oxidized for 5 minutes by introducing the generated water and oxygen into the chamber 120 to form a film thickness of 5 nm or less, for example, 4 nm The gate oxide film 14 (Figure 16).

When introducing oxygen and hydrogen into the reactor 141, do not introduce hydrogen before oxygen. Hydrogen is introduced before oxygen, and unreacted hydrogen flows into the high-temperature chamber 120, which is dangerous. On the other hand, oxygen is introduced before hydrogen, and this oxygen flows into the chamber 120, and a low-quality oxide film (initial oxide film) is formed on the surface of the waiting semiconductor wafer 1A. Therefore, hydrogen and oxygen are introduced at the same time or at a slightly later timing (within 0 to 5 seconds) than oxygen in consideration of work safety. In this way, the film thickness of the initial oxide film undesirably formed on the surface of the semiconductor wafer 1A can be suppressed to the minimum.

Fig. 17 is a graph showing the dependence of the moisture concentration on the growth rate of the oxide film, with the horizontal axis showing the oxidation time and the vertical axis showing the oxide film thickness. As shown in the figure, the growth rate of the oxide film is the slowest when the water concentration is 0 (dry oxidation), and it becomes faster as the water concentration becomes higher. Therefore, in order to form an extremely thin gate oxide film with a thickness of about 5 nm or less with a uniform film thickness with good reproducibility, it is effective to reduce the water concentration and retard the growth rate of the oxide film, and to form the film under stable oxidation conditions.

Figure 18 shows the effect of moisture concentration on the semiconductor substrate, gate oxide film and gate A graph showing the correlation of the initial withstand voltage of the oxide film of the MOS diode composed of the poles. The horizontal axis shows the voltage applied to one electrode (gate) of the MOS diode, and the vertical axis shows the defect density in the gate oxide film. Here, in order to surface the influence of moisture concentration, MOS diodes are used. This MOS diode system is based on (1) oxidation temperature = 850°C, moisture concentration = 0, (2) oxidation temperature = 850°C, moisture concentration = 0.8%, (3) Using a vertical diffusion furnace, oxidation temperature = 800 °C, moisture concentration = 40%, the film thickness = 9nm, area = 0.19cm²The gate oxide film. As shown in the figure, the gate oxide film formed under low moisture conditions with moisture concentration = 0.8% is higher than gate oxide film formed under moisture concentration = 0 (dry oxidation) and gate oxide films formed under high moisture conditions with moisture concentration = 40%. Either side shows good initial withstand voltage.

FIG. 19 is a graph showing the correlation between the water concentration and the amount of voltage change when a constant current (Is) is flowed between the electrodes of the above-mentioned MOS diode. As shown in the figure, a MOS diode using a gate oxide film formed with a moisture concentration = 0 (dry oxidation) is due to the high defect density in the oxide film and a large amount of voltage change.

FIG. 20 shows the film thickness distribution in the wafer surface of the gate oxide film formed using the above-mentioned oxide film forming apparatus 100. Here, the case where the wafer temperature is set at 850°C and the water concentration = 0.8% is oxidized for 2 minutes and 30 seconds is displayed. As shown in the figure, the maximum value of the film thickness is 2.881 nm and the minimum value is 2.814 nm, and a good in-plane uniformity of the film thickness deviation of ±1.18% is obtained.

The following structure is obtained from the above: the preferred concentration of water (water/water+oxygen) introduced into the chamber 120 of the oxide film forming chamber 107 can be compared with the dry oxidation (water concentration = 0) to obtain an excellent initial pressure resistance concentration Is the lower limit, which is within the range of about 40% of the upper limit when the conventional combustion method is used, especially the average The uniform film thickness has good reproducibility and high quality can be transported to form an extremely thin gate oxide film with a film thickness of about 5 nm or less. It is better to set the water concentration in the range of 0.5% to 5%.

Figure 21 shows the composition details of the gate oxide film obtained by thermal oxidation. The graph on the right side of the figure shows the gate oxide film with a thickness of 4 nm formed by the method of this embodiment, and the center graph shows the thickness of the gate oxide film formed by the conventional method using the combustion method. Gate oxide film. The graph on the left shows a gate oxide film with a thickness of 9nm formed by the same conventional method.

As shown in the figure, this embodiment uses a washing-oxidation consistent treatment system to avoid contact with oxygen in the atmosphere from pre-washing to the formation of an oxide film. The conventional method can be 0.7nm (17.5% of the total film thickness). ) To 0.3nm (7.5% of the total film thickness) to reduce the thickness of the natural oxide film formed before the controllable oxide film formed in the oxide film forming device. In addition, the catalyst moisture generation method is used to immediately introduce the oxide species into the oxide film forming device. The original oxide film can be formed from 0.8nm (20% of the total film thickness) of the conventional method to 0.3nm (7.5% of the total film thickness) thins the initial oxide film thickness that is undesirably formed due to contact with oxygen in the oxide species. As a result, it is possible to form the intended high-quality gated film that can control the thickness of the oxide film by 85%. Furthermore, as described above, the optimization of the water concentration of the oxidizing species reduces the growth rate of the oxide film and the film formation is performed under stable oxidizing conditions. As a result, a high-quality ultra-thin gate can be formed with uniform film thickness and good reproducibility. Oxide film.

Next, a brief description of the CMOS process after the gate oxide film is formed.

As shown in the foregoing Figure 14, after the gate oxide film 14 is formed, the net The chemical gas reaches the chamber 120 of the oxide film forming chamber 107 for 2 minutes and 20 seconds, and the oxidized species remaining in the chamber 120 are discharged. Next, the semiconductor wafer 1A was unloaded from the susceptor 123 in 55 seconds, and carried out from the chamber 120.

Next, the semiconductor wafer 1A is transported to the nitrogen oxide film forming chamber 108 shown in FIG.₂The semiconductor wafer 1A is heat-treated in an O (nitrous oxide) atmosphere to separate nitrogen from the interface between the gate oxide film 14 and the semiconductor substrate 1.

The gate oxide film 14 is as thin as about 5 nm, and the deformation at the interface between the two due to the difference in the thermal expansion coefficient with the semiconductor substrate 1 is surfaced, causing the generation of hot carriers. Since the nitrogen separated from the interface with the semiconductor substrate 1 moderates this change, the above-mentioned nitrogen oxide treatment can improve the reliability of the ultra-thin gate oxide film 14. Also, use N₂When O is treated with nitrogen oxide, because N₂The oxidation of oxygen generated by decomposition of O also progresses, so the thickness of the gate oxide film 14 is increased by about 1 nm. In this case, by forming a gate oxide film with a thickness of 3 nm in the oxide film forming chamber 107 and then performing a nitrogen oxide treatment, the gate oxide film thickness can be set to 4 nm. On the other hand, when NO is used, there is almost no case where the gate oxide film becomes thick due to the nitrogen oxide treatment.

Next, the semiconductor wafer 1A after the nitric oxide treatment is cooled to room temperature on the cooling table 109, is transported out of the oxide film forming apparatus 100 by the loader 110, and is transported to a CVD apparatus (not shown) for depositing a conductive film for gate electrodes. ). At that time, the CVD apparatus was connected to the back stage of the oxide film forming apparatus 100, and the contamination of the gate oxide film 14 could be effectively prevented by continuous processing from the formation of the gate oxide film to the deposition of the conductive film for the gate.

Next, as shown in FIG. 22, a gate length of 0.25 μm is formed on the upper portion of the gate oxide film 14. The gate of 15. The gate electrode 15 is formed by sequentially depositing an n-type polysilicon film with a film thickness of 150 nm and an undoped polysilicon film with a film thickness of 150 nm on the semiconductor substrate 1 by a CVD method, and then patterning these films by dry etching using a photoresist as a mask And formed.

Next, as shown in FIG. 23, p-type impurities, such as B (boron), are ion implanted in the p-channel type MOSFET formation region from the vertical direction and the oblique direction, and the n-type well 10 on both sides of the gate 14 forms a p-type half. Conductive region 16 and p-type semiconductor region 17. In addition, n-type impurities, such as P (phosphorus), are ion implanted in the n-channel type MOSFET formation region from the vertical and diagonal directions, and n-type semiconductor regions 18 and n-type semiconductors are formed on the p-type wells 11 on both sides of the gate 14 Area 19.

Next, as shown in FIG. 24, the silicon oxide film deposited by the CVD method on the semiconductor substrate 1 is anisotropically etched to form sidewall spacers 20 with a thickness of approximately 0.15 μm on the sidewalls of the gate electrode 14. At this time, the gate oxide film 14 on the upper portion of the p-type semiconductor region 17 and the gate oxide film 14 on the upper portion of the n-type semiconductor region 19 are removed. Then, p-type impurities, such as B (boron), are ion implanted in the p-channel type MOSFET formation region, and p-type wells 10 are formed on both sides of the gate 14⁺Type semiconductor region 21. In addition, an n-type impurity, such as P (phosphorus), is ion-implanted in the n-channel MOSFET formation region, and n-type wells 11 on both sides of the gate 14 are formed.⁺Type semiconductor region 22.

Secondly, as shown in Figure 25, in the gate 14 of the p-channel MOSFET, p⁺Type semiconductor region 21 (source region, drain region), gate 14 of n-channel MOSFET, n⁺TiSi is formed on each surface of type semiconductor region 22 (source region, drain region)₂(Titanium silicide) layer 23. TiSi₂The layer 23 is heat-treated on the semiconductor substrate 1 by sputtering (sputtering) deposited titanium film to make After reacting with the semiconductor substrate 1 and the gate electrode 14, the unreacted titanium film is etched and formed. Through the above process, p-channel type MOSFET (Qp) and n-channel type MISFET (Qn) are completed.

Thereafter, as shown in FIG. 26, connection holes 25 to 28 are formed in the silicon oxide film 24. The silicon oxide film 24 is deposited on the semiconductor substrate 1 by the plasma CVD method. The aluminum alloy film deposited by the sputtering method is patterned to form wirings 29 to 31, and the CMOS process of this embodiment is almost completed.

(Semiconductor process B)

Hereinafter, the MOSFET manufacturing method (LOCOS isolation process) of the present embodiment will be explained using FIGS. 27 to 32. This process uses conventional isolation instead of Shallow Trench Isolation. In this case, although the miniaturization is limited, there is an advantage that the previous manufacturing process can still be used. As long as the STI or SGI (shallow isolation) of the semiconductor process 1, and the LOCOS isolation of this embodiment, as long as the MOSFET and other transistors do not share the source or drain, in principle, they are surrounded by an isolation region.

First, as shown in FIG. 27, the semiconductor substrate 1 is heat-treated to form a thin silicon oxide film 2 with a thickness of approximately 10 nm on its main surface (thermal oxidation process B1), and then a film thickness of 100 nm is deposited on the silicon oxide film 2 by the CVD method. Degree of silicon nitride film 3. Next, as shown in FIG. 28, a photoresist 4 for opening the element separation area is formed on the silicon nitride film 3, and the silicon nitride film 3 is patterned by using the photoresist 4 as a mask.

Next, after removing the photoresist 4, as shown in FIG. 29, the semiconductor substrate 1 is heat-treated to form a field oxide film 40 in the element separation area (thermal oxidation process B2).

Next, the silicon nitride film 3 is removed by wet etching using hot phosphoric acid, and the surface of the semiconductor substrate 1 is cleaned by wet cleaning. Then, the surface of the active area of the semiconductor substrate 1 is formed with the same method as in the first embodiment. Very thin gate oxide film 14 below 5nm (thermal oxidation process B3) (Figure 32).

The ultra-thin gate oxide film with a film thickness of 5nm or less can also be installed in the batch type vertical oxide film forming device 150 (oxidation device 3; vertical batch oxidation furnace) as shown in FIG. And formed. FIG. 31 shows an example of the gate oxide film formation sequence using this vertical oxide film forming apparatus 150. The sequence in this case is roughly the same as that shown in Figure 15, but there are some time differences in the loading and unloading of wafers. In addition, there are also other explanations. In this case, it is generally a hot wall method. Therefore, it is important to add a small amount of oxygen to the purge gas without oxidation.

Thereafter, MOSFETs are formed on the main surface of the semiconductor substrate 1 in the same manner as in the first embodiment described above.

(Common matters concerning the oxidation process, etc.)

Hereinafter, the details of the processing devices and processing processes that are applicable to the semiconductor processes disclosed in this case will be described.

As mentioned above, FIG. 9 is a schematic diagram of a monolithic oxide film forming apparatus (multi-chamber method) for forming a gate oxide film. The oxide film forming device 100 is connected to the back stage of the cleaning device 101. The cleaning device 101 removes the oxide film on the surface of the semiconductor wafer 1A (usually the surface) by a wet cleaning method (or a dry method) before forming the gate oxide film membrane). By adopting this kind of washing-oxidation treatment system, it is not necessary to deliver the washing place in the washing device 101. The processed semiconductor wafer 1A is exposed to the atmosphere (undesirable oxidizing atmosphere and other atmospheres that degrade the surface state) and is transported to the oxide film forming apparatus 100 in a short time. Therefore, after the oxide film is removed, the gate oxide film is formed. It is possible to minimize the formation of a natural oxide film on the surface of the semiconductor wafer 1A.

The semiconductor wafer 1A after the drying process passes through the buffer zone 106 and is immediately transported to the oxide film forming apparatus 100.

The oxide film forming apparatus 100 is configured in a multi-chamber system. The multi-chamber system includes, for example, an oxide film forming chamber 107, a nitrogen oxide film forming chamber 108, a cooling table 109, a loading and unloading device 110, and the like. Circle 1A carries in and carries out the robot hand 113 of each of the above-mentioned processing chambers. In order to minimize the formation of a natural oxide film on the surface of the semiconductor wafer 1A due to the intrusion of the atmosphere, the inside of the transport system 112 is maintained in an inert gas atmosphere such as nitrogen (it can also be a vacuum, but the inert gas is used as a positive pressure to prevent external and The effect of undesired gas mixing in each processing chamber). In addition, the inside of the conveying system 112 is kept in an ultra-low moisture atmosphere at the ppb level in order to minimize the adhesion of moisture to the surface of the semiconductor wafer 1A (generally, the moisture contained in the degassing of a well-equipped vacuum system is several ppm or less). The semiconductor wafer 1A loaded into the oxide film forming apparatus 100 passes through the robot 113, first in units of 1 or 2 pieces (generally, when a single piece is lifted, it means 1 or 2 pieces, but when 1 or 2 pieces are specified, (Respectively refers to one piece and two pieces) are carried to the oxide film forming chamber 107.

As mentioned above, FIG. 11(a) is a schematic plan view showing an example of a specific structure of the oxide film forming chamber 107 (the single-chip device of FIG. 9), and FIG. 11(b) is along B-B' of FIG. 11(a) Cross-sectional view of the line (oxidation device 1; hot-wall monolithic oxidation wall).

The oxide film forming chamber 107 is provided with a chamber composed of a multi-walled quartz tube 120. Heaters 121a and 121b (in the case of a hot wall type) for heating the semiconductor wafer 1A are provided at the upper and lower portions thereof. The chamber 120 contains a disc-shaped heat equalizing ring 122, which distributes the heat supplied by the heaters 121a and 121b evenly to the entire surface of the semiconductor wafer 1A, and the upper part of the disc-shaped heat equalizing ring 122 is mounted to maintain the level of the semiconductor wafer 1A (Regarding the vertical gravity, it has the following effect: By arranging the wafer surface approximately horizontally, the influence of the mixed gas concentration distribution can be eliminated. This is at 300<img file="TW577129B_D0002.tif" />The susceptor 123 for large-diameter wafers, especially for reuse). The soaking ring 122 is made of a heat-resistant material such as quartz or SiC (silicon carbide), and is supported by a support arm 124 extending from the wall surface of the chamber 120. A thermocouple 125 is provided near the heat equalizing ring 122, and the thermocouple 125 measures the temperature of the semiconductor wafer 1A held on the susceptor 123. In addition to the heating method of the heaters 121a and 121b, the heating method of the semiconductor wafer 1A may also be a lamp 130 heating method such as that shown in FIG. 12 (oxidation device 2; lamp heating type monolithic oxidation furnace). In this case, the lamp can be heated after the wafer is placed in a predetermined position. When the lamp is turned off, the surface temperature of the wafer will drop rapidly. Therefore, the hot wall condition can be reduced to almost ignore the initial oxidation formed during insertion and withdrawal.Film and so on. Film and so on. In addition, when there is a lamp to add moisture, not only the moisture introduction part but also the oxidation furnace itself is preheated to about 140 degrees Celsius, which is effective in preventing condensation.

A part of the wall surface of the chamber 120 is connected to one end of a gas introduction pipe 126 that introduces water, oxygen, and purge gas into the chamber 120. The other end of this gas introduction pipe 126 is connected to a catalyst-based moisture generator described later. A partition wall 128 having a large number of through holes 127 is provided near the gas introduction pipe 126, and the gas introduced into the chamber 120 passes through the through holes 127 of the partition wall 128 to uniformly spread into the chamber 120. The other part of the wall surface of the chamber 120 is connected to exhaust the above-mentioned gas introduced into the chamber 120 One end of tube 129.

As described above, FIGS. 13 and 14 are schematic diagrams showing the catalyst-based moisture generating device connected to the chamber 120 described above. This moisture generator 140 is equipped with a reactor 141 composed of a heat-resistant and corrosion-resistant alloy (for example, a nickel alloy known as the product name "Hastelloy", etc.), and contains Pt (platinum), Ni (nickel) ) Or Pd (palladium) and other catalytic metal composed of a coil 142 and a heater 143 that heats the coil 142.

A process gas composed of hydrogen and oxygen and a purge gas composed of an inert gas such as nitrogen or Ar (argon) are introduced from the gas storage tanks 144 a, 144 b, and 144 c into the above-mentioned reactor 141 through the pipe 145. The piping 145 is provided with mass flow controllers 146a, 146b, 146c for adjusting the amount of gas and on-off valves 147a, 147b, 147c for opening and closing the gas flow path in the middle of the pipe 145, and the amount and composition ratio of the gas introduced into the reactor 141 are precisely controlled by these.

The process gas (hydrogen and oxygen) introduced into the reactor 141 is contacted and heated to 350 to 450°C (for example, under normal pressure, hydrogen concentration of 4% or more in the presence of sufficient oxygen will cause explosive combustion of hydrogen, so consider For the safety of mass production equipment, it is believed that it is best to introduce oxygen-rich hydrogen and oxygen mixed gas into the reactor to prevent hydrogen residue from being excited by the coil 142 to generate hydrogen radicals (H₂2H^*), from oxygen molecules to generate oxygen (O₂2O^*). These two groups are chemically extremely reactive, so they react quickly to produce water (2H^*+O^*H₂O). This water is mixed with oxygen in the connection part 148 to be diluted to a low concentration, and is introduced into the chamber 120 of the oxide film forming chamber 107 through the aforementioned gas introduction pipe 126. In this case, it can also be diluted with argon to replace oxygen. That is, the atmosphere supplied to the oxidation furnace is 1% moisture and 99% argon.

The above-mentioned catalyst-based moisture generator 140 can control the amount of hydrogen and oxygen involved in water production with high accuracy. Therefore, it can be controlled in a wide range from an ultra-low concentration below ppt to a high concentration of several tens of% and with high accuracy. The concentration of water introduced into the chamber 120 of the oxide film forming chamber 107. In addition, since the process gas is introduced into the reactor 141 to instantly generate water, the desired water concentration can be obtained in real-time. Therefore, hydrogen and oxygen can be introduced into the reactor 141 at the same time (generally, oxygen is introduced in advance for safety), and there is no need to introduce oxygen before the introduction of hydrogen as in the conventional moisture generation system using combustion methods. In addition, if the catalyst metal in the reactor 141 is capable of grouping hydrogen or oxygen, materials other than the aforementioned metals may also be used. In addition, in addition to being processed into a coil shape, the catalyst metal can also be processed into a hollow tube or a thin fiber filter, etc., and the process gas can be passed through the inside of the catalyst metal.

In FIG. 14, the moisture generating furnace 140, the hydrogen sensor, the filter, the dilution part, the purge gas or the dilution gas supply part, and the oxidation furnace connection part are prevented from condensation, and the temperature is adjusted or heated to about 140 degrees Celsius. Here, the hydrogen sensor is a sensor that detects hydrogen that has not been synthesized but remains. In addition, the filter is an air filter inserted to function as an orifice in case hydrogen combustion or the like occurs on the side of the oxidation furnace so as not to pass the combustion to the side of the synthesis furnace. Purification gas, dilution gas, and moisture are all preheated to a temperature that does not condense (generally above 100 degrees Celsius and below 200 degrees Celsius) and supplied to the oxidation furnace, but (the dilution gas is also preheated before being mixed with the synthesized moisture) In the lamp heating furnace shown in Figure 12, the preheating of the furnace body or the processed wafer itself should also be considered. In this case, the purge gas can also be used to preheat the wafers in the oxidation furnace. In the case of lamp heating furnaces, especially for preheating machines that prevent condensation at the wafer lead-in part Institutions should also pay attention. In either case, heating or adjusting the temperature to 140 degrees Celsius is more effective.

Generally, a predetermined atmosphere gas is supplied to the oxidation treatment part at a certain flow rate. While new atmosphere gas is often used to supplement the consumed components, the oxidation process is performed in a stable state.

Referring to FIG. 15, an example of the gate oxide film formation sequence using the above-mentioned oxide film forming apparatus 100 (FIG. 9) will be further described.

First, open the oxide film formation chamber 107 (FIG. 9) in the chamber 120 (FIG. 11), and introduce the purge gas (nitrogen) into it (also as shown in FIG. 15 to prevent surface cracks such as thermal etching of the wafer) Add a little oxygen or the like into the purge gas), while mounting the semiconductor wafer 1A on the susceptor 123. The time from when the semiconductor wafer 1A is loaded into the chamber 120 until it is mounted on the susceptor 123 is 55 seconds. After that, the chamber 120 is closed, and then the purge gas is introduced for 30 seconds, so that the gas exchange in the chamber 120 is sufficiently performed. The susceptor 123 is first heated by heaters 121a and 121b to quickly heat the semiconductor wafer 1A. The heating temperature of the semiconductor wafer 1A is set to be in the range of 800 to 900°C, for example, 850°C. If the wafer temperature is below 800°C, the quality of the gate oxide film will decrease. On the other hand, at 900°C or higher, surface cracks of the wafer are likely to occur.

When introducing oxygen and hydrogen into the reactor 141, do not introduce hydrogen before oxygen. Hydrogen is introduced before oxygen, and unreacted hydrogen flows into the high-temperature chamber 120, which is dangerous. On the other hand, oxygen is introduced before hydrogen, and this oxygen flows into the chamber 120, and a low-quality oxide film (initial oxide film) is formed on the surface of the waiting semiconductor wafer 1A. Therefore, hydrogen and oxygen are introduced at the same time or at a slightly later timing (within 0 to 5 seconds) than oxygen in consideration of work safety. In this way, the undesired shape can be The thickness of the initial oxide film formed on the surface of the semiconductor wafer 1A is suppressed to the minimum.

Ultra-thin gate oxide film with a film thickness of 5nm or less (the same, of course, is also effective for gates and other oxide films above this thickness to a certain extent). It can also be used in monolithic or batch-type oxide film forming equipment (oxidation furnaces 1 to 3) It is formed by installing a combustion method moisture generator 160 as shown in FIG. 33 (oxidation device 4; hydrogen combustion method or hydrogen combustion method oxidation furnace).

In this case, after the water generating device 160 generates an oxidizing species containing a relatively high concentration of water, oxygen is added to the oxidizing species to obtain an oxidizing species with a low water concentration. At this time, first set the valve (Vvent) to open and set the valve (Vprocess) to close, and the oxidized species will not be sent to the oxide film forming device until the water concentration drops to the desired concentration. Furthermore, after the water concentration is sufficiently reduced, the valve (Vvent) is switched to closed and the valve (Vprocess) is switched to open, and the oxidized species is sent to the oxide film forming device.

There are dust sources such as valves in front of the oxide film forming device or dead spaces due to the installation of valves. The above method is also disadvantageous compared with the above-mentioned catalyst method, but it can achieve a low water concentration of the oxide species and suppress the initial oxide film .

(Semiconductor process C)

The oxide film forming method of the present invention can also be applied to the following situations: as shown in FIG. 34, the tunnel oxide film 43 of the flash memory having the floating valve 44 and the control gate 42 is formed with a film thickness of 5 nm or less (thermal oxidation Process C1) or the second gate oxide film 44 (thermal oxidation process C2).

(Semiconductor process D)

In addition, the oxide film forming method of the present invention can also be suitable for the following situations Use: For example, an LSI in which a memory LSI and a logic LSI are mixed on the same semiconductor wafer, and two or more gate oxide films with different film thicknesses are formed on the same semiconductor wafer. In this case, of course, a thin gate oxide film with a film thickness of 5 nm or less (thermal oxidation process D1) and a relatively thick gate oxide film with a thickness of 5 nm or more (thermal oxidation process D2) can be formed by the method of the present invention, but it can also be formed by the method of the present invention. The inventive method forms a gate oxide film with a thin film thickness, and a thick gate oxide film is formed by a conventional method.

(Applicability of various oxidation methods in this case)

The applicability of the catalyst moisture generation thermal oxidation method, low-moisture oxidation method (including part of the hydrogen combustion method) and the high-moisture oxidation method of the conventional hydrogen combustion method shown in this case are summarized as follows.

That is, as for the most effective process by applying the catalyst moisture generation thermal oxidation method and the low-moisture oxidation method, the oxidation processes A3, B3, C1, C2, D1, etc. (the first category) can be mentioned.

Although the high-moisture oxidation of the conventional hydrogen combustion method can also be applied, as far as effective processes are applied to the thermal oxidation method of catalyst moisture generation and the low-moisture oxidation method, oxidation processes A1, A2, B1, B2, and D2 can be mentioned. And so on (the second category).

Especially in the production line where the oxidation furnace of the hydrogen combustion method and the oxidation furnace of the catalyst method are mixed, the mixed use of the two methods due to the nature and thickness of the oxide film is also of practical value.

(Applicability of various oxidation devices in this case)

The applicability of the various oxidation devices shown in this case shown above are summarized as follows. Basically any of the oxidation devices 1 to 4 shown in this case can be applied to the above-mentioned first and second types of oxidation processes. However, when precise atmosphere control is required due to multiple chambers, etc., it is best to use the oxidation device 1 or 2.

In addition, regarding the operating pressure of each oxidation treatment device during oxidation, it is generally performed under normal pressure (600 Torr to 900 Torr), but it can also be performed under reduced pressure. In this case, in addition to easily setting the oxidation rate low, it also has the additional effect of reducing the possibility of hydrogen explosion.

In addition, high-pressure oxidation can also be performed. This situation has the following advantages: a high oxidation rate can be achieved at a relatively low temperature.

(Notes on disclosure)

As mentioned above, the invention completed by the present inventors has been specifically described based on its embodiments, but the present invention is not limited to the aforementioned embodiments, and of course various changes can be made without departing from the scope of the gist.

Industrial use possibility

Here is a brief description of the effects obtained by the representative of the inventions disclosed in this case as follows:

According to the present invention, since a high-quality ultra-thin gate oxide film with a film thickness of 5 nm or less can be formed with a uniform film thickness and good reproducibility, the semiconductor integrated circuit device having a fine MOSFET with a gate length of 0.25 μm or less can be reliable. Improved performance and manufacturing yield.