Light-emitting-diode-chip on the basis of GaN and the method to manufacture light-emitting-diode-element containing the said chip

GaN-based light-emitting diode products and methods for manufacturing light-emitting diode components

<p>1. . . LED chip</p><p>2. . . Substrate</p><p>3. . . Epitaxial layer sequence</p><p>4. . . Epitaxial layer</p><p>5. . . Epitaxial layer</p><p>6. . . p-contact layer</p><p>7. . . Contact metal layer</p><p>9. . . p-surface</p><p>10. . . Main surface</p><p>11. . . Terminal frame</p><p>12. . . Chip mounting surface</p><p>14. . . Chip side</p><p>15. . . level one</p><p>16. . . Second floor</p><p>17. . . Connection line</p><p>18. . . Terminal parts</p><p>19. . . Floor</p><p>twenty one. . . LED-shell</p>

Figure 1a is a schematic diagram illustrating a cross-section through the first embodiment.

Figure 1b is a schematic diagram illustrating a preferred p-contact layer.

Figure 2 is a schematic diagram illustrating a cross-section through the second embodiment.

Figures 3a to 3c are schematic diagrams illustrating the process of the method according to the embodiment of Figure 1a.

Figures 4a to 4e are schematic diagrams illustrating the process of manufacturing the embodiment according to Figure 2.

Figure 5 is a schematic cross-sectional view of another embodiment of the light-emitting diode chip according to the present invention.

The present invention relates to a light-emitting diode chip according to the first or fourth item of the scope of patent application, and to a method for manufacturing a light-emitting diode device with a light-emitting diode chip made of GaN.

This basic problem exists in the manufacture of GaN-based light-emitting diode wafers, that is, the maximum achievable conductivity of these p-doped layers (especially p-doped GaN layers or AlGaN layers) is insufficient. In traditional light-emitting diode chips made of other material systems, front-side contacts are usually used (in order to obtain as high light coupling as possible, only a small part of the front side of the chip is covered), in order to achieve The spread of current across the entire cross-section of the chip.

The growth of the p-conductive layer on the conductive substrate, and thus the application of current across the entire cross-section of the p-conductive layer may lead to economically unreasonable results. The reason is that the production of conductive lattice adjustment substrates (such as GaN substrates) for the growth of GaN-based layers involves high technical costs, and the growth of p-doped GaN-based layers is important Undoped and n-doped GaN-compounds are not suitable for lattice adjustment substrates, resulting in insufficient crystal quality for light-emitting diodes.

To overcome the above-mentioned problems in a well-known attachment object, the entire surface of the p-conductive layer away from the substrate is coated with a contact layer for light transmission or another layer with good conductivity to diffuse current. The layer has established wire contacts.

However, this first-mentioned proposal has the disadvantage that a considerable part of this light is absorbed in the contact layer. In the second mentioned proposal, additional method steps are required, which increase manufacturing costs.

Japanese patent document JP10-150220A discloses a light-emitting semiconductor device, in which an n-GaN half-body layer, a light-emitting layer and a p-GaN semiconductor layer are successively coated on an n-GaN-substrate. On the surface of the p-GaN half-body layer, a p-electrode that is substantially completely covered is arranged on the surface of the p-GaN half-body layer.

The object of the present invention is first to develop a light-emitting diode chip with the characteristics mentioned at the beginning, which has improved current spreading, while keeping its additional manufacturing cost small. In addition, a method should be used to manufacture light-emitting diode devices with such wafers.

The first mentioned purpose is solved by the light-emitting diode chip with the features of item 1 or item 4 of the scope of patent application. Other beneficial developments are the subject of the appendix of the patent application. The preferred method for manufacturing the light-emitting diode chip according to the present invention is the subject of the 9th to 14th patent applications. A preferred light-emitting diode element is the subject of the 15th patent application.

In the light-emitting diode wafer according to the present invention, the substrate is conductive. The n-conducting layer of the epitaxial layer sequence is first coated on the substrate. Above this is the p-conducting layer of the epitaxial layer sequence, followed by the reflective p-contact layer coated on the entire surface of the side. The substrate has a contact metal layer on its main surface away from the epitaxial layer sequence, which covers only a part of the main surface. The light coupling from the chip is implemented through the exposed area of the main surface of the substrate, and through the side surface of the chip.

The substrate here advantageously serves as a window layer, which improves the light generated by this coupling out of the wafer. In order to optimize the thickness of the substrate, it is in this advantageous way to thin the epitaxial layer after the growth of the epitaxial layer sequence, for example by means of grinding and/or etching.

In another light-emitting diode wafer according to the present invention, the wafer only has an epitaxial layer. In this regard, the growth substrate is removed after the epitaxial growth of the epitaxial layer sequence. The p-conducting epitaxial layer has a reflection on substantially the entire surface on its main surface away from the n-conducting epitaxial layer, and can be connected to the combined p-contact layer. On its main surface away from the n-conducting epitaxial layer facing away from the p-conducting epitaxial layer is an n-contact layer, which covers only a part of this main surface. The light coupling out of the chip is implemented through the exposed area of the main surface of the n-conducting epitaxial layer and through the side surface of the chip.

In this case, the growth substrate can not only be electrically insulated, but can also prevent light from passing through, and therefore it is advantageous to select all the most suitable growth conditions.

The special advantage of this so-called thin-film LED-chip is that it is reduced in the chip, ideally there is no light absorption, and the improvement of light is coupled out of the chip, especially due to the reduction of the total number of interfaces with a refractive index mutation.

This particular advantage is combined with two light-emitting diode wafers according to the present invention, that is, there is the possibility that the loss heat generation area of this wafer (especially the p-doped layer and the pn-interface) is very close to all The resulting heat sink, the epitaxial layer sequence can actually be connected to the heat sink for thermal coupling. Therefore, the wafer can be cooled very effectively, so the stability of the light emitted by it is improved, and the efficiency of the wafer is also improved.

In the two light-emitting diode wafers according to the present invention, the flowing voltage is advantageously reduced due to the contact of the entire surface.

In the light-emitting diode wafer according to the present invention, the p-contact layer has a transparent first layer coated on the p-surface and a second reflective layer coated thereon. Therefore, the contact layer can optimize not only its electrical characteristics but also its reflection characteristics in a simple manner.

The preferred materials for the first and second layers are Pt and/or Pd or Ag, Au and or Al. However, this reflective layer can also be formed as a dielectric mirror.

In another preferred other development, the p-contact layer has PtAg alloy and/or PdAg alloy.

In another preferred embodiment, the entire free surface or a part of the semiconductor body formed by the layer sequence is roughened. This roughness interferes with the total reflection on the light coupling-out surface and thus has the advantage of further improving the intensity of the optical coupling-out. The method according to the present invention is used to manufacture the light-emitting diode with the light-emitting diode chip according to the present invention. Among the bulk components, the p-plane chip is mounted on the chip mounting surface of the electrical connection component (especially the electrical conductor frame).

In another particularly preferred development of the present invention, the manufacturing method continues through the roughening of the semiconductor body formed in the layer sequence, wherein the entire exposed surface or part of the semiconductor body is roughened from this. The fuzzing roughness, which is particularly effective for increasing the light throughput, is made by etching the semiconductor body or by means of a sand jet method.

Other advantageous configurations of the present invention result from the embodiments described below with respect to Figs. 1a to 5.

Schematic description

Figure 1a is a schematic diagram illustrating a cross-section through the first embodiment.

Figure 1b is a schematic diagram illustrating a preferred p-contact layer.

Figure 2 is a schematic diagram illustrating a cross-section through the second embodiment.

Figures 3a to 3c are schematic diagrams illustrating the process of the method according to the embodiment of Figure 1a.

Figures 4a to 4e are schematic diagrams illustrating the process of manufacturing the embodiment according to Figure 2.

Figure 5 is a schematic cross-sectional view of another embodiment of the light-emitting diode chip according to the present invention.

In the drawings of these different embodiments, the same or the same function component has the same or similar reference symbol.

In the light-emitting diode wafer 1 in FIG. 1a, a light emitting epitaxial layer sequence 3 is coated on a SiC substrate 2. This has, for example, an n-conducting doped GaN or AlGaN epitaxial layer 4 and a p-conducting doped GaN or AlGaN epitaxial layer 5. It is also possible that, for example, a GaN-based epitaxial layer sequence 3 has a double heterostructure, a single quantum well (SQW) structure or a multiple quantum well (MQW) structure, with one or more non-doped layers 19, such as It is composed of InGaN or InGaAlN.

The SiC substrate 2 is conductive and used to transmit the light emitted by the epitaxial layer sequence 3.

On the p-surface 9 away from the SiC substrate 2 on the back side, the epitaxial layer sequence 3 is coated with a reflection, which is essentially the entire surface, capable of connecting the combined p-contact layer 6. This is essentially composed of, for example, Ag, PtAg alloy and/or PdAg alloy.

The p-contact layer 6 can also be composed of a first layer 15 that transmits light and a second layer 16 that reflects light, as illustrated in the schematic diagram in Figure 1b. The first layer 15 is essentially composed of, for example, Pt and/or Pd, and the second layer 16 is essentially composed of, for example, Ag, Au and/or Al or a dielectric mirror layer.

On its main surface 10 facing away from the epitaxial layer sequence 3 is a SiC substrate 2 with a contact metal layer 7. This layer covers only a part of this main surface 10 and is formed as a wire-connection (wire- bonding) of the connection pad.

The contact metal layer 7 is composed of, for example, a Ni layer coated on the SiC substrate 2 and then an Au layer.

The chip 1 is connected to its p-side by means of a die-, that is, is mounted on the chip mounting surface 12 of a conductive connection frame 11 (guide frame) with a p-contact layer 6. The n-contact metal layer 7 is connected to the connection portion 18 of the connection frame 11 via a connection wire 17.

This light is coupled out of the wafer 1 and is implemented through the free area of the main surface 10 of the SiC substrate 2 and through the side surface 14 of the wafer.

Optionally, the wafer 1 has a SiC substrate 2 that becomes thinner after the epitaxial layer sequence 3 grows (this is indicated by the dashed line in Figure 1a).

The embodiment illustrated in Fig. 2 is different from the embodiment illustrated in Fig. 1a. Firstly, the wafer 1 only has the epitaxial layer of the epitaxial layer sequence 3 and does not have the substrate layer. The latter is removed after the growth of the epitaxial layer, for example, by etching and/or polishing. For the advantages of this so-called thin-film-LED-chip, please refer to the common part of the manual. Secondly, the epitaxial layer sequence 3 has a fruit-only structure: a single quantum well (SQW) structure or a multiple quantum well (MQW) structure, which has one or more non-doped layers made of InGaN or nGaAlN, for example. 19. Typically, the LED-housing 21 is also outlined here.

In the method outlined in Figures 3a to 3c, to manufacture the light-emitting diode device with the light-emitting diode chip 1 according to Figure 1a, firstly, an epitaxial layer that emits light is grown on the SiC substrate 2 Sequence 3 (Figure 3a). Then, a p-contact layer 6 capable of being connected is coated on the entire surface of the p-plane 9 of the epitaxial layer sequence 3, and on a partial area of the substrate 2 away from the main surface 10 of the epitaxial layer sequence 3 Coat n-contact layer 7 (Figure 3b). This process step takes place in all the so-called wafer composite structures, so multiple wafers can be manufactured side by side adjacent to each other at the same time.

After the process steps described above, the wafer composite structure is disassembled into individual wafers 1. These individual chips are then mounted on the chip mounting surface 12 of the electrical conductor frame 11 with the aid of solder to connect the bonded p-contact layer 6 (Fig. 3c).

The method described in the schematic diagrams in Figs. 4a to 4e is used to manufacture a light-emitting diode device with the light-emitting diode chip 1 according to Fig. 2. This method is basically different from that in Figs. 3a to 3c The explanation is because the substrate 2 is removed after the epitaxial layer sequence 3 is grown, and before or after the p-contact layer 6 is applied (Fig. 4c). In this case, the substrate 2 can not only be electrically insulated, but can also be opaque, and therefore it is advantageous to design all about the most suitable growth conditions.

After the substrate 2 is removed, the n-contact metal layer 7 is coated on the n-side 13 of the epitaxial layer sequence 3 (Fig. 4d), but before this, the installation is similar to the installation described above in relation to Fig. 3c Steps (Figure 4e).

The embodiment illustrated in FIG. 5 has a plurality of semiconductor layers 101 arranged in a stack of different shapes, which are composed of GaN or three or four compounds mainly based on this. In operation, active regions 102 are formed inside these layers themselves, in which light rays 105 are generated.

This layer stack is bounded by the first main surface 103 and the second main surface 104, and basically the light 105 generated here is coupled out in the adjacent surroundings via the first main surface 103.

The reflective and connectable p-contact layer 106 is coated on the second main surface 104 as described above. In the case of contact, the semiconductor body is via the contact surface 112 on the side from which it is coupled, and via the p-contact layer 106 on the reflective side. The contact of the reflective side can be implemented by, for example, the following manner: the reflective side of the semiconductor body is arranged on the metal body, which can not only be used as a carrier, but also as a current transport.

This reflective layer 106 causes a portion of the light 105 to be reflected back into the semiconductor body when it is coupled out on the first main surface 103, and then reflected in the direction of the first main surface 103, so that a total of this light passes through the first main surface 103. The amount of light coupled out of the surface 103 increases. This increase is made possible due to the following reasons, that is, the element is implemented as a thin-layer element without a substrate that absorbs light, and the reflective surface 106 is directly coated on the GaN-semiconductor body.

The surface of this semiconductor body therefore has a fluffing roughness 107. This roughness 107 causes the scattering of light 105 on the first main surface 103 and therefore interferes with the total reflection on the first main surface 103. In order to continue to prevent such scattering, the generated light is continuously and similarly reflected between the two main surfaces 103 and 104 or the reflective surface 106 according to the characteristics of the light guide (wave guide) without leaving the semiconductor body. Therefore, by raising the roughness 107, the output of this light continues to increase.

The description of the present invention based on the above-mentioned embodiments cannot of course be construed as a limitation of the present invention. In fact, the present invention is especially applicable to all light-emitting diode wafers, where the epitaxial layer existing by removing the growth substrate has insufficient conductivity.

Symbol description of main components

1. . . LED chip

2. . . Substrate

3. . . Epitaxial layer sequence

4. . . Epitaxial layer

5. . . Epitaxial layer

6. . . p-contact layer

7. . . Contact metal layer

9. . . p-surface

10. . . Main surface

11. . . Terminal frame

12. . . Chip mounting surface

14. . . Chip side

15. . . level one

16. . . Second floor

17. . . Connection line

18. . . Terminal parts

19. . . Floor

twenty one. . . LED-shell