Light emitting device

Light-emitting device

<p>31. . . Drain wire</p><p>35. . . Drain wire</p><p>36. . . wire</p><p>37. . . Gate</p><p>41. . . Passive film</p><p>42. . . Flat film</p><p>43. . . Pixel electrode</p><p>44a and 44b. . . Insulation spacer</p><p>45. . . Luminescent layer</p><p>51a and 51b. . . Spacer</p><p>101. . . Pixel area</p><p>102a. . . First source signal line drive circuit</p><p>102b. . . Second source signal line drive circuit</p><p>103a. . . First gate signal line drive circuit</p><p>103b. . . Second gate signal line drive circuit</p><p>105. . . Translation register</p><p>106. . . Lock (A)</p><p>107. . . Lock (B)</p><p>201a. . . First switching TFT</p><p>201b. . . Second switching TFT</p><p>202. . . Current control TFT</p><p>203. . . Light-emitting element</p><p>204. . . Capacitor</p><p>400. . . Glass substrate</p><p>402 to 405. . . Semiconductor layer</p><p>404. . . Semiconductor layer</p><p>406. . . Gate insulating film</p><p>407. . . The first conductive film</p><p>408. . . Second conductive film</p><p>409 to 412. . . Photomask</p><p>409a to 412a. . . Photomask</p><p>414 to 417. . . First shape conductive layer</p><p>419 to 422. . . Second conductive layer</p><p>421a and 421b. . . Second conductive layer</p><p>425 to 428. . . First impurity region</p><p>431. . . Second impurity region</p><p>433. . . Photomask</p><p>434 to 437. . . Source region</p><p>438 to 411. . . Drain region</p><p>442 to 445. . . Lov District</p><p>446. . . Loff District</p><p>447 and 448. . . Source region</p><p>449 and 450. . . Drain region</p><p>451 and 452. . . Lov District</p><p>453. . . Photomask</p><p>455. . . The first inner insulating film</p><p>458. . . Second inner insulating film</p><p>459 to 462. . . Source wire</p><p>463 to 465. . . Drain wire</p><p>467. . . The third inner insulating film</p><p>469. . . First spacer</p><p>470. . . Second compartment</p><p>471. . . Organic compound layer</p><p>472. . . cathode</p><p>501. . . Switching TFT</p><p>502. . . Current control TFT</p><p>504. . . Source region</p><p>505. . . Drain region</p><p>506. . . Loff District</p><p>507. . . Lov District</p><p>510. . . Source region</p><p>511. . . Drain region</p><p>512. . . Lov District</p><p>513. . . Channel formation zone</p><p>521. . . Source region</p><p>522. . . Drain region</p><p>523. . . LoV area</p><p>524. . . Channel formation zone</p><p>531. . . Source region</p><p>532. . . Drain region</p><p>533. . . Lov District</p><p>534. . . Channel formation zone</p><p>801. . . Translation register</p><p>802. . . Lock (A)</p><p>803. . . Lock (B)</p><p>832a and 832b. . . Active layer</p><p>833a and 833b. . . Active layer</p><p>834a and 834b. . . Active layer</p><p>837a and 837b. . . Gate electrode</p><p>838b and 839. . . Gate electrode</p><p>839 and 840. . . Gate electrode</p><p>840 and 841. . . Gate electrode</p><p>1804. . . Current control TFT</p><p>1806. . . Light-emitting element</p><p>1808. . . Capacitor</p><p>2001. . . Display box</p><p>2002. . . Support plate</p><p>2003. . . Display part</p><p>2101. . . Ontology</p><p>2102. . . Display area</p><p>2103. . . Voice input area</p><p>2104. . . Operation switch</p><p>2105. . . Battery</p><p>2106. . . Image receiving area</p><p>2201. . . Ontology</p><p>2202. . . Signal line</p><p>2203. . . Headband</p><p>2204. . . Display part</p><p>2205. . . Optical system</p><p>2206. . . Call display device</p><p>2301. . . Ontology</p><p>2302. . . Recording medium</p><p>2303. . . Operation switch</p><p>2401. . . Ontology</p><p>2402. . . Display area</p><p>2501. . . Ontology</p><p>2502. . . frame</p><p>2503. . . Display area</p><p>2601. . . Ontology</p><p>2602. . . Sound output area</p><p>2603. . . Voice input area</p><p>2604. . . Display area</p><p>2605. . . Operation switch</p><p>2606. . . antenna</p><p>2701. . . Ontology</p><p>2702. . . Display part</p><p>2703 and 2704. . . Operation switch</p><p>3501. . . Base</p><p>3502. . . First switching TFT</p><p>3503. . . Current control TFT</p><p>3504. . . Second switching TFT</p><p>3801 and 3802. . . The first and second gate signal lines</p><p>3805. . . First switching TFT</p><p>3806. . . Second switching TFT</p><p>3807. . . Current control TFT</p><p>3808. . . Light-emitting element</p><p>3809. . . power cable</p><p>3810. . . capacitance</p><p>4010. . . Base</p><p>4011. . . Pixel area</p><p>4012a. . . First source signal side drive circuit</p><p>4012b. . . Second source signal side drive circuit</p><p>4013a. . . Gate signal side drive circuit</p><p>4013b. . . Gate signal side drive circuit</p><p>4016. . . wire</p><p>4021. . . Base film</p><p>4022a and 4022b. . . Driver circuit TFT</p><p>4023. . . Current control TFT</p><p>4026. . . Inner insulation film</p><p>4027. . . Pixel electrode</p><p>4028. . . Insulating film</p><p>4029. . . Organic compound layer</p><p>4030. . . cathode</p><p>4031. . . area</p><p>4505. . . Light-emitting element</p><p>6000. . . Cover member</p><p>6004. . . Stuffing</p><p>6006. . . Inert film</p><p>7000. . . Sealing member</p><p>7001. . . Airtight component</p><p>4014a, 4014b, 4016. . . wire</p><p>, And 4016b</p><p>3801, 3801a and 3801b. . . The first source signal line</p><p>3802, 3802a and 3802b. . . The second source signal line</p><p>447, 435, 436 and 448 source regions</p>

Fig. 1 is a top block diagram of a light-emitting device according to the present invention.

Fig. 2 is a pixel circuit of the light-emitting device according to the present invention.

FIG. 3 is a pixel circuit of the light-emitting device according to the present invention.

The timing chart of FIG. 4 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 5 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 6 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 7 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 8 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 9 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 10 shows the method of driving the light-emitting device of the present invention.

11A to 11D show the manufacturing process of the light-emitting device.

12A to 12D show the manufacturing process of the light-emitting device.

13A to 13D show the manufacturing process of the light-emitting device.

14A and 14B show the manufacturing process of the light-emitting device.

15A and 15B show a top view and a cross-sectional view of a light-emitting device according to the present invention.

16A and 16B show a top view and a cross-sectional view of a light-emitting device according to the present invention.

FIG. 17 shows a cross-sectional view of a pixel of the light-emitting device according to the present invention.

FIG. 18 shows a cross-sectional view of a pixel of the light-emitting device according to the present invention.

19A and 19B are pixel circuits of the light-emitting device of the present invention.

Fig. 20 is a circuit diagram of a source line driving circuit.

Fig. 21 is a top view of the source line driving circuit.

22A to 22F show the electronic application of the light-emitting device according to the present invention.

Figures 23A to 23F show the electronic application of the light-emitting device according to the present invention.

Fig. 24 shows the pixel circuit of the conventional light-emitting device.

The timing chart of FIG. 25 shows a method of driving a conventional light-emitting device.

Figures 26A and 26B show the I of the TFT _D -V _GS characteristic.

27A and 27B show the connection structure between the light-emitting element and the current control TFT, and graphs of the voltage and current characteristics of the light-emitting element and the current control TFT.

Fig. 28 is a graph showing the voltage and current characteristics of the light-emitting element and the current control TFT.

Figure 29 shows the relationship between the gate voltage and the drain current of the current control TFT.

The present invention relates to a display panel, which is formed by sealing a light-emitting element between a substrate and a covering material. The invention also relates to a display module in which an IC is mounted on the display panel. The display panel and display module here refer to light-emitting devices. The present invention also relates to an electronic device using a light-emitting device.

Related technology

Recently, the technology of forming thin film transistors on a substrate has been developed rapidly and applied to active matrix liquid crystal display devices. In particular, TFTs using polymeric silicon thin films have higher field-effect mobility than conventional amorphous silicon thin-film TFTs, thereby realizing high-speed operation. Therefore, the driving circuit formed on the same substrate can be used to control the pixel, which is different from the conventional method of controlling the pixel by the circuit outside the substrate.

Such an array type liquid crystal display device has different circuits or elements formed on the same substrate. With this structure, the active array type electronic display device has various advantages, including reducing the manufacturing cost, reducing the size of the display device, and increasing the yield and productivity.

Further, in electronic display devices, active array type light-emitting devices including light-emitting elements have been actively developed. The light emitting device is also referred to as an organic light emitting device (OELD) or an organic light emitting diode (OLED).

In contrast to liquid crystal display devices, light-emitting elements are self-luminous. In the structure of the light-emitting element, a layer containing an organic compound is sandwiched between a pair of electrodes. By applying an electric field across a pair of electrodes, the organic compound layer can emit light. The organic compound layer generally has a multilayer structure. The "hole transport layer/light emitting layer/electron transport layer" proposed by Tang et al. OfKodak Eastman is an example of a multilayer structure. This structure has high luminous efficacy. Therefore, all light-emitting devices currently under research adopt this structure.

The light-emitting element has an anode layer, an organic compound layer, and a cathode layer to generate electron emission using an applied electric field. The electro-optical light generated by the organic compound layer includes the light emitted by the transition from the single excited state to the ground state, and the light emitted by the transition from the triple ground state to the ground state. The light-emitting device of the present invention can be used in any type of light-emitting device.

Further, the light emitting device has a multi-layer structure, wherein a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer are sequentially formed on the anode, or a hole injection layer is sequentially formed on the anode, and the hole is transported. Layer, light-emitting layer, electron transport layer and electron injection layer. Further, the light-emitting layer can be doped with fluorescent pigments.

In this specification, all layers located between the cathode and the anode refer to organic compound layers. Therefore, the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, etc. are all included in the organic compound layer. In this specification, an element composed of an anode, an organic compound layer and a cathode is called a light-emitting element.

The analog driving method can be used to drive the light-emitting device. The analog driving method of the light emitting device will be described with reference to FIGS. 24 and 25.

Figure 24 shows the structure of the pixel portion of the light-emitting device. The gate signal line driving circuit inputs the selection signal to the gate signal line, and the gate signal line is connected to the gate electrode of the TFT 1801 of each pixel. The source region or the drain region of the switching TFT 1801 is connected to the source signal line of the input analog video signal, and the other region is connected to the gate electrode of the current control TFT 1804 and the capacitor 1808.

A source region and a drain region of the current control TFT 1804 are connected to the power line (V1 to Vx), and the other region is connected to the light-emitting element 1806. The potential of the power supply line (V1 to VX) is called the power supply potential. The power supply lines (V1 to VX) are connected to the capacitor 1808 including the remaining pixels.

The light-emitting element 1806 includes an anode, a cathode, and an organic compound layer interposed between the anode and the cathode. Here, if the anode of the light-emitting element 1806 is connected to the source region or the drain region of the current control TFT 1804, the anode or the cathode of the light-emitting element is referred to as a pixel electrode or an opposite electrode, respectively. On the other hand, if the cathode of the light-emitting element is connected to the source region or the drain region of the current control TFT 1804, the anode or the cathode of the light-emitting element 1806 is called an opposite electrode or a pixel electrode, respectively.

In this specification, the potential of the opposite electrode is referred to as the opposite electrode potential.

The potential difference between the pixel electrode and the opposite electrode is the driving voltage of the light-emitting element. The light-emitting element driving voltage is applied to the organic compound layer.

FIG. 25 shows a timing chart of driving the light-emitting device of FIG. 24 by an analog driving method. The time period from selecting a gate signal line to selecting the next gate signal line is called a signal line time period (L).

In this manual, selecting a signal line means turning on the TFT that connects all gates to the signal line.

The time period from displaying one image to displaying the next image is called the frame time period (F). In the light-emitting device of FIG. 24, since there are y gate signal lines, the y signal line period (L1 to Ly) falls within a frame period.

When the resolution is enhanced, the time period of the signal line within the frame period will increase. As a result, the driving circuit must be driven at a higher frequency.

Keep the potential of the power line (V1 to Vx) and the potential of the opposite electrode at a constant value. The potential difference between the potential of the opposite electrode and the power line is sufficient to enable the light-emitting device to emit light.

In the first signal line time period (L1), the gate line (G1) is selected by the selection signal output by the gate signal line to turn on all the switching TFTs 1801 connected to the gate signal line G1. The analog video signal is sequentially output to the source signal line (S1 to Sx). Then, the analog video signal input to the source signal line is input to the gate electrode of the current control TFT 1804 through the switching TFT 1801.

The amount of current passing through the channel forming area of the current control TFT 1804 is determined by the gate voltage V _GS Controlled, this gate voltage V _GS It is the potential difference between the gate electrode and the source region of the current control TFT 1804. Accordingly, the potential applied to the pixel electrode of the light-emitting element 1806 is controlled by the analog video signal input to the gate electrode of the current control TFT 1804. Therefore, the potential of the analog video signal controls the light-emitting element 1806 to emit light.

When the above operation is repeated to input the analog video signal to the source signal line (S1 to Sx), the first signal line time period ends. A signal line time period can be replaced by the time period for completing the input of the analog video signal to the source signal line (S1 to Sx) and the horizontal clearing time period. Then, when the selection signal selects the interpolar signal line G2, the second time signal line (L2) is started. In the first signal line time period (L1), analog video signals are sequentially input to the source signal lines (S1 to Sx).

When all gate signal lines (G1 to Gy) are selected in this way, all signal line cycles (L1 to Ly) are completed. The completion of all signal line cycles (L1 to Ly) and the completion of a frame cycle. All pixels displayed in a frame period constitute an image. A frame time period can be replaced by all signal line time periods (L1 to Ly) and vertical clearing periods.

As described above, the potential of the analog video signal is used to control the amount of light emitted by the light-emitting element 1806 to implement grayscale display.

The use of the gate electrode and the potential of the source section of the current control TFT to control the amount of current supplied to the light-emitting element will be described below with reference to FIGS. 26A and 26B.

Fig. 26A shows the transistor characteristics of the TFT. In this figure, the line segment 401 represents I _D- V _GS Characteristics (or I _D- V _GS curve). Here I _D Represents the drain current, V _GS Represents the potential difference between the gate electrode and the source. This graph can show the current flowing under any gate voltage.

Generally speaking, in order to drive the light-emitting element, use I _D- V _GS The area defined by the dotted line in the characteristic. FIG. 26B shows an enlarged view of the area defined by the dotted line 402.

The shaded area in Figure 28 represents the saturation area. In fact, the saturation zone is equivalent to the critical voltage (V _TH ) From the vicinity to the gate voltage. In this region, the drain current changes exponentially with the gate voltage. In the case of analog drive, the gate voltage in this area is used to control the current.

The gate voltage of the current control TFT is controlled by the analog video signal, and the analog video signal is input to the pixel by turning on the switching TFT. At this time, according to I in Figure 26A _D- V _GS Characteristic, the drain current corresponding to the gate voltage corresponds in a one-to-one manner. In more detail, the voltage of the analog video signal input to the gate electrode of the current control TFT determines the potential of the electrode region. Therefore, a predetermined drain current is caused to flow into the light-emitting element, so that the light-emitting element emits an amount of light corresponding to the current.

As described above, the amount of light emitted by the light-emitting element is controlled by the analog video signal to implement grayscale display.

However, the disadvantage of the above-mentioned analog drive is that it is easily affected by changes in TFT characteristics. For example, when the I of the switching TFT _D- V _GS There are differences between the characteristics and the characteristics of the switching TFTs of adjacent pixels, and the same gray scale is displayed.

At this time, the drain currents of the switching TFTs are different from each other, although the difference in the drain current is different depending on the degree of characteristic change. Therefore, different gate voltages are applied to the current control TFT of each pixel. In more detail, each light-emitting element flows in a different current. As a result, each light-emitting element emits a different amount of light and cannot display the same gray scale.

Even if the same voltage is applied to the current control TFT of each pixel, if the I of the current control TFT _D- V _GS If the characteristics are different, the TFT still cannot output the same drain current. Further, as shown in FIG. 26A, due to the use of the region where the drain current and the gate voltage change exponentially, I _D- V _GS A slight deviation of the characteristics may significantly affect the amount of output current, even when the same voltage is applied to the current control TFT. In this case, even if the signal of the same voltage is input, since I _D- V _GS With a slight difference in characteristics, the amount of light emitted by the light-emitting elements of adjacent pixels is still different from each other.

In fact, the I of the switching TFT and the current control TFT _D- V _GS Variations in characteristics will double the impact and further complicate the conditions for implementing grayscale display. As mentioned above, the analog driving circuit is extremely sensitive to the variation of the characteristics of the TFT, which is one of the problems of the active matrix light-emitting device.

Invention summary

The purpose of the present invention is to solve the above-mentioned problems and provide an active array type light-emitting device that can perform clear multi-color gradation display. Further, another object of the present invention is to provide a high-performance light-emitting device, which uses the aforementioned active array light-emitting device as a display area.

The inventor considers the problem of the analog driving method, which uses the saturation region to control the current flowing through the light-emitting element. Since the drain current changes exponentially with the gate voltage, it is susceptible to I _D -V _GS The influence of characteristic variation.

In more detail, when I _D -V _GS When the characteristics of the variability occur, the drain current changes exponentially with the gate voltage in the saturation region. Therefore, even if the same gate voltage is applied, different currents will be output, and ideal grayscale display cannot be obtained.

Therefore, the inventors of the present invention consider not using the current in the saturation region to control the amount of current flowing through the light-emitting element, but to implement the control by controlling the time period during which the light-emitting element emits light. In other words, time is used to control the amount of light emitted by the light-emitting element to realize the grayscale display of the present invention. The driving method of implementing grayscale display by controlling the light-emitting time period is called the time-sharing driving method. The grayscale display realized by the time-sharing driving method is called the time-sharing grayscale display.

Using the above-mentioned structure, the present invention can avoid _D -V _GS The characteristics of the change and the ideal grayscale display cannot be obtained.

The structure of the present invention will be described below.

According to the present invention, there is provided a light emitting device including a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and a pixel portion; It is characterized in that the pixel portion has a plurality of pixels; each pixel includes a light-emitting element, a current control TFT that controls the light emission of the light-emitting element, a first switching TFT and a second switching TFT that drive the current control TFT; the first source is used The signal line driving circuit and the first gate signal line driving circuit control the driving of the first switching TFT; the second source signal line driving circuit and the second gate signal line driving circuit are used to control the second switch TFT drive; and control the length of the time period to implement grayscale display, and make the light-emitting element emit light during the display process.

According to the present invention, there is provided a light-emitting device including a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and a pixel portion; and One first source signal line connected to the first source signal line driving circuit, a plurality of second source signal lines connected to the second source signal line driving circuit, and a plurality of connected to the first gate A first gate signal line of the signal line driving circuit, a plurality of second gate signal lines connected to the second gate signal line driving circuit, and a plurality of power lines, characterized in that the pixel portion has a plurality of pixels, Each pixel includes a light-emitting element, a current control TFT, a first switching TFT and a second switching TFT; the gate electrodes of the first switching TFT are connected to the first gate signal lines; the second switching TFT The multiple gate electrodes are connected to the multiple second gate signal lines; the source regions or the drain regions in the multiple first switching TFTs are connected to the multiple first source signal lines, and the other region Connect to. The gate electrodes of the plurality of current control TFTs; the source region or the drain region of the plurality of second switching TFTs is connected to the plurality of second source signal lines, and another region is connected to the plurality of current controllers The gate electrode of the TFT; and the source region or the drain region of the plurality of current control TFTs is connected to the plurality of power lines, and the other region is connected to the plurality of light-emitting elements.

According to the present invention, there is provided a light emitting device including: a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and a pixel portion; A plurality of first source signal lines connected to the first source signal line driving circuit, a plurality of second source signal lines connected to the second source signal line driving circuit, and a plurality of connected to the first gate The first gate signal line of the signal line driving circuit, a plurality of second gate signal lines connected to the second gate signal line driving circuit, and a plurality of power lines of fixed potential, characterized in that the pixel portion has A plurality of pixels, each pixel includes a light-emitting element, a current control TFT, a first switching TFT and a second switching TFT; wherein each of the plurality of light-emitting elements has a pixel electrode, a counter electrode with a fixed potential, and is located between the pixel electrode and the The organic compound layer between the opposing electrodes; wherein the gate electrodes of the first switching TFT are connected to the plurality of first gate signal lines; wherein the multi-gate electrodes of the second switching TFT are connected to the plurality of The second gate signal line; wherein the source region or the drain region of the plurality of first switching TFTs is connected to the plurality of first source signal lines, and the other region is connected to the gate of the plurality of current control TFTs An electrode; wherein the source region or the drain region of the plurality of second switching TFTs is connected to the plurality of second source signal lines, and the other region is connected to the gate electrodes of the plurality of current control TFTs; and Wherein the source region or the drain region of the plurality of current control TFTs is connected to the plurality of power lines, and the other region is connected to the plurality of pixel electrodes. According to the present invention, there is provided a light emitting device including a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and a pixel portion; and One first source signal line connected to the first source signal line driving circuit, a plurality of second source signal lines connected to the second source signal line driving circuit, and a plurality of connected to the first gate A first gate signal line of the signal line driving circuit, a plurality of second gate signal lines connected to the second gate signal line driving circuit, and a plurality of power lines, characterized in that the pixel portion has a plurality of pixels, Each pixel includes a light-emitting element, a current control TFT, a first switching TFT and a second switching TFT; the gate electrodes of the first switching TFT are connected to the first gate signal lines; the second switching TFT The multiple gate electrodes are connected to the multiple second gate signal lines; the source regions or the drain regions in the multiple first switching TFTs are connected to the multiple first source signal lines, and the other region Connected to the multiple current control TFTs

According to the present invention, there is provided a light-emitting device, which includes a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and pixel parts; multiple A first source signal line connected to the first source signal line driving circuit, a plurality of second source signal lines connected to the second source signal line driving circuit, and a plurality of second source signal lines connected to the first gate signal The first gate signal line of the line driving circuit, a plurality of second gate signal lines connected to the second gate signal line driving circuit, and a plurality of power lines of fixed potential, characterized in that the pixel portion has a plurality of Pixels, each pixel includes a light-emitting element, a current control TFT, a first switching TFT, and a second switching TFT; each of the plurality of light-emitting elements has a pixel electrode, a counter electrode with a fixed potential, and is located between the pixel electrode and the counter electrode Between the organic compound layer; the multiple gate electrodes of the first switching TFT are connected to the multiple first gate signal lines; the multiple gate electrodes of the second switching TFT are connected to the multiple second gate signals Line; the source regions or drain regions of the plurality of first switching TFTs are connected to the plurality of first source signal lines, and the other region is connected to the gate electrodes of the plurality of current control TFTs; the plurality The source region or the drain region of the second switching TFT is connected to the plurality of second source signal lines, and the other region is connected to the gate electrodes of the plurality of current control TFTs; among the plurality of current control TFTs The source region or the drain region is connected to the plurality of power lines, and the other region is connected to the plurality of pixel electrodes; in a frame time period, n writing time periods Ta1, Ta2,..., Tan; The writing time period appearing after the writing time period Tan is the first writing time period Ta1; the time period from the appearance of each writing time period Ta1, Ta2,..., Tan to the appearance of the next writing time period is n display time periods Td1, Td2,...,Tdl; within n writing time periods Ta1, Ta2,..., Tan, digital signals pass from the first source signal line drive circuit through the plurality of first source signals Line input to the plurality of pixels, or input to the plurality of pixels from the second source signal line driving circuit through the plurality of second source signal lines; and in n display time periods Td1, Td2,...,Td1 Inside, digital signals are used to selectively make the plurality of light-emitting elements in a light-emitting state or a non-light-emitting state.

According to the present invention, there is provided a light emitting device including a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and a pixel portion; and One first source signal line connected to the first source signal line driving circuit, a plurality of second source signal lines connected to the second source signal line driving circuit, and a plurality of connection to the first interpole A first gate signal line of the signal line driving circuit, a plurality of second gate signal lines connected to the second interpole signal line driving circuit, and a plurality of power lines, characterized in that the pixel portion has a plurality of pixels, Each pixel includes a light-emitting element, a current control TFT, a first switching TFT, and a second switching TFT; the gate electrodes of the first switching TFT are connected to the first gate signal lines; the second switching TFT The multiple gate electrodes are connected to the multiple second gate signal lines; the source regions or the drain regions in the multiple first switching TFTs are connected to the multiple first source signal lines, and the other region Connected to the gate electrodes of the plurality of current control TFTs; the source region or the drain region of the plurality of second switching TFTs is connected to the plurality of second source signal lines, and the other region is connected to the plurality of The gate electrode of the current control TFT; the source regions or the drain regions of the current control TFTs are connected to the power lines, and the other region is connected to the light emitting elements; within a frame time period , There are n writing time periods Ta1, Ta2,..., Tan in sequence; the writing time period appearing after the writing time period Tan is the first writing time period Ta1; since each writing time period Ta1, Ta2 appears ,...,The time period from Tan to the next writing time period is n display time periods Td1, Td2,..., Td1; in n writing time periods Ta1, Ta2, _… In Tan, a digital signal is input from the first source signal line driving circuit to the plurality of pixels through the plurality of first source signal lines, or from the second source signal line driving circuit through the plurality of second The source signal line is input to the plurality of pixels; in n writing time periods Ta1, Ta2, _… In Tan, some adjacent writing time periods overlap with each other; in n display time periods Td1, Td2, _… In Td1, digital signals are used to selectively make the multiple light-emitting elements in a light-emitting state or a non-light-emitting state.

According to the present invention, there is provided a light emitting device including a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and a pixel portion; and One first source signal line connected to the first source signal line driving circuit, a plurality of second source signal lines connected to the second source signal line driving circuit, and a plurality of connection to the first gate The first gate signal line of the signal line driving circuit, a plurality of second gate signal lines connected to the second gate signal line driving circuit, and a plurality of fixed potential power lines, characterized in that the pixel portion has a plurality of Pixels, each pixel includes a light-emitting element, a current control TFT, a first switching TFT and a second switching TFT; each of the plurality of light-emitting elements has a pixel electrode, an opposite electrode with a fixed potential, and the pixel electrode and the opposite electrode The organic compound layer between the electrodes; the multiple gate electrodes of the first switching TFT are connected to the multiple first gate signal lines; the multiple gate electrodes of the second switching TFT are connected to the multiple second gates Signal line; the source region or the drain region of the plurality of first switching TFTs is connected to the plurality of first source signal lines, and the other region is connected to the gate electrodes of the plurality of current control TFTs; the more The source region or the drain region of the second switching TFT is connected to the plurality of second source signal lines, and the other region is connected to the gate electrode of the plurality of current control TFTs; in the plurality of current control TFTs The source region or the drain region of is connected to the plurality of power lines, and the other region is connected to the plurality of pixel electrodes; in a frame time period, n writing time periods Ta1Ta2 occur sequentially, _… , Tan; the writing time period appearing after the writing time period Tan is the first writing time period Ta1; since each writing time period Ta1, Ta2, _… , The time period from Tan to the next writing time period is n display time periods Td1, Td2, _… , Td1; in n write time periods Ta1, Ta2, _… In Tan, a digital signal is input from the first source signal line driving circuit to the plurality of pixels through the plurality of first source signal lines, or from the second source signal line driving circuit through the plurality of second The source signal line is input to the plurality of pixels; in n writing time periods Ta1, Ta2, _… In Tan, some adjacent writing time periods overlap with each other; and in n display time periods Td1, Td2, _… In Td1, digital signals are used to selectively make the multiple light-emitting elements in a light-emitting state or a non-light-emitting state.

A feature of the light-emitting device is that the digital signal is input from the first source signal line driving circuit to the first source signal line through the plurality of first source signal lines in a writing time period that partially overlaps with an adjacent writing time period A plurality of pixels, and in another writing time period, the digital signal is input to the plurality of pixels from the second source signal line driving circuit through the plurality of second source signal lines.

A feature of the light-emitting device is that j display time periods (j is an integer greater than zero and less than or equal to n) within n display time periods are black display time periods, during which all light-emitting elements are in a non-luminous state.

A feature of the light-emitting device is that the lengths of the n writing time periods are the same as each other.

A feature of the light-emitting device is the length ratio of (nj) display time periods outside of j black display time periods, from small to large to 2 ⁰ :2 ¹ : _… :2 ^(nj-1) 。

A feature of the light-emitting device is that the first switching TFT and the second switching TFT have the same polarity.

A feature of the light-emitting device is that within a frame time period, the last display time period that appears is the longest black display time period.

According to the present invention, there is provided a light emitting device including a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit and a pixel portion; It is characterized in that the pixel portion has a plurality of pixels; wherein the plurality of pixels include a plurality of light-emitting elements; and the digital signals output by the first source signal line driving circuit and the second source signal line driving circuit are utilized, and the The selection signals output by the first gate signal line driving circuit and the second gate signal line driving circuit control the driving of the plurality of light-emitting elements.

According to the present invention, there is provided a light emitting device including a first source signal line drive circuit, a second source signal line drive circuit, a first gate signal line drive circuit, a second gate signal line drive circuit, and a pixel portion; It is characterized in that the pixel portion has a plurality of pixels; wherein the plurality of pixels include a plurality of light-emitting elements; and the digital signals output by the first source signal line driving circuit and the second source signal line driving circuit are utilized, and the The selection signals output by the first gate signal line driving circuit and the second gate signal line driving circuit control the time period of the light-emitting element.

A feature of the light-emitting device is that the organic compound layer is formed of a low-molecular-weight organic material or a polymerized organic material.

One feature of the light-emitting device is that the light-emitting device is a computer, a video camera or a DVD player.

Schematic description

Fig. 1 is a top block diagram of a light-emitting device according to the present invention.

Fig. 2 is a pixel circuit of the light-emitting device according to the present invention.

FIG. 3 is a pixel circuit of the light-emitting device according to the present invention.

The timing chart of FIG. 4 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 5 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 6 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 7 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 8 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 9 shows the method of driving the light-emitting device of the present invention.

The timing chart of FIG. 10 shows the method of driving the light-emitting device of the present invention.

11A to 11D show the manufacturing process of the light-emitting device.

12A to 12D show the manufacturing process of the light-emitting device.

13A to 13D show the manufacturing process of the light-emitting device.

14A and 14B show the manufacturing process of the light-emitting device.

15A and 15B show a top view and a cross-sectional view of a light-emitting device according to the present invention.

16A and 16B show a top view and a cross-sectional view of a light-emitting device according to the present invention.

FIG. 17 shows a cross-sectional view of a pixel of the light-emitting device according to the present invention.

FIG. 18 shows a cross-sectional view of a pixel of the light-emitting device according to the present invention.

19A and 19B are pixel circuits of the light-emitting device of the present invention.

Fig. 20 is a circuit diagram of a source line driving circuit.

Fig. 21 is a top view of the source line driving circuit.

22A to 22F show the electronic application of the light-emitting device according to the present invention.

Figures 23A to 23F show the electronic application of the light-emitting device according to the present invention.

Fig. 24 shows the pixel circuit of the conventional light-emitting device.

The timing chart of FIG. 25 shows a method of driving a conventional light-emitting device.

Figures 26A and 26B show the I of the TFT _D -V _GS characteristic.

27A and 27B show the connection structure between the light-emitting element and the current control TFT, and graphs of the voltage and current characteristics of the light-emitting element and the current control TFT.

Fig. 28 is a graph showing the voltage and current characteristics of the light-emitting element and the current control TFT.

Figure 29 shows the relationship between the gate voltage and the drain current of the current control TFT.

Symbol description of main components

31. . . Drain wire

35. . . Drain wire

36. . . wire

37. . . Gate

41. . . Passive film

42. . . Flat film

43. . . Pixel electrode

44a and 44b. . . Insulation spacer

45. . . Luminescent layer

51a and 51b. . . Spacer

101. . . Pixel area

102a. . . First source signal line drive circuit

102b. . . Second source signal line drive circuit

103a. . . First gate signal line drive circuit

103b. . . Second gate signal line drive circuit

105. . . Translation register

106. . . Lock (A)

107. . . Lock (B)

201a. . . First switching TFT

201b. . . Second switching TFT

202. . . Current control TFT

203. . . Light-emitting element

204. . . Capacitor

400. . . Glass substrate

402 to 405. . . Semiconductor layer

404. . . Semiconductor layer

406. . . Gate insulating film

407. . . The first conductive film

408. . . Second conductive film

409 to 412. . . Photomask

409a to 412a. . . Photomask

414 to 417. . . First shape conductive layer

419 to 422. . . Second conductive layer

421a and 421b. . . Second conductive layer

425 to 428. . . First impurity region

431. . . Second impurity region

433. . . Photomask

434 to 437. . . Source region

438 to 411. . . Drain region

442 to 445. . . Lov District

446. . . Loff District

447 and 448. . . Source region

449 and 450. . . Drain region

451 and 452. . . Lov District

453. . . Photomask

455. . . The first inner insulating film

458. . . Second inner insulating film

459 to 462. . . Source wire

463 to 465. . . Drain wire

467. . . The third inner insulating film

469. . . First spacer

470. . . Second compartment

471. . . Organic compound layer

472. . . cathode

501. . . Switching TFT

502. . . Current control TFT

504. . . Source region

505. . . Drain region

506. . . Loff District

507. . . Lov District

510. . . Source region

511. . . Drain region

512. . . Lov District

513. . . Channel formation zone

521. . . Source region

522. . . Drain region

523. . . LoV area

524. . . Channel formation zone

531. . . Source region

532. . . Drain region

533. . . Lov District

534. . . Channel formation zone

801. . . Translation register

802. . . Lock (A)

803. . . Lock (B)

832a and 832b. . . Active layer

833a and 833b. . . Active layer

834a and 834b. . . Active layer

837a and 837b. . . Gate electrode

838b and 839. . . Gate electrode

839 and 840. . . Gate electrode

840 and 841. . . Gate electrode

1804. . . Current control TFT

1806. . . Light-emitting element

1808. . . Capacitor

2001. . . Display box

2002. . . Support plate

2003. . . Display part

2101. . . Ontology

2102. . . Display area

2103. . . Voice input area

2104. . . Operation switch

2105. . . Battery

2106. . . Image receiving area

2201. . . Ontology

2202. . . Signal line

2203. . . Headband

2204. . . Display part

2205. . . Optical system

2206. . . Call display device

2301. . . Ontology

2302. . . Recording medium

2303. . . Operation switch

2401. . . Ontology

2402. . . Display area

2501. . . Ontology

2502. . . frame

2503. . . Display area

2601. . . Ontology

2602. . . Sound output area

2603. . . Voice input area

2604. . . Display area

2605. . . Operation switch

2606. . . antenna

2701. . . Ontology

2702. . . Display part

2703 and 2704. . . Operation switch

3501. . . Base

3502. . . First switching TFT

3503. . . Current control TFT

3504. . . Second switching TFT

3801 and 3802. . . The first and second gate signal lines

3805. . . First switching TFT

3806. . . Second switching TFT

3807. . . Current control TFT

3808. . . Light-emitting element

3809. . . power cable

3810. . . capacitance

4010. . . Base

4011. . . Pixel area

4012a. . . First source signal side drive circuit

4012b. . . Second source signal side drive circuit

4013a. . . Gate signal side drive circuit

4013b. . . Gate signal side drive circuit

4016. . . wire

4021. . . Base film

4022a and 4022b. . . Driver circuit TFT

4023. . . Current control TFT

4026. . . Inner insulation film

4027. . . Pixel electrode

4028. . . Insulating film

4029. . . Organic compound layer

4030. . . cathode

4031. . . area

4505. . . Light-emitting element

6000. . . Cover member

6004. . . Stuffing

6006. . . Inert film

7000. . . Sealing member

7001. . . Airtight component

4014a, 4014b, 4016. . . wire

, And 4016b

3801, 3801a and 3801b. . . The first source signal line

3802, 3802a and 3802b. . . The second source signal line

447, 435, 436 and 448 source regions

Detailed description of the preferred embodiment

Hereinafter, the structure of the light emitting device according to the present invention will be described. Here, we will explain the implementation of n-bit digital video signal 2 ⁿ Example of grayscale display.

Fig. 1 shows a block diagram of a light-emitting device according to the present invention. The light-emitting device in FIG. 1 has a pixel portion including TFTs, a first source signal line drive circuit 102a, a second source signal line drive circuit 102b, a first gate signal line drive circuit 103a, and a second gate signal line drive The circuits 103b are located on the periphery of the pixel portion 101, respectively.

The first source signal line drive circuit 102a, the second source signal line drive circuit 102b, the first gate signal line drive circuit 103a, and the second gate signal line drive circuit 103b can be formed on the same substrate as the pixel portion, Or it can be formed on an IC chip and connected to the pixel part 101 through the FPC.

Basically, each of the first and second source signal line driving circuits 102a, 102b has a translation register 105, a latch (A) 106 and a latch (B) 107. On the other hand, each of the first and second gate signal line driving circuits 103a, 103b has a translation register and a buffer. According to this example, the first and second gate signal line driving circuits 103a, 103b have level shift registers in addition to the translation registers and buffers.

The driving circuit of the light-emitting device according to the present invention is not limited to the example in FIG. 1.

FIG. 2 shows an enlarged view of the pixel portion 101. In the pixel portion 101, there are provided first source signal lines (SL1 to SLx) connected to the latch (B) 107 of the first source signal line driving circuit 102a, and connected to the second source signal line driving circuit 102b The second source signal line (SR1 to SRx) of the latch (B) 107 is connected to the power supply line (V1 to Vx) of the external light-emitting device power supply via FPC, and is connected to the first gate signal line driving circuit 103a The first gate signal line (GL1 to GLy) and the second gate signal line (GR1 to GRy) connected to the second gate signal line driving circuit 103b.

In this specification, the combination of the first source signal line drive circuit 102a and the first gate signal line drive circuit 103a is referred to as the first drive circuit group (Dr_L), and the combination of the second source signal line drive circuit 102b and the second gate The pole signal line driving circuit 103b is called the second driving circuit group (Dr_R).

Including one of the first source signal lines (SL1 to SLx), one of the second source signal lines (SR1 to SRx), one of the first gate signal lines (GL1 to GLy) and the second gate signal line ( GR1 to GRy) constitute one pixel 104. In the pixel portion 101, a plurality of pixels 104 are arranged in an array.

FIG. 3 is an enlarged view of the pixel 104. As shown in FIG. In FIG. 3, reference numeral 201a represents a first switching TFT, and reference numeral 201b represents a second switching TFT. The gate electrode of the first switching TFT is connected to the first gate signal line (GL1 to GLy). The gate electrode of the second switching TFT is connected to the second gate signal line (GR1 to GRy).

The source region or the drain region of the first switching TFT 201 a is connected to the first source signal line SL (one of SL1 to SLx), and the other is connected to the gate electrode of the current control TFT 202 and the capacitor 204. The source region or the drain region of the second switching TFT 201b is connected to the second source signal line SR (one of SR1 to SRx), and the other is connected to the gate electrode of the current control TFT 202 and the capacitor 204.

When the first switching TFT 201a and the second switching TFT 201b are in the OFF state, the capacitor 204 is used to maintain the gate voltage of the current control TFT 202. The present invention is not limited to the capacitor 204 shown in this embodiment, and the capacitor 204 may not be used.

The source region or the drain region in the current control TFT 202 is connected to the power supply line V (one of V1 to Vx), and the other is connected to the light-emitting element 203. The power supply line V is connected to the capacitor 204.

The light emitting element 203 includes an anode, a cathode, and an organic compound layer located between the anode and the cathode. When the anode is connected to the source region or the drain region of the current control TFT 202, the anode serves as the pixel electrode and the cathode serves as the opposite electrode.

The opposite potential is applied to the opposite electrode of the light-emitting element, and the power source potential is applied to the power supply line V. The potential difference between the opposite potential and the power supply potential is maintained at a certain value. When the power supply potential is applied to the pixel, the potential difference can cause the light-emitting element 203 to emit light. The power supply potential and the opposite potential are applied to the light-emitting element of the present invention through the power supply of the external IC.

In the current light-emitting element, when the amount of light per unit light-emitting area of the pixel is 200cd/m ² When the unit area of each pixel part needs about several mA/cm ² Ofcurrent. Therefore, when the size of the screen increases, it is more difficult to use a switch to control the potential provided by the IC power supply. However, in the present invention, the power supply potential and the opposite potential are always kept at constant values. Therefore, since there is no need to control the potential provided by the IC power supply, the present invention can effectively realize a large-area panel.

An n-channel TFT or a P-channel TFT can be used as the first and second switching TFTs 201a and 201b, and the current control TFT 202. In addition to the single-gate structure, the first and second switching TFTs 201a and 201b, and the current control TFT 202 can use a multi-gate structure, such as a double-gate structure or a triple-gate structure.

In this specification, an n-channel TFT or a p-channel TFT can be used as the current control TFT 202. When the anode of the light emitting element 203 is used as the pixel electrode and the cathode is used as the opposite electrode, the current control TFT 202 is preferably a p-channel TFT. On the contrary, when the anode of the light-emitting element 203 is used as the opposite electrode and the cathode is used as the pixel electrode, the current control TFT 202 is preferably an n-channel TFT.

Next, a driving method of the light emitting device having the above structure will be described.

(Embodiment Mode 1)

Referring to FIG. 4, the driving method of the embodiment mode will be described.

First, the selection signal output by the first gate signal line driving circuit 103a is used to select the first gate signal line GL1 to turn on the first switching TFT 201a of all pixels connected to the first gate signal line GL1. In this specification, "turning on the TFT" means "driving a TFT".

The digital video signal of the first bit is input from the latch (B) 107 of the first source signal line driving circuit 102a to the pixels of the first signal line through the first source signal lines (SL1 to SLx). Then, the digital video signal input to the first bit of the pixel is input to the gate electrode of the current control TFT 202 through the first switching TFT 201a that is turned on.

The digital video signal has "0" or "1" information. The digital video signal "0" has a high-level voltage, and the digital video signal "1" has a low-level voltage.

In this embodiment, when the digital video signal has "0" information, the current control TFT 202 is turned off. Accordingly, the power supply potential is not applied to the pixel electrode of the light-emitting element 203. As a result, the pixel containing the light-emitting element 203 to which the information "0" is input does not emit light.

Conversely, when the digital video signal has "1" information, the current control TFT 202 is turned on. Accordingly, the power supply potential is applied to the pixel electrode of the light-emitting element 203. The difference between the opposite potential and the power supply potential is maintained at a constant value, so that when the power supply potential is applied to the pixel electrode, the light-emitting element can emit light. As a result, as a result, the pixel including the light-emitting element 203 to which the information "1" is input emits light.

In the mode of this embodiment, when the digital video signal has "0" information, the current control TFT 202 is turned off, and when the digital video signal has "1" information, the current control TFT 202 is turned on. However, the present invention is not limited to this structure. Alternatively, a digital video signal with "0" information can be used to turn on the current control TFT 202, and a digital video signal with "1" information can be used to turn off the current control TFT 202.

In this specification, the light-emitting state of the light-emitting element is referred to as the light-emitting state, and the state where the light-emitting element does not emit light is referred to as the non-light-emitting state.

Accordingly, when the digital video signal of the first bit is input to the pixel of the first signal line, the light-emitting element is made to emit light or not, and the pixel of the first signal line is displayed. The time period during which the pixels are displayed is called the display time period Td. The time period from the input of the first bit of the digital video signal is called Td1. To simplify the description, FIG. 4 only shows the time display periods of the pixels of the first signal line (first column) and the y-th signal line (last column). The beginning of the display period of each signal line is said to have a time difference.

Then, the current control TFT 202 of all pixels connected to the first gate signal line GL1 is turned off. Then, the first gate signal line GL2 is selected by the selection signal output by the first gate signal line driving circuit 103a to turn on the first switching TFT 201a of all pixels connected to the first gate signal line GL2. Then, from the second source signal line driving circuit 102b, the digital video signal of the first bit is applied to the pixels of the second signal line through the source signal lines (SL1 to SLx).

Then, repeat the above operation to select all the first gate signal lines (GL1 to GLy). As a result, the digital video signal of the first bit is input to the pixels of all the signal lines. The time period during which the first-bit digital video signal is input to all pixels is called the writing time period Ta1.

On the other hand, before and after the digital video signal of the first bit is input to all pixels, in other words, before and after the completion of the writing time period Ta1, the writing time period Ta2 starts. In this mode, an example in which the writing time period Ta2 starts after the writing time period Tal is completed is described.

When the writing time period Ta2 starts, the second gate signal line GR1 is selected by the selection signal output from the second gate signal line drive circuit 103b to turn on the second gate signal line GR1 of all pixels connected to the second gate signal line GR1 Switch TFT201b.

The digital video signal of the second bit is input from the latch (B) 107 of the second source signal line driving circuit 102a to the pixels of the first signal line through the second source signal line (SR1 to SRX). Then, the digital video signal input to the second bit of the pixel is input to the gate electrode of the current control TFT 202 through the second switching TFT 201b.

Accordingly, in the writing time period Ta2, the digital video signal of the second bit can be input to the pixels of the first signal line in parallel with the video signal of the first bit. Therefore, the first bit video signal input to the pixel in the writing time period Ta1 can be overwritten by the second bit video signal.

When the second-bit video signal is input to the pixels on the first signal line, the light-emitting element is in a light-emitting or non-light-emitting state according to the second-bit digital video signal 203, and the pixels on the first signal line are displayed. The second bit digital video signal is input to the pixel to close the display time period Td1 and start the display time period Td2.

Then, turn off the second switching TFT 201b of all pixels connected to the second gate signal line GR1. Then, the second gate signal line GL2 is selected by the selection signal output by the second gate signal line driving circuit 103b to turn on the second switching TFT 201b of all pixels connected to the second gate signal line GL2. Then, from the second source signal line driving circuit 102b, the second bit of digital video signal is applied to the pixels of the second signal line through the source signal lines (SR1 to SRx).

Then, repeat the above operation to select all the second gate signal lines (GR1 to GRy). As a result, the digital video signal of the second bit is input to the pixels of all the signal lines. The time period during which the second-bit digital video signal is input to all pixels is called the writing time period Ta2.

On the other hand, before and after the digital video signal of the second bit is input to all pixels, in other words, before and after the completion of the writing time period Ta2, the writing time period Ta3 starts. In this mode, an example in which the writing time period Ta3 is started after the writing time period Ta2 is completed is described.

When the writing time period Ta3 starts, the first gate signal line GL1 is selected by the selection signal output from the first gate signal line driving circuit 103a to turn on the first gate signal line GL1 of all pixels connected to the first gate signal line GL1 Switch TFT201a.

Then, sequentially select the first gate signal line (GL1 to GLy) to input the third bit of digital video signal to all pixels. The time period during which the third-bit digital video signal is input to all pixels is called the writing time period Ta3.

Repeat the above operation until the n-th bit of digital video signal is input to the pixel, so that the display time period Td1 to Tdn level appears (Figure 4).

When all the display time periods Td1 to Tdn are completed, one frame time period ends, and the image is displayed. In the driving method of the present invention, the time period for displaying an image is called a frame period (F).

As far as a general display device is concerned, it is better to have more than 60 frame time periods per second. The reason is that if less than 60 images are displayed per second, image flicker will occur.

After completing a frame period, the digital video signal of the first bit is input to the pixels again to form a display time period Td1. Then, repeat the above operation. In this embodiment, in the next frame period, the first group of driving circuits (Dr_L) is used to input the first bit of digital video signal to the pixel again. However, the structure of the present invention is not limited to this. In the next display cycle, the second set of driving circuits (Dr_R) can be used to input the first bit of digital video signals to the pixels.

In this specification, inputting a digital video signal to the pixel refers to inputting the digital video signal to the gate electrode of the current control TFT via the switching TFT of the pixel.

In this mode, the writing time period of the digital video signal input by the first group of driving circuits (Dr_L) and the writing time period of the digital video signal input by the second group of driving circuits (Dr_R) appear alternately. However, the present invention is not limited to this structure. When the adjacent writing time periods do not overlap each other, the two adjacent writing time periods can be performed by a single driving circuit group, that is, the first group of driving circuits (Dr_L) or the second group of driving circuits (Dr_R).

The time periods for using the first driving circuit group (Dr_L) to input digital video signals into the pixels cannot overlap each other. Sometimes, the first drive circuit group (Dr _－ L) The time periods for inputting digital video signals to the pixels also cannot overlap each other.

The delay time period Td1 represents the period from the start time of the write time period Ta1 to the start time of the write time period Ta2. The delay time period Td2 represents the period from the start time of the write time period Ta2 to the start time of the write time period Ta3. Like display time periods Td1 and Td2, display time periods Td3, Td4, _… , Td(n-1) and Tdn are from the write time period Ta3, Ta4, _… ,Ta(n-1) from the start time to the writing time period Ta4, Ta5, _… , The period of the start time of Tan and Ta1.

In this embodiment, the length ratio of the display time period Td1 to Tdn is accordingly 2 ⁰ :2 ¹ :S ² : _… :2 ^(n-2) :2 ^(n-1) 。

In this embodiment, the length relationship of the writing time period is Ta1=Ta2= _… =Tan, that is, all lengths are the same. However, the present invention is not limited to the above-mentioned length relationship. The length of the writing time period can be made different from each other.

In this manual, the relationship between the display time period Td1 to Tdn allows 2 ⁿ The gray scale display.

It is possible to obtain the sum of the length of the display time period during the time period of a frame during light emission to determine the gray scale displayed by the pixel.

Since in this embodiment, within a frame time period, the percentage of the display period sum is 100, a high-brightness display can be realized.

(Embodiment Mode 2)

In this embodiment mode, the display time period when the light-emitting element does not emit light will be described with reference to FIG. 5.

First, the first set of driving circuits (Dr_L) is used to input the first bit of digital video signal to each pixel. Since the digital video signal is input in the same mode as the first embodiment, the description of the operation of the first and second groups of driving circuits is omitted.

When the digital video signal of the first bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta1 is started, the pixels start to display to enter the display time period Td1.

Next, before the writing time period Ta1 is completed, the writing time period Ta2 is started. When the time period Ta2 is started to be written, the display time period Td1 is completed to start the display time period Td2.

In the writing time period Ta2, the second group of drive circuits (Dr _{_} R) Input the digital video signal of "0" information to each pixel. Compared with digital video signals, undisplayed signals do not have image information, and the information is always "0".

When the non-display signal is input to each pixel, the information "0" of the non-display signal causes the light-emitting element in each pixel to be in a non-display state. Therefore, the pixel does not perform display within the display time period Td2.

In this embodiment, when the digital video signal has "0" information, the current control TFT 202 is turned off. When the digital video signal has "1" information, the current control TFT 202 is turned on. However, the present invention is not limited to this structure.

Alternatively, a digital video signal with "0" information can be used to turn on the current control TFT 202, and a digital video signal with "1" information can be used to turn off the current control TFT 202.

In this specification, a display period in which a pixel receives a non-display signal and is in a non-luminous state is called a black display period.

Next, before and after the completion of the writing time period Ta2, the writing time period Ta3 starts. In the writing time period Ta3, the first driving circuit group (Dr_L) inputs the digital video signal of the second bit into the pixel.

When the second bit digital video signal is input to the pixel, according to the second bit digital video signal information "0" or ^” 1", the light-emitting element in each pixel is selected as a light-emitting state or a non-light-emitting state. Accordingly, when the writing time period Ta3 is started, the pixel performs display to complete the display time period Td2 and start the display time period Td3.

Next, before and after the completion of the writing time period Ta3, the writing time period Ta4 starts. In this embodiment, the writing time period Ta4 is started before the writing time period Ta3 is completed. In the writing time period Ta4, the second driving circuit group (Dr_R) inputs the third bit of the digital video signal into each pixel.

When the third bit of digital video signal is input to each pixel, according to the third bit of digital video signal information "0 ^” Or "1", the light-emitting element in each pixel is selected as a light-emitting state or a non-light-emitting state. Accordingly, when the writing time period Ta4 is started, the pixels perform display to complete the display time period Td3 and start the display time period Td4.

Next, before and after the completion of the writing time period Ta4, the writing time period Ta5 is started. In this embodiment, the writing time period Ta5 is started before the writing time period Ta4 is completed. When the time period Ta5 is started to be written, the display time period Td4 is completed and the display time period Td5 is started.

In the writing time period Ta5, the first driving circuit group (Dr_L) inputs a digital signal with the information "0" to each pixel.

When the non-display signal is input to each pixel, the information "0" in the non-display signal causes the light-emitting element in each pixel to be in a non-display state. Therefore, in the display time period Td5, the pixels are not displayed and become the black display time period Td5.

The above-mentioned operation is implemented until the writing time period Ta(m+j') starts. The symbol j represents the number of the black display period.

Before completing the writing time period Ta(m-1+j'), the writing time period Ta(m+j') is started. Although FIG. 5 shows the case of m=n-2 to simplify the description, the present invention is not limited to this.

In the writing time period Ta(m+j')[Ta(n-2+j')], the first drive circuit group (Dr_L) sets the digit of the mth bit [(n-2)th bit] The video signal is input to each pixel.

When the m-bit [(n-2)th bit] digital video signal is input to each pixel, according to the m-bit [(n-2)th bit] digital video signal information "0" or "1 ", the light-emitting element in each pixel is selected as a light-emitting state or a non-light-emitting state. Accordingly, when the writing time period Ta(m+j')[Ta(n-2+j')] is started, the pixels perform display to complete the display time period Td(m+j')[Td(n-3 +j')] and start to display the time period Td(m+j')[Td(n-2+j')].

Continue the display time period Td(m+j')[Td(n-2+j')] until the writing time period Ta(m+j')[Ta(n-2+j')] is completed, and start The next writing time period Ta(m+1+j')[Ta(n-1+j')].

When the writing time period Ta(m+j')[Ta(n-2+j')] starts, the first drive circuit group (Dr_L) sets the m+1th bit [(n-1)th bit ] Digital video signal input to each pixel.

Although in this embodiment, the first driving circuit group (Dr_L) writes the digital video signal into the pixel during the writing time period Ta(m+1+j')[Ta(n-1+j')] , But the present invention is not limited to this. When the adjacent writing time periods do not overlap each other, the driving circuit group for inputting the digital video signal can be the first driving circuit group (Dr_L) or the second driving circuit group (Dr_R).

When the digital video signal of the m+1th bit [(n-1)th bit] is input to each pixel, according to the information of the m+1th bit [(n-1)th bit] digital video signal "0" or "1" selects the light-emitting element included in the pixel so that the light-emitting state becomes light-emitting or non-light-emitting. Accordingly, when the writing time period Ta(m+1+j')[Ta(n-1+j')] is started, the pixels perform display to complete the display time period Td(m+j')[Td(n -2+j')] and start to display the time period Td(m+1+j')[Td(n-1+j')].

Continue the display time period Td(m+1+j')[Td(n-1+j')] until the writing time period Ta(m+1+j')[ Ta(n-1+j') ], and start the next writing time period Ta(m+2+j')[Ta(n+j')].

When the writing time period Ta(m+2+j')[Ta(n-1+j')] starts, the display time period Td(m+2+j')[Td(n-1+j') )]. Then, when the time period Ta1 is written in the next frame period, the display time period Td(m+2+j')[Td(n-1+j')] is completed. The symbol j represents the number of the black display period in a frame display period. In this embodiment, since there is no black display time period since the writing time period Ta(m+2+j')[Ta(n-1+j')], j'=j.

When all the display time periods Td1 to Td(n+j) are completed, one frame display period is ended to display an image.

After completing a frame period, the first bit of digital video signal is input to the pixel again to start the display time period Td1. Then, repeat the above operation. In this embodiment, in the next display period, the first group of driving circuits (Dr_L) or the second group of driving circuits (Dr_R) can be used to input the first bit of digital video signals to the pixels.

Display time period Td1, Td2, _… , Td(n+j-1) and Td(n+j) are from the writing time period Ta1, Ta2, _… , Ta(+jn-1) from the start time to the writing time period Ta2, Ta3, _… , Ta(n+j) and the period of the start time of Ta1.

In this embodiment, the length ratio of the display time periods Td1 to Tdn is 2 in order. ⁰ :2 ¹ :S ² : _… ：2 ^(n-2) ：2 ^(n-1) 。

Combined with the display period outside the black display period, 2 can be displayed ⁿ Gray levels. Obtain the sum of the length of the display time period during the time period of a frame during light emission to determine the gray scale displayed by the pixel.

Since in this embodiment, the percentage of the sum of the display periods outside the black display period is 100, a high-brightness display can be realized.

In this mode, when the display is not performed, a black display time period is provided, so that the light-emitting element can not always be in a light-emitting state and the degradation of the organic compound layer is suppressed.

In this embodiment mode 1 and mode 2, the gray scale display is implemented in combination with the time display period according to the present invention. Therefore, compared with the analog driving method, the brightness of the grayscale display is not easily affected by the I of TFT. _D- V _GS The influence of characteristic variation.

In the present invention, the display time period and the writing time period overlap each other. In other words, even within the writing time period, the pixels can still be allowed to display. Accordingly, the display time period in a frame time period is not only determined by the writing time period.

The above-mentioned driving method according to the present invention can be applied not only to light-emitting devices, but also to devices using other passive components. Further, when developing a high-speed liquid crystal display device with a response time period of several μsec, the driving method of the present invention can also be applied.

(Example)

Hereinafter, embodiments of the present invention will be described.

(Example 1)

In this embodiment, referring to FIG. 6A, it is described that in the light-emitting device of the present invention, a 6-bit digital video signal is used to implement 2 ⁶ The grayscale display. The light-emitting device of this embodiment has the structure of FIGS. 1 to 3.

First, in the writing time period Ta1, the first drive circuit group (Dr_L) is used to input the first bit of digital video signal to each pixel (in more detail, the current control TFT202 gate electrode of each pixel) . Since the digital video signal is input into the pixel in a manner similar to the above-mentioned modes 1 and 2, the detailed description of the first group and the second group of driving circuits is omitted here.

When the digital video signal of the first bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta1 is started, the pixels start to display to enter the display time period Td1.

Next, before the writing time period Ta1 is completed, the writing time period Ta2 is started. In the writing time period Ta2, the second group of driving circuits (Dr_R) is used to input the second bit of digital video signal to each pixel.

When the digital video signal of the second bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta2 is started, the pixels start to display to enter the display time period Td2.

Repeat the above operations until the n-th digital video signal is input to the pixel (Figure 6). All the display time periods Td1 to Td6 correspond to a frame time period, so that the image is displayed.

After completing a frame period, the first bit of digital video signal is input to the pixel again to start the display time period Td1. Then, repeat the above operation.

Display time period Td1, Td2, _… , Td5 are from the write time period Ta1, Ta2, _… , From the start time of Ta6 to the write time period Ta2, Ta3, _… , The period of the start time of Ta6 and Ta1.

In this embodiment, the length ratio of the display time periods Td1 to Td6 is 2 in order. ² :2 ³ :2 ¹ :2 ⁴ :2 ⁰ :2 ⁵ . The display time period Td1 to Td6 can be configured according to the gradually shortened length ratio, such as 2 ⁰ :2 ¹ :2 ² :2 ³ :2 ⁴ :2 ⁵ 。

In this embodiment, the desired 2 can be implemented in combination with the display time periods Td1 to Td6. ⁶ Grayscale display.

In the process of obtaining the light emission, the sum of the display time period in each frame time period can determine the gray scale display in one frame period. For example, assuming that the brightness of the pixels in all display periods is 100%, if the display time periods Td1 and Td2 are used to emit light, the brightness is 19%, and if the display time periods Td3, Td5, and Td6 are used to emit light, the brightness is 56%. .

Since the sum of the length of the display period in a frame is 100%, high-brightness display can be implemented.

(Example 2)

In this embodiment, it is described that in the light-emitting device of the present invention, an 8-bit digital video signal is used to implement 2 ⁸ The grayscale display. The light-emitting device of this embodiment has the structure of FIGS. 1 to 3.

Referring to FIG. 7, first, in the writing time period Ta1, the first drive circuit group (Dr_L) is used to input the first bit of digital video signal to each pixel (in more detail, the current control TFT202 of each pixel Gate electrode). Since the digital video signal is input into the pixel in a manner similar to the above-mentioned modes 1 and 2, the detailed description of the first group and the second group of driving circuits is omitted here.

When the digital video signal of the first bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta1 is started, the pixels start to display to enter the display time period Td1.

Next, before the writing time period Ta1 is completed, the writing time period Ta2 is started. In the writing time period Ta2, the second group of driving circuits (Dr_R) is used to input the second bit of digital video signal to each pixel.

When the digital video signal of the second bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta2 is started, the pixels start to display to enter the display time period Td2.

Next, after the writing time period Ta2 is completed, the writing time period Ta3 is started. In the writing time period Ta3, the first driving circuit group (Dr_L) inputs the third bit of the digital video signal into the pixel. When the time period Ta3 is started to be written, the pixels perform display to complete the display time period Td2 and start the display time period Td3.

Next, before completing the writing time period Ta3, the writing time period Ta4 is started. In the writing time period Ta4, the second driving circuit group (Dr_R) inputs the digital video signal of the fourth bit into each pixel.

Next, after the writing time period Ta4 is completed, the writing time period Ta5 starts. In the writing time period Ta5, the first driving circuit group (Dr_L) inputs the digital signal of the fifth bit to each pixel. When the time period Ta5 is started to be written, the pixels perform display to complete the display time period Td4 and start the display time period Td5.

Repeat the above operation until the display time period from Td1 to Td10 appears.

Then, the digital video signal of the first bit is input to the pixel again to start the display time period Td1. Repeat the above operation.

Display time period Td1, Td2, _… , Td9 and Td10 are from the write time period Ta1, Ta2, _… , Td9 and Td10 start time to write time period Ta2, Ta3, _… , The period of the start time of Ta10 and Ta1.

In this embodiment, in the writing time periods Ta6, Ta8, and Ta10, digital video signals of the same number of bits are input to the pixels. More specifically, in this embodiment, in the writing time periods Ta6, Ta8, and Ta10, the digital video signal of the sixth bit is input to the pixels.

Further, in this embodiment, the length ratio of the display time periods Td1 to Td10 is Td9:Td7:Td5:Td3:Td1:Td2:Td4(Td6+Td8+Td10)=2 ⁰ :2 ¹ :2 ² :2 ³ :2 ⁴ :2 ⁵ :2 ⁶ :2 ⁷ . The length ratio of the display time is not limited to this. As long as the display time period Td1 to Tdn is configured according to the gradually shortened length ratio, such as 2 ⁰ :2 ¹ : _… :2 ⁴ :2 ⁷ 。

Therefore, in this embodiment, the three display time periods Td6, Td8 and Td10 are like one display time period to achieve 2 ⁸ A grayscale display.

In the light-emitting process, the sum of the display time period in each frame time period can be obtained to determine the grayscale display in one frame period. For example, assuming that the brightness of the pixels in all display periods is 100%, if the display time periods Td1 and Td2 are used to emit light, the brightness is 19%, and if the display time periods Td3, Td5 and Td6, Td8, Td10 are used to emit light, then The brightness is 55%. Since the sum of the length of the display period in a frame is 100%, high-brightness display can be implemented.

(Example 3)

In this embodiment, the description uses 10 display time periods to implement 2 with a 6-bit digital video signal. ⁶ The grayscale display. The light-emitting device of this embodiment has the structure of FIGS. 1 to 3.

Referring to FIG. 8, first, in the writing time period Ta1, the first drive circuit group (Dr_L) is used to input the first bit of the digital video signal to each pixel (in more detail, the current control TFT202 of each pixel Gate electrode). Since the digital video signal is input into the pixel in a manner similar to the above-mentioned modes 1 and 2, the detailed description of the first group and the second group of driving circuits is omitted here.

When the digital video signal of the first bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta1 is started, the pixels start to display to enter the display time period Td1. In this embodiment, when the digital video signal has "0" information, the current control TFT 202 is turned off. When the digital video signal has "1" information, the current control TFT 202 is turned on. However, the present invention is not limited to this structure. Alternatively, a digital video signal with "0" information can be used to turn on the current control TFT 202, and a digital video signal with "1" information can be used to turn off the current control TFT 202.

When a non-display signal is input to each pixel, the light-emitting element in each pixel is in a non-display state. Therefore, when the display time period Td2 is started, the pixels stop displaying to terminate the display time period Td1 and start the black display time period Td2.

Next, after the writing time period Ta2 is completed, the writing time period Ta3 is started. In the writing time period Ta3, the first driving circuit group (Dr_L) inputs the digital video signal of the second bit into the pixel. According to the information "0" or "1" of the second-bit digital video signal, the light-emitting element in each pixel is selected as a light-emitting state or a non-light-emitting state. Accordingly, when the writing time period Ta3 is started, the pixels perform display to complete the display time period Td2 and start the display time period Td3.

The above-mentioned operation is performed until the digital video signal of the fifth bit is re-written into the pixel in the time period Ta9. After the writing time period Ta9 is completed, the writing time period Ta10 starts.

In the writing time period Ta10, the digital video signal of the sixth bit is input to each pixel. According to the information "0" or "1" of the sixth bit of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta10 is started, the pixel starts to display, completes the display time period Td9, and enters the display time period Td10.

When all the display time periods Td1 to Td10 are completed, a frame display period is ended to display an image.

After completing a frame display period, the first bit of digital video signal is input to the pixels again to start the display time period Td1. Repeat the above operation.

Display time period Td1, Td2, _… , Td9 and Td10 are from the write time period Ta1, Ta2, _… , Td9 and Td10 start time to write time period Ta2, Ta3, _… , The period of the start time of Ta10 and Ta1.

In this embodiment, the display time periods Td2, Td4, Td6, and Td8 are black display time periods. Therefore, six display time periods Td1, Td3, Td5, Td7, Td9 and Td10 are implemented 2 ⁶ A grayscale display.

Further, in this embodiment, the length ratio of the display time periods Td1, Td3, Td5, Td7, Td9 and Td10 is Td1:Td3:Td5:Td7Td9:Td10=2 ⁰ :2 ¹ :2 ² :2 ³ :2 ⁴ :2 ⁵ . The length ratio of the display time is not limited to this, as long as the display time periods Td1 to Tdn are configured according to the gradually shortened length ratio, such as 2 ⁰ :2 ¹ : _… :2 ⁴ :2 ⁵ 。

In the light-emitting process, the sum of the display time period in each frame time period can be obtained to determine the grayscale display in one frame period. For example, assuming that the brightness of the pixels in all display periods is 100%, if the display time periods Td1 and Td5 are used to emit light, the brightness is 8%, and if the display time periods Td3, Td5, and Td10 are used to emit light, the brightness is 60%. .

In this embodiment, a black display time period during which no display is performed is provided, so that continuous light emission of the light-emitting element can be avoided, and the degradation of the organic compound layer can be suppressed.

(Example 4)

In this embodiment, the description uses 7 display time periods to implement 2 with a 6-bit digital video signal. ⁶ The grayscale display. The light-emitting device of this embodiment has the structure of FIGS. 1 to 3.

Referring to FIG. 9, first, in the writing time period Ta1, the first drive circuit group (Dr_L) is used to input the first bit of digital video signal to each pixel (in more detail, the current control TFT202 of each pixel Gate electrode). Since the digital video signal is input into the pixel in a manner similar to the above-mentioned modes 1 and 2, the detailed description of the first group and the second group of driving circuits is omitted here.

When the digital video signal of the first bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta1 is started, the pixels start to display to enter the display time period Td1.

Next, after the writing time period Ta1 is completed, the writing time period Ta2 starts. In the writing time period Ta2, the second driving circuit group (Dr_R) inputs the digital video signal of the second bit of the "0" information to the pixels (in more detail, the current control TFT202 gate electrode of each pixel ).

When the digital video signal of the second bit is input to each pixel, according to the information "0" or "1" of the digital video signal of the second bit, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta2 is started, the pixels start to display to enter the display time period Td2.

Next, after the writing time period Ta2 is completed, the writing time period Ta3 is started. In the writing time period Ta3, the first driving circuit group (Dr_L) inputs the third bit of the digital video signal into the pixel. According to the information "0" or "1" of the third-bit digital video signal, the light-emitting element in each pixel is selected as the light-emitting state or the non-light-emitting state. Accordingly, when the writing time period Ta3 is started, the pixels perform display to complete the display time period Td2 and start the display time period Td3.

Next, after the writing time period Ta3 is completed, the writing time period Ta4 starts. In the writing time period Ta4, the second driving circuit group (Dr_R) inputs the digital video signal of "0" information to the pixel. When a signal that is not displayed is input to each pixel. The light-emitting elements of all pixels are in a non-luminous state. Therefore, when the display time period Td4 is started, the pixels stop displaying to terminate the display time period Td3 and start the black display time period Td4.

Next, after the writing time period Ta4 is completed, the writing time period Ta5 starts. In the writing time period Ta5, the first driving circuit group (Dr_L) inputs the fifth bit of the digital video signal into the pixel. According to the information "0" or "1" of the fifth bit digital video signal, the light-emitting element in each pixel is selected to be in the light-emitting state or the non-light-emitting state. Accordingly, when the writing time period Ta5 is started, the pixels perform display to complete the display time period Td4 and start the display time period Td5.

Next, after the writing time period Ta5 is completed, the writing time period Ta6 starts. In the writing time period Ta6, the second driving circuit group (Dr_R) inputs the fifth bit of the digital video signal into the pixel. According to the information "0" or "1" of the fifth bit of the digital video signal, the light-emitting element in each pixel is selected as the light-emitting state or the non-light-emitting state. Accordingly, when the writing time period Ta6 is started, the pixels perform display to complete the display time period Td5 and start the display time period Td6.

Next, after the writing time period Ta6 is completed, the writing time period Ta7 starts. In the writing time period Ta7, the first driving circuit group (Dr_L) inputs the digital video signal of the sixth bit into the pixel. According to the information "0" or "1" of the sixth bit of the digital video signal, the light-emitting element in each pixel is selected as a light-emitting state or a non-light-emitting state. Accordingly, when the writing time period Ta7 is started, the pixels perform display to complete the display time period Td6 and start the display time period Td7.

Next, after the writing time period Ta7 is completed, the writing time period Ta8 starts. In the writing time period Ta8, the second driving circuit group (Dr_R) inputs the digital video signal of "0" information to the pixel. When a non-display signal is input to each pixel, the light-emitting elements of all pixels are in a non-luminous state. Therefore, when the display time period Td8 is started, the pixels stop displaying to terminate the display time period Td7 and start the black display time period Td8.

When all the display time periods Td1 to Td8 are completed, a frame display period is ended to display an image.

After completing a frame display period, the first bit of the digital video signal is input to the pixels again to start the display time period Tdl. Repeat the above operation.

Display time period Td1, Td2, _… , Td7 and Td8 are the slave write time periods Tal, Ta2, _… , Td7 and Td8 start time to write time period Ta2, Ta3, _… , The period of the start time of Ta8 and Ta1. In this embodiment, the display time periods Td4 and Td8 are black display time periods. Therefore, the six display time periods Td1, Td2, Td3, Td5, Td6 and Td7 are implemented 2 ⁶ A grayscale display.

Further, in this embodiment, the length ratio of the display time periods Tdl, Td2, Td3, Td5, Td6 and Td7 is Td1:Td2:Td3:Td5; Td6:Td7=2 ⁰ :2 ¹ :2 ² :2 ³ :2 ⁴ :2 ⁵ . The length ratio of the display time is not limited to this, as long as the display time periods Tdl, Td2, Td3, Td5, Td6 and Td7 are configured according to the gradually shortened length ratio, such as 2 ⁰ :2 ¹ : _… :2 ⁴ :2 ⁵ 。

In the light-emitting process, the sum of the display time period in each frame time period can be obtained to determine the grayscale display in one frame period. For example, assuming that the pixel emission brightness of all display periods is 100%, if the display time period Td1 is used to emit light, the brightness is 13%, and if the display time period Td3 and Td6 are used to emit light, the brightness is 56%.

In this embodiment, a black display time period during which no display is performed is provided, so that continuous light emission of the light-emitting element can be avoided, and the degradation of the organic compound layer can be suppressed.

(Example 5)

In this embodiment, the description uses 8 display time periods to implement 2 with a 6-bit digital video signal. ⁶ The grayscale display. The light-emitting device of this embodiment has the structure of FIGS. 1 to 3.

Referring to FIG. 10, first, in the writing time period Ta1, the first drive circuit group (Dr_L) is used to input the first bit of digital video signal to each pixel (in more detail, the current control TFT202 of each pixel Gate electrode). Since the digital video signal is input into the pixel in a manner similar to the above-mentioned modes 1 and 2, the detailed description of the first group and the second group of driving circuits is omitted here.

When the digital video signal of the first bit is input to each pixel, according to the information "0" or "1" of the digital video signal, the light-emitting element in the pixel is selected to emit light or not. Therefore, when the writing time period Ta1 is started, the pixels start to display to enter the display time period Td1.

Next, after the writing time period Ta1 is completed, the writing time period Ta2 starts. In the writing time period Ta2, the second driving circuit group (Dr_R) inputs the digital video signal of the second bit into the pixel.

When the digital video signal of the second bit is input to each pixel, according to the information "0" or "1" of the digital video signal of the second bit, the light-emitting element in the pixel is selected to emit light or not. Therefore, the pixel starts to display to enter the display time period Td2 when the writing time period Ta2 is started.

Next, after the writing time period Ta2 is completed, the writing time period Ta3 is started. In the writing time period Ta3, the first driving circuit group (Dr_L) inputs the third bit of the digital video signal into the pixel. According to the information "0" or "1" of the third-bit digital video signal, the light-emitting element in each pixel is selected as the light-emitting state or the non-light-emitting state. Accordingly, when the writing time period Ta3 is started, the pixels perform display to complete the display time period Td2 and start the display time period Td3.

Next, after the writing time period Ta3 is completed, the writing time period Ta4 starts. In the writing time period Ta4, the second driving circuit group (Dr_R) inputs the digital video signal of the fourth bit to the pixel. According to the information "0" or "1" of the fourth bit digital video signal, the light-emitting element in each pixel is selected to be in a light-emitting state or a non-light-emitting state. Accordingly, when the writing time period Ta4 is started, the pixels perform display to complete the display time period Td3 and start the display time period Td4.

Next, after the writing time period Ta4 is completed, the writing time period Ta5 starts. In the writing time period Ta5, the first driving circuit group (Dr_L) inputs the fifth bit of the digital video signal into the pixel. According to the information "0" or "1" of the fifth bit digital video signal, the light-emitting element in each pixel is selected to be in the light-emitting state or the non-light-emitting state. Accordingly, when the writing time period Ta5 is started, the pixels perform display to complete the display time period Td4 and start the display time period Td5.

Next, after the writing time period Ta5 is completed, the writing time period Ta6 starts. In the writing time period Ta6, the second driving circuit group (Dr_R) inputs the digital video signal of the sixth bit into the pixel. According to the information "0" or "1" of the sixth bit of the digital video signal, the light-emitting element in each pixel is selected as a light-emitting state or a non-light-emitting state. Accordingly, when the writing time period Ta6 is started, the pixels perform display to complete the display time period Td5 and start the display time period Td6.

Next, after the writing time period Ta6 is completed, the writing time period Ta7 starts. In the writing time period Ta7, the first driving circuit group (Dr_L) inputs the digital video signal of "0" information to the pixel. When a non-display signal is input to each pixel, the light-emitting elements of all pixels are in a non-luminous state. Therefore, when the display time period Td7 is started, the pixels stop displaying to terminate the display time period Td6 and start the black display time period Td7.

When all the display time periods Td1 to Td8 are completed, a frame display period is ended to display an image.

After completing a frame display period, the first bit of digital video signal is input to the pixels again to start the display time period Td1. Repeat the above operation.

Display time period Td1, Td2, _… , Td6 and Td7 are from the write time period Ta1, Ta2, _… , Td6 and Td7 start time to write time period Ta2, Ta3, _… , The period of the start time of Ta7 and Ta1. In this embodiment, the display time period Td7 is a black display time period. Therefore, the six display time periods Td1 to Td6 implement 2 ⁶ A grayscale display.

In this embodiment, the length ratio of the display time periods Td1 to Td6 is Td1:Td2:Td3:Td4:Td5:Td6:=2 ⁰ :2 ¹ :2 ² :2 ³ :2 ⁴ :2 ⁵ . The length ratio of the display time is not limited to this, as long as the display time periods Td1, Td2, Td3, Td4, Td5, Td6 are configured according to the gradually shortened length ratio, such as 2 ⁰ :21: _… :2 ⁴ :2 ⁵ 。

In the light-emitting process, the sum of the display time period in each frame time period can be obtained to determine the grayscale display in one frame period. For example, assuming that the pixel emission brightness of all display periods is 100%, if the display time period Td1 is used to emit light, the brightness is 13%, and if the display time period Td3, Td5, and Td6 are used to emit light, the brightness is 78%.

In this embodiment, a black display time period during which no display is performed is provided, so that continuous light emission of the light-emitting element can be avoided, and the degradation of the organic compound layer can be suppressed.

(Example 6)

In the sixth embodiment, in the light-emitting device shown in FIG. 1, the driving circuits for driving the first and second source signal line driving circuits 102a, 102b, and the first and second gate signal line driving circuits 103a and 103b will be described. method. Although, in this embodiment, for ease of description, only the method of driving the first group of driving circuits (Dr_L) is described, the same method can be used to drive the second group of driving circuits (Dr_R).

In the first source signal line driving circuit 102a, the clock signal (CLK) and the start signal (SP) are input to the translation register 105. The translation register 105 sequentially generates timing signals according to the clock signal (CLK) and the start signal (SP) to sequentially supply the timing signals to the subsequent circuits.

The timing signal of the translation register 105 can be buffered and amplified by the buffer to sequentially supply the buffered and amplified timing signal to the subsequent circuit. Since multiple circuits or components are connected to wires that supply timing signals, the wires have a large load capacitance. The load capacitance will "stagger" the upper and lower edges of the clock signal. Therefore, the provision of a buffer can avoid the "stuttering" situation.

The timing signal from the translation register 105 is input to the latch (A) 106. The latch (A) 106 includes a multi-level latch for processing digital signals. When the timing signal is input, the digital signal is sequentially input to the latch (A) 106 and held.

In the sixth embodiment, the digital signal is sequentially input into the multi-level latch in the latch (A) 106. Alternatively, a split driving method may be implemented, in which a plurality of latches in the latch (A) 106 are divided into some groups, and digital signals are input to these latches in parallel at the same time. The number of groups is the number of divisions. For example, when the latch is divided into four-level groups, this type of driving is called quadruple driving.

The period of all the latches when the digital signal is input to the latch (A) 106 is called a signal line time period. In other words, the signal line time period represents the time required to input the digital signal into the leftmost level of the latch (A) 106 to the rightmost level of the latch. In fact, the signal line time period may further include a horizontal clear period.

When the signal line time period is completed, the latch signal is supplied to the latch (B) 107. When the latch signal is supplied, the latch signal input and held in the latch (A) 106 is transmitted to the latch (B) 107 so as to be input to and held in all the latches in the latch (B) 107.

After the latch (A) 106 transmits the latch signal to the latch (B) 107, the digital signal is sequentially input to the latch (A) 106 according to the timing signal of the translation register 105 again.

In the second time period, the latch signal input to the latch (B) 107 and held there is input to the first source signal line.

On the other hand, in the first gate signal line driving circuit 103a, the timing signal from the translation register 105 is input to the buffer, and then the corresponding gate signal line (GL1 to GLy) is input. In pixels of a scanning line, the gate electrodes of the first switching TFT 201a are respectively connected to the gate signal lines (GL1 to GLy). Therefore, since the first switching TFT 201a of all pixels should be driven within a time, a buffer that can allow a large current to flow is required.

In this specification, the pixel portion 101, the first source signal line drive circuit 102a, the second source signal line drive circuit 102b, the first gate signal line drive circuit 103a and the second gate signal line drive circuit 103b are formed in On the same base. In this way, the size of the electronic device with the light-emitting device of the present invention can be reduced.

Embodiment 6 can be implemented in combination with Embodiments 1 to 5 freely.

(Example 7)

The embodiment of the present invention will be explained using FIGS. 11 to 13. The method of fabricating pixel TFT and peripheral driving circuit TFT on the same substrate is described here. In order to simplify the description, the CMOS circuit is used as the basic circuit of the drive circuit. The first switching TFT can be formed by the same method as the second switching TFT. Therefore, in this embodiment, the first switching TFT and the current control TFT are displayed as pixel TFTs one after another.

First, as shown in FIG. 11A, an insulating film such as silicon oxide, silicon nitride, or silicon oxynitride is formed on a glass substrate 400. The glass substrate 400 can be made of barium silicate boride glass or aluminum silicate boride glass. Typical glass is #7059 glass or #1737 glass from Corning Corp. For example, a laminated silicon oxynitride insulating film and a hydrogenated silicon oxynitride insulating film are formed. ₄ ,NH ₃ ,N ₂ O make an insulating film with a thickness of 10 to 200nm, and in a similar way, from SiH ₄ ,N ₂ O make an insulating film with a thickness of 50 to 200 nm. In Embodiment 7, a two-layer structure of the base film 401 is used, but a single-layer and multi-layer structure can also be used.

The island-shaped semiconductor layers 402 to 405 are formed by using a crystallized semiconductor film, wherein the crystallized semiconductor film is formed from an amorphous semiconductor film using a laser crystallization method or a conventional thermal crystallization method. The thickness of the semiconductor layers 402 to 405 may be 25 to 80 nm (preferably 30 to 60 nm). There is no limitation on the type of crystallized semiconductor film, but silicon or gallium silicide is preferred.

Can use pulse wave radiation type or continuous radiation type laser, YAG or YVO ₄ Lasers are used to make crystallized semiconductor films. When using these types of lasers, an optical system can be used to converge and irradiate the emitted laser beams. The operator can appropriately select the crystallization conditions, but when using an excimer laser, the emission frequency of the pulse wave is 30 Hz, and the energy density of the laser is 100 to 400 mJ/cm ² (Typically 200 to 300 mJ/cm ² ). Further, when using a YAG laser, use the second harmonic frequency, the emission frequency of the pulse wave is 1 to 10 Hz, and the energy density of the laser is 300 to 600 mJ/cm ² (Typically 350 to 500mJ/cm ² ). Then, a linear laser light with a width of 100 to 1000 μm is irradiated to the entire surface of the substrate. And the coverage rate of the laser beam is 50 to 90%.

A gate insulating film 406 is formed on the semiconductor layers 402 to 405. Using the plasma CVD method, a gate insulating film 407 with a thickness of 40 to 150 nm is formed from an insulating film containing silicon. In Example 4, a silicon oxynitride film with a thickness of 120 nm was used. The gate insulating film is not limited to the silicon oxynitride film. Of course, other single-layer or multi-layer insulating films can be used. For example, when using a silicon oxynitride film, plasma CVD can be used, and TEOS and O ₂ The mixture, at a reaction pressure of 40 Pa and a temperature of 300 to 400 °C, with a power density of 0.5 to 0.8 W/cm ² The high-frequency discharge (13.56MHz) is formed. Using the subsequent thermal annealing process at 400 to 500°C, a gate insulating film with good properties is formed.

Next, the first conductive film 407 and the second conductive film 408 are formed on the gate insulating film 407 to form a gate. In Embodiment 7, the first conductive film 407 is formed of a Ta film having a thickness of 50 to 100 nm, and the second conductive film 408 is formed of a W film having a thickness of 100 to 300 nm.

A Ta thin film is formed by sputtering, and the Ta target is sputtered with Ar. If an appropriate amount of Xe and Kr are added to Ar during sputtering, the internal stress that forms the Ta film can be released, and the peeling of the film can be avoided. The resistivity of the α-phase Ta film is about 20μΩcm, and can be used in the gate, but the resistivity of the g-phase Ta film is about 180μΩcm, and it is not suitable for the gate. If a titanium nitride film with a thickness of 10 to 50 nm and a crystal structure similar to α-phase Ta is formed, an α-phase Ta film can be easily obtained.

Sputtering W target to form W thin film, it can also use WF ₆ It is formed by the thermal CVD method. Whenever the local method is used, it needs to have a low impedance so that it can be used as a gate electrode, and it is preferable to make the resistivity of the W film less than or equal to 20 μΩcm. The crystallization of the W thin film can be amplified to reduce the resistivity, but when W contains many impurity elements, such as oxygen, its crystallization must be prohibited, and the thin film becomes highly resistive. In the sputtering process, a W target with a purity of 99.9999% is used. In addition, so that impurities do not enter the W film, a resistivity of 9 to 20 μΩcm can be achieved.

Although the first conductive film 407 is a titanium film and the second conductive film 409 is a W film in Embodiment 7, the conductive film is not limited to these films, but can be selected from Ta, W, Ti, Mo, Al and Cu. Or alloys containing these elements, or their compounds. Further, a phosphorus-doped polysilicon film can be used as the semiconductor film. A preferred combination example outside Embodiment 7 includes: forming a first conductive film using TaN and combining it with the second conductive film of the W film; forming a first conductive film of TaN and combining it with the second conductive film of the Al film Film bonding; and forming a first lightning guiding film of TaN and combining it with a second conductive film of Cu film.

Next, photoresist is used to form masks 409 to 412, and a first etching process is performed to form electrodes and wires. In Example 7, the ICP etching method was used. Use CF ₄ With Cl ₂ The gas mixture was used as an etching gas, and 500WRF power (13.56MHz) was applied to the coil-shaped electrode under 1Pa to generate plasma. And 100WRF power (13.56MHz) is applied to the substrate side to effectively apply a negative bias. In CF ₄ With Cl ₂ In the gas mixture, the W film and the Ta film are etched to almost the same extent.

Using a suitable photomask, the etched parts of the first conductive layer and the second conductive layer are shaped into sharp oblique shapes according to the effect of the bias voltage applied to the substrate side. The angle of the cusp is 15 to 45°. The etching time can be increased by 10 to 20% to perform etching without leaving any gate insulating film. The selectivity of the silicon oxynitride to the W film is 2 to 4, so an over-etching process is used to etch the exposed surface of the silicon oxynitride with a thickness of 20-50 nm. As shown in FIG. 11, the areas covered by the gate insulating film 406 and the first-shaped conductive layers 414 to 417 are made thinner by using 20-50nm etching.

The first shape conductive layer 414 to 417 (the first conductive layer 414a to 417a and the first conductive layer 414b to 417b) according to the first etching process, from the first conductive layer and the first. Two conductive layers are formed.

Next, as shown in FIG. 11, a second etching process is performed. Use photoresist to form masks 409 to 412, use ICP etching method, in which CF ₄ With Cl ₂ And 0 ₂ The gas mixture was used as an etching gas, and 500 W RF power (13.56 MHz) was applied to the coil-shaped electrode under 1 Pa to generate plasma. A power of 50WRF (13.56MHz) is applied to the substrate side, and a self-bias voltage lower than that of the first etching process is applied. Under these etching conditions, the W film is etched similarly and differently, and Ta is etched at a low etching rate to form the second-shaped conductive layers 419 to 422. The areas not covered by the conductive layers 419 to 422 are thinned by 20 to 50 nm etching.

The etching reaction of W film or Ta film can be estimated from the ion type and vacuum pressure of the generated base and reactant. Comparing the vacuum pressure of W and Ta fluoride and chloride, it can be estimated that there is a relatively high proportion of WF ₆ , And WCl ₅ ,TaF ₅ TaCl ₅ Has reached a similar level. However, if the appropriate O ₂ Add the amount to the mixed gas, CF ₄ With O ₂ Reaction to form CO and F, and produce a large number of F groups or F ions. As a result, the etching rate of the W film with high fluoride vapor pressure increases. On the other hand, even if F increases, the etching rate of Ta increases relatively. Furthermore, compared to W, Ta is easier to oxidize, so the surface of Ta is composed of added O ₂ Beoxidized. Since the oxide of Ta does not react between fluorine and chlorine, it will further increase the etching rate of Ta. Therefore, W and Ta have different etching speeds, and the etching speed of W can be greater than that of Ta.

Next, the masks 409a to 412a are removed, and a second doping process is performed, as shown in FIG. 12A. The doping amount is smaller than the doping amount of the first doping process, and the impurity element of n-type conductivity is doped under the condition of the high acceleration voltage of 70 to 120 KeV. The second conductive layers 419 to 422 serve as photomasks for impurity elements, and are doped to add the impurity elements to the regions under the second conductive layers 419a to 422a. In this way, the first impurity regions 425 to 428 overlapping the second conductive layers 419a to 422a are formed. Although, after the masks 409a to 412a are removed, an impurity element of n-type conductivity is doped, the present invention is not limited to this. In the process of FIG. 12A, the masks 409a to 412a may be removed after doping with n-type conductivity impurities.

Next, a photomask 433 is formed on the semiconductor layer 404 to cover the second conductive layers 421a and 421b. Part of the photomask 433 overlaps the second impurity region 431 and sandwiches the gate insulating film 406. Then, a second doping process is performed, and an impurity element of n-type conductivity is added. The dose of the second doping process is higher than that of the first doping process. Ion doping or ion implantation doping can be implemented. In 1×10 ¹³ To 5×10 ¹⁴ atoms/cm ³ Ion doping is carried out at a dose of 60 to 100KeV and an acceleration voltage of 60 to 100KeV. Elements of group 15 of the periodic table, typically phosphorus or arsenic, are used as impurity elements of n-type conductivity. In this example, phosphorus is used. The second conductive layers 419 and 422 become a mask for the n-type conductivity impurity regions, and the source regions 434 to 437, the drain regions 438 to 411, and the Lov regions 442 to 445 are formed in a self-aligned manner. Further, the Loff region 446 is formed according to the photomask 433. The impurity element of n-type conductivity is divided into 1×10 ²⁰ To 1×10 ²¹ atoms/cm ³ The concentration of φ is added to the source regions 434 to 437 and the drain regions 438 to 441.

In the present invention, the length of the Loff region 446 can be freely set by controlling the size of the mask 433.

In the present invention, the length of the Loff region 446 can be freely set by controlling the size of the mask 433.

In this specification, the LDD region overlapping the gate electrode between the gate insulating films is called the Lov region.

The LDD region that does not overlap with the gate electrode is called the Loff region. Adding n-type conductivity impurity elements to make the concentration of the Loff region 1×10 ¹⁷ To 1×10 ¹⁹ atoms/cm ³ , And the concentration of the Lov zone becomes 1×10 ¹⁶ To 1×10 ¹⁸ atoms/cm ³ 。

In FIG. 12B, an impurity element of n-type conductivity can be doped with an acceleration voltage of 70 to 120 KeV, wherein a photomask 433 is formed on the semiconductor layer 404 before and after the doping of the impurity element of n-type conductivity. Suppress the concentration of the N-type conductivity impurity element in the part 446, which becomes the Loff region of the switching TFT in the above-mentioned process, and increase the concentration of the N-type conductivity impurity element added to the part 433, and this part becomes the driving circuit Lov area of n-channel TFT. Further, when the concentration of the n-type conductive impurity element in the part 433 is increased, the degradation phenomenon caused by the heat carrier effect can be avoided, and the heat carrier is produced by the adjacent high electric field. It is better to make the concentration of the n-type impurity region in the region 433 5×10 ¹⁷ To 5×10 ¹⁹ atoms/cm ³ 。

After the mask 453 is removed, as shown in FIG. 12C, source regions 447 and 448, drain regions 449 and 450, and Lov regions 451 and 452 are formed on the semiconductor layers 402 and 405 to fabricate p-channel type TFTs. The second conductive layers 419 to 422 are used as photomasks of impurity elements, and impurity regions are formed in a self-aligned manner. A photomask 453 is covered on the entire surface of the semiconductor layers 402 and 403 forming the n-channel TFT. Add different concentrations of phosphorus to the source regions 447 and 448, the drain regions 449 and 450, and the Lov regions 451 and 452, and use B ₂ H ₆ Implement ion doping so that the impurity concentration in the region becomes 2×10 ²⁰ atoms/cm ³ To 2×10 ²¹ atomscm ³ 。

Using the above process, impurity regions are formed in each of the semiconductor layers 402 to 405. The second conductive layers 419 to 422 overlapping the semiconductor layer serve as gate electrodes.

Then, the impurity elements added to each semiconductor layer are activated to control the conductivity type. Use an annealing furnace for this procedure. In addition, laser annealing or rapid thermal annealing can also be implemented. With an oxygen concentration of 1 ppm or less (preferably 0.1 ppm or less), thermal annealing is performed at 400 to 700°C in a nitrogen environment. In Example 7, the heat treatment was performed at 500°C for 4 hours. However, when the materials of the wires 419 to 422 have weak heat resistance, it is preferable to perform activation treatment after forming the inner insulating film to protect the wires.

In addition, in a hydrogen atmosphere of 3 to 100%, a heat treatment is performed at 300 to 450° C. for 1 to 12 hours to perform the hydrogenation process of the semiconductor layer. This process uses hydrogen to add dangling bond ends in the island-shaped semiconductor layer. The plasma hydrogenation process can also be used as another hydrogenation process.

Next, a first inner-layer insulating film 455 of silicon oxynitride with a thickness of 100 to 200 nm is formed. Subsequently, on the first inner layer insulating film 455, a second inner layer insulating film 458 of an organic insulating material is formed.

Next, contact holes are formed in the gate insulating film 406, the first inner insulating film 455, the second inner insulating film 458, and the source wires 459 to 462 to contact the source regions 447, 435, 436, and 448 through the contact holes. Further, the drain wires 463 to 465 are formed in a similar manner so as to be in contact with the drain regions 449, 439, 440, and 450.

When the gate insulating film 406, the first inner layer insulating film 455, and the second inner layer insulating film 458 are made of SiO ₂ For thin film or SiON film, use CF ₄ And O ₂ Dry etching to form contact holes. Further, when the gate insulating film 406, the first inner layer insulating film 455, and the second inner layer insulating film 458 are organic resins, it is better to use CHF ₃ Or BHF dry etching to form contact holes. In addition, if the gate insulating film 406, the first inner layer insulating film 455, and the second inner layer insulating film 458 are formed of different materials, it is better to change the etching method and etchant for each film. The same etching method and etchant can also be used to form the contact hole.

Next, a third inner layer insulating film 467 is formed with organic resin. As the third inner layer insulating film 467, polythioimide, polyamino compound, acrylic acid, and BCB can be used. Since acrylic acid has an excellent planarization effect, it is better to use acrylic acid as the third inner insulating film 467. The acrylic acid in Embodiment 7 needs to be sufficient to flatten the stepped portion formed by the TFT, and the film thickness at this time is preferably 1 to 5 μm (preferably 2 to 4 μm).

Next, a contact hole reaching the drain wire 465 is formed in the third inner insulating film 467 and the pixel electrode 468. In Embodiment 7, indium oxide (ITO) with a thickness of 110 nm is formed, and then patterned to form the pixel electrode 468. Further, a transparent conductive film can be used, in which 2 and 20% zinc oxide are mixed in indium oxide. The pixel electrode becomes the anode 468 of the light-emitting element.

Next, the first spacer 469 and the second spacer 470 made of resin are formed. The first spacer 469 and the second spacer 470 are used to separate the organic compound layer from the cathode of the adjacent pixel. Therefore, it is better to make the second partition 470 more protrude from the first partition 469 in the horizontal direction. It is preferable that the combined thickness of the first spacer and the second spacer be 1 to 2 μm, but if the organic compound layer and the cathode of the adjacent pixel are separated from each other, the thickness is not limited. Further, it is necessary to form the first spacer 469 and the second spacer 470 with an insulating film, and the insulating film can be oxide or resin. The first spacer 469 and the second spacer 470 may be formed of the same material, and are formed in a strip shape between the pixels. The first spacer 469 and the second spacer 470 can be formed along or on the source wire, and can also be formed along or on the gate wire. In addition, pigments can also be mixed into the resin to form the first spacer 469 and the second spacer 470 (FIG. 14 ).

Next, without exposing to the outside, the organic compound layer 471 and the cathode 472 are continuously formed. The film thickness of the organic compound layer 471 is 80 to 200 nm (typically 100 and 120 nm), and the film thickness of the cathode is 180 to 300 nm (typically 200 to 250 nm). Although only one pixel is shown in the embodiment, in fact, a red light organic compound layer, a green light organic compound layer, and a blue light organic compound layer are formed at the same time point. Further, part of the materials forming the organic compound layer and the cathode are laminated on the spacer 470, although in this specification, these materials do not include the organic compound layer 471 and the cathode 472.

The organic compound layer 47l and the cathode 472 are formed corresponding to red pixels, green pixels, and blue pixels. However, the organic compound layer 471 cannot be less resistant to solvents, so lithography technology must be used to form various colors separately. It is better to use a metal photomask to cover undesired pixels, and to selectively form an organic compound layer 471 at a desired position.

That is, the first photomask is set to cover the pixels outside the red color, and the red light organic compound layer is selectively formed by the photomask. Next, the photomask is set to cover the pixels outside the green color, and the green light organic compound layer is selectively formed by the photomask. Finally, the photomask is set to cover the pixels outside the blue color, and the blue organic compound layer is selectively formed by the photomask. Although a different photomask is used here, the same photomask can be reused. Further, it is best to perform this procedure under vacuum until all organic compound layers are formed.

Example 7 shows a single-layer structure with only a light-emitting layer as the organic compound layer 471, but in addition to the light-emitting layer, a structure having a hole transport layer, a hole injection layer, an electron transport layer, and an electron injection layer can also be used as Organic compound layer. As the organic compound layer 471, a conventional material can be used. Considering the driving voltage of the light-emitting layer, it is better to use conventional organic compound materials.

Next, a cathode 472 is formed. Example 7 shows an example of using MgAg as the cathode, but it can also be used for other materials.

Therefore, the active array type substrate with the structure of FIG. 14B is completed. After the first spacer 469 and the second spacer 471 are formed, a multi-chamber thin film forming device can be used to continuously perform without being exposed to the outside until the cathode 472 is formed.

In Embodiment 7, the semiconductor layer of the switching TFT 501 contains a source region 504, a drain region 505, a Loff region 506, a Lov region 507, and a channel formation region 501. The Loff region 506 is formed so as not to overlap with the gate electrode 421 through the gate insulating film 406. Further, the Lov region 507 is formed so as to overlap with the gate electrode 421 through the gate insulating film 406. This structure can effectively reduce the off current.

Further, a single gate structure is used in the switching TFT 501 of the seventh embodiment, but the present invention can also use a double gate structure or other multi-gate structures as the switching TFT. The double gate structure can be used to effectively connect two TFTs in series to obtain the effect of reducing the off current value.

Further, in Embodiment 7, the switching TFT 501 is an n-channel TFT, but it can also be a p-channel TFT.

The semiconductor layer of the current control TFT 502 includes a source region 510, a drain region 511, a Lov region 512, and a channel formation region 513. The Lov region 512 is formed to overlap the gate electrode 422 through the gate insulating film 406. In Embodiment 7, the current control TFT 502 does not have the Loff region, but the structure of the Loff region can be used.

Further, in the embodiment, the current control TFT 502 is a p-channel TFT, but it can also be an n-channel TFT.

Since the TFTs of the display part and the driving part have optimized structures, the active array substrate of the seventh embodiment has excellent reliability and can increase the operating characteristics.

First, a TFT with a reduced heat carrier injection structure is used as the n-channel TFT 503 of the CMOS circuit. Reducing the heat carrier injection can increase the operating speed. The driving circuit here includes a translation register, a buffer, a level shifter and a sampling circuit. When implementing digital driving, a single conversion circuit such as a D/A converter can also be used.

In the first embodiment, the semiconductor structure of the n-channel TFT 503 of the CMOS circuit includes a source region 521, a drain region 522, a Lov region 523, and a channel formation region 524.

Further, the semiconductor layer of the p-channel TFT 504 of the CMOS circuit includes a source region 531, a drain region 532, a Lov region 533, and a channel formation region 534.

In fact, it is better to use a protective film with high air-tightness or a transparent sealing material to implement encapsulation after completing the structure of FIG. 14B to isolate it from the outside world. Further, if an inert gas is built into the sealing material and a desiccant is arranged in the sealing material, the reliability of the light-emitting element can be increased.

Further, the connector is connected to connect the components formed on the substrate, and after the airtightness is increased, the terminal is extended from the circuit to the external signal terminal. Therefore, the manufacturing process is completed. In this specification, the article produced at this time is called a light-emitting display device.

The length of the gate channel in the long axis direction is different from the foregoing state of the present invention. Therefore, when the gate electrode is used as a mask for ion implantation, it is better to use different penetration depths to make the concentration of the semiconductor layer under the first gate electrode lower than that of the semiconductor layer under the non-first interelectrode. concentration.

Furthermore, in order to use the mask to form the Loff area, the positions of the Loff area and the Lov area can be simply controlled.

Although in Embodiment 7, the light emitted by the organic compound layer is irradiated to the substrate, the present invention is not limited to this, and the light emitted by the organic compound layer may be irradiated in another direction. At this time, the cathode of the light-emitting element becomes the pixel electrode, and the current control TFT is preferably an n-channel type TFT.

The molding method of the above-mentioned light-emitting device is not limited to the method described in Embodiment 7, and all other methods may be used.

Embodiment 7 can be implemented in combination with Embodiments 1 to 6 freely.

(Example 8)

Fig. 15A shows a top view of a light emitting device using the present invention. In FIG. 15A, reference numeral 4010 is a substrate, reference numeral 4011 is a pixel portion, reference numerals 4012a and 4012b are first and second source signal test drive circuits, and reference numerals 4013a and b are gate signal test drive circuits. The drive circuit is connected to external equipment through the drive circuit via wires 4016a, 4016b, 4014a, 4014b and 4015.

At this time, the covering member 6000, the sealing member 7000, and the airtight member 7001 at least surround the pixel portion 4011, and more preferably surround the driving circuit (4012a, 4012b, 4013a, and 4013b) and the pixel portion 4011.

Further, as shown in FIG. 15B, the driving circuit TFT2 here is a CMOS circuit combining n-channel TFT and p-channel TFT) 4022a and 4022b and the pixel portion (here, only the TFT that controls the current of the light-emitting element) 4023 is formed in On the base film 4021 of the substrate 4010. A conventional structure can be used to form a TFT.

After the driver circuits 4022a and 4022b and the current control TFT 4023 are completed, on the inner insulating film 4026 made of resin material, a pixel electrode 4027 connected to the current control TFT 4023 and made of a transparent conductive film is formed. A compound of indium oxide and tin oxide or a compound of indium oxide and zinc oxide can be used as the transparent conductive film. After the pixel portion 4027 is formed, an insulating film 4028 is formed, and an opening portion is formed in the pixel portion 4027.

Next, an organic compound layer 4029 is formed. Known organic compound materials can be freely combined to form stacked or single-layer light-emitting layers (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer). Known techniques can be used to determine the structure. The organic compound layer includes low-molecular materials and high-molecular materials. When using low-molecular-weight materials, use the vapor deposition method. When using a polymer material, the spin coating method, printing method or jetting method can be used.

In this embodiment, a shadow mask is used to form the organic compound layer 4029 by a vapor deposition method. The purpose of color display can be achieved by forming light-emitting layers (red, green and blue light-emitting layers). This light-emitting layer enables pixels to emit light of different wavelengths. In addition, a method of combining a charge-coupled layer and a color filter layer, or a method of combining a white light layer and a color filter layer, or either method may be used. Of course, a single-color organic compound display device can be used.

After the organic compound layer 4029 is formed, a cathode 4030 is formed thereon. It is best to remove as much moisture and oxygen as possible in the interface between the organic compound layer 4029 and the cathode 4030. Therefore, it is necessary to continuously form the organic compound layer 4029 and the cathode 4030 in a vacuum, or to form the organic compound layer 4029 in an atmosphere, and then to form the cathode 4030. In this embodiment, a thin film forming apparatus of a multi-chamber system can be used to form the aforementioned thin film.

Incidentally, in this embodiment, a stacked structure of LiF is used as the cathode 4030. More specifically, a LiF film with a thickness of 1 nm is formed on the organic compound layer 4029 by a vapor deposition method, and a film with a thickness of 300 nm is formed thereon. Of course, MgAg can be used as the cathode material. The cathode 4030 is connected to the wire 4016 in the area 4031. The wire 4016 provides a predetermined voltage to the cathode 4030 and is connected to the FPC 4017 via the conductive paste 4023.

In order to connect the cathode 4030 to the wire 4016 in the region 4031, a contact hole needs to be formed between the inner insulating film 4026 and the insulating film 4028. It can be formed when the inner insulating film 4026 and the insulating film 4028 are etched. When the insulating film 4028 is etched, the inner insulating film 4026 can be etched together. At this time, if the inner layer insulating film 4026 and the insulating film 4028 are formed of the same resin material, the contact hole can have an excellent shape.

An inert film 6006, a filler 6004 and a covering member 6000 are formed to cover the surface of the light-emitting element.

Further, a sealing member 7000 is provided on the inner side of the covering member 6000 and the base 4010 to surround the position of the light emitting element, and further, an airtight member 7001 is formed on the outer side of the sealing member 7000.

At this time, the filler 6004 serves as an adhesive for joining the covering member 6000. PVC, epoxy resin, siliconized resin, PVB or EVA can be used as filler 6004. It is preferable to provide a desiccant inside the filling to provide a moisture absorption effect.

The filler 6004 may include spacers. In this case, a spacer made of BaO can be used, and the spacer can be made to have hygroscopic properties.

When a spacer is provided, the inert film 6003 can release the pressure of the spacer. In addition to inert films, resin films that can release spacer pressure are also available. Glass plate, aluminum plate, stainless steel plate, FRP, PVF film, Mylar film, polyester resin film, or acrylic film can be used as the covering member 6000. When using PVB or EVA as the filler 6004, it is best to use a sheet structure, in which an aluminum foil of several tens of nm is provided between the PVF film and Mylar.

However, depending on the irradiation direction of the light-emitting element, a translucent cover member 6000 is required.

The wire 4015 is electrically connected to the FPC 4017 through the gap between the airtight member 7001 and the base 4010. Incidentally, although the use of the wire 4015 is described, the other wires 4014a, 4014b, 4016, and 4016b can also be connected to the FPC 4017 under the sealing member 7000 and the sealing member 7001.

In this embodiment, after the filler 6004 is formed, the covering member 6000 is joined, and the sealing member 7000 is attached to cover the outer surface of the filler 6004, but after the covering member 6000 and the sealing member 7000 are attached, it can also be formed Filling 6004. At this time, the gap formed by the base 4010, the covering member 6000, and the frame member 6001 forms a filler injection opening. Keep the gap in a vacuum state. After the injection opening is immersed in the holding groove containing the filler, the air pressure outside the gap is greater than the air pressure in the gap, and the filler fills the gap.

Embodiment 8 can be freely combined with the structures of Embodiments 1 to 6.

(Example 9)

In this embodiment, referring to FIGS. 16A and 16B, another example of the light-emitting device manufactured by the present invention will be described.

Fig. 16A is a top view of a light emitting device using the present invention. Fig. 16B is a cross-sectional view of the light-emitting device taken along the line A'-A' in Fig. 16A.

According to Embodiment 8, each step is performed until the inert film 6003 covering the surface of the light-emitting element is formed.

The filler 6004 serves as an adhesive for joining the covering member 6000. PVC, epoxy resin, siliconized resin, PVB or EVA can be used as filler 6004. It is preferable to provide a desiccant inside the filling to provide a moisture absorption effect.

The filler 6004 may include spacers. In this case, a spacer made of BaO can be used, and the spacer can be made to have hygroscopic properties.

When a spacer is provided, the inert film 6003 can release the pressure of the spacer. In addition to inert films, resin films that can release spacer pressure are also available.

Glass plate, aluminum plate, stainless steel plate, FRP, PVF film, Mylar film, polyester resin film, or acrylic film can be used as the covering member 6000. When using PVB or EVA as the filler 6004, it is best to use a sheet structure, in which an aluminum foil of several tens of nm is provided between the PVF film and Mylar.

However, depending on the irradiation direction of the light-emitting element, a transparent light-emitting element is required.

Next, after joining the covering member with the filler 6004, the frame member 6001 is attached to cover the side of the filler 6004. The frame member 6001 is joined by the sealing member 6002. At this time, although it is preferable to use a photocurable resin as the sealing member 6002, if the light-emitting layer has sufficient heat resistance, a thermoplastic resin can also be used. Incidentally, the sealing member 6002 can prevent moisture and oxygen. A desiccant may be added to the inside of the sealing member 6002.

The wire 4015 is electrically connected to the FPC 4017 via the gap between the sealing member 6002 and the substrate 4010. Incidentally, although the case where the wire 4015 is used is described, other wires 4014a, 4014b, and 4016a may be connected to the FPC 4017 under the sealing member 6002.

In this embodiment, after the filler 6004 is formed, the covering member 6000 is joined, and the frame member 6001 is attached to cover the outside of the filler 6004. However, the covering member 6000 and the frame member 6001 may also be attached to form the filler.Thing6004. At this time, the gap formed by the base 4010, the covering member 6000, and the frame member 6001 forms a filler injection opening. Keep the gap in a vacuum (pressure 10 ^-2 Torr), when the injection opening is immersed in the holding tank containing the filler, the air pressure outside the gap is greater than the air pressure in the gap, and the filler fills the gap.

Embodiment 9 can be freely combined with the structures of Embodiments 1 to 6.

(Example 10)

Here, FIG. 17 shows the detailed structure of the pixel portion of the light-emitting display device.

In FIG. 17, an n-channel TFT formed by a conventional method is used as the first switching TFT 3502 on a substrate 3501. In Embodiment 10, a pixel portion with a double gate structure is used. However, since the double-gate structure will result in a structure in which double TFTs are connected in series, the advantage is that the off current value can be reduced. Incidentally, although a double-gate structure is used in this embodiment, a triple-gate or multi-gate structure may also be used. Further, it can be formed using a P-channel TFT in a conventional manner.

The current control TFT 3503 is formed using a conventional n-channel TFT.

Reference numeral 31 is a source wire of the second switching TFT 3504, and reference numeral 35 is a drain wire of the first switching TFT 3502, and is connected to the gate 37 of the current control TFT via a wire 36.

Alternatively, p-channel TFTs formed by conventional methods may be used to form the first switching TFT 3503, the second switching TFT 3504, and the current control TFT 3503. It is preferable to use TFTs having the same polarity as the first switching TFT 3502 and the second switching TFT 3504.

. As the current control TFT 3503, an n-channel TFT formed by a conventional method is used. The gate electrode 37 of the current control TFT 3503 is connected to the drain wire 35 of the first switching TFT 3502 and the drain wire 31 of the second switching TFT 3504 via a wire 36.

At this time, since the current control TFT 3503 is used to control the current flowing through the light-emitting element, a large amount of current will flow. Extremely easy to degrade due to the influence of heat carrier.

Therefore, it is better to make the LDD region overlap the gate electrode through the gate insulating film on the drain region side of the current control TFT 3503. However, the present invention is not limited to this structure, and the LDD area may not be provided. At this time, it is better to make the driving voltage of the light-emitting element less than 10V, and generally less than or equal to 5V.

In this embodiment, although the current control TFT 3503 with a single-gate structure is shown, a multi-gate structure with multiple TFTs connected in series can also be used. Further, since a structure of multiple TFTs in parallel can be used to divide the channel formation region into multiple parts, heat radiation can be effectively achieved. With this structure, thermal degradation can be effectively suppressed.

The source wire 40 is connected to a power line 38 that supplies a fixed potential.

A passive film 41 is formed on the first switching TFT 3502, the second switching TFT 3504, and the current control TFT 3503, and a flat film 42 made of a resin insulating film is formed thereon. The step of flattening the TFT using the flattening film 42 is quite important. Since the organic compound layer is relatively thin, defects in luminescence are caused at the steps. Accordingly, in order to form an organic compound layer on a flat substrate, it is preferable to perform a flattening process before forming the pixel electrode.

Reference numeral 43 denotes a pixel electrode composed of a conductive film with high reflectivity. And electronically connected to the drain of the current control TFT 3503. The pixel electrode 43 is preferably a low-impedance conductive film, such as an aluminum alloy film, a copper alloy film, or a silver alloy film, or a layered film of these films. Of course, a layered structure formed with another conductive film can be used.

A light-emitting layer 45 is formed between the trenches formed by the insulating spacers 44a and 44b. Although FIG. 17 only shows a single pixel, multiple light-emitting layers corresponding to R, G, and B can be formed. A π chelate polymer material is used as the organic compound material of the light-emitting layer. Typical examples of polymer materials include PPV, PVK, and polytetrafluoroethylene.

There are various types of PPV organic materials, such as "H. Shenk, H. Becker, O Gelsen, E. Kluge, W. Kreuder, and H. Spreitzr, "Polymers of Light Emitting Diodes", EurO Display, Proceedings, 1999 , p.33-37 or the technology disclosed in Japanese Patent Publication No. Hei 10-92576.

Cyanopolyphenylenevinylene can be used as red light-emitting organic light-emitting material, polyphenylenevinylene can be used as green light-emitting organic light-emitting material, and polyphenylenevinylene or polyalklphenylene can be used as blue light-emitting organic light-emitting material. The thickness is preferably 30 to 50 nm (preferably 40 to 100 nm).

However, the foregoing are only examples of materials for the light-emitting layer, and the present invention is not limited to these materials. The light-emitting layer, the charge transport layer and the charge injection layer can be freely combined to form an organic compound layer.

For example, although the examples show the use of polymeric materials as the light-emitting layer, low-molecular organic compound materials may also be used. The silicon carbide inorganic material of the charge transport layer or the charge injection layer can be used. The conventional organic and inorganic compound materials can also be used.

This embodiment uses a layered organic compound layer, in which a hole injection layer 46 of PEDOT or PAni is provided on the light-emitting layer 45. An anode 47 of a transparent conductive film is provided on the hole injection layer 46. In this embodiment, since the light generated by the light emitting layer 45 is irradiated to the upper surface side, the anode must be transparent. A compound of indium oxide and tin oxide, or indium oxide and zinc oxide can be used. However, since the thin film is formed after the light-emitting layer and the hole injection layer with low heat resistance are formed, it is better to form the thin film at a lower temperature.

When the anode 47 is formed, the light-emitting element 3505 is completed. Incidentally, the light-emitting element 3505 here includes a pixel electrode 43, a light-emitting layer 45, a hole injection layer 46 and an anode 47. Since the pixel electrode 43 almost overlaps the area of the pixel, the entire pixel can be used as a light-emitting layer. Therefore, the luminous efficiency is quite high, and extremely bright display can be achieved.

In this embodiment, a passive film 48 is further provided on the anode 47. A silicon nitride film or a silicon oxynitride film can be used as the passive film. Its purpose is to isolate the light-emitting element from the outside, prevent the oxidation of the organic light-emitting element, and suppress the poisonous gas emitted by the light-emitting element. Thereby, the reliability of the light-emitting display device can be improved.

As described above, the light-emitting display device includes the pixel portion of FIG. 17, and includes first and second switching TFTs with low off current values, and current control TFTs resistant to heat carriers. Therefore, a light-emitting device with good durability and capable of producing high-quality images can be obtained.

Embodiment 10 can be freely combined with the structures of Embodiments 1 to 6.

(Example 11)

In this embodiment, a light-emitting element 4505 which reverses the pixel portion of Embodiment 10 will be described. Figure 18 is provided for illustrative purposes. Incidentally, the difference from FIG. 17 is only the parts of the light-emitting element and the current control TFT, so other descriptions are omitted.

In FIG. 18, a current control TFT 3503 is formed using a conventional p-channel TFT.

In this embodiment, a transparent conductive film is used as the pixel electrode 50 (anode). The transparent conductive film can be formed of a compound of indium oxide and tin oxide, or indium oxide and zinc oxide.

After the spacers 51a and 51b made of insulating film are formed, a solution is applied to form a light-emitting layer 52 made of polyethylene 9-azadide, and a cathode made of aluminum alloy is formed thereon. In this case, the cathode 54 also serves as a passive film. In this way, the light-emitting element 3701 is formed.

In this embodiment, the light generated by the light-emitting layer 52 irradiates the substrate on which the TFT is formed.

Embodiment 11 can be freely combined with the structures of Embodiments 1 to 6.

(Example 12)

In this embodiment, a circuit structure different from that of FIG. 3 will be described with reference to FIGS. 19A to 19C. In this embodiment, reference numerals 3801, 3801a and 3801b represent the first source signal line, reference numerals 3802, 3802a and 3802b represent the second source signal line, reference numeral 3803 represents the first interpolar signal line, reference numeral 3804 Represents the second gate signal line, 3805 represents the first switching TFT, 3806 represents the second switching TFT, 3807 represents the current control TFT, 3808 represents the light-emitting element, 3809 represents the power line, and 3810 represents the capacitor.

FIG. 19A shows a situation where the power line 3809 is parallel to the first and second gate signal lines 3801 and 3802. Although FIG. 19A shows a structure in which the power line 3809 does not overlap with the gate signal lines 3801 and 3802, if the wires are formed in different layers, the two can be overlapped with each other through an insulating film. In this case, since the occupied area can be shared by the power line 3809 and the first and second gate signal lines 3801 and 3802, the pixels can be made smaller.

The structure of FIG. 19B is characterized in that the power line 3809 is parallel to the first and second gate signal lines 3801a, 3801b, and 3802a, 3802b, and further, two pixels are formed asymmetrically with respect to the power line 3809. In addition, the power line 3809 can be overlapped with a first and second gate signal lines 3801a, 3801b, and 3802a, 3802b. In this case, since the number of power supply lines can be reduced, the pixel portion can be made finer.

Embodiment 12 can be freely combined with the structures of Embodiments 1 to 11.

(Example 13)

In the thirteenth embodiment, the detailed structure of the first source signal line driving circuit 102a and the second source signal driving circuit 102b in FIG. 1 will be described. Since the structure of the first source signal line driving circuit 102a is the same as the structure of the second source signal driving circuit 102b, the structure of the first source signal line driving circuit 102a will be described recently. FIG. 20 is a schematic diagram of the structure of the first source signal line driving circuit 102a of the present invention.

As shown in FIG. 20, a translation register 801, a latch (A) (802) and a latch (B) (803) are arranged. In Embodiment 13, the latch (A) (802) string and the latch (B) (803) string correspond to the four first source signal lines GL _－ a to GL _－ d. Although no description is provided in this embodiment, a translation register can be designed to change the amplification width of the signal voltage.

The clock signal CLK, the clock signal CLKB inverted from the CLK, the arterial wave signal SP, and the driving direction switching signal SL/R are input to the translation register 801 through the wire, as shown in FIG. 20. The video signal is input from the outside to the latch (A) (802). And the latch signal S_LAT and the inverted latch signal S_LATb are respectively input to the latch (B) (803) via wires.

Further, the latch (A) (802) part 804 corresponding to the source signal line GL_a is described. The latch (A) (802) component 804 includes two clock inverters and two inverters.

Figure 21 shows an upper view of the latch (A) (802) component 804. In the latch (A) (802) part 804, the TFT forming an inverter has active layers 831a and 831b, and a common gate 836. The TFT forming another inverter has active layers 832a and 832b, respectively. The gate electrodes 837a and 837b are connected to each other.

In the latch (A) (802) part 804, the TFT forming a clock inverter has active layers 833a and 833b. The active layer 833a has gate electrodes 838a and 838b to provide a double gate structure. In the same way, there are gate electrodes 838b and 839 on the active layer 833b to provide a double gate structure.

In the latch (A) (802) part 804, the TFT forming another clock inverter has active layers 834a and 834b. The active layer 834a has gate electrodes 839 and 840 to provide a double gate structure. In the same way, there are gate electrodes 840 and 841 on the active layer 834b to provide a double gate structure.

(Example 14)

The light-emitting device according to the present invention is a self-luminous display device, and therefore has better image discrimination than a liquid crystal display device. Further, the light-emitting device has a larger viewing angle. Accordingly, the light-emitting device can be applied to the display part of various devices. For example, in order to display TV programs on a large screen, the light-emitting device according to the present invention can be used as the display part (such as a 30-inch or 40-inch telephone display device).

Light-emitting devices can be applied to all devices that display information, such as personal computers, monitors that receive TV broadcast programs, and advertising displays. Furthermore, the light-emitting device according to the present invention can be used in the display parts of other different devices.

This electronic device includes video cameras; digital cameras, projectors, projection TVs, convex-eye displays, navigation systems, car audio, notebook computers, game consoles, portable information terminals (such as mobile computers, portable phones, Portable game consoles or e-books), video reproduction devices with recording media, etc. Especially in the application of portable information terminals, since it is often necessary to watch the screen with a larger viewing angle, it is better to use a light-emitting display device that can provide a large viewing angle. Examples of these electronic devices are shown in Figures 22A to 23A.

The light-emitting device of FIG. 22A includes a display frame 2001, a support plate 2002, a display part 2003, and the like. The present invention is applied to the display part. Since the light is self-luminous, no backlight is required. And the thickness of the display part can be thinner than that of the liquid crystal display device.

FIG. 22B is a video camera, which includes a main body 2101, a display area 2102, a sound input area 2103, an operation switch 2104, a battery 2105, and an image receiving area 2106. The photoelectric device of the present invention can be applied to the display area 2102.

22C is a head-mounted display, which includes a main body 2201, a signal line 2202, a headband 2203, a display part 2204, an optical system 2055, a light-emitting display device 2206, and the like. The present invention can be applied to the light-emitting display device 2206.

Fig. 22D shows a video reproduction device including a recording medium (specifically, a DVD reproduction device). It includes a main body 2301, a recording medium 2302 (CD, LD, DVD, etc.), an operation switch 2303, a display part 2304 (a), another display part (b) 2305 and so on. The display part (a) is used to display image information, and the display part (b) is used to display character information. The light-emitting display device according to the present invention can be applied to these parts (a) and (b). Video reproduction devices including recording media also include CD reproduction devices and game consoles.

FIG. 22C is a convex-eye display, which includes a main body 2401, a display portion 2402, and an arm portion 2403. The present invention can be applied to the display device 2402. FIG. 22F is a personal computer, which includes a main body 2501, a frame 2502, a display area 2503, and a keyboard 2504. The light-emitting device of the present invention can be applied to the display area 2503.

When the light-emitting material can emit brighter light in the future, the light-emitting device according to the present invention will be applied to front and rear projectors.

The aforementioned devices often need to display information transmitted through a communication path, such as CATV, and often display dynamic information. Since the light-emitting device has a relatively high response speed, it is very suitable for displaying dynamic images. However, if the contours between pixels make it unclear, the entire moving image will not be clearly presented. Since the light-emitting device according to the present invention can display clear pixel contours, it has obvious advantages when applied to electronic devices.

The light-emitting part of the light-emitting device consumes power, so it is only possible to reduce the light-emitting part. Accordingly, when the light-emitting device is applied to a display part that displays character information, such as a display part of a portable information terminal, a mobile phone or a car audio equipment, it is better to make the character part formed by the light-emitting part instead of the light-emitting part As background.

FIG. 23A is a portable phone, which includes a main body 2601, a sound output area 2602, a sound input area 2603, a display area 2604, an operation switch 2605, an antenna 2606, and so on. The light-emitting display device according to the present invention is applied to the display part 2604. By displaying white characters on a black background, the power consumption of the portable phone can be reduced.

FIG. 23B is a music playback device, including a main body 2701, a display part 2702, and operation switches 2703 and 2704. The light-emitting display device according to the present invention is applied to the display part 2704. By displaying white characters on a black background, the power consumption of the display part 2704 can be reduced.

As described above, the present invention can be applied to electronic devices in various fields. Further, any structure of Embodiments 1 to 13 can be used in the electronic device of this embodiment.

(Example 15)

Embodiment 15 is used to illustrate the voltage and current characteristics of the driving range of the current control TFT when the light-emitting driving method of the present invention is used.

In a light-emitting element, even if there is a very small change in voltage, the current will change exponentially. From another point of view, when the current flowing through the light-emitting element changes, the value of the voltage applied to the light-emitting element also changes. The illuminance of the light-emitting element increases proportionally with the current flowing through the light-emitting element. Accordingly, compared to controlling the magnitude of the applied voltage, it is easier to control the illuminance of the light-emitting element by the amount of current flowing through the light-emitting element, and it is less susceptible to the influence of the variation of the TFT characteristics.

Next, refer to FIGS. 27A and 27B. FIG. 27A shows the current control TFT 108 and the light-emitting element 110. FIG. 27B shows the relationship between the voltage and current of the current control TFT 108 and the light-emitting element 110. In FIG. 27B, the voltage-current characteristic curve of the current control TFT 108 shows the voltage V between the source region and the drain region. _DS The relationship with the drain current flowing through the current control TFT 108. The different curves in Figure 27B represent different voltages V _GS , This voltage V _GS It is applied between the source region and the gate electrode of the current control TFT 108.

As shown in FIG. 27A, the voltage between the pixel electrode of the light-emitting element 110 and the counter electrode 111 is V _EL , And the voltage between the terminal 2601 connected to the power line and the opposite electrode 111 of the light-emitting element is V _T . V _T The value is fixed by the potential of the power line. As mentioned above, V _DS It is the voltage between the source region and the drain region of the current control TFT 108. V _GS It is the voltage between the gate and source of the current control TFT 108, that is, the voltage between the source area of the current control TFT 108 and the wire 2602 connected to the gate.

The current control TFT 108 and the light emitting element 110 are connected in series with each other. Therefore, the same current flows through the two elements.

The current control TFT 108 and the light-emitting element 110 are driven by the voltage at the intersection of the current-voltage characteristic curve of the element. In Figure 27B, V _EL It is equal to the voltage between the opposite electrode 111 and the operating point. V _DS It is equal to the voltage between the potential of the terminal 2601 of the current control TFT 108 and the operating point. V _T Equal to V _EL With V _DS The sum. The sum. The sum.

Now, consider V _GS Changed sentiment. When the current flowing through the current control TFT 108 is increased, the |V of the current control TFT 108 will increase _GS- V _TH |, that is,|V _GS |. V _TH Etc. is the phosphorus boundary voltage of the current control TFT 108. Therefore, increase |V _GS | Will increase the current flowing through the light-emitting element 110 at the operating point. The brightness of the light emitting element 110 is proportional to the magnitude of the current flowing through it.

Increase due to increase|V _GS |will increase the current flowing through the light-emitting element 110, so V _EL Increase with the increase of current. V _T The value is determined by the potential of the power line, so when V _EL When increasing, V _DS reduce.

As shown in Figure 27B, it can be based on V _GS With V _DS The voltage-current characteristic of the current control TFT is divided into two regions. |V _GS -V _TH |&lt;|V _DS The area of | is the saturation region, and |V _GS -V _TH |&gt;|V _DS | Is the linear region. In the saturation region, the following equation is satisfied.

[Equation 1] I _DS =β(V _GS- V _TH ) ² /2 where I _DS Is the current flowing through the channel forming area of the current control TFT108, β=μC ₀ W/L, and μ is the movement coefficient of the current control TFT108, C ₀ It is the capacitance per unit area, and W/L is the aspect ratio of the channel formation area.

In the linear region, Equation 2 is satisfied.

[Equation 2] I _DS =p{(V _GS -V _TH )V _DS -V _DS² /2} From Equation 1, the current in the saturation region is not easily affected by V _DS Influence, but by V _GS Decided.

On the other hand, Equation 2 shows that in the linear region, the current value is determined by V _DS With V _GS Decided. WhenV _GS When increasing, the current control TFT 108 operates under the voltage of the linear region, that is, V _EL . In the linear region, when V _DS When it is reduced, the amount of current is also reduced. It is difficult to increaseV _GS To increase the current value. When V _GS =, the current value reaches the maximum value I _MAX . In other words, whateverV _GS What is the value, the current value will not exceed I _MAX . When V _EL =V _T When the current flowing through the light-emitting element 110 is I _MAX 。

By controlV _GS value, the operating point can be set in the saturation zone or the linear zone.

Ideally, all current control TFTs have the same characteristics. However, in fact, the V of different current control TFTs _TH There will be a difference with the movement coefficient μ. When V _TH When it is different from the movement coefficient μ, even if the current control TFT has the same V _GS , The amount of current flowing to the formation area will also vary.

Figure 28 shows the voltage and current characteristics of the control TFT, and different curves have different V _TH With μ. The time line 2701 represents the ideal voltage and current characteristics, and the solid lines 2702 and 2703 represent the current V _TH When it deviates from the ideal value of μ, the voltage-current characteristic curve. In the saturation range, the current-voltage characteristic curves 2702 and 2703 have the same current difference I with the ideal curve 2701 ₁ . The operating point 2705 of the current-voltage characteristic curve 2702 falls in the saturation region, and the operating point 2706 of the current-voltage characteristic curve 2703 falls in the linear region. In this case, I ₂ Represents the current difference between the current value at the operating point 2705 and the ideal current-voltage characteristic curve, I ₃ Represents the current difference between the current value at the operating point 2704 and the ideal current-voltage characteristic curve. The current value of the operating point 2706 in the linear region is smaller than the current value of the operating point 2705 in the saturation region.

When using the digital driving method, by driving the current control TFT and the light emitting element in the linear region, the characteristic variation of the current control TFT during grayscale display can be eliminated, and regular brightness can be generated.

On the other hand, in the conventional analog driving method, it is best to drive the current control TFT and the light-emitting element in the saturation region. In this region, the current value varies from V _GS Decided.

In order to perform the above analysis, Figure 29 shows the current and voltage of the current control TFTV _GS The relationship between. WhenV _GS When the critical absolute value of the current control TFT increases and exceeds, the current starts to flow through the current control TFT. At this timeV _GS It is called the luminous start voltage. Further increaseV _GS until it meets V _GS -V _TH =V _DS (indicated by A), leave the saturation zone 2801 and enter the linear zone 2802 at this time. When further increaseV _GS At this time, the store flow will be saturated with the increase in value. At this time, V _GS │=∞。

Figure 29 is shown in V _GS V _TH In the area of , there is almost no current. V _TH │ <img file="TW521237B_D0001.tif" /> V _GS │ <img file="TW521237B_D0002.tif" /> The area of A is the saturation area, and the current value in this area varies with V _GS Change. On the other hand, A <img file="TW521237B_D0003.tif" /> V _GS The area of is a linear region, and the current value flowing through the light-emitting element varies with V _GS and V _DS change.

According to the digital driving method of the present invention, it is best to use the V _GS │ <img file="TW521237B_D0004.tif" /> V _TH area and A <img file="TW521237B_D0005.tif" /> V _GS voltage is used in the area.

This embodiment can be freely combined with other embodiments of the present invention.

(Example 16)

In the present invention, triple excited phosphorescent luminescent materials are used to improve luminous efficacy and used in light-emitting devices. In this way, the power consumption of the luminescent material can be reduced. , And extend the life of the luminescent material.

The following report discloses the use of triple laser light to enhance the external luminous efficiency technology. (T. Tsutsui, CA dachi, S. Saito, Photochemical Programs of Organic Molecular Systems, K. Honda, (Elsevier Sci. Pub., Tokyo, 1991) p.437). The molecular formula of the luminescent material reported above is as follows.

<chemistry general="n"><img file="TW521237B_D0006.tif" /></chemistry>

(MA Baldo, DFO, Brien, Y. YOU, A. ShouStikov, S. Sibley, METhompson, SR ForreSt, Nature 395 (1998) p. 151).

The molecular formula of the luminescent material reported above is as follows.

<chemistry general="n"><img file="TW521237B_D0007.tif" /></chemistry>

(MA Baldo, S. Lamansky, PE Burrows, METhompSon, SR Forrest, Appl. Phys. Lett., 75 (1999) p. 4.).

(T.Tsutsui,M.-J.Yang,M.Tabiro,K.Nakamura,T.Watanabe,T.Tsuji,Y.Fukuda,T.Wakimoto,S.Mayaguchi,Jpn,Appl.Phys.,38(12B ) (1999) L1502).

<chemistry general="n"><img file="TW521237B_D0008.tif" /></chemistry>

As described above, if triple excited phosphorescence can be put into practical use, three to four times the luminous efficacy of single excited fluorescence can be achieved. In addition, this embodiment can be freely combined with other embodiments of the present invention.

According to the present invention, the grayscale display is realized by combining the display time period. Therefore, compared to the ratio driving method, the screen brightness of grayscale display is less susceptible to changes in TFT characteristics.

Further, in the present invention, the display time period and the display time period can be partially overlapped. In other words, even when the time period is rewritten, the pixel can perform display. Therefore, the sum of the length of the display time period within a frame time period is not determined by the sum of the length of the writing time period. In the present invention, the operating rate can be freely set.

By controlling the length of the writing time period, it is determined whether the writing time periods overlap each other. If the length of the writing time period is shortened, the writing time periods will not overlap each other, and if the length of the writing time period is increased, the writing time periods will overlap each other. Therefore, the driving methods of Embodiments 1 to 5 are for illustrative purposes only. The length of the writing time period can be controlled to determine whether the writing time periods overlap in each embodiment.

When the adjacent writing time periods do not overlap with each other, the driving circuit group that inputs the digital video signal to the pixel in the adjacent writing time period can be the first group of driving circuits (Dr_L) and the second group of driving circuits (Dr_R). ). The driving methods of Embodiments 1 to 5 are only examples of the present invention. In two write cycles that do not overlap with each other, the first group of drive circuits (Dr_L) or the second group of drive circuits (Dr_R) can be used to implement two time cycles of write operations.

With the structure of the present invention, the work rate can be increased to 100% to achieve high-brightness display.

On the contrary, when there is a black display time period in which no display is displayed, the light emission of the light emitting element can be turned off, and the degradation of the organic compound layer can be suppressed.