Liquid crystal display device, method of driving the same, and method of driving a portable information device having the liquid crystal display device
Abstract
A liquid crystal display device that displays an image by inputting n (n isa naturalnu mumber) bit digital signals has n memory circuits in each pixel. Thenmemory circuits store n bit digital signals, which are converted into correspondinganalog signals by a D/A converter provided in each pixel so that the analog signalsare inputted to a liquid crystal element. Therefore, when a still image is to bedisplayed, the stored digital signals are repeatedly used once the digital signals arewritten in the memory circuits. During the still image is displayed, a source signalline driving circuit and other circuits can stop their driving. Power consumption ofthe liquid crystal display device thus can be reduced.
Term
No projected expiry on record.
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29 claims: 20 independent, 9 dependent
- 1518552 A8 B8 C8 _D8_ 夂、申請專利範圍 1 · 一種包含圖素的液晶顯示裝置,其中每個圖素均 包含多數儲存電路和一個數位/類比(D / A )轉換器。 (請先閲讀背面之注意事項再填寫本頁) 2 . —種包含圖素的液晶顯示裝置,其中每個圖素均 包含η個(η爲等於或大於2的自然數)儲存電路和一個 D / Α轉換器,用於將儲存在η個儲存電路中的數位訊號 轉換成類比訊號。 3 · —種包含圖素的液晶顯示裝置,每個圖素均包含 液晶元件,類比訊號被輸入到該液晶元件中;其中每個圖 素均包含η個(η爲等於或大於2的自然數)儲存電路和 一個D / Α轉換器,用於將儲存在η個儲存電路中的數位 訊號轉換成類比訊號。 4 · 一種包含圖素的液晶顯示裝置,其中每個圖素均 包含η X m個(η和m均爲等於或大於2的自然數)儲存 電路和一個D / Α轉換器,用於將儲存在η X m個儲存電 路中的η位元數位訊號轉換成類比訊號。 5 · —種包含圖素的液晶顯示裝置,其中每個圖素均 經濟部智慧財產局員工消費合作社印製 包含η X m個(η和m均爲等於或大於2的自然數)儲·存 電路和一個D / A轉換器,用於將儲存在n X m個儲存電 路中的η位元數位訊號轉換成類比訊號。並且每個圖素儲 存對應於m框的數位訊號。 . 6 ·如申g靑專利範圍第1 - 5項中任一項的液晶顯示 裝置,其中該儲存電路和D / A轉換器安排以重疊源極訊 號線。 7 ·如申請專利範圍第1 - 5項中任一項的液晶顯示 本纸張尺度適用中國國家標準(CNS ) A4規格(210X297公羡) -70- 518552 A8 B8 C8 --- D8 '中靖專利範圍 _ S ’其中該儲存電路和D / A轉換器安排以重疊閘極訊 號線。 8 · —種包含圖素的液晶顯示裝置,每個圖素包含: 液晶元件;以及 癲極訊號線,η條(η是等於或大於2的自然數)閘 極$號線,η個包含閘電極的T F Τ,η個儲存電路,以 及—個D/A轉換器, 其中,每個閘電極連接到η個閘極訊號線之一,且該 n_T F Τ中的每一個均包含源極區和汲極區,這兩個區 # ψ旳一個連接至源極訊號線,另一個區連接到η個儲存 電路其中之一的輸入端, 其中,η個儲存電路其中每一個的輸出端連接到 D / Α轉換器的輸入端,以及 其中,D / A轉換器的輸出端連接到液晶元件。 9 . 一種包含圖素的液晶顯示裝置,每個圖素包含: 液晶元件;以及 經濟部智慧財產局員工消費合作社印製 η條(η是等於或大於2的自然數)源極訊號線,·一 條閘極訊號線,η個包含閘電極的T F Τ,η個儲存電路 ’以及一個D / Α轉換器, 其中,每個閘電極連接到閘極·訊號線,且η個T F T 其中的每一個均包含源極區和汲極區,此兩個區其中的一 個連接至η條源極訊號線其中之一,另一個區連接到η個 儲存電路其中之一的輸入端, ’ 其中,η個儲存電路其中每一個的輸出端連接到 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ297公釐) -71 - 518552 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 _______ D8'、申請專利範圍 D / Α轉換器的輸入端,以及 其中’ D / A轉換器的輸出端連接到液晶元件。 1 0 ·如申請專利範圍第8項的液晶顯示裝置, 其中該液晶顯示裝置具主動極訊號線驅動電路,其包 括移位暫存器、第一閂鎖電路、第二閂鎖電路以及開關, 其中,從移位暫存器接收到取樣脈衝時,第一閂鎖電 路即保持η位元數位訊號,直到n位元數位訊號被傳送到 第二閂鎖電路;開關選擇被傳送到第二閂鎖電路的η位元 數位訊號,每次一位元,以便將所選擇訊號輸入到源極訊 號線。 1 1 ·如申請專利範圍第8項的液晶顯示裝置, 其中該液晶顯示裝置具主動極訊號線驅動電路,其包 括移位暫存器、第一閂鎖電路以及第二閂鎖電路, 其中,從移位暫存器接收到取樣脈衝時,第一閂鎖電 路即保持1位元數位訊號,直到1位元數位訊號被傳送到 第二閂鎖電路。 1 2 .如申請專利範圍第9項的液晶顯示裝置, ·. 其中該液晶顯示裝置具主動極訊號線驅動電路,其包 括移位暫存器和第一閂鎖電路,以及 其中,從移位暫存器接收到取樣脈衝時?第一閂鎖電 路即保持η位元數位訊號。 1 3 .如申請專利範圍第9項的液晶顯示裝置’ 其中該液晶顯示裝置具主動極訊號線驅動電路’其包 括移位暫存器、第一閂鎖電路以及η個開關’ 請 先 閲 讀 背 面 之 注 I 裝 訂 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -72- 518552 A8 B8 C8 D8 六、申請專利範圍 其中’從移位暫存器接收到取樣脈衝時,第一閂鎖電 路即保持n位元數位訊號,η個開關將儲存在第一閂鎖電 路中的11位元數位訊號輸入到η條源極訊號線。 1 4 ·如申請專利範圍第1 一 5 ,8,或9項中任一 項的液晶顯示裝置,其中該儲存電路選自從包括靜態隨機 存取記憶體(S R A Μ )、鐵電隨機存取記憶體( F e R Α Μ )以及動態隨機存取記憶體(D R A Μ )所組 成之群。 1 5 _如申請專利範圍第1 一 5,8 ,或9項中任一 項的液晶顯示裝置,其中該儲存電路形成在選自從包括玻 璃基底、塑膠基底、不銹鋼基底以及單晶晶圓所組成之群 之一上。 1 6 ·如申請專利範圍第1 一 5 ,8 ,或9項中任一* 項的液晶顯不裝置,其中該液晶顯示裝置安裝在選自以包 括行動電話、視頻相機、移動電腦、頭戴式顯示裝置、電 視機、攜帶型電子書、個人電腦以及數位相機所組成之群 之一。 經濟部智慧財產局員工消費合作社印製 1 7 . —種液晶顯示裝置的驅動方法,該液晶顯示裝 置包含多數安排成矩陣形式的圖素, 其中’每個圖素包含多數儲存電路和一個D/A轉換 器,以及 其中’資料被重寫入所有圖素中之特定行的圖素或特 定列的圖素的多數儲存電路中。 · 1 8 . —種液晶顯示裝置的驅動方法,該液晶顯示裝 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) -73 - 518552 A8 B8 C8 ____ D8 六、申請專利範圍 置包含多數圖素和用於將視頻訊號輸入到多數圖素中的源 極訊號線驅動電路,. 其中,多數圖素其中的每一個均包含多數儲存電路和 一個D / A轉換器,以及 其中,當顯示靜止影像時,源極訊號線驅動電路的操 作終止。 1 9 ·如申請專利範圍第1 7或1 8項之液晶顯示裝 置的驅動方法,其中該儲存電路選自從包括靜態隨機存取 記憶體(S R A Μ )、鐵電隨機存取記憶體(F e R A Μ )以及動態隨機存取記憶體(D R A Μ )所組成之群。 2 Ο ·如申請專利範圍第1 7或1 8項之液晶顯示裝 置的驅動方法,其中該儲存電路形成在選自從包括玻璃基 底、塑膠基底、不銹鋼基底以及單晶晶圓所組成之群之一 上。 '2 1 ·如申請專利範圍第1 7或1 8項之液晶顯示裝 置的驅動方法,其中該液晶顯示裝置安裝在選自以包括行 動電g舌、視頻相機、移動電腦、頭戴式顯示裝置、電視.襻 經濟部智慧財產局員工消費合作社印製 、攜帶型電子書、個人電腦以及數位相機所組成之群之一 〇 2 2 _ —種攜帶型資訊裝置的驅動方法.,該攜帶型資 訊裝置包含液晶顯示裝置和C P U,其中: 該液晶顯示裝置包括圖素,每個圖素包含多數儲存電 路、一個D / A轉換器以及用於將訊號輸出到多數儲存電 路的驅動電路; 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -74- 518552 A8 B8 C8 D8 六、申請專利範圍 該c P U包括控制該驅動電路的第一電路,以及控制 輸入到攜帶型資訊裝置的訊號的第二電路;以及 (請先閲讀背面之注意事項再填寫本頁) 當液晶顯示裝置顯示靜止影像時,該第一電路的操作 終止。 2 3 . —種攜帶型資訊裝置的驅動方法,該攜帶型資 訊裝置包含液晶顯示裝置和V R A Μ,其中: 該液晶顯示裝置包括圖素,每個圖素包含多數儲存電 路和一個D / Α轉換器,以及 當液晶顯示裝置顯示靜止影像時,從V R A Μ中讀取 資料的操作終止。 2 4 . —種攜帶型資訊裝置的驅動方法,該攜帶型資 訊裝置包含液晶顯示裝置,其中: 該液晶顯示裝置包括圖素,每個圖素包含多數儲存電 路和一個D / Α轉換器,以及 當該液晶顯示裝置顯示靜止影像時,該液晶顯示裝置 的源極訊號線驅動電路終止。 經濟部智慧財產局員工消費合作社印製 2 5 ·如申請專利範圍第2 2 — 2 4項中任一項之.攜 帶型資訊裝置的驅動方法,其中該多數儲存電路中的資料 在一框週期被讀出一次。 2 6 . —種攜帶型資訊裝置的·驅動方法.,該攜帶型資 訊裝置包含液晶顯示裝置,其中: 該液晶顯示裝置包含多數排成矩陣形式的圖素; 該多數圖素其中的每一個均包含多數儲存電路和一個 D / A轉換器;以及 -75- 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) 518552 Α8 Β8 C8 D8 六、申請專利範圍 該液晶顯示裝置重寫該多數圖素中特定行的圖素或特 定列的圖素的多數儲存電路中的資料。 2 7 ·如申請專利範圍第2 2 - 2 4,或2 6項中任 一項之攜帶型資訊裝置的驅動方法,其中該儲存電路選自 從包括靜態隨機存取記憶體(S R A Μ )、鐵電隨機存取 記憶體(F e R A Μ )以及動態隨機存取記憶體( D R A Μ )所組成之群。 2 8 ·如申請專利範圍第2 2 - 2 4,或2 6項中任 一項之攜帶型資訊裝置的驅動方法,其中該儲存電路形成 在選自從包括玻璃基底、塑膠基底、不銹鋼基底以及單晶 晶圓所組成之群之一上。 2 9 ·如申請專利範圍第2 2 — 2 4 ,或2 6項中任 一項之攜帶型資訊裝置的驅動方法,其中該攜帶型資訊裝 置選自以行動電話、個人電腦、導航系統、個人數位助理 以及電子書所組成之群之一。 (请先聞讀背面之注意事項存填寫本頁) 經濟部智慧財產局員工消費合作社印製 -76- 本紙張尺度適用中國國家揉準(CNS ) Α4規格(210X297公釐)
589 paragraphs in 12 sections, as filed
Liquid crystal display device, driving method thereof, and method for driving portable information device having the same
<p>1308. . .Pixel part</p><p>1303. . .Shift register circuit</p><p>1305. . .Second latch circuit</p><p>1307. . .Analog switch</p><p>1401. . .Shift register circuit</p><p>1403. . .Second latch circuit</p><p>1509. . .DRAM</p><p>1301. . .Source signal line drive circuit</p><p>1304. . .First latch circuit</p><p>1306. . .D / A converter</p><p>1302. . .Gate signal line driving circuit</p><p>1402. . .First latch circuit</p><p>1404. . .D / A converter circuit</p><p>1510. . .Flash memory card</p><p>1503. . .Memory card</p><p>1506. . .CPU</p><p>1513. . .Liquid crystal display device</p><p>1518. . .Writing pad interface</p><p>1511. . .VRAM</p><p>1615. . .Transmission / reception circuit</p><p>1614. . .speaker</p><p>1601. . .keyboard</p><p>1606. . .CPU</p><p>1609. . .DRAM</p><p>1603. . .Memory card</p><p>1607. . .Video signal processing circuit</p><p>1612. . .LCD controller</p><p>2663, 2667, 2668. . .filter</p><p>2664. . .switch</p><p>2669. . .First frequency conversion circuit</p><p>2671. . .Frequency conversion circuit</p><p>2675. . .AC / DC converter</p><p>2679. . .Data modulation circuit</p><p>202. . .First latch circuit</p><p>204. . .Bit signal selection switch</p><p>210. . .Signal</p><p>111. . .D / A converter</p><p>2413. . .Display device</p><p>1505. . .External interface port</p><p>1501. . .Pen writing tablet</p><p>1502. . .Detector circuit</p><p>1507. . .Video signal input circuit</p><p>1512. . .LCD controller</p><p>1602. . .Audio processing circuit</p><p>1608. . .Microphone</p><p>1618. . .Keyboard interface</p><p>1613. . .Liquid crystal display device</p><p>1610. . .Flash memory</p><p>1605. . .External interface port</p><p>1611. . .VRAM</p><p>2622. . .antenna</p><p>2672, 2676. . .filter</p><p>2665, 2666, 2667. . .Amplifier</p><p>2673. . .Second frequency conversion circuit</p><p>2670, 2674. . .Oscillating circuit</p><p>2678. . .Data demodulation circuit</p><p>201. . .Shift register circuit</p><p>203. . .Second latch circuit</p><p>205. . .Pixel</p><p>108-110. . .TFT</p><p>105-107. . .Memory circuit</p><p>2406. . .CPU</p><p>2407. . .Video signal processing circuit</p><p>2401. . .Pen contact board</p><p>2412. . .LCD controller</p><p>2418. . .Board interface</p><p>2506. . .CPU</p><p>2515. . .Transmission / reception circuit</p><p>2511. . .VRAM</p><p>102. . .Memory circuit selection signal line</p><p>104. . .Memory circuit selection signal line</p><p>451. . .Switching TFT</p><p>502. . .Latch circuit</p><p>510. . .Signal</p><p>611. . .D / A converter</p><p>602. . .Second source signal source signal line</p><p>604. . .Write gate signal line</p><p>1701. . .Shift register circuit</p><p>1703. . .Latch circuit</p><p>1710. . .Signal</p><p>5001. . .Base</p><p>5007. . .Gate insulation film</p><p>5009. . .Second conductive film</p><p>5011-5016. . .First-shaped conductive layer</p><p>5021-5026. . .Second-shaped conductive layer</p><p>5032-5037. . .Third-shaped conductive layer</p><p>2411. . .VRAM</p><p>2405. . .External interface port</p><p>2402. . .Detector circuit</p><p>2501. . .keyboard</p><p>2518. . .Keyboard interface</p><p>2507. . .Video signal processing circuit</p><p>2512. . .LCD controller</p><p>103. . .Memory circuit selection signal line</p><p>450. . .Memory circuit</p><p>501. . .Shift register circuit</p><p>503. . .Pixel</p><p>605-607. . .Memory circuit</p><p>601. . .The first yuan signal source signal line</p><p>603. . .The third source signal source signal line</p><p>608-610. . .Write TFT</p><p>1702. . .Latch circuit</p><p>1704. . .Pixel</p><p>5002. . .Base film</p><p>5003-5006. . .Island semiconductor layer</p><p>5008. . .First conductive film</p><p>5010. . .Mask</p><p>5017-5020. . .First impurity region</p><p>5027-5031. . .Second impurity region</p><p>5039-5044. . .Fourth impurity region</p><p>5038. . .Blocking mask</p><p>5046. . .Second interlayer insulating film</p><p>5049. . .Drain wiring</p><p>5051, 5052. . .Pixel electrode</p><p>5054. . .Relative base</p><p>5058. . .Coating</p><p>5060. . .Alignment film</p><p>5061. . .Liquid crystal material</p><p>5202. . .Reflective electrode</p><p>5203, 5204. . .Alignment film</p><p>5207. . .Liquid crystal material</p><p>4002. . .Pixel part</p><p>4004. . .Gate signal line driving circuit</p><p>4008. . .Relative base</p><p>4201. . .Driving TFT</p><p>4010. . .Base film</p><p>4203. . .Pixel electrode</p><p>4005. . .Lead-out wiring</p><p>4300. . .Anisotropic conductive film</p><p>3302-3304. . .Memory circuit</p><p>3306. . .Pixel electrode</p><p>2601. . .main body</p><p>2603. . .Voice input</p><p>2605. . .Operation switch</p><p>5045. . .First interlayer insulating film</p><p>5047, 5048. . .Source wiring</p><p>5050. . .Connecting electrode</p><p>5053. . .Alignment film</p><p>5055-5057. . .Color filter</p><p>5059. . .Counter electrode</p><p>5062. . .Sealing member</p><p>5201. . .Third intermediate layer insulation film</p><p>5205. . .Counter electrode</p><p>5206. . .Sealing member</p><p>4009. . .Sealing member</p><p>4003. . .Source signal line drive circuit</p><p>4001. . .TFT substrate</p><p>4210. . .liquid crystal</p><p>4202. . .Pixel TFT</p><p>4301. . .Interlayer insulation film</p><p>4205. . .Counter electrode</p><p>4006. . .FPC</p><p>3301. . .Pixel</p><p>3305. . .D / A converter</p><p>3307. . .Source signal line</p><p>2602. . .Sound output</p><p>2604. . .Display section</p><p>2606. . .antenna</p><p>2611. . .main body</p><p>2613. . .Audio input section</p><p>2615. . .battery</p><p>2621. . .main body</p><p>2623. . .Image receiving part</p><p>2625. . .Display section</p><p>2632. . .Display section</p><p>2641. . .main body</p><p>2643. . .Display section</p><p>2645. . .Amplifier device</p><p>2652. . .Display section</p><p>2654. . .Operation switch</p><p>2201. . .main body</p><p>2203. . .Display section</p><p>2211. . .main body</p><p>2213. . .Speaker section</p><p>2215. . .Operation switch</p><p>2222. . .Display section</p><p>2224. . .Operation switch</p><p>2232. . .With part</p><p>2702. . .Operation panel</p><p>2704. . .Display unit</p><p>2705. . .Audio output unit</p><p>2708. . .Audio input unit</p><p>2612. . .Display section</p><p>2614. . .Operation switch</p><p>2616. . .Image receiving part</p><p>2622. . .Camera section</p><p>2624. . .Operation switch</p><p>2631. . .main body</p><p>2633. . .Arm part</p><p>2642. . .speaker</p><p>2644. . .Input device</p><p>2651. . .main body</p><p>2653. . .Memory media</p><p>2655. . .antenna</p><p>2202. . .Video input</p><p>2204. . .keyboard</p><p>2212. . .Display section</p><p>2214. . .Recording media</p><p>2221. . .main body</p><p>2223. . .Framing section</p><p>2231. . .main body</p><p>2701. . .display board</p><p>2703. . .Connector circuit</p><p>2706. . .Operation keys</p><p>2707. . .switch</p><p>2801. . .main body</p><p>2802. . .Video input unit</p><p>2811. . .main body</p><p>2812. . .Display unit</p><p>2814. . .Storage media</p><p>2851. . .main body</p><p>2854. . .Operation switch</p><p>2901. . .display board</p><p>2903. . .Connector unit</p><p>2905. . .Audio output unit</p><p>2907. . .switch</p><p>2909. . .antenna</p><p>2911. . .External input port</p><p>3006. . .Operation switch</p><p>3011. . .External input port</p><p>400. . .D / A converter</p><p>444-446,461. . .Inverter</p><p>452. . .Reset signal cable</p><p>454. . .High voltage sad gray scale power cord</p><p>124. . .Read TFT</p><p>141-143. . .Memory circuit</p><p>2803. . .Display unit</p><p>2804. . .keyboard</p><p>2813. . .Speaker unit</p><p>2815. . .Operation switch</p><p>2853. . .Storage media</p><p>2855. . .antenna</p><p>2902. . .Operation panel</p><p>2852, 2904. . .Display unit</p><p>2906. . .Operation keys</p><p>2908. . .Audio input unit</p><p>2910. . .CCD light receiving unit</p><p>3004. . .Display unit / stroke pen</p><p>3007. . .switch</p><p>3012. . .Stylus</p><p>411-443. . .NAND circuit</p><p>447-449, 460. . .switch</p><p>453. . .Low voltage / gray scale power cord</p><p>455. . .Intermediate voltage / gray scale power line</p><p> 121 <sub>-</sub> 123. . .Read out the gate signal line </p><p> 151 <sub>-</sub> 156. . .switch </p>
In the drawings:
FIG. 1 is a circuit diagram of a pixel of the present invention, which includes a plurality of storage circuits;
FIG. 2 is a schematic diagram illustrating a circuit structure of a source signal line driving circuit for displaying an image by using the pixels of the present invention; FIG.
3A and 3B are time charts of displaying images using the pixels of the present invention;
4 is a detailed circuit diagram of a storage circuit;
FIG. 5 is a schematic diagram illustrating a circuit structure of a source signal line driving circuit that does not include a second latch circuit; FIG.
6 is a circuit diagram of a pixel of the present invention, wherein the pixel is driven by the source signal line driving circuit in FIG. 5;
7A and 7B are time charts for displaying images using the circuits shown in FIGS. 5 and 6;
8 is a schematic diagram illustrating the structure of a D of A converter of a liquid crystal display device of the present invention;
9 is a schematic diagram illustrating the structure of a D A converter of a liquid crystal display device of the present invention;
10A to 10C are diagrams illustrating a process of forming an example of a liquid crystal display device including pixels of the present invention;
11A to 11C are diagrams illustrating a process of forming an example of a liquid crystal display device including pixels of the present invention;
12A and 12B are diagrams illustrating a process of forming an example of a liquid crystal display device including pixels of the present invention;
FIG. 13 is a diagram schematically illustrating the overall circuit structure of a conventional liquid crystal display device; FIG.
14 is a schematic diagram illustrating a circuit structure of a source signal line driving circuit of a conventional liquid crystal display device;
15A to 15F are diagrams illustrating an electronic device that can employ a display device including a pixel of the present invention;
16A to 16D are schematic diagrams illustrating an electronic device that can employ a display device including a pixel of the present invention;
FIG. 17 is a diagram illustrating a circuit structure of a source signal line driving circuit that does not include a second latch circuit; FIG.
18A and 18B are time charts for displaying images using the circuit shown in FIG. 17;
19A and 19B are diagrams illustrating an example of a process of forming a reflective liquid crystal display device;
20 is a schematic diagram illustrating the structure of a D A converter of a liquid crystal display device of the present invention;
21 is a schematic diagram illustrating the structure of a D of A converter of a liquid crystal display device of the present invention;
22 is a diagram illustrating a circuit structure of a source signal line driving circuit including a number of latch circuits required for one-bit metadata processing;
FIG. 23 is a diagram illustrating a gate signal line driving circuit using a decoder; FIG.
FIG. 24 is a block diagram illustrating a portable information terminal employing the present invention
25 is a block diagram illustrating a mobile phone to which the present invention is applied;
26 is a block diagram illustrating a transmission / reception unit of a mobile phone;
27A to 27C are diagrams illustrating a liquid crystal display device of a portable information device of the present invention, in which FIG. 27A is a top view, and FIGS. 27B and 27C are cross-sectional views;
28A to 28C are diagrams illustrating an application example of the portable information device of the present invention;
29A and 29B are diagrams illustrating an application example of the portable information device of the present invention;
FIG. 30 is a top view of pixels in a liquid crystal display device of a portable information device of the present invention; FIG.
FIG. 31 is a schematic diagram illustrating an example of a portable information device of the present invention;
Figure 32 is a diagram illustrating an example of the portable information device of the present invention;
33 is a schematic diagram illustrating an example of a portable information device of the present invention;
34 is a block diagram of a conventional portable information terminal;
35 is a block diagram of a conventional mobile phone;
36 is a schematic diagram illustrating the structure of a pixel of a liquid crystal display device of the present invention;
FIG. 37 is a diagram illustrating the structure of a pixel of a liquid crystal display device of the present invention; and
FIG. 38 is a schematic diagram illustrating a pixel structure of a liquid crystal display device of the present invention.
BACKGROUND OF THE INVENTION 1. Field of Invention
The present invention relates to a semiconductor display device (hereinafter referred to as a display device), and more particularly, to an active matrix display device having a thin film transistor formed on an insulator. More specifically, the present invention relates to an active matrix liquid crystal display device using a digital signal as a video signal. The present invention also relates to a portable information device using such a display device. Specific examples of the portable information device include a mobile phone, a PDA (Personal Digital Assistant), a portable personal computer, a portable navigation system, and an e-book. These devices all include an active matrix liquid crystal display device.
2. Related technical description
In recent years, display devices having a semiconductor thin film formed on an insulator, particularly on a glass substrate, have been greatly welcomed. Among these display devices, active matrix display devices using thin film transistors (hereinafter referred to as TFTs) are particularly prepared Favored. Any active matrix display device using a TFT arranges tens of thousands of TFTs to millions of TFTs in a matrix and controls the charge of pixels to display an image.
A recently developed technology relates to a polycrystalline silicon TFT for forming a pixel TFT and a driving circuit TFT at the same time. The pixel TFT is a TFT constituting a pixel, and the driving circuit TFT is a TFT constituting a driving circuit, and is provided around the pixel portion. This technology has a great effect on reducing the size and energy consumption of liquid crystal display devices. Due to the development of this technology, a liquid crystal display device is becoming an indispensable device for, for example, a display device of a mobile device that has recently been applied in an increasingly wide range.
FIG. 13 shows a schematic diagram of a general liquid crystal display device driven by a digital method. The pixel portion 1308 is located in the center. Above the pixel portion, an active signal line driving circuit 1301 is arranged to control the source signal line. The source signal line driving circuit 1301 includes a shift register circuit 1303, a first latch circuit 1304, a second latch circuit 1305, and a digital / analog (D / A) converter circuit (D / A converter, also known as For DAC) 1306 and analog switch 1307. The gate signal line driving circuit 1302 for controlling the gate signal lines is arranged on the left and right sides of the pixel portion. Although the gate signal line driving circuit 1302 is provided on both sides of the pixel portion in FIG. 3, only one gate signal line driving circuit may be provided on the left or right side of the pixel portion. However, from the perspective of driving efficiency and driving reliability, a gate signal line driving circuit needs to be provided on each side of the pixel portion.
The source signal line driving circuit 1301 has a structure as shown in FIG. 14. As an example, the driving circuit shown in FIG. 14 is a source signal line driving circuit, which has a 1024 pixel horizontal resolution of a 3-bit digital grayscale signal. The driving circuit includes a shift register circuit (SR) 1401, a first latch circuit (LAT1) 1402, a second latch circuit (LAT2) 1403, and a D / A converter circuit (D / A) 1404. The drive circuit may also include a buffer circuit, a level shifter circuit, etc. if necessary, although not shown in FIG. 14.
13 and 14 to briefly explain the operation of the device. First, a clock signal (S-CLK, S-CLKb) and a start pulse (S-SP) are input to a shift register circuit 1303 (indicated by SR in FIG. 14), and pulses are output accordingly. Then, these pulses are input to the first latch circuit 1304 (indicated by LAT1 in FIG. 14), so that the digital signals (digital data) also input to the first latch circuit 1304 are held therein, respectively. Here, D1 is the most significant bit (MSB) and D3 is the least significant bit (LSB). When the first latch circuit 1304 has completed holding the digital signal corresponding to one horizontal period, it responds to the input of the latch signal (latch pulse) during the flyback period and holds the digital bits in the first latch circuit 1304 The signal is simultaneously transmitted to the second latch circuit 1305 (indicated by LAT2 in FIG. 14).
Thereafter, the shift register circuit 1303 operates again to start holding the digital signal corresponding to the next horizontal period. At the same time, the digital signal held in the second latch circuit 1305 is converted into an analog signal by a D306A converter 1306 (indicated by D A in FIG. 14). This analog signal is written into pixels through the source signal line. The image is displayed by repeating this operation.
A portable information device using the above-mentioned conventional liquid crystal display device will now be described.
Take the portable information terminal as an example to describe the portable information device. FIG. 34 shows a block diagram of a conventional portable information terminal. The portable information terminal is used to provide users with required information according to their needs. The information to be provided includes data stored in the memory of the portable information terminal (such as DRAM 1509 and flash memory 1510), data stored in the memory card 1503 inserted into the portable information terminal, and Data obtained by the terminal connected to an external device through an external interface port 1505 and other similar data. Upon receiving an instruction input by the user through the pen-type writing pad 1501, the information is processed by the CPU 1506 to cause the liquid crystal display device 1513 to display the information.
Specifically, the signal input through the pen-type writing pad 1501 is detected by the detector circuit 1502 and then input to the writing pad interface 1518. The input signal is processed by the tablet interface 1518, and the processed signal is input to the video signal input circuit 1507 and other circuits. The CPU 1506 processes necessary data, and the processed data is converted into image data according to the image format stored in the V AM 1511. The image data is sent to the LCD controller 1512, and the LCD controller 1512 generates a signal to drive the liquid crystal display device 1513. In this way, the display device is driven to display information.
Take mobile phones as another example to describe portable information devices. FIG. 35 shows a block diagram of a conventional mobile phone. The mobile phone includes: a transmitting / receiving circuit 1615 for transmitting and receiving radio waves; an audio processing circuit 1602 for processing a received signal; a speaker 1614; a microphone 1608; a keyboard 1601 for inputting data; a keyboard interface 1618 , For processing the signal input through the keyboard 1601; and so on.
Upon receiving an instruction input by the user via the keyboard, the CPU 1606 processes the information and causes the liquid crystal display device 1613 to display the information. The information may be data stored in a memory (such as DRAM 1609 and flash memory 1610), data stored in a memory card 1603 inserted into a mobile phone, or by connecting the mobile phone to an external device via an external interface port 1605 The information obtained and other similar information.
Specifically, the signal input through the keyboard 1601 is processed by the keyboard interface 1618, and the processed signal is input to the video signal processing circuit 1607 and other circuits. The CPU 1606 processes necessary data, and the processed data is converted into image data according to an image format stored in a VRAM (Video RAM) 1611. The image data is sent to the LCD controller 1612, and the LCD controller 1612 generates a signal for driving the liquid crystal display device 1613. In this way, the display device is driven to display information.
FIG. 26 shows a configuration example of the transmission / reception circuit 1615. Transmission / reception circuit 1615 includes: antenna 2662; filters 2663, 2667, 2668, 2672, and 2676 switch 2664; amplifiers 2665, 2666, and 2677; first frequency converter circuit 2669; second frequency converter circuit 2673; frequency converter circuit 2671; oscillating circuits 2670 and 2674; AC-DC converter 2675; data demodulation circuit 2678; and data modulation circuit 2679.
In a general active matrix liquid crystal display device, the screen display is updated about sixty times per second to smoothly display the animation. In other words, digital signals need to be provided for each new frame, and these signals must be written into pixels each time. Even when the image to be displayed is a still image, the same signal must be continuously provided to each new frame, and external circuits and driving circuits must continuously and repeatedly process the same digital signal.
Another method is to write the digital signal of the still image into the external storage circuit once, and then, each time a new frame is started, provide the digital signal from the external storage circuit to the liquid crystal display device. However, the external storage circuit and the driving circuit of the display device are still required for continuous operation, which is not different from the above method.
Also in the conventional portable information device, the data of the same image must be transmitted to the display device contained in the portable information device 60 times per second in order to display any image on the display device, even a still image. In order to explain with reference to the drawings, the circuit included in the dotted line in FIG. 34 must be operated continuously when the image is displayed (the circuit includes: video signal processing circuit 1507 in CPU 1506; VRAM 1511; LCD controller 1512; liquid crystal display device 1513 Source signal line drive circuit and gate signal line drive circuit; pen-type writing pad 1501; detector circuit 1502; and writing pad interface 1518). In the case of FIG. 35, the circuits included in the dotted line in FIG. 35 must be continuously operated when the image is displayed (the circuits include: a video signal processing circuit 1607 in the CPU 1606; YRAM 1611; an LCD controller 1612; a liquid crystal display device 1613 source signal line drive circuit and gate signal line drive circuit; keyboard 1601; and keyboard interface 1618).
Passive matrix display devices have only a small number of pixels. When displaying still images, some passive matrix display devices can terminate the operation of their VRAM by adding a storage circuit to their driver IC or controller. However, from the perspective of chip size, for a display device such as an active matrix liquid crystal display device using a large number of pixels, a method of adding a storage circuit to a driver or a controller is impractical. In this way, most circuits must be continuously operated in prior art portable information devices, even when displaying still images, thereby preventing reduction in energy consumption.
Reduced energy consumption is urgently needed for mobile machines. Although in fact mobile devices are usually used for still image methods, in still image display processing, the drive circuits of mobile devices continue to operate as described above. Therefore, reduction in energy consumption is hindered.
Summary of invention
The present invention has been made in view of the above-mentioned problems. Therefore, an object of the present invention is to reduce the energy consumption of a driving circuit and other circuits when displaying a still image.
To achieve the above object, the present invention takes the following measures.
A plurality of storage circuits are provided in each pixel to store a digital signal for each pixel. In the case of displaying a still image, once the signal is written, the information to be written to the pixels is the same. Therefore, it is possible to continuously display still images by reading out the signals stored in the storage circuit instead of inputting signals when starting a new frame. That is to say, if a still image is to be displayed, once the processing corresponding to at least one frame is completed, the source signal line driving circuit, the video signal processing circuit, and other circuits can terminate their operations. This can greatly reduce energy consumption.
The structure of a liquid crystal display device and a portable information device including the liquid crystal display device will be described below.
According to the present invention, there is provided a liquid crystal display device including pixels, which is characterized in that each pixel includes a plurality of storage circuits and a D converter A converter.
According to the present invention, a liquid crystal display device containing pixels is provided, which is characterized in that each pixel includes n (n is a natural number equal to or greater than 2) storage circuits and a D A converter for converting Digital signals stored in n storage circuits are converted into analog signals.
According to the present invention, there is provided a liquid crystal display device including pixels, each pixel including a liquid crystal element into which an analog signal is input, characterized in that each pixel includes n (n is equal to or greater than 2) (Natural number) storage circuit and a D A converter for converting digital signals stored in n storage circuits into analog signals.
According to the present invention, there is provided a liquid crystal display device including pixels, characterized in that each pixel includes n × m (n and m are natural numbers equal to or greater than 2) a storage circuit and a D / A conversion A device for converting n-bit digital signals stored in n × m storage circuits into analog signals.
According to the present invention, there is provided a liquid crystal display device including pixels, which is characterized by a method of driving a liquid crystal display device including pixels, and each pixel includes n × m (n and m are equal to or greater than 2) (Natural number) storage circuit and a D A converter for converting n-bit digital signals stored in n × m storage circuits into analog signals, and each pixel stores digital signals corresponding to m frames .
According to the present invention, the liquid crystal display device may have the following characteristics: a source signal line is provided, and the storage circuit and the D A converter are arranged so as to overlap the source signal line.
According to the present invention, the liquid crystal display device may have the following characteristics: a gate signal line is provided, and the storage circuit and the D A converter are arranged so as to overlap the gate signal line.
According to the present invention, a liquid crystal display device including pixels is provided. Each pixel includes a liquid crystal element, which is characterized in that each pixel includes a source signal line and n (n is a natural number equal to or greater than 2). Number) Gate signal lines, n TFTs, n memory circuits, and a D A converter; of which n TFTs have gate electrodes, and each gate electrode is connected to one of the n gate signal lines And each of the n TFTs includes a source region and a drain region, one of the two regions is connected to the source signal line, and the other is connected to the input of one of the n storage circuits ; Each output terminal of the n storage circuits is connected to the input terminal of the D A converter; the output terminal of the D A converter is connected to the liquid crystal element.
According to the present invention, a liquid crystal display device including pixels is provided, and each pixel includes a liquid crystal element, which is characterized in that each pixel includes n (n is a natural number equal to or greater than 2) source signal lines, A gate signal line, n TFTs, n storage circuits, and a D A converter; among them, each of the n TFTs has a gate electrode connected to the gate signal line, and each of the n TFTs includes one A source region and a drain region, one of the two regions is connected to one of the n source signal lines, and the other is connected to the input of one of the n storage circuits; each of the n storage circuits The output terminal is connected to the input terminal of the D / A converter; the output terminal of the D / A converter is connected to the liquid crystal element.
The liquid crystal display device of the present invention may be a liquid crystal display device, which is characterized by providing a source signal line driving circuit, and the source signal line driving circuit includes a shift register, a first latch circuit, a second latch circuit, and Switch; when the sampling pulse is received from the shift register, the first latch circuit holds the n-bit digital signal until the n-bit digital signal is transmitted to the second latch circuit, and the switch selection is transmitted to the second The n-bit digital signal of the latch circuit, one bit at a time, so as to input the selected signal to the source signal line.
The liquid crystal display device of the present invention may be a liquid crystal display device, which is characterized by providing a source signal line driving circuit, and the source signal line driving circuit includes a shift register, a first latch circuit, and a second latch circuit; When the sampling pulse is received from the shift register, the first latch circuit maintains a 1-bit digital signal until the 1-bit digital signal is transmitted to the second latch circuit.
The liquid crystal display device of the present invention may be a liquid crystal display device, which is characterized by providing a source signal line driving circuit, and the source signal line driving circuit includes a shift register and a first latch circuit; When the sampling pulse is received, the first latch circuit maintains the n-bit digital signal.
The liquid crystal display device of the present invention may be a liquid crystal display device, which is characterized in that a source signal line driving circuit is provided, and the source signal line driving circuit includes a shift register, a first latch circuit, and n switches; When the sampling pulse is received from the shift register, the first latch circuit holds the n-bit digital signal, and the n switches input the n-bit digital signal stored in the first latch circuit to the n source signals. line.
According to the present invention, the liquid crystal display device may have the following characteristics: the storage circuit is a static random access memory (SRAM), a ferroelectric random access memory (FeRAM), or a dynamic random access memory (DRAM).
According to the present invention, the liquid crystal display device may have the following characteristics: the storage circuit is formed on a glass substrate, a plastic substrate, a stainless steel substrate, or a single crystal wafer.
The liquid crystal display device of the present invention may be a television, a personal computer, a portable terminal, a video camera, or a head-mounted display device, and is characterized by including a liquid crystal display device.
According to the present invention, a method for driving a liquid crystal display device is provided. The liquid crystal display device includes a plurality of pixels arranged in a matrix. The method is characterized in that each of the plurality of pixels includes a plurality of storage circuits and a D / A. Converter, the data is rewritten into a plurality of storage circuits of a specific row of pixels or a specific column of pixels in all pixels.
According to the present invention, a method for driving a liquid crystal display device is provided. The liquid crystal display device includes a plurality of pixels and a source signal line driving circuit for inputting a video signal into a plurality of pixels. The method is characterized in that Each of the pixels includes a plurality of storage circuits and a D A converter, and the operation of the source signal line driving circuit is terminated when a still image is displayed.
According to the present invention, the method for driving a liquid crystal display device may have the following characteristics: the storage circuit is a static random access memory (SRAM), a ferroelectric random access memory (FeRAM), or a dynamic random access memory (DRAM).
According to the present invention, the method for driving a liquid crystal display device may have the following characteristics: the storage circuit is formed on a glass substrate, a plastic substrate, a stainless steel substrate, or a single crystal wafer.
The crystal display device of the present invention may be a television, a personal computer, a portable terminal, a video camera, or a head-mounted display device, and is characterized in that the liquid crystal display device is driven by the driving method described above.
According to the present invention, a method for driving a portable information device is provided. The portable information device includes a liquid crystal display device and a CPU. The method is characterized in that the liquid crystal display device includes pixels, and each pixel includes a plurality of storage circuits, A D A converter and a driving circuit for outputting signals to a plurality of storage circuits; the CPU includes a first circuit for controlling the driving circuit and a second circuit for controlling signals input to the portable information device; and when the liquid crystal display device displays The operation of the first circuit is terminated during the still image.
According to the present invention, a method for driving a portable information device is provided. The portable information device includes a liquid crystal display device and a VRAM. The method is characterized in that the liquid crystal display device includes pixels, and each pixel includes a plurality of storage circuits and A D A converter; and when the liquid crystal display device displays a still image, the operation of reading data from the VRAM is terminated.
According to the present invention, a method for driving a portable information device including a liquid crystal display device is provided, which is characterized in that the liquid crystal display device includes pixels, and each pixel includes a plurality of storage circuits and a D / A converter; and When the display device displays a still image, the operation of the source signal line driving circuit of the liquid crystal display device is terminated.
According to the present invention, the method for driving a portable information device may have the following characteristics: data in a plurality of storage circuits are read out once in a frame period.
According to the present invention, a method for driving a portable information device including a liquid crystal display device is provided, characterized in that the liquid crystal display device includes a plurality of pixels arranged in a matrix; each of the plurality of pixels includes a plurality of storage circuits and one D / A converter; the liquid crystal display device rewrites data in a plurality of storage circuits of a specific row of pixels or a specific column of pixels in all pixels.
According to the present invention, the method for driving a portable information device may have the following characteristics: the portable information device is a mobile phone, a personal computer, a navigation system, a PDA, or an electronic book.
Schematic illustration
In the drawings:
FIG. 1 is a circuit diagram of a pixel of the present invention, which includes a plurality of storage circuits;
FIG. 2 is a schematic diagram illustrating a circuit structure of a source signal line driving circuit for displaying an image by using the pixels of the present invention; FIG.
3A and 3B are time charts of displaying images using the pixels of the present invention;
4 is a detailed circuit diagram of a storage circuit;
FIG. 5 is a schematic diagram illustrating a circuit structure of a source signal line driving circuit that does not include a second latch circuit; FIG.
6 is a circuit diagram of a pixel of the present invention, wherein the pixel is driven by the source signal line driving circuit in FIG. 5;
7A and 7B are time charts for displaying images using the circuits shown in FIGS. 5 and 6;
8 is a schematic diagram illustrating the structure of a D of A converter of a liquid crystal display device of the present invention;
9 is a schematic diagram illustrating the structure of a D A converter of a liquid crystal display device of the present invention;
10A to 10C are diagrams illustrating a process of forming an example of a liquid crystal display device including pixels of the present invention;
11A to 11C are diagrams illustrating a process of forming an example of a liquid crystal display device including pixels of the present invention;
12A and 12B are diagrams illustrating a process of forming an example of a liquid crystal display device including pixels of the present invention;
FIG. 13 is a diagram schematically illustrating the overall circuit structure of a conventional liquid crystal display device; FIG.
14 is a schematic diagram illustrating a circuit structure of a source signal line driving circuit of a conventional liquid crystal display device;
15A to 15F are diagrams illustrating an electronic device that can employ a display device including a pixel of the present invention;
16A to 16D are schematic diagrams illustrating an electronic device that can employ a display device including a pixel of the present invention;
FIG. 17 is a diagram illustrating a circuit structure of a source signal line driving circuit that does not include a second latch circuit; FIG.
18A and 18B are time charts for displaying images using the circuit shown in FIG. 17;
19A and 19B are diagrams illustrating an example of a process of forming a reflective liquid crystal display device;
20 is a schematic diagram illustrating the structure of a D A converter of a liquid crystal display device of the present invention;
21 is a schematic diagram illustrating the structure of a D of A converter of a liquid crystal display device of the present invention;
22 is a diagram illustrating a circuit structure of a source signal line driving circuit including a number of latch circuits required for one-bit metadata processing;
FIG. 23 is a diagram illustrating a gate signal line driving circuit using a decoder; FIG.
FIG. 24 is a block diagram illustrating a portable information terminal employing the present invention
25 is a block diagram illustrating a mobile phone to which the present invention is applied;
26 is a block diagram illustrating a transmission / reception unit of a mobile phone;
27A to 27C are diagrams illustrating a liquid crystal display device of a portable information device of the present invention, in which FIG. 27A is a top view, and FIGS. 27B and 27C are cross-sectional views;
28A to 28C are diagrams illustrating an application example of the portable information device of the present invention;
29A and 29B are diagrams illustrating an application example of the portable information device of the present invention;
FIG. 30 is a top view of pixels in a liquid crystal display device of a portable information device of the present invention; FIG.
FIG. 31 is a schematic diagram illustrating an example of a portable information device of the present invention;
Figure 32 is a diagram illustrating an example of the portable information device of the present invention;
33 is a schematic diagram illustrating an example of a portable information device of the present invention;
34 is a block diagram of a conventional portable information terminal;
35 is a block diagram of a conventional mobile phone;
36 is a schematic diagram illustrating the structure of a pixel of a liquid crystal display device of the present invention;
FIG. 37 is a diagram illustrating the structure of a pixel of a liquid crystal display device of the present invention; and
FIG. 38 is a schematic diagram illustrating a pixel structure of a liquid crystal display device of the present invention.
Explanation of main component symbols
1308. . .Pixel part
1303. . .Shift register circuit
1305. . .Second latch circuit
1307. . .Analog switch
1401. . .Shift register circuit
1403. . .Second latch circuit
1509. . .DRAM
1301. . .Source signal line drive circuit
1304. . .First latch circuit
1306. . .D / A converter
1302. . .Gate signal line driving circuit
1402. . .First latch circuit
1404. . .D / A converter circuit
1510. . .Flash memory card
1503. . .Memory card
1506. . .CPU
1513. . .Liquid crystal display device
1518. . .Writing pad interface
1511. . .VRAM
1615. . .Transmission / reception circuit
1614. . .speaker
1601. . .keyboard
1606. . .CPU
1609. . .DRAM
1603. . .Memory card
1607. . .Video signal processing circuit
1612. . .LCD controller
2663, 2667, 2668. . .filter
2664. . .switch
2669. . .First frequency conversion circuit
2671. . .Frequency conversion circuit
2675. . .AC / DC converter
2679. . .Data modulation circuit
202. . .First latch circuit
204. . .Bit signal selection switch
210. . .Signal
111. . .D / A converter
2413. . .Display device
1505. . .External interface port
1501. . .Pen writing tablet
1502. . .Detector circuit
1507. . .Video signal input circuit
1512. . .LCD controller
1602. . .Audio processing circuit
1608. . .Microphone
1618. . .Keyboard interface
1613. . .Liquid crystal display device
1610. . .Flash memory
1605. . .External interface port
1611. . .VRAM
2622. . .antenna
2672, 2676. . .filter
2665, 2666, 2667. . .Amplifier
2673. . .Second frequency conversion circuit
2670, 2674. . .Oscillating circuit
2678. . .Data demodulation circuit
201. . .Shift register circuit
203. . .Second latch circuit
205. . .Pixel
108-110. . .TFT
105-107. . .Memory circuit
2406. . .CPU
2407. . .Video signal processing circuit
2401. . .Pen contact board
2412. . .LCD controller
2418. . .Board interface
2506. . .CPU
2515. . .Transmission / reception circuit
2511. . .VRAM
102. . .Memory circuit selection signal line
104. . .Memory circuit selection signal line
451. . .Switching TFT
502. . .Latch circuit
510. . .Signal
611. . .D / A converter
602. . .Second source signal source signal line
604. . .Write gate signal line
1701. . .Shift register circuit
1703. . .Latch circuit
1710. . .Signal
5001. . .Base
5007. . .Gate insulation film
5009. . .Second conductive film
5011-5016. . .First-shaped conductive layer
5021-5026. . .Second-shaped conductive layer
5032-5037. . .Third-shaped conductive layer
2411. . .VRAM
2405. . .External interface port
2402. . .Detector circuit
2501. . .keyboard
2518. . .Keyboard interface
2507. . .Video signal processing circuit
2512. . .LCD controller
103. . .Memory circuit selection signal line
450. . .Memory circuit
501. . .Shift register circuit
503. . .Pixel
605-607. . .Memory circuit
601. . .The first yuan signal source signal line
603. . .The third source signal source signal line
608-610. . .Write TFT
1702. . .Latch circuit
1704. . .Pixel
5002. . .Base film
5003-5006. . .Island semiconductor layer
5008. . .First conductive film
5010. . .Mask
5017-5020. . .First impurity region
5027-5031. . .Second impurity region
5039-5044. . .Fourth impurity region
5038. . .Blocking mask
5046. . .Second interlayer insulating film
5049. . .Drain wiring
5051, 5052. . .Pixel electrode
5054. . .Relative base
5058. . .Coating
5060. . .Alignment film
5061. . .Liquid crystal material
5202. . .Reflective electrode
5203, 5204. . .Alignment film
5207. . .Liquid crystal material
4002. . .Pixel part
4004. . .Gate signal line driving circuit
4008. . .Relative base
4201. . .Driving TFT
4010. . .Base film
4203. . .Pixel electrode
4005. . .Lead-out wiring
4300. . .Anisotropic conductive film
3302-3304. . .Memory circuit
3306. . .Pixel electrode
2601. . .main body
2603. . .Voice input
2605. . .Operation switch
5045. . .First interlayer insulating film
5047, 5048. . .Source wiring
5050. . .Connecting electrode
5053. . .Alignment film
5055-5057. . .Color filter
5059. . .Counter electrode
5062. . .Sealing member
5201. . .Third intermediate layer insulation film
5205. . .Counter electrode
5206. . .Sealing member
4009. . .Sealing member
4003. . .Source signal line drive circuit
4001. . .TFT substrate
4210. . .liquid crystal
4202. . .Pixel TFT
4301. . .Interlayer insulation film
4205. . .Counter electrode
4006. . .FPC
3301. . .Pixel
3305. . .D / A converter
3307. . .Source signal line
2602. . .Sound output
2604. . .Display section
2606. . .antenna
2611. . .main body
2613. . .Audio input section
2615. . .battery
2621. . .main body
2623. . .Image receiving part
2625. . .Display section
2632. . .Display section
2641. . .main body
2643. . .Display section
2645. . .Amplifier device
2652. . .Display section
2654. . .Operation switch
2201. . .main body
2203. . .Display section
2211. . .main body
2213. . .Speaker section
2215. . .Operation switch
2222. . .Display section
2224. . .Operation switch
2232. . .With part
2702. . .Operation panel
2704. . .Display unit
2705. . .Audio output unit
2708. . .Audio input unit
2612. . .Display section
2614. . .Operation switch
2616. . .Image receiving part
2622. . .Camera section
2624. . .Operation switch
2631. . .main body
2633. . .Arm part
2642. . .speaker
2644. . .Input device
2651. . .main body
2653. . .Memory media
2655. . .antenna
2202. . .Video input
2204. . .keyboard
2212. . .Display section
2214. . .Recording media
2221. . .main body
2223. . .Framing section
2231. . .main body
2701. . .display board
2703. . .Connector circuit
2706. . .Operation keys
2707. . .switch
2801. . .main body
2802. . .Video input unit
2811. . .main body
2812. . .Display unit
2814. . .Storage media
2851. . .main body
2854. . .Operation switch
2901. . .display board
2903. . .Connector unit
2905. . .Audio output unit
2907. . .switch
2909. . .antenna
2911. . .External input port
3006. . .Operation switch
3011. . .External input port
400. . .D / A converter
444-446,461. . .Inverter
452. . .Reset signal cable
454. . .High voltage sad gray scale power cord
124. . .Read TFT
141-143. . .Memory circuit
2803. . .Display unit
2804. . .keyboard
2813. . .Speaker unit
2815. . .Operation switch
2853. . .Storage media
2855. . .antenna
2902. . .Operation panel
2852, 2904. . .Display unit
2906. . .Operation keys
2908. . .Audio input unit
2910. . .CCD light receiving unit
3004. . .Display unit / stroke pen
3007. . .switch
3012. . .Stylus
411-443. . .NAND circuit
447-449, 460. . .switch
453. . .Low voltage / gray scale power cord
455. . .Intermediate voltage / gray scale power line
121 <sub>-</sub> 123. . .Read out the gate signal line
151 <sub>-</sub> 156. . .switch
Detailed Description of the Preferred Embodiment [Embodiment Mode]
FIG. 2 shows a structure of a source signal line driving circuit and a structure of some pixels in a display device using pixels including a storage circuit. The circuit can process 3-bit digital grayscale signals, and includes a shift register circuit (SR) 201, a first latch circuit (LAT1) 202, a second latch circuit (LAT2) 203, and a bit signal selection switch. (SW) 204 and pixel 205. 210 indicates the signal provided from the gate signal line drive circuit or directly from the outside. This signal will be described later along with the description of the pixel.
FIG. 1 shows a detailed circuit structure of one of the pixels 205 in FIG. 2. This pixel is used for 3-bit digital grayscale signals, and includes liquid crystal elements (LC), storage capacitors (CS), storage circuits (105 to 107), and D A (D A converter 111). 101 indicates a source signal line, 102 to 104 indicate a write gate signal line, and 108 to 110 indicate a write TFT.
A specific example of the D A converter 111 will be described in the embodiment. However, the structure of the D A converter may be different from that described in the embodiment.
3A and 3B are timing charts of the display device shown in FIG. 1 according to the present invention. The display device is capable of processing 3-bit digital gray-scale signals and has VGA-level resolution. A method of driving such a display device will be described with reference to FIGS. 1 to 3B. The reference symbols used in this description are the same as those used in FIGS. 1 to 3B.
Refer to FIGS. 2, 3A and 3B. In FIG. 3A, the frame periods are represented by α, β, and γ, respectively. First, it is explained that the operation of the circuit in the period α is similar to the driving circuit of the conventional digital driving method. A clock signal (S-CLK, S-CLKb) and a start pulse (S-SP) are input to the shift register circuit 201 , And then output the sampling pulse. The sampling pulse is input to the first latch circuit 202 (LAT1), so that digital signals (digital data) also input to the first latch circuit 202 are held therein. This period is referred to as the point data sampling period in this description. In FIG. 3, the sampling period of point data corresponding to one horizontal period extends from period 1 to period 480. The digital signal is a 3-bit signal, D1 is the most significant bit (MSB), and D3 is the least significant bit (LSB). When the first latch circuit 202 finishes holding the digital signal corresponding to one horizontal period, it responds to the input of the latch signal (latch pulse) in the flyback period, and holds the digital signal in the first latch circuit 202 At the same time, it is transferred to the second latch circuit 203 (LAT2).
Subsequently, the first latch circuit is operated to respond to the sampling pulse outputted from the shift register circuit 201 again to maintain the digital signal corresponding to the next horizontal period.
On the other hand, the digital signal transmitted to the second latch circuit 203 is written in a storage circuit arranged in each pixel. As shown in FIG. 3B, the point data sampling period of the next column is divided into three parts, namely, a period I, a period II, and a period III, in order to output the digital signal held in the second latch circuit to the source signal line. At this time, the bit signal selection switch 204 is used to sequentially output the signals of each bit to the source signal line.
In period I, a pulse is input to the write gate signal line 102, the TFT 108 is turned on, and a digital signal is written into the storage circuit 105. Subsequently, in the period II, a pulse is input to the write gate signal line 103 so that the TFT 109 is turned on, and a digital signal is written into the storage circuit 106. Finally, in period III, a pulse is input to the write gate signal line 104 so that the TFT 110 is turned on, and a digital signal is written into the storage circuit 107.
The above steps complete the processing of digital signals corresponding to one horizontal period. The period in FIG. 3B corresponds to the period indicated by * in FIG. 3A. The above operations are repeated until the final stage is processed, thereby completing the processing of writing digital signals corresponding to a frame into the storage circuits 105 to 107.
The written digital signal is converted into an analog signal by D A 111, and the analog signal is input to the liquid crystal element. The liquid crystal element changes its transmittance according to the input analog signal to provide a gray scale. Since the signal here is a 3-bit signal, the obtained brightness range is 0 to 7, which is a total of 8 levels.
The above operation is repeated to continuously display images. If the image to be displayed is a still image, the digital signals are stored in the storage circuits 105 to 107 in the first operation. Once the digital signals are stored, the digital signals stored in the storage circuits 105 to 107 are read out repeatedly for each new frame period.
The DAC controller is appropriately used to control the digital signal stored in the storage circuit to be repeatedly read out in each new frame cycle, and the read signal is converted into an analog signal in D A111.
On the other hand, the output signal of the storage circuit is input to the D A 111 through a readout TFT (not shown). Control the turning on and off of the readout TFT so as to repeatedly read out the digital signal stored in the storage circuit for each new frame cycle.
In this case, a read gate signal line driving circuit (not shown) is used to input a signal to a read gate signal line (not shown) connected to a read TFT gate electrode.
In this way, when displaying a still image, the source signal line driving circuit can terminate its driving.
In addition, the gate signal lines can be used to sequentially write digital signals to or read digital signals from the storage circuit, instead of driving all the gate signal lines at the same time. In other words, by operating the source signal line driver circuit for only a short period of time, thereby increasing the choice of display methods, it is possible to partially rewrite the screen.
In this case, it is necessary to use a decoder as the gate signal line driving circuit. A suitable decoder is a circuit disclosed in Japanese Patent Application Laid-Open Publication No. Hei 8-101669. An example of the decoder is shown in FIG. 23. The source signal line driving circuit may further include a decoder to rewrite a part of the screen.
In this embodiment mode, a pixel includes three storage circuits to store a 3-bit digital signal corresponding to a frame. However, the number of storage circuits according to the present invention is not limited to three. For example, when n (n is a natural number equal to or greater than 2) bit signals corresponding to m (m is a natural number equal to or greater than 2) box is stored, a pixel contains n × m storage circuits .
The storage circuit installed in the pixel stores the digital signal in the above manner, so that when a still image is displayed, the digital signal stored in the storage circuit can be repeatedly used for each new frame cycle. This allows continuous display of still images without the need to drive external circuits, source signal line driver circuits, or other circuits. Therefore, the present invention has a great effect on reducing energy consumption in a liquid crystal display device.
Considering the arrangement of the latch circuits that increase in number according to the number of bits, the source signal line driving circuit may not necessarily be integrally formed on the insulator. Some or all of the source signal line driving circuits may be outside the insulator.
Although the source signal line driving circuit in this embodiment mode is configured with most of the latch circuits according to the number of bits, the source signal line driving circuit is provided when the latch circuit is provided with only the number required for one-bit data processing. Operation is also possible. In this case, digital signals from significant bits to lower significant bits are continuously input to the latch circuit.
FIG. 24 illustrates the structure of a portable information device according to the present invention, which uses the liquid crystal display device configured as described above. When a still image is to be displayed, the video signal is stored in the storage circuit of the pixels of the display device 2413, and the stored video signal is retrieved to display the image. Therefore, when displaying a still image, the source signal line driving circuit of the video processing circuit 2407, the VRAM 2411, and the display device 2413 in the internal circuit of the CPU 2406 can terminate its operation instead of all the internal circuits of the CPU as in the prior art Must be operated.
A detailed description of the above paragraphs will be provided below. If there is no input to the pen-based tablet 2401 after a given period of time, or if no signal to change the image display is input from the external interface port after a given period of time, the CPU 2406 determines that the device is in a still image mode. To make a judgment, the CPU 2406 performs the following operations. The CPU terminates the source signal line driving circuit of the display device 2413 through the LCD controller 2412. Specifically, the operation of the source signal line driving circuit is terminated by cutting off the start pulse, the clock signal and the video signal provided to the source signal line driving circuit. At this time, the gate signal line driving circuit does not terminate its operation, but receives and provides a signal to repeatedly read data from the storage circuit.
The gate signal line driving circuit is usually driven at a frequency of 1 to 100 or less for driving the source signal line driving circuit. Therefore, if the operation of the gate signal line driving circuit is not terminated when displaying a still image, grinding it will hardly affect the energy consumption. If the liquid crystal material used does not cause problems with image quality such as burn-in, then the operation of the gate signal line driving circuit can of course be terminated. In this way, the display device 2413 terminates the source signal line driving circuit only or terminates the source signal line. The driving circuit and the gate signal line driving circuit are operated to display a still image.
Then, the CPU 2406 terminates the operations of the video signal processing circuit 2407 and the VRAM 2411 in the CPU 2406. The display device 2413 uses video data stored in a storage circuit provided by the display device to display an image. As described above, it is not necessary to input new video data to the display device. When displaying still images, the video signal processing circuit 2407, VRAM 2411, and other circuits for generating and processing related video data do not need to operate. Therefore, the power consumption can be reduced in the CPU 2406, the VRAM 2411, and the source signal line driving circuit.
When a video signal is input by inputting a signal through the pen-type writing board 2401, a command for changing the display content is sent from the pen-type writing board's detector circuit 2402 to the CPU 2406 through the pen-board interface 2418. After receiving this instruction, the CPU 2406 starts the VRAM 2411 and the video signal processing circuit 2407 which have terminated the operation. Then, the start pulse, the clock signal and the video data are provided to the source signal line driving circuit of the display device 2413 through the LCD controller 2412 so as to write a new video signal in the pixel.
In this way, as long as the circuits included in the dotted line in FIG. 24 are operated (that is, the gate signal line driving circuit, the LCD controller 2412, the pen-type writing board 2401, the detector circuit 2402, and the writing board interface 2418), the portable information terminal You can display still images continuously.
FIG. 25 illustrates an example of a mobile phone to which the present invention can be applied. The operation of the mobile phone is generally the same as that of the portable information terminal shown in FIG. 24. The difference between a mobile phone and a portable information terminal is that the mobile phone uses the keyboard 2501 to input data, and is controlled by the CPU 2506 through the keyboard interface 2518. Another difference is that the external data is input to the antenna through the communication system of the telephone company, and amplified by the transmission / reception circuit 2515 controlled by the CPU 2506. When a still image is displayed, the operations of the video signal processing circuit 2507, the VRAM 2511, and the source signal line driving circuit can be terminated in a manner similar to that of a portable information terminal.
In this way, as long as the circuits included in the dotted line in FIG. 25 are operated (ie, the gate signal line driving circuit, the LCD controller 2512, the keyboard 2501, and the keyboard interface 2518), the mobile phone can continuously display still images.
Embodiments of the present invention will be described below.
[Example 1]
This embodiment explains the pixels of the circuit shown in the embodiment mode, regarding its specific structure (arrangement of transistors and other components) and its operation.
FIG. 8 illustrates a pixel similar to that shown in FIG. 1, but the circuit constituting D A111 shown here is different from that shown in FIG. 1. In FIG. 8, the same elements as those in FIG. 1 are denoted by the same reference symbols. The storage circuits 105, 106, and 107 are connected to write TFTs 108, 109, and 110, respectively, and are controlled by the storage circuit selection signal lines (write gate signal lines) 102, 103, and 104, respectively. FIG. 4 illustrates an example of a storage circuit. The area enclosed by the dashed box 450 is a storage circuit (corresponding to 105, 106, or 107 in FIG. 8), where 451 represents a write TFT (corresponding to 108, 109, or 110 in FIG. 8). The storage circuit 450 shown in the figure is a static random access memory (SRAM) using a flip-flop. However, the storage circuit is not limited to this structure.
The circuit of this embodiment shown in FIG. 8 can be driven according to the time chart described in the embodiment mode in conjunction with FIGS. 3A and 3B. The operation of the circuit and the method of actually driving the storage circuit selection unit will be described with reference to FIGS. 3A, 3B and 8. This description uses the reference symbols used in FIGS. 3A and 3B and FIG. 8.
Refer to Figures 3A and 3B. In FIG. 3A, the frame periods are represented by α, β, and γ, respectively. First, the operation of the circuit in the period α will be explained.
The operations of the shift register circuit, the first latch circuit, and the second latch circuit are the same as those described in the embodiment mode. See the description of the embodiment mode.
In period I, a pulse is input to the write gate signal line 102, the TFT 108 is turned on, and a digital signal is written into the storage current 105. Subsequently, in the period II, a pulse is input to the write gate signal line 103 so that the TFT 109 is turned on, and a digital signal is written into the storage circuit 106. Finally, in period III, a pulse is input to the write gate signal line 104 so that the TFT 110 is turned on, and a digital signal is written into the storage circuit 107.
The above steps complete processing corresponding to one horizontal period digital signal. Each period in FIG. 3B corresponds to a period indicated by * in FIG. 3A. The above operations are repeated until the final stage is processed, thereby completing the processing of writing digital signals corresponding to a frame into the storage circuits 105 to 107.
The written digital signal is converted into an analog signal by D A 111, and the analog signal is input to the liquid crystal element. The liquid crystal element changes its transmittance according to the input analog signal to provide a gray scale. Since the signal here is a 3-bit signal, the obtained brightness range is 0 to 7, which is a total of 8 levels.
In this way, data corresponding to a frame period are displayed. At the same time, the driving circuit will process the digital signal of the next frame period.
The above steps are repeated to display the image.
To display a still image, after the digital signal of a certain frame is written into the storage circuit, the operation of the source signal line driving circuit is terminated, and the same signal written in the storage circuit is read each time a new frame is activated To display still images.
There is another option not shown in FIG. 8. In this option, the output of the storage circuit in each pixel is input to D A through the readout TFT, and for each new frame period, these signals are repeatedly output from the storage circuit by operating the readout TFT. Read out. The circuit that operates the read TFT may include any known structure.
The still image can be displayed by another method. In this method, the signal input to the storage circuit is continuously input to the D A circuit, and the corresponding analog signal is output to the liquid crystal element. In this case, the display of the same brightness level is continued until the selection of the write TFT is performed and the information is rewritten into the storage circuit. This driving method does not require the above-mentioned read TFT or the like.
In this way, power consumption in displaying still image processing can be greatly reduced.
[Example 2]
This embodiment illustrates a case in which a signal is systematically written into a storage circuit of a pixel portion in a dot order system to eliminate the need for a second latch circuit of a source signal line driving circuit.
FIG. 5 illustrates a structure of a source signal line driving circuit and a structure of some pixels in a display device using pixels including a storage circuit. This circuit is capable of processing 3-bit digital grayscale signals and includes a shift register circuit (SR) 501, a latch circuit (LAT1) 502, and a pixel 503. 510 represents driving directly from the gate signal line Signals provided by circuits, etc. These signals will be explained in the explanation of the pixels later.
FIG. 6 illustrates a detailed circuit structure of one of the pixels 503 in FIG. 5. As described in Embodiment 1, the pixel is used for a 3-bit digital grayscale signal, and includes a liquid crystal element (LC), a storage capacitor (Cs), a storage circuit (605 to 607), and D A (D A conversion 611) and so on. 601 indicates a first bit (MSB) signal source signal line, 602 indicates a second bit signal source signal line, and 603 indicates a third bit (LSB) signal source signal line. Reference numeral 604 indicates a write gate signal line, and 608 to 610 indicate a write TFT.
7A and 7B are timing charts regarding the circuit driving of this embodiment. Description will be given below with reference to FIG. 6 and FIGS. 7A and 7B.
The operation of the shift register circuit 501 and the latch circuit (LAT1) 502 is the same as that described in the embodiment mode and the first embodiment. As shown in FIG. 7B, after the latch operation of the first stage is completed, the operation of writing the storage circuit of the pixel is started immediately. A pulse is input to the write gate signal line 604 to turn on the write TFTs 608 to 610 and prepare the storage circuit for writing. The bit-ordered digital signals held in the latch circuits 502, respectively, are simultaneously written into the storage circuit through the three source signal lines 601 to 603.
When the digital signal that is always held in the latch circuit is written into the storage circuit in the first stage, it responds to the next sampling pulse, and the digital signal in the next stage starts to remain in the latch circuit. In this way, signals are sequentially written into the storage circuit.
The above operations are repeated until the final stage, thereby completing a horizontal cycle.
Each period shown in FIG. 7B corresponds to a period indicated by ** in FIG. 7A.
Do the same for all horizontal periods 1 to 480.
Then complete the display cycle of the first frame. In period β, the digital signal of the next frame is processed.
Display an image by repeating the above steps. To display static, after the digital signal of a certain frame is written into the storage circuit, the operation of the source signal line driving circuit is terminated, and the same signal written in the storage circuit is read each time a new frame is activated To display a still image. In this way, power consumption in displaying still image processing can be greatly reduced. In addition, the number of latch circuits is reduced to half the number of latch circuits in the embodiment mode. Therefore, this embodiment saves space in the layout of the circuit and contributes to the reduction in the overall size of the display device.
[Example 3]
This embodiment describes an example of a liquid crystal display device. The liquid crystal display device adopts the circuit structure of the liquid crystal display device described in Embodiment 2 and does not include a second latch circuit. The signal is written into pixels by dot-sequential driving. Storage circuit.
FIG. 17 illustrates a circuit configuration example of a source signal line driving circuit of the liquid crystal display device according to this embodiment. The circuit is capable of processing 3-bit digital grayscale signals, and includes a shift register circuit 1701, a latch circuit 1702, a switch circuit 1703, and a pixel 1704.
1710 represents the signal supplied from the gate signal line drive circuit or directly from the outside. The circuit structure of the pixel is the same as that of the second embodiment, so in fact, reference can be made to FIG. 6.
18A and 18B are timing charts regarding the circuit driving of this embodiment. Description will be made below with reference to FIGS. 6 and 17 and FIGS. 18A and 18B.
These operations from the shift register circuit 1701 outputting the sampling pulse to holding the digital signal in the latch circuit 1702 in response to the sampling pulse are the same as those of the first and second embodiments. In this embodiment, the switch circuit 1703 is placed between the latch circuit 1702 and the storage circuit in the pixel 1704. Therefore, after the operation of holding the digital signal in the latch circuit is completed, there is no need to immediately start the operation of writing to the storage circuit. The switching circuit 1703 remains closed until the point data sampling period ends, and as long as the switching circuit is closed, the latch circuit will continuously hold digital signals.
As shown in FIG. 18B, in the flyback period after the completion of holding the digital signal corresponding to one horizontal period, the switch circuit 1703 is turned on immediately when receiving the latch signal (latch pulse). The digital signal held in the latch circuit 1702 is then simultaneously written into the storage circuit in the pixel 1704. The operation of the pixel 1704 in this write operation process and the operation of the pixel 1704 in the read operation process displayed in the next frame cycle are the same as those of the second embodiment, so they will not be described again.
Each period in FIG. 18B corresponds to a period indicated by ** in FIG. 18A.
In this way, when the source signal line driving circuit does not include the second latch circuit, the driving according to the dot sequence system can also be conveniently performed.
[Example 4]
This embodiment illustrates a case in which a D / A converter selected from most gray-scale voltage lines is used. Fig. 8 is a circuit diagram thereof.
When the circuit processes 3-bit digital signals, eight gray-scale voltage lines are provided, and these voltage lines are respectively connected to the switching TFT. The output of the storage circuit is used to selectively drive the switching TFT by a decoder. The switching TFT can use a transmission gate.
In FIG. 8, the outputs from the storage circuits 105 to 107 include the signals stored in the storage circuits and the reverse signals of the stored signals.
This embodiment can be optionally combined with Embodiments 1 to 3.
[Example 5]
This embodiment illustrates a case in which a D A converter is adopted, the structure of which is different from the structure described in Embodiment 4 with reference to FIG. 8. Fig. 9 is a circuit diagram thereof.
The circuit of this embodiment is a circuit selected from most gray-scale voltage lines similar to those described in Embodiment 4 with reference to FIG. 8. The circuit of FIG. 8 contains a large number of components, so these components occupy a large area of the pixel. In Figure 9, the switches are connected in series so that these switches double as decoders to reduce the number of components. These switches can use transmission gates.
In FIG. 9, the outputs from the storage circuits 105 to 107 include the signals stored in the storage circuits and the reverse signals of the stored signals. This embodiment can be optionally combined with Embodiments 1 to 3.
[Example 6]
This embodiment illustrates a case in which a D A converter is adopted, the structure of which is different from that described in Embodiments 4 and 5 with reference to FIGS. 8 and 9. Fig. 20 is a circuit diagram thereof.
The D A converters shown in FIGS. 8 and 9 use gray-scale voltage lines, and the number of wiring required corresponds to the number of gray-scales. The converters of Figures 8 and 9 are therefore not suitable for multi-gray scales. In the converter of FIG. 20, the reference voltage is distributed so as to provide a gray-scale voltage in a combination of the capacitors C1 to C3. Such a capacitance distribution method obtains gray scales according to the ratio of the capacitors C1 to C3, thereby providing different gray scale displays.
A D A converter with such a capacitance distribution method is described in "AMLCD99, Technical Paper Abstracts" on pages 29-32.
This embodiment can be optionally combined with Embodiments 1 to 3.
[Example 7]
This embodiment illustrates a case in which a D A converter is adopted, the structure of which is different from that described in Embodiments 4, 5 and 6 with reference to FIGS. 8, 9 and 20. Fig. 21 is a circuit diagram thereof.
The converter shown in FIG. 21 is a circuit formed by further simplifying the D A converter described in Embodiment 6 with reference to FIG. 20. Of the two electrodes of each of the capacitors C1, C2, and C3, the electrode that is not connected to the liquid crystal element is connected to VL during reset, and is connected to VH or VL at other times. This connection can be established with a single switch. This switch can use a transmission gate.
In FIG. 21, the outputs from the storage circuits 105 to 107 include a signal stored in the storage circuit and an inverted signal of the stored signal. This embodiment can be optionally combined with Embodiments 1 to 3.
[Example 8]
As shown in FIG. 22, the latch circuit of the source signal line driving circuit is provided by only the amount required for one-bit metadata processing. In order to make up for a smaller number of circuits, the source signal line driver circuit operates three times faster. The first bit data, the second bit data, and the third bit data are sequentially input to the source in a line cycle. Signal line driving circuit. In this way, the source signal line driving circuit of this embodiment can provide the same effect as that of Embodiment 1. This method requires external circuits to sequentially replace data, but can reduce the size of the source signal line drive circuit.
[Example 9]
Note that the steps of forming a TFT of a driving circuit (a source signal line driving circuit, a gate signal line driving circuit, and a pixel selection line driving circuit) will be described below. The driving circuit provides a display device using the driving method of the present invention The pixel portion and the surrounding portion of the pixel portion. In order to simplify the description, a CMOS circuit is provided in the figure, which is the basic structure of the driving circuit part.
First, as shown in FIG. 10A, a base film 5002 is formed on a substrate 5001, wherein the base film 5002 is made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film; the substrate 5001 is made of borosilicate Barium borosilicate glass or aluminum borosilicate glass is usually made of glass such as Corning Corp. # 7059 glass or # 1737 glass. For example, a stacked film of a silicon oxynitride film 5002a and a hydrogenated silicon oxynitride film 5002b is formed. The silicon oxynitride film 5002a is made of SiH <sub>4</sub> , NH <sub>3</sub> And N <sub>2</sub> O is made to a thickness of 10 to 200 nm (preferably between 50 and 100 nm) by plasma CVD; the silicon oxynitride film 5002b is similarly made of SiH <sub>4</sub> And N <sub>2</sub> O is made to a thickness of 50 to 200 nm (preferably between 100 and 150 nm). In Example 9, the base film 5002 is shown as a two-layer structure. However, a single-layer film of an insulating film and a structure in which two or more layers are stacked may be used.
The island-shaped semiconductor layers 5003 to 5006 are formed of a crystalline semiconductor thin film, wherein the crystalline semiconductor thin film is made of a semiconductor thin film having an amorphous structure by a laser crystallization method or a known thermal crystallization method. The thickness of the island-shaped semiconductor layers 5003 to 5006 may be 25 to 80 nm (preferably between 30 and 60 nm). There are no restrictions on the material used to form the crystalline semiconductor film, but it is preferred to use silicon or a silicon germanium (SiGe) alloy to form the crystalline semiconductor film.
Excimer lasers such as pulsed or continuous light emission types, YAG lasers, or YVO <sub>4</sub> Lasers can be used to form crystalline semiconductor films by laser crystallization methods. When using these types of lasers, the following methods can be used: first, the laser emitted by the laser oscillator is focused into a linear shape by an optical system, and then the light is irradiated onto the semiconductor film. The crystallization conditions can be appropriately selected by the operator, but when an excimer laser is used, the pulse oscillation frequency is set to 30 Hz and the laser energy density is set to 100 to 400 mJ cm <sup>2</sup> (Usually at 200 and 300mJ cm <sup>2</sup> between). In addition, when using a YAG laser, the second harmonic is used, and the pulse oscillation frequency is set to 1 to 10 kHz, and the laser energy density can be set to 300 to 600 mJ cm <sup>2</sup> (Usually at 350 and 500mJ cm <sup>2</sup> between). The laser light with a width of 100 to 1000 μm (for example, 400 μm) collected in a straight shape irradiates the entire surface of the substrate. This can be done with an overlap ratio of 80 to 90% for linear laser light.
The gate insulating film 5007 is formed by covering the island-shaped semiconductor layers 5003 to 5006. The gate insulating film 5007 is formed of a silicon-containing insulating film having a thickness of 40 to 150 nm by plasma CVD or sputtering. In Example 9, a 120-nm-thick silicon nitride film was formed. The gate insulating film is of course not limited to this silicon oxynitride film, and other silicon-containing insulating films can also be used in single-layer or stacked structures. For example, when a silicon oxide film is used, it can be formed by the following method: TEOS (tetraethylorthosilicate) and O <sub>2</sub> The substrate temperature is set to 300 to 400 ° C by plasma CVD, and the electric power density is 0.5 to 0.8W cm at a high frequency (13.56MHz). <sup>2</sup> . The good characteristics of the gate insulating film can be obtained by subsequently annealing the silicon oxide film thus produced at 400 to 500 ° C.
Subsequently, a first conductive film 5008 and a second conductive film 5009 are formed on the gate insulating film 5007 to form a gate electrode. In Embodiment 9, the first conductive film 5008 is composed of a Ta film having a thickness of 50 to 100 nm, and the second conductive film 5009 is composed of a W film having a thickness of 100 to 300 nm.
The Ta film is formed by a sputtering method, and sputtering of a Ta target is performed by Ar. If proper amounts of Xe and Kr are added to the Ar, Ta film, the internal pressure will be reduced, and the film can be prevented from falling off. The resistivity of the α-phase Ta film is about 20 μΩcm and can be used for the gate electrode, but the resistivity of the β-phase Ta film is about 180 μΩcm, which is not suitable for the gate electrode. If a tantalum nitride thin film having a thickness of about 10 to 50 nm is formed as the basis of the Ta film to form an α-phase Ta film, the αTa film can be easily made, wherein the tantalum nitride film has a crystal structure similar to the α-phase Ta.
The W film is formed by sputtering a W target, and tungsten hexafluoride (WF <sub>6</sub> ) Is formed by thermal CVD. Whichever method is used, it is necessary to make the film low-resistance in order to use it as a gate electrode. The resistivity of the W film is preferably equal to or less than 20 μΩcm. The resistivity can be reduced by enlarging the crystal grains of the W film. However, when a large amount of impurity elements (such as oxygen) are present in the W film, crystallization is inhibited, and the film becomes highly resistive . Therefore, a W target having a purity of 99.9999% is used for the sputtering method. In addition, by taking care not to allow impurities in the gas phase to enter when forming the W film, a resistivity of 9 to 20 μΩcm can be achieved.
Note that although the first conductive film 5008 is a Ta film and the second conductive film 5009 is a W film in Embodiment 9, selected elements in the Ta, W, Ti, Mo, Al, Cu group, or main components Alloy materials or compound materials containing one of these elements can be used to form these two films. In addition, a semiconductor film, which is usually a polycrystalline silicon film, is doped with an impurity element such as phosphorus. In addition to the adopted in Embodiment 9, examples of the optimal combination include: forming a first conductive film 5008 from tantalum nitride (TaN), and combining it with a second conductive film 5009 formed of a W film; A first conductive film 5008 is formed of aluminum nitride (TaN), and is combined with a second conductive film 5009 formed of an Al film; a first conductive film 5008 is formed of tantalum nitride (TaN), and A second conductive film 5009 formed of a Cu film is bonded. Whichever method is used, it is best to combine a conductive material that can be etched with an appropriate selectivity.
Then, the mask 5010 is formed of a resist, and a first-step etching process is performed to form electrodes and wirings. In Example 9, an ICP (Inductively Coupled Plasma) etching method is used. CF <sub>4</sub> And Cl <sub>2</sub> The gas mixture was used as an etching gas, and 500 WRF electric power (13.56 MHz) was applied to the coil electrode at 1 Pa to generate a plasma. 100WRF electrical power (13.56MHz) is also applied to the substrate side (sample stage), effectively applying a negative mesh bias. In Hybrid CF <sub>4</sub> And Cl <sub>2</sub> In the case, the W film and the Ta film are etched to approximately the same horizontal plane.
By using an appropriate resist mask shape, the edge portions of the first conductive layer and the second conductive layer are processed into a tapered shape in accordance with the bias effect applied to the substrate side under the above-mentioned etching conditions. The angle of the tapered portion is 15 to 45 °. The etching time can be appropriately increased by 10 to 20% so that no residue is left on the gate insulating film during etching. For the W film, the selectivity of the silicon oxynitride film is 2 to 4 (usually 3), so the exposed surface of the silicon oxynitride film at about 20 to 50 nm is etched by this over-etching process. Thus, first-shaped conductive layers 5011 to 5016 (the first conductive layers 5011a to 5016a and the second conductive layers 5011b to 5016b) composed of the first conductive layer and the second conductive layer are formed according to the first etching process. Reference numeral 5007 denotes a gate insulating film. By etching at about 20 to 50 nm, areas not covered by the first-shaped conductive layers 5011 to 5016 are formed thinner. (FIG. 10B) The first doping treatment is performed next, and an impurity element having n-type conductivity is added. (FIG. 10B) Ion doping or ion implantation can be used for the doping method. At a dose of 1x10 <sup>12</sup> Up to 5x10 <sup>14</sup> Ion doping was performed under the conditions of atoms / cm 2 and an acceleration voltage of 60 to 100 keV. 15 elements of the periodic table group, usually phosphorus (P) or arsenic (As), are used as impurity elements having n-type conductivity, and phosphorus (P) is used here. For the impurity element having n-type conductivity in this case, the conductive layers 5011 to 5016 become masks, and the first impurity regions 5017 to 5020 are formed by a self-adjusting method. An impurity element having n-type conductivity is added to the first impurity regions 5017 to 5020 at a concentration of 1 × 10 <sup>20</sup> Up to 1 × 10 <sup>21</sup> Atom / cubic centimeter. (FIG. 10B) A second etching process is then performed without removing the blocking mask, as shown in FIG. 10C. CF <sub>4</sub> , Cl <sub>2</sub> And O <sub>2</sub> The mixture is used as an etching gas, and the W film is selectively etched. By the second etching process, second-shaped conductive layers 5021 to 5026 (first conductive layers 5021a to 5026a and second conductive layers 5021b to 5026b) are formed. Reference numeral 5007 denotes a gate insulating film, and areas not covered by the second-shaped conductive layers 5021 to 5026 are etched again by about 20 to 50 nm to form thinner areas.
According to CF <sub>4</sub> And Cl <sub>2</sub> The etching reaction of the W film or Ta film of the mixed gas can be estimated from the generated root, the type of ions, and the vapor pressure of the reaction product. Compare the vapor pressures of W and Ta fluoride and chloride, W fluoride SF <sub>6</sub> Especially high, WCl <sub>5</sub> TaF <sub>5</sub> And TaCl <sub>5</sub> The steam pressure is the same order. Therefore, both the W film and the Ta film are made of CF <sub>4</sub> And Cl <sub>2</sub> Gas mixture for etching. But if the right amount of O <sub>2</sub> Added to this gas mixture, CF <sub>4</sub> And Cl <sub>2</sub> Then, a reaction occurs, CO and F are formed, and a large number of F roots or F ions are generated. As a result, the etching speed of the W film having a high fluoride vapor pressure is improved. On the other hand, even if F is increased, the etching rate of Ta does not increase correspondingly. In addition, compared with W, Ta is easily oxidized, so the surface of Ta is O <sub>2</sub> The addition is oxidized. The etching speed of the Ta film is further reduced because Ta oxide does not react with fluoride and chloride. therefore <sub>,</sub> The etching rate between the W film and the Ta film can be different, and the etching rate of the W film can be made faster than that of the Ta film.
Then, as shown in FIG. 11A, a second doping process is performed. In this case, the dose is less than the first doping treatment, and under conditions of a high acceleration voltage, an impurity having n-type conductivity is added. For example, when the acceleration voltage is set to 70 to 120keV and the dose is 1x10 <sup>13</sup> This process is performed in the case of atoms / cm 2 to form a new impurity region inside the first impurity region constituting the island-shaped semiconductor layer of FIG. 10B. Doping is performed so that the second-shaped conductive layers 5021 to 5026 are used as a mask of the impurity elements, and the impurity elements are also added to the regions under the first conductive layers 5021a to 5026a. In this way, the second impurity regions 5027 to 5031 are formed. The concentration of phosphorus (P) added to the second impurity regions 5027 to 5031 has a gentle concentration gradient according to the thickness of the tapered portion of the first conductive layers 5021a to 5026a. Note that in the semiconductor layer overlapping the tapered portion of the first conductive layers 5021a to 5026a, the concentration of the impurity element slightly decreases from the end to the inside of the tapered portion of the first conductive layers 5021a to 5026a, but the concentration remains almost the same s level.
As shown in FIG. 11B, a third etching process is performed. By using the reactive ion etching method (RIE method) and using CHF <sub>6</sub> An etching gas is used to perform this process. The tapered portions of the first conductive layers 5021a to 5026a are partially etched, and the area where the first conductive layer and the semiconductor layer overlap is reduced by the third etching process. The third-shaped conductive layers 5032 to 5037 (the first conductive layers 5032a to 5037a and the second conductive layers 5032b to 5037b) are formed. At this time, the area of the gate insulating film 5007 not covered by the third-shaped conductive layers 5032 to 5037 is formed to be 20 to 50 nm thin by etching.
By the third etching process, in the case of the second impurity regions 5027 to 5031, the second impurity regions 5027a to 1031a overlapping the first conductive layers 5032a to 5037a, and between the first impurity region and the second impurity region The third impurity regions 5027b to 5231b.
Subsequently, as shown in FIG. 11C, a fourth impurity region 5029 to 5044 is formed in the island-shaped semiconductor layer 5004, the conductivity type of which is opposite to the first conductivity type, and a p-channel TFT is formed. The third conductive layer 5033b is used as a mask of an impurity element, and an impurity region is formed in a self-adjusting manner. At this time, the island-shaped semiconductor layers 5003, 5005, the storage capacitor portion 5006, and the wiring portion 5034 constituting the n-channel TFT are covered with the blocking mask 5038. Phosphorus is added to the impurity regions 5039 at different concentrations, respectively. Diborane (B <sub>2</sub> H <sub>6</sub> ) The region is formed by an ion doping method, and the impurity concentration of each region is 2 × 10 <sup>20</sup> Up to 2x10 <sup>21</sup> Atom / cubic centimeter.
Through the above steps, impurity regions are formed in each island-shaped semiconductor layer. The third-shaped conductive layers 5032, 5033, 5035, and 5036 overlapping the island-shaped semiconductor layer function as gate electrodes. The number 5034 acts as an island-shaped source signal line. The number 5037 acts as a capacitor connection.
After removing the blocking mask 5038, a step of initializing an impurity element added to each island-shaped semiconductor layer is used to control the conductivity type. This step is performed by an annealing furnace using a heating annealing method. In addition, a laser annealing method or a rapid heating annealing method (RTA method) can be used. The heating annealing method is performed in a nitrogen gas having an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less, and a temperature of 400 to 700 ° C, usually 500 to 600 ° C. In Example 9, heat treatment was performed at 500 ° C for 4 hours. However, in a case where the wiring materials used for the third-shaped conductive layers 5032 to 5037 are not heat-resistant, it is preferable to perform initialization after forming an interlayer insulating film (its main component is silicon) to protect the wiring and the like.
In addition, the step of hydrogenating the island-shaped semiconductor layer is performed in oxygen containing 3 to 100%, and heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours. This step is a step of terminating unsaturated bonds in the semiconductor layer by thermally exciting hydrogen. As another method of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) can be performed.
Next, a first interlayer insulating film 5045 of a silicon oxynitride film having a thickness of 100 to 200 nm is formed. Then, a second interlayer insulating film 5046 of an organic insulating material is formed thereon. After that, etching is performed to form a contact hole.
Then, in the driving circuit portion, source wirings 5047 and 5048 contacting the source region of the island-shaped semiconductor layer and drain wirings 5049 contacting the drain region of the island-shaped semiconductor layer are formed. In the pixel portion, connection electrodes 5050 and pixel electrodes 5051 and 5052 are formed (FIG. 12A). The connection electrode 5050 provides an electrical connection between the source signal line 5034 and the pixel TFT. It should be noted that the pixel electrode 5052 and the storage capacitor belong to adjacent pixels.
In this way, a driving circuit including an n-channel TFT and a p-channel TFT, a pixel TFT, and a pixel portion including a storage capacitor can be formed on the same substrate. In this description, such a substrate is called an active matrix substrate.
In addition, the edge portions of the pixel electrodes are arranged to overlap the source signal lines and the gate signal lines, so that the gap between the pixel electrodes can shield light without using a black matrix.
In addition, according to the processing shown in Example 9, five photomasks (one island-shaped semiconductor layer pattern, first wiring pattern (source signal line, gate signal line, capacitor wiring), p-channel area mask can be used. Pattern, contact hole pattern and second wiring pattern (including pixel electrode and connection electrode) to form the active matrix substrate. As a result, processing can be reduced, which helps reduce manufacturing costs and increase throughput.
After forming the active matrix substrate of FIG. 12A, an alignment film 5053 is formed on the active substrate of FIG. 12B, and a rubbing process is performed.
Prepare opposing substrate 5054. Color filter layers 5055 to 5057 and a coating layer 5058 are formed on the opposite substrate 5054. A color filter layer is formed such that a color filter layer 5055 having a red color and a color filter layer 5056 having a blue color overlap each other and used as a light masking film. It is necessary to cover at least the space between the TFT, the connection electrode, and the pixel electrode. Therefore, it is better to arrange the red and blue filters appropriately so as to overlap and cover necessary positions.
In addition, the connection electrode 5050 is combined, and the red color filter layer 5055, the blue color filter layer 5056, and the green color filter layer 5057 are coated to form a separator. Various color filters having a thickness of 1 to 3 μm are formed by mixing a pigment into an acrylic resin. A predetermined pattern may be formed using a mask ball using a photosensitive material. Considering the thickness of the coating layer of 1 to 4 μm, the height of the separator may be 2 to 7 μm, preferably between 4 and 6 μm. Due to this height, a gap is created when the active matrix substrate and the opposing substrate are combined. The coating layer 5058 is formed by light curing or curing, using, for example, an organic resin material and materials such as polyimide and acrylic resin.
The arrangement of the separator may be arbitrarily determined, and for example, the separator may be arranged on the opposite substrate 5054 so as to be aligned with the position above the connection electrode, as shown in FIG. 12B. In addition, the spacer may be disposed on the opposite substrate 5054 so as to be aligned with the position above the TFT of the driving circuit. The spacers may be arranged over the entire surface of the driving circuit portion, and they may be arranged to cover the source wiring and the drain wiring.
After the coating layer 5058 is formed, the counter electrode 5059 is formed by forming a wiring pattern, and a rubbing process is performed after the alignment film 5060 is formed.
Then, the active matrix substrate and the opposing substrate on which the pixel portion and the driving circuit are formed are bonded together by a sealing member 5062. The filler is mixed into the sealing member 5062, and the two kinds of substrates are joined together, and a uniform gap between them is maintained by the filler and the partition. The liquid crystal material 5061 is then injected between the two substrates, and then completely sealed with a sealing material (not shown in the figure). A known liquid crystal material can be used as the liquid crystal material 5061. Thus, the active matrix liquid crystal display device shown in FIG. 12B is realized.
Although the TFT formed by the above process has a top-gate structure, the present invention can also be applied to a bottom-gate structure TFT or other structure TFTs.
In addition, a glass substrate is used in this embodiment, but is not limited thereto. Substrates other than glass substrates, such as plastic substrates, stainless steel substrates, and single crystal perimeters, can be used for implementation.
[Example 10]
The liquid crystal display device of the present invention includes a plurality of storage circuits in its pixel portion. <sub>,</sub> Therefore, the number of elements that make up a pixel is larger than that in normal pixels. If the liquid crystal display device is of a transmission type, a lower aperture ratio may cause insufficient brightness. Therefore, the present invention is most suitably applied to a reflection type liquid crystal display device. This embodiment describes an example of forming a reflection type liquid crystal display device.
According to the description of Embodiment 9, the active matrix substrate shown in FIG. 19A is formed (the substrate is similar to the substrate shown in FIG. 12A). A resin film is then formed as the third interlayer insulating film 5201. Thereafter, a contact hole is opened in the pixel electrode to form a reflective electrode 5202. The material most suitable for forming the reflective electrode 5202 is a material having a good reflectivity, for example, mainly containing an Al or Ag thin film, or a laminated sheet containing thin Al and thin film Ag.
On the other hand, a counter substrate 5054 is prepared. In this embodiment, a counter electrode 5205 is formed on the counter substrate 5054 by forming a wiring pattern. The counter electrode 5205 is made of a transparent conductive film. The material of the transparent conductive film may include a compound of indium oxide and tin oxide (this compound is called ITO) or a compound of indium oxide and zinc oxide.
Although not shown in the figure, a color filter layer is formed when a color liquid crystal display device is formed. The best structure in this case is: adjacent layers of different colors overlap each other, making it double as a light masking film for the TFT region.
Subsequently, alignment films 5203 and 5204 are formed on the active matrix substrate and the opposite substrate, respectively, and the collimation film is subjected to abrasion treatment.
The active substrate on which the pixel portion and the driving circuit portion are formed is adhered to the opposite substrate by a sealing member. The sealing member 5206 includes a filler mixed therein, and the filler cooperates with the separator to keep the distance between the substrates uniform when the two substrates are bonded. A liquid crystal material 5207 is injected between the substrates, and then the substrates are completely sealed with a final sealing material (not shown). The liquid crystal material 5207 may be a known liquid crystal material. Thus, the reflective liquid crystal display device shown in FIG. 19B is realized.
In this embodiment, substrates other than glass substrates can also be used, including plastic substrates, stainless steel substrates, and single crystal wafers.
In addition, the present invention can be easily applied to a semi-transmissive display device. In this type of display device, half of the pixels include reflective electrodes, and the remaining pixels include transparent electrodes.
This embodiment can be optionally combined with Embodiments 1 to 8.
[Example 11]
This embodiment describes an example of forming a liquid crystal display device of the present invention with reference to FIGS. 27A to 27C.
FIG. 27A is a top view of a liquid crystal display device whose liquid crystal is sealed between a TFT substrate and an opposite substrate thereof. Fig. 27B is taken along line AA of Fig. 27A. Sectional view. FIG. 27C is a cross-sectional view taken along the line BB of FIG. 27A.
A sealing member 4009 is provided so as to surround the pixel portion 4002, the source signal line driver circuit 4003, and the first and second gate signal line driver circuits 4004a and 4004b, all of which are formed on the TFT substrate 4001. The opposite substrate 4008 is placed on the pixel portion 4002, the source signal line driving circuit 4003, and the first and second gate signal line driving circuits 4004a and 4004b. The space surrounded by the TFT substrate 4001, the sealing member 4009, and the opposite substrate 4008 is filled with a liquid crystal material 4210.
A pixel portion 4002, a source signal line driver circuit 4003, and first and second gate signal line driver circuits 4004a and 4004b formed on a TFT substrate 4001 each include a plurality of TFTs. FIG. 27B illustrates the driving TFT 4201 and the pixel TFT 4202 as representatives of these TFTs. A driving TFT (an n-channel TFT and a p-channel TFT shown in the figure) 4201 is formed on the base film 4010, and is included in the source signal line driving circuit 4003. A pixel TFT (a TFT that controls the voltage applied to the pixel electrode) 4202 is included in the pixel portion 4002. In this embodiment, a p-channel TFT and an n-channel TFT formed by a known method are used to drive the TFT 4201, and a p-channel TFT formed by a known method is used for the pixel TFT 4202. The pixel portion 4002 is provided with a storage capacitor (not shown) which is electrically connected to the gate electrode of the pixel TFT 4202.
An interlayer insulating film (planar film) 4301 is formed on the driving TFT 4201 and the pixel TFT 4202. On the interlayer insulating film 4301, a pixel electrode 4203 electrically connected to the drain of the pixel TFT 4202 is formed.
A counter electrode 4205 is formed on the counter substrate 4008. Although not shown in FIG. 27B, a color filter and a polarizer are appropriately provided. A predetermined voltage is applied to the counter electrode 4205.
According to the above method, a liquid crystal element including a pixel electrode 4203, a liquid crystal 4210, and a counter electrode 4205 is formed.
Reference numeral 4005a denotes a lead-out wiring that connects the pixel portion 4002, the source signal line drive circuit 4003, the first gate signal line drive circuit 4004a, and the second gate signal line drive circuit 4004b to an external power source. The lead-out wiring 4005a is connected between the sealing member 4009 and the TFT substrate 4001, and is electrically connected through the anisotropic conductive film 4300 and the FPC connection 4301 of the FPC 4006.
The opposite substrate 4008 may be formed of a glass material, a metal material (usually a stainless steel material), a ceramic material, or a plastic material (including a plastic film). Useful plastic materials include, for example, FRP (glass fiber reinforced plastic) sheets, PVF (polyfluoroethylene) sheets, Mylar films, polyester films, and acrylic resin films. It is also possible to use a thin sheet with tantalum fingers sandwiched between PVF films or Mylar films.
If light from the pixel electrode travels to the cover side, the cover must be transparent. In this case, a transparent material such as a glass sheet, a plastic sheet, a polyester sheet, or an acrylic sheet is used.
The pixel electrode 4203 and the conductive film 4203a are formed at the same time. A conductive film 4203a is formed so as to contact the top surface of the lead-out wiring 4005a, as shown in FIG. 27C.
The anisotropic conductive film 4300 includes a conductive filler 4300a. By thermally press-fitting the TFT substrate 4001 and the FPC 4006, the conductive filler 4300a electrically connects the conductive film 4203a on the TFT substrate 4001 to the FPC wiring 4301 on the FPC 4006.
This embodiment can be optionally combined with Embodiments 1 to 10.
[Example 12]
This embodiment describes an example in which the liquid crystal display device of the present invention is implemented in a transmissive liquid crystal display device.
The design rule is set to the 1 μm rule, and the pixel pitch is set to about 100 ppi. The storage circuits, D A converters, and other components in the pixels can be placed under the source signal line to solve the problem of low aperture ratio. This enables the present invention to be applied to a transmissive liquid crystal display device in addition to a reflective liquid crystal display device.
FIG. 30 is a schematic top view of pixels in a transmissive liquid crystal display device having the above structure.
Reference numeral 3301 indicates a pixel, 3302 to 3304 indicate a storage circuit, 3305 indicates a D A converter, 3306 indicates a pixel electrode, and 3307 indicates a source signal line. The counter electrode, color filter, storage capacitor, and some other components are omitted in the figure. The storage circuits 3302 to 3304 and the D A converter 3305 are formed so as to overlap the source signal line 3307.
Although not shown, the storage circuits 3302 to 3304 and the D A converter 3305 can be arranged so as to overlap the gate signal lines instead of placing them under the source signal line 3307.
[Example 13]
A static random access memory (SRAM) is used for the storage circuit of the pixel portion of the liquid crystal display device according to Embodiments 1 to 12 of the present invention. However, the storage circuit is not limited to SRAM. A dynamic random access memory (DRAM) can be provided as other storage circuits available in the pixel portion of the liquid crystal display device of the present invention.
Although not shown in the figure, other forms of storage circuits that can be used to form the pixel portion of the liquid crystal display device of the present invention include FeRAM (Ferroelectric Random Access Memory). FeRAM is permanent memory, which has the same level of write speed as SRAM and DRAM. FeRAM's features including low write voltage can be used to further reduce the energy consumption of the liquid crystal display device of the present invention. Flash memory can also be used to form the storage circuit of the present invention.
This embodiment can be optionally combined with Embodiments 1 to 12.
[Example 14]
The active matrix liquid crystal display device using the driving circuit formed according to the present invention has various applications. In this embodiment, the semiconductor device implements a display device which uses a driving circuit formed according to the present invention.
The following descriptions can be taken as examples of display devices: portable information terminals (such as e-books, mobile computers, or mobile phones); video cameras; digital cameras; personal computers; televisions and projection devices <sup>。</sup> Examples of these electronic devices are shown in Figs.
FIG. 15A is a portable telephone including a main body 2601, a sound output portion 2602, a sound input portion 2603, a display portion 2604, an operation key 2605, and an antenna 2606. The present invention can be applied to the display portion 2604.
15B illustrates a video camera including a main body 2601, a display portion 2612, an audio input portion 2613, operation keys 2614, a battery 2615, an image receiving portion 2616, and the like. The present invention can be applied to the display portion 2612.
15C illustrates a mobile computer or a portable information terminal, which includes a main body 2621, a camera portion 2622, an image receiving portion 2623, an operation key 2624, a display portion 2625, and the like. The present invention can be applied to the display portion 2625.
FIG. 15D illustrates a head-mounted display device including a main body 2631, a display portion 2632, and an arm portion 2633. The present invention can be applied to the display portion 2632.
FIG. 15E illustrates a television, which includes a main body 2641, a speaker 2642, a display portion 2642, an input device 2644, and an amplification device 2645. The present invention can be used for the display portion 2443.
FIG. 15F illustrates a portable e-book including a main body 2651, a display portion 2652, a storage medium 2653, operation keys 2654, and an antenna 2655, and the portable e-book displays data recorded on the MD and DVD and the data recorded by the antenna data. The present invention can be applied to the display portion 2652.
FIG. 16A illustrates a personal computer including a main body 2201, an image input portion 2202, a display portion 2203, a keyboard 2204, and the like. The present invention can be applied to the display portion 2203.
16B illustrates a player that uses a recording medium (hereinafter referred to as a recording medium) of a recording program, and includes a main body 2211, a display portion 2212, a speaker portion 2213, a recording medium 2214, and an operation key 2215. This player uses DVD, CD, etc. as recording media, and can be used for music appreciation, movie appreciation, games and the Internet. The present invention can be applied to the display portion 2212.
FIG. 16C illustrates a digital camera including a main body 2221, a display portion 2222, a viewfinder portion 2223, operation keys 2224, and an image receiving portion (not shown in the figure). The present invention can be applied to the display portion 2222.
FIG. 16D illustrates a monocular head-mounted display device including a main body 2231 and a fixing band portion 2232. The present invention can be applied to the display portion 2231.
[Example 15]
This embodiment illustrates the appearance of a portable information terminal according to the present invention. FIG. 31 shows a portable information terminal including the structure of the present invention. In FIG. 31, 2701 represents a display panel, and 2702 represents an operation panel. The display board 2701 is connected to the operation board 2702 at the connection device 2703. The plane of the display device 2704 on which the display panel 2701 is provided and the plane of the operation keys 2706 on which the operation panel 2702 is provided form an angle θ at the connection device 2703. The θ angle can be arbitrarily changed.
The portable information terminal shown in FIG. 31 has a telephone function, and the display panel 2701 is provided with an audio output device 2705, so that sound is output from the audio output device 2705. The liquid crystal display device of the present invention is used for a display device 2704.
The aperture ratio of the display device 2704 can be arbitrarily set, such as 16: 9 or 4: 3. The ideal size of the display device 2704 is approximately 1 to 4.5 diagonally.
In addition to the operation keys 2706, the operation panel 2702 is also provided with a power switch 2707 and an audio input device 2708. The power switch 2702 is separately provided from the operation key 2706 in FIG. 31. However, the power switch 2707 may be one of the operation keys 2706. Sound is input from the audio input device 2708.
In FIG. 31, the display panel 2701 includes an audio output device 2705, and the operation panel 2702 includes an audio input device 2708. However, the present invention is not limited to this arrangement. The display panel 2701 may include an audio input device 2708, and the operation panel 2702 includes an audio output device 2705. In contrast, both the audio output device 2705 and the audio input device 2708 can be provided on the display panel 2701, or the audio output device 2705 and the audio input device 2708 can be provided on the operation panel 2702 simultaneously.
FIG. 32 illustrates a case in which the operation keys 2706 of the portable information terminal shown in FIG. 31 are operated with an index finger. 33 illustrates a case in which the operation keys 2706 of the portable information terminal shown in FIG. 31 are operated with the thumb. An operation key 2706 may be provided on one side of the operation panel 2702. The terminal is operated with only the index finger or thumb of one (usual) hand.
[Example 16]
This embodiment explains an electronic device using the portable information device of the present invention with reference to FIGS. 28A to 29B.
A personal computer can be an example of the portable information device of the present invention. FIG. 28A illustrates a personal computer including a main body 2801, an image input device 2802, a display device 2803, a keyboard 2804, and the like. By using a liquid crystal display device in which each pixel includes a storage circuit as the display device 2803, the energy consumption of a personal computer can be reduced.
A navigation system can be taken as an example of the portable information device of the present invention. FIG. 28B illustrates a navigation system including a main body 2811, a display device 2812, a speaker device 2813, a storage medium 2814, an operation key 2815, and the like. By using a liquid crystal display device including a storage circuit in each pixel as the display device 2812, the energy consumption of the navigation system can be reduced.
An e-book can be taken as an example of the portable information device of the present invention. FIG. 28C illustrates an electronic book including a main body 2851, a display device 2852, a storage medium 2853, operation keys 2854, an antenna 2855, and the like. The eBook shows the data recorded on the MD and DVD and the data received via the antenna. By using a liquid crystal display device in which each pixel includes a storage circuit as the display device 2852, the energy consumption of the e-book can be reduced.
A mobile phone can be taken as an example of the portable information device of the present invention. FIG. 29A illustrates a mobile phone including a display panel 2901, an operation panel 2902, a connection device 2903, a display device 2904, an audio output device 2905, an operation key 2906, a power switch 2907, an audio input device 2908, an antenna 2909, and a CCD light receiving device 2910 and 2911 external input port. By using a liquid crystal display device including storage circuits in each pixel as the display device 2904, the energy consumption of the mobile phone can be reduced.
A PDA can be an example of the portable information device of the present invention. FIG. 29B illustrates a PDA including a display device / pen-type writing pad 3004, operation keys 3006, power switch 3007, external input port 3011, stylus 3012, and the like. By using a liquid crystal display device including a storage circuit in each pixel as the display device 3004, the energy consumption of the PDA can be reduced.
[Example 17]
This embodiment illustrates a case in which a DAC controller (not shown) is used to convert a signal held in a storage circuit of each pixel and input to a D / A converter into a pixel. Corresponding analog signals in the liquid crystal display device having the same structure as that of FIG. 20. This will be described with reference to FIG. 37.
In this embodiment, a signal held in a storage circuit of each pixel and input to the D / A converter is converted into a corresponding analog signal, and the analog signal is output from the D / A converter. The operation is called a storage circuit read operation.
In FIG. 37, the pixels include write TFTs 108 to 110, storage circuits 105 to 107, source signal lines 101, write gate signal lines 102 to 104, a D / A converter 400, a liquid crystal element LC, and a storage capacitor Cs.
Each of the write TFTs 108 to 110 includes a source region and a drain region, one of which is connected to the source signal line 110 and the other is connected to the input of its associated storage circuit (108 to 105,109 to 106,110 Connected to 107). The write TFT 108 includes a gate electrode connected to the gate signal line 102, the TFT 109 includes a gate electrode connected to the line 103, and the TFT 110 includes a gate electrode connected to the line 104. The outputs of the storage circuits 105 to 107 are connected to the inputs In1 to In3 of the D / A converter 400, respectively. The output OUT of the D / A converter 400 is connected to one of the electrodes of the liquid crystal element LC and the storage capacitor Cs.
D / A converter 400 includes NAND currents 441 to 443, inverters 444 to 446 and 461, switches 447a to 449a, switches 447b to 449b, switches 460, capacitors C1 to C3, reset signal lines 452, and low-voltage side gray Step power line 453, high-voltage-side gray-scale power line 454, and intermediate-voltage-side gray-scale power line 455.
The operations until the digital signals are stored in the storage circuits 105 to 107 are the same as those in the embodiment mode and the first embodiment. Therefore, they will not be described again.
The operation of the D / A converter 400 is explained below. The signal RES is input to the reset signal line 452 so that the switch 460 is turned on. The potentials of the capacitors C1 to C3 connected to the OUT terminal side are fixed to the potential VM of the gray-scale power line 455 on the intermediate voltage side. The potential of the high-voltage-side grayscale power supply line 453 is set to a potential equal to the potential VL of the low-voltage-side grayscale power supply line 453. If a digital signal is input to In1 to In3 at this time, the signal is not written to the capacitors C1 to C3.
Thereafter, the signal RES of the reset signal line 452 is changed to open the switch 460, thereby releasing the fixed potentials of the potentials of the capacitors C1 to C3 on the OUT terminal side. Subsequently, the potential of the high-voltage-side grayscale power supply line 454 is changed to a potential VH, which is different from the potential VL of the low-voltage-side grayscale power supply line 453. At this time, the outputs of the NAND circuits 441 to 443 change according to the signals input to the terminals In1 to In3.
The change in the output of the NAND circuit turns on one of the switches 447a and 447b, and also turns on one of the switches 448a and 448b and one of the switches 449a and 449b. Then, the potential VH of the high-voltage-side grayscale power supply line or the potential VL of the low-voltage-side grayscale power supply line is applied to the electrodes of the capacitors C1 to C3.
The capacitances of the capacitors C1 to C3 are set according to bits. For example, C1: C2: C3 is 1: 2: 4.
The voltages applied to the capacitors C1 to C3 change the potentials of the OUT-side capacitors C1 to C3 so as to change the potential of the output. In other words, analog signals corresponding to the input digital signals of In1 to In3 are output from the OUT terminal.
The DAC controller controls the signal RES input to the reset signal line 452, the high-voltage side grayscale power line 454, and the like, so as to control the analog signal output from the D / A converter 400 according to the input digital signal.
Once the digital signal is written into the pixel storage circuit, the above operation is repeated using the DAC controller in order to repeatedly read the digital signal held in the storage circuit. This allows still images to be displayed.
The source signal line driving circuit and the gate signal line driving circuit can terminate their operations in the process of displaying a still image.
Although FIG. 37 illustrates a pixel including three storage circuits as an example, the present invention is not limited thereto. In summary, this embodiment can be applied to a liquid crystal display device in which each pixel includes n (n is a natural number equal to or greater than 2) storage circuits.
The DAC controller used may be a circuit of a known structure.
[Example 18]
This embodiment explains a structural example of a pixel according to the present invention with reference to FIG. 36.
In FIG. 36, the same elements as those in FIG. 1 are denoted by the same reference symbols, and they will not be described again.
In FIG. 36, the outputs of the storage circuits 105 to 107 are sent to the read TFTs 121 to 123, respectively, and then input to the D A 111. The gate electrodes of the readout TFTs 121 to 123 are connected to the readout gate signal line 124.
In the pixels of the structure shown in FIG. 36, the operation of writing signals into the storage circuits 105 to 107 is the same as that described in the embodiment mode and the first embodiment. Therefore, the description of this operation is omitted.
If a still image is to be displayed, once the digital signals are stored in the storage circuits 105 to 107, the read TFTs 121 to 123 are turned on by inputting signals to the read gate signal line 124. This operation causes the digital signals held in the storage circuits 105 to 107 to be input to the D A 111. In the case where each pixel includes a readout TFT as in this embodiment, an operation of inputting a digital signal held in the storage circuits 105 to 107 to the D A 111 is referred to herein as a storage circuit signal read operation.
The readout TFTs 121 to 123 are turned on and off to repeat the read operation, thereby displaying a still image.
The read operation can be realized by selecting the read gate signal line. The read gate signal line 124 may be driven by a read gate signal line driving circuit.
The read gate signal line driving circuit may be any known gate signal line driving circuit.
Although FIG. 36 illustrates a pixel including three storage circuits as an example, the invention is not limited thereto. In summary, this embodiment can be applied to a liquid crystal display device in which each pixel includes n (n is a natural number equal to or greater than 2) storage circuits.
[Example 19]
This embodiment explains the structure of pixels in a liquid crystal display device according to the present invention with reference to FIG. 38.
In FIG. 38, the same elements as those in FIG. 1 are denoted by the same reference symbols, and they will not be described again.
Each pixel includes storage circuits 141a to 143a and storage circuits 141b to 143b.
The selection switch 151 selects the connection of the write TFT 108 to the storage circuit 141a or to the storage circuit 141b. The selection switch 152 selects the connection of the write TFT 109 to the storage circuit 142a or to the storage circuit 142b. The selection switch 153 selects the write TFT 110 to seal the storage circuit 143a or the connection to the storage circuit 143b.
The selection switch 154 selects the connection of the D A 111 to the storage circuit 141a or the storage circuit 141b. The selection switch 155 selects the connection of the D A 111 to the storage circuit 142a or to the storage circuit 142b. The selection switch 156 selects the connection of the D A 111 to the storage circuit 143a or to the storage circuit 143b.
With the selection switches 151 to 153 and the selection switches 154 to 156, it can be determined whether the digital signals are stored in the storage circuits 141a to 143a or whether they are stored in the memories 141b to 143b. These switches are also used to select whether to input signals from the storage circuits 141a to 143a to the D A 111 or to input signals from the storage circuits 141b to 143b to the D A 111.
In each pixel, the operation of inputting a digital signal to the selected storage circuit and the operation of reading the digital signal stored in the selected storage circuit are the same as those in the embodiment mode and the first embodiment. Therefore, these operations are not described here.
Each pixel uses storage circuits 141a to 143a to store a 3-bit digital signal corresponding to one frame period, and uses storage circuits 141b to 143b to store a 3-bit digital corresponding to another frame period different from the above-mentioned frame period. Signal.
The storage circuit shown in FIG. 38 stores a 3-bit digitized signal corresponding to two frame periods, but the embodiment is not limited thereto. To summarize, this embodiment can be applied to a liquid crystal display device in which each pixel stores n (n is a natural number equal to or greater than 2) digital signals corresponding to m (m is a natural number equal to or greater than 2) frames. .
Most of the storage circuits arranged in each pixel are used to store digital signals so that the digital signals stored in the storage circuits can be repeatedly used to display each new frame in a still image. In this way, when the still image is to be displayed continuously, the source signal line driving circuit can terminate its operation. Therefore, the present invention has a great effect on reducing the overall energy consumption of the liquid crystal display device.
The video signal processing circuit and other circuits for processing a signal input to the liquid crystal display device placed in the portable information device may also terminate its operation when the still image is continuously displayed. Therefore, the present invention has a great effect on reducing the energy consumption of the portable information device.
Contents12
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| TWI393109B | Cited by | Taiwan Province of China | Examiner |
| TWI396170B | Cited by | Taiwan Province of China | Examiner |
| TWI384451B | Cited by | Taiwan Province of China | Examiner |
| TWI423218B | Cited by | Taiwan Province of China | Examiner |
19 members in 6 offices
Priority claims8
| Document | Office | Kind | Date |
|---|---|---|---|
| 2000249090 | Japan | – | |
| 2000249090 | Japan | A | |
| 2000253196 | Japan | – | |
| 2000253196 | Japan | A | |
| 20000249090 | – | – | – |
| 20000253196 | – | – | – |
| JP20000249090 | – | – | – |
| JP20000253196 | – | – | – |
Members19
| Document | Office | Kind | |
|---|---|---|---|
| US2002021274A1 | United States of America | A1 | |
| EP1182638A2 | European Patent Office (EPO) | A2 | |
| CN1339773A | China | A | |
| KR20020026801A | Republic of Korea | A | |
| JP2002140051A | Japan | A | |
| TW518552BThis record | Taiwan Province of China | B | |
| US7224339B2 | United States of America | B2 | |
| US2007164961A1 | United States of America | A1 | |
| JP3949407B2 | Japan | B2 | |
| JP2007249215A | Japan | A | |
| KR100764181B1 | Republic of Korea | B1 | |
| EP1182638A3 | European Patent Office (EPO) | A3 | |
| CN100437709C | China | C | |
| CN101399006A | China | A | |
| CN101399006B | China | B | |
| JP2013011901A | Japan | A | |
| EP1182638B1 | European Patent Office (EPO) | B1 | |
| JP5509281B2 | Japan | B2 | |
| US8760376B2 | United States of America | B2 |
2 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Annulment or lapse of patent due to non-payment of feesLapsedMM4A | MM4A | |
| Issue of patent certificate for granted invention patentGrantedGD4A | GD4A |
Numbers
- Publication
- 518552
- Publication, DOCDB
- 518552
- Publication, EPODOC
- TW518552B
- Application
- 90119164
- Application, DOCDB
- 90119164
- Application, EPODOC
- TW20010119164
Titles5
- English
- Liquid crystal display device, method of driving the same, and method of driving a portable information device having the liquid crystal display device
- Chinese
- 液晶顯示裝置,其驅動方法,及驅動具有該液晶顯示裝置之攜帶型資訊裝置的方法
- English
- Liquid crystal display device, method of drivingthe same, and method of driving a portableinforamtion device having the liquid cryscaldisplay devlce
- Unlabeled
- 液晶顯示裝置,其驅動方法,及驅動具有該液晶顯示裝置之攜帶型資訊裝置的方法
- Unlabeled
- Liquid crystal display device, driving method thereof, and method for driving portable information device having the same
Classification
- CPC, 13
- G09G3/3266
- G09G3/3275
- G09G3/3648
- G09G2300/0426
- G09G2300/0809
- G09G2300/0828
- G09G2300/0857
- G09G2300/0861
- G09G2310/04
- G09G2320/0242
- G09G2320/103
- G09G2330/021
- G09G2330/022
- IPC, 2
- G09G3 32
- G09G3 36