Manufacturing method of shallow trench isolation structure

Manufacturing method of shallow trench isolation structure

<p>100. . . Semiconductor substrate</p><p>110. . . Hard mask</p><p>112. . . Pad oxide</p><p>114. . . Silicon nitride layer</p><p>116. . . Opening</p><p>118, 118a. . . ditch</p><p>120. . . Silicon oxide layer</p><p>122. . . Bottom corner</p><p>124. . . Sunken</p><p>126. . . Top corner</p><p>130. . . Silicon oxide layer</p><p>132. . . Filling layer</p><p>200. . . Circle</p>

The preferred embodiment of the present invention will be explained in more detail in the following description text supplemented by the following figures, among which:

Figures 1A-1E are schematic cross-sectional views of the manufacturing process of a preferred embodiment of the present invention.

FIG. 2 is an enlarged view of the area of the circle 200 in FIG. 1B.

Field of invention:

The present invention relates to a manufacturing method of a semiconductor device isolation structure, and particularly relates to a manufacturing method of a shallow trench isolation (STI) structure, which can make the shallow trench isolation structure have rounded corners.

Background of the invention:

The device isolation structure is generally used to prevent movable carriers from flowing from a semiconductor device to a peripheral device via the substrate. Traditionally, the device isolation structure is formed between adjacent field effect transistors in dense semiconductor circuits (such as dynamic random access memory, DRAM). These element isolation structures can reduce the charge leakage from the field-effect transistor. Generally, the device isolation structure uses the area oxidation of silicon (LOCOS) technology to form an extended thick silicon oxide layer on the semiconductor substrate. When LOCOS technology matures, low-cost and highly stable component isolation structures can be obtained. However, the isolation structure formed by the LOCOS method will cause many problems, including the possibility of large internal stress and the erosion of the bird's beak around the field oxide layer. In particular, when the device shrinks, the bird's beak erosion area will be relatively larger, making the LOCOS field oxide layer used to isolate the device unable to be used flexibly.

As the component density of integrated circuits increases, isolation between circuits or components becomes important. Generally, in advanced integrated circuit technology, the isolation of circuit elements is formed in a shallow trench. The semiconductor substrate is usually etched first, and then an insulating material, such as silicon dioxide, is filled. Those who are familiar with this art usually call these trenches filled with insulating materials a shallow trench isolation (STI) structure.

The formation of the STI structure usually first deposits a silicon nitride layer on the semiconductor substrate, and then pattern the silicon nitride layer to form a hard mask. Then the substrate is etched to form steep trenches between adjacent components. Finally, the trench is filled with oxide to form a device isolation structure.

When forming steep trenches, anisotropic plasma dry etching is usually used to remove unnecessary parts. However, plasma destruction often occurs, resulting in a large number of etching defects. Moreover, steep trenches with sharp corners can also cause corner parasitic leakage, thereby reducing the isolation characteristics of the STI.

Although the STI process has better isolation characteristics than the LOCOS process, the STI process must be limited by a large number of defects caused by plasma dry etching and sharp trench corner effects (corner effects). Therefore, there is a need to develop new manufacturing processes that can effectively solve the above-mentioned problems.

The purpose and summary of the invention:

In view of the above-mentioned background of the invention, the traditional STI process forms a steep trench, which is likely to cause a sharp corner effect of the trench. Therefore, the present invention provides a manufacturing method of the STI structure, which can round the bottom corners and the top edge corners of the STI, reduce the stress of the STI on the substrate, and reduce the leakage current caused by the corner effect.

From one point of view, the present invention provides a method for manufacturing a shallow trench isolation structure, which at least includes the following steps. First, a substrate is provided, and a trench is formed in the substrate, and the trench has sharp bottom corners. A first silicon oxide layer is grown on the bottom and sidewalls of the trench, and the bottom corners of the trench are rounded, and then the first silicon oxide layer is removed. Then a second silicon oxide layer is grown along the inner wall of the trench, and then a filling layer, such as a silicon oxide layer, is filled in the trench.

From another point of view, the present invention provides a method for manufacturing a shallow trench isolation structure, which at least includes the following steps. First, a pad oxide layer and a silicon nitride layer are sequentially formed on a substrate. Next, an opening is formed in the silicon nitride layer and the pad oxide layer to expose the substrate, and then using the silicon nitride layer and the pad silicon oxide layer as a mask, the substrate is anisotropically etched to form a trench in the substrate at the bottom of the opening . A first silicon oxide layer is grown on the bottom and sidewalls of the trench, and then the first silicon oxide layer is removed, and a portion of the pad oxide layer at the edge of the opening is removed, so that the top edge corners of the trench become rounded. A second silicon oxide layer is grown along the exposed substrate surface, and then a filling layer is filled in the trench, and then the silicon nitride layer and the pad oxide layer are removed.

Schematic description

The preferred embodiment of the present invention will be explained in more detail in the following description text supplemented by the following figures, among which:

Figures 1A-1E are schematic cross-sectional views of the manufacturing process of a preferred embodiment of the present invention.

FIG. 2 is an enlarged view of the area of the circle 200 in FIG. 1B.

Symbol description of main components

100. . . Semiconductor substrate

110. . . Hard mask

112. . . Pad oxide

114. . . Silicon nitride layer

116. . . Opening

118, 118a. . . ditch

120. . . Silicon oxide layer

122. . . Bottom corner

124. . . Sunken

126. . . Top corner

130. . . Silicon oxide layer

132. . . Filling layer

200. . . Circle

Detailed description of the invention:

The invention provides a method for manufacturing shallow trench isolation, which uses thermal oxidation technology to grow a silicon oxide layer, rounds sharp corners formed by anisotropic etching, and reduces the stress applied to the substrate by the shallow trench isolation. On the other hand, by removing part of the pad oxide layer, the top edge corners of the trenches are rounded to avoid corner effects and reduce leakage current.

Figures 1A-1E are schematic cross-sectional views showing a preferred embodiment of the present invention. Please refer to FIG. 1A. First, a semiconductor substrate 100 is provided, such as a p-type doped silicon substrate with a <100> crystal structure. At least one trench 118 with a steep profile is formed in the substrate 100, and the trench 118 has a sharp bottom corner 115.

The method of manufacturing the trench 118 is to first form a pad oxide layer 112 and a silicon nitride layer 114 on the substrate 100 in sequence to serve as the hard mask layer 110. The pad oxide layer 112 may be a thermal silicon oxide layer formed by thermal oxidation technology, or a silicon oxide layer formed by chemical vapor deposition (CVD) technology, and the silicon nitride layer 114 may be silicon nitride formed by CVD technology. Floor. Then, a photoresist layer is coated on the silicon nitride layer 114, which is composed of photosensitive material. Then, a traditional photolithography process is performed to expose and develop the photoresist layer to form a desired pattern in the photoresist layer. Next, using the patterned photoresist layer as a mask, an anisotropic dry etching process, such as reactive ion etching (RIE), is performed to etch the silicon nitride layer 114 and the pad oxide layer 112, and the silicon nitride layer 114 An opening 116 is formed in the pad oxide layer 112 to expose a portion of the substrate 100. Then use oxygen plasma or stripping agent to remove the photoresist layer. Next, using the patterned hard mask layer 110 as a mask, including the silicon nitride layer 114 and the pad oxide layer 112, an anisotropic dry etching process is performed to etch the substrate 100 under the opening 116 and the process parameters are controlled. A steep trench 118 is formed in the substrate 100, and the inclination angle of its inner sidewall is close to 90 degrees, and sharp corners are formed at the top edge and bottom corner 115 of the trench 118, which is close to 90 degrees.

Referring to FIG. 1B, using thermal oxidation technology, a silicon oxide layer 120 is grown on the sidewalls 117 and bottom 119 of the trench 118, the thickness of which is controlled to be about 50-150 angstroms. While the silicon oxide layer 120 is grown, the sharp corner 115 at the bottom of the trench is also rounded, forming a rounded bottom corner 122. Please refer to FIG. 2, which shows an enlarged view of the area of the circle 200 in FIG. 1B. As the silicon oxide layer 120 is grown using thermal oxidation technology, part of the substrate 100 must be consumed. Therefore, the thickness of the silicon oxide grown on the sidewalls 117 and bottom 119 of the trench 118 will be thicker, while the sharp corners 115 are not good for silicon oxide. Therefore, as the silicon oxide layer 120 grows, rounded bottom corners 122 are formed. In addition, while the silicon oxide layer 120 is formed, the etching defects previously caused by the etching of the trench 118 can also be eliminated.

Please refer to Figure 1C, and then use wet etching, such as diluted hydrofluoric acid (DHF) or buffered etchant (BOE), to remove the silicon oxide layer 120, and at the same time, remove part of the pad oxide layer 112 at the edge of the opening 116. The trench 118a is formed. While removing part of the pad oxide layer 112, part of the substrate 100 at the top edge of the trench 118a will be consumed at the same time, so that the originally sharp top corners are rounded to become rounded top edge corners 126. After the etchant removes part of the pad oxide layer 112, a depression 124 is formed on the top edge of the trench 118a, the depth d of which will affect the area of the silicon oxide layer to be formed subsequently, and is appropriately controlled according to the line width of the process.

Please refer to FIG. 1D. Then, using thermal oxidation technology, a silicon oxide layer 130 is grown on the surface of the substrate 100 exposed by the inner wall of the trench 118a, with a thickness of about 100-300 angstroms. Since the bottom corners 122 and top edge corners 126 of the trench 118a are rounded, the grown silicon oxide layer 130 has a relatively uniform thickness, which can be used as a buffer layer for the filling layer that is subsequently filled into the trench 118a, reducing the filling layer and the substrate 100 The stress caused by the difference in the coefficient of thermal expansion.

Referring to FIG. 1E, a filling layer 132 is filled in the trench 118a to form a shallow trench isolation structure. For example, the shallow trench isolation structure is formed by the following steps. Appropriate changes can be made without departing from the spirit of the present invention. First, a filling material layer is formed on the substrate 100 and fills the entire trench 118a. Since the silicon oxide layer 130 of the present invention is very thin, it is not easy to form voids when filling the filling material layer to avoid gas infiltration and filling. In the layer 132, the isolation characteristics of the shallow trench isolation structure are affected. The filling material layer is, for example, a silicon oxide layer formed by atmospheric pressure chemical vapor deposition (APCVD) or low pressure chemical vapor deposition (LPCVD) with tetraethyl silane (TEOS) as the precursor, and plasma Strengthen the silicon oxide layer formed by chemical vapor deposition (PECVD) or the HDP silicon oxide layer formed by high-density plasma chemical vapor deposition (HDP-CVD). In addition, a densification step is selectively performed to make the silicon oxide layer have a denser structure. Then, the filling material layer on the hard mask layer 110 is removed by an etchback (Etchback) technique or a chemical mechanical polishing (CMP) technique, leaving only the portion 132 in the trench 118a to form a shallow trench isolation structure. Finally, the silicon nitride layer 114 and the pad oxide layer 112 are removed by wet etching.

In summary, using the manufacturing method of the shallow trench isolation structure of the present invention can form a shallow trench isolation structure with rounded corners, reduce the damage caused by the stress of the shallow trench isolation on the substrate, and form rounded top edge corners, reducing Leakage current caused by corner effect.

As those skilled in the art know, the above descriptions are only the preferred embodiments of the present invention, and are not intended to limit the scope of the patent application of the present invention; everything else is done without departing from the spirit of the present invention. Effective changes or modifications should be included in the scope of the following patent applications.