Key scanning circuit
Abstract
The invention provides a method for judging the position of a button according to the discharge time. Key scanning circuit for encoding and decoding the position data of a key input code. The key scanning circuit includes a control unit and a first charge storage. Circuit, and a button matrix circuit. The control unit includes a control terminal and At least one detection terminal, wherein the control terminal can be grounded or floating. The first charge storage circuit has a charging and discharging terminal, and the charging and discharging terminal is coupled in parallel. To the detection end of the control unit. The key matrix circuit includes A plurality of resistors at the first end and a second end, and each has a first end And a plurality of manual switches at a second end, wherein the plurality of resistors are individually The first end is connected with the second end of the adjacent resistance to form a A series resistance circuit having a first end and a second end, and the plurality of switches The first end is respectively coupled to the contact points of the two resistors, and the plurality of switches The second terminal is coupled to the control terminal of the control unit, and the series resistor A first terminal of the circuit is coupled to a charging and discharging terminal of the first charge storage circuit. its When a switch is activated, when the control terminal is grounded, the first charge The charge stored in the storage circuit starts to discharge, and when the control terminal is floating, The first charge storage circuit re-stores charges, and the detecting end will detect the first Whether the charge and discharge terminal of a charge storage circuit has reached a predetermined voltage, the control The unit will calculate the grounding from the control terminal to the detection terminal detecting the The length of time for the predetermined voltage, the control unit judges based on the length of time The corresponding position of the activated switch is displayed.

Term
No projected expiry on record.
- Priority and filed
- Granted
- Today
20 claims: 2 independent, 18 dependent
- 1f、申請專利範圍 1 . 一種按鍵電路,用來將一按鍵輸入之位置資料編碼及 解碼,該按鍵電路包含有: 一控制單元,該控制單元包含一控制端及至少一偵測 端,其中該控制端可選擇於接地或浮接之任一狀態; 一第一電荷儲存電路,該第一電荷儲存電路具有一充 放電端,該充放電端並耦合至該控制單元之偵測端; 一按鍵矩陣電路,其包含個別具有一第一端及一第二 端之複數個電阻,以及個別具有一第一端及一第二端之複 數個手動開關,其中該複數個電阻個別以其第一端與和其 相鄰之電阻之第二端相接的方式形成一具有一第一端及第 二端之串聯電阻電路,而該複數個開關之第一端則分別耦 合於各該二電阻之相接點,該複數個開關之第二端則耦合 至該控制單元之控制端,並且該串聯電阻電路之第一端耦 合至該第一電荷儲存電路之充放電端; 其中當一開關被致動時,藉由該控制端接地時,該第 I 一電荷儲存電路所儲存的電荷開始放電,而當該控制端浮 f i接時,該第一電荷儲存電路重新儲存電荷,該偵測端將偵 丨測該第一電荷儲存電路之充放電端是否已達一預定電壓, 該控制單元並會計算由該控制端開始接地時至該偵測端偵 測到該預定電壓之時間長度,該控制單元並根據該時間長 i度判斷出被致動的開關之相對應位置。 j | 2. 如申請專利範圍第1項之按鍵電路,其中該控制單元 包含一處理器,該處理器中包含有一第一轉換表以儲存各 第13頁 4 3 9 3 6 6 六、申請專利範圍 相鄰電阻之相接點至該串聯電阻電路第一端之間之電阻值 的對照值。 3. 如申請專利範圍第2項之按鍵電路,其中該控制單元 另包含至少一電壓感測器連接於該串聯電阻電路之第一端 用來測量該串聯電阻電路第一端之電壓。 4. 如申請專利範圍第3項之按鍵電路,其中該第一電荷 儲存電路包含有一電容與該串聯電阻電路之第一端相串聯 以形成一R C電路,當一開關被致動而按壓於相鄰電阻間之 一相接點時,該相接點至該串聯電阻電路第一端之間的電 阻值會決定該RC電路的放電(discharge)時間,而當該串 聯電阻電路第一端之電壓低於一預設之電壓值時,該電壓 感測器會被導通,而該處理器則會測出該R C電路開始放電 至該電壓感測器被導通時之時間長度,並根據該時間長度 對照該第一轉換表來判斷出被致動的開關之相對應位置。 5. 如申請專利範圍第2項之按鍵電路,其中更包括有一 第二電荷儲存裝置,該第二電荷儲存電路亦具有一充放電 端耦合至該串聯電阻電路之第二端,並經由一電壓感測器 耦合至該控制單元之另一偵測端。 6. 如申請專利範圍第5項之按鍵電路,其中該處理器則 另包含有一第二轉換表,其内存有各相鄰電阻間之相接點 第14頁 邊 4 3 9 3 6 β____ 六、申請專利範圍 至該串聯電阻電路第二端之間之電阻值的對照值。 7. 如申請專利範圍第6項之按鍵電路,其中該第二電荷 儲存電路包含有一電容與該串聯電阻電路之第二端相串聯 以形成一 R C電路,當一開關被致動而按壓於相鄰電阻間之 一相接點時,該相接點至該串聯電阻電路第二端之間的電 阻值會決定該RC電路的放電(discharge)時間,而當該串 聯電阻電路第二端之電壓低於一預設之電壓值時,該電壓 感測器會被導通,而該處理器則會測出該RC電路開始放電 至該電壓感測器被導通時之時間長度,並根據該時間長度 對照該第二轉換表來判斷出被致動的開關之相對應位置。 8. 如申請專利範圍第1項之按鍵電路,其係為一鍵盤中 之編碼或解碼電路,而該鍵盤係用以連接於一電腦。 9. 如申請專利範圍第8項之按鍵電路,該鍵盤包含有一 殼體及複數組按鍵以可按壓的方式設置於該殼體上,每一 組按鍵之下設有一如上所述之電荷儲存電路及按鍵矩陣電 路。 10. 如申請專利範圍第1項之按鍵電路,其係為一遙控器 中之編碼或解碼電路。 11. 如申請專利範圍第1項之按鍵電路,其中該複數個電 第15頁 i 4 3 9 3 6 6 六、申請專利範圍 阻係為以印刷製成於一薄膜 12. —種按鍵電路,用來將 解碼,該按鍵電路包含有: 一控制單元,該控制單 一第一及一第二電荷儲 具有一充放電端以耦合至該 —按鍵矩陣電路,其包 端之複數個電阻,以及個別 數個手動開關,其中該複數 相鄰之電阻之第二端相接的 二端之串聯電阻電路,而該 合於各該二電阻之相接點, 至該控制單元之控制端,並 合至該第一電荷儲存電路之 之第二端耦合至該第二電荷 其中當至少一開關被致 電路會經由該控制單元之該 制單元之偵測端會偵測該第 應充放電端是否已達一預定 該第一及第二電荷儲存電路 之偵測端偵測到該預定電壓 據該時間長度以判斷出被致 電路版上之等效電阻。 一按鍵輸入之位置資料編瑪及 元包含一控制端及二偵測端; 存電路,每一電荷儲存電路皆 控制單元之相對應偵測端; 含個別具有一第一端及一第二 具有一第一端及一第二端之複 個電阻個別以其第一端與和其 方式形成一具有一第一端及第 複數個開關之第一端則分別耦 該複數個開關之第二端則耦合 且該串聯電阻電路之第一端耦 充放電端,而該串聯電阻電路 儲存電路之充放電端; 動時,該第一及第二電荷儲存 控制端控制而充放電,而該控 —及第二電荷儲存電路之相對 電壓,該控制單元並會計算由 放電開始至該控制單元相對應 之時間長度,該控制單元並根 動的開關之相對應位置。 第16頁 11439366 六、申請專利範圍 13. 如申請專利範圍第1 2項之按鍵電路,其中該控制單元 之控制端可選擇在於接地或浮接任一狀態間跳動,當該控 制端接地時,該第一及第二電荷儲存電路所儲存的電荷開 始放電,而當該控制端浮接時,該第一及第二電荷儲存電 路重新儲存電荷。 14. 如申請專利範圍第1 3項之按鍵電路,其中該控制單元 包含一處理器,該處理器中包含有一第一轉換表以儲存各 相鄰電阻間之相接點至該串聯電阻電路第一端之間之電阻 值的對照值,以及一第二轉換表以儲存各相鄰電阻間之相 接點至該串聯電阻電路第二端之間之電阻值的對照值。 15. 如申請專利範圍第1 4項之按鍵電路,其令該控制單元 另包含二電壓感測器分別電連接於該串聯電阻電路之第一 端及第二端,用來測量該串聯電阻電路第一端及第二端之 電壓。 16. 如申請專利範圍第15項之按鍵電路,其中該第一及第 二電荷儲存電路皆包含一電容分別串聯於該串聯電阻電路 之第一端及第二端並分別形成一 R C電路,當二開關同時被 致動而按壓於相鄰電阻間之二不同相接點時,該二相接點 至該串聯電阻電路第一端及第二端間的電阻值會決定各RC 電路的放電(discharge)時間,而當該串聯電阻電路第一 端或第二端之電壓低於一預設之電壓值時,其相對應之電 第17頁 1439366 六、申請專利範圍 壓感測器會被導通,而該處理器則會測出各RC電路開始放 電至其相對應電壓感測器被導通時之時間長度,並根據所 測出之時間長度來對照該第一及第二轉換表,以判斷出被 致動的開關之相對應位置。 中 盤 ^£ 鐽。 一 ^ 為電 係一 其於 ,接 路連 電用 鍵使 按係 之盤 項鍵 2亥 1 I 第而圍, 範路 利電 專碼 請解 申或 如碼 編 17之 有每 含, 包上 盤體 鍵殼 該該 ,於 路置 電設 鍵式 按方 之的 項壓 7按 .—-4. 第可 圍以 Jf 71-1 amp;°·r_ 利按 專組 請數 申複 如及 .體 18殼 電 存 儲 荷二 及 路 ipjr 矩 fr£ 鍵 按 之 述 所 上 如 有 設 下 之 *11 鏈 按。 組路 器 控 遙 一 為 係 其 路 電 *-二 鍵 按 之 項 2 IX 第 〇 圍路 範電 洚石' 專解 請或 申碼 如編 •之 9中 --I 電 個 數 複。 該阻 中電 其效 ,等 路之 電上 鍵版 按路 之電 項膜 12薄 第一 圍於 範成 利製 專刷 請印 申以 如為 係 20阻 2 第18頁
27 paragraphs, as filed
Button scanning circuit
The invention provides a button circuit, in particular a button circuit capable of determining the position of a button according to the length of the discharge time.
Please refer to Figure 1. FIG. 1 is a schematic diagram of a conventional button circuit 10. The button circuit 10 includes m driving lines A, B, C..., M for inputting a scanning pulse wave, n output lines a, b, c, ..., n for outputting the scanning pulse wave, and m* The n keys Aa, Ab, ..., Mn are arranged in a matrix, wherein m driving lines are alternately input with a scanning pulse wave. If the scan pulse is input to the drive line B, and the button Bb is pressed, that is, the button Bb is turned on, the current flows from the drive line B to the button Bb and then to the output line b, so that the output line b is output. The pulse signal (as indicated by the solid line 12) is known to be pressed by the button Bb.
However, if the scan pulse is input to the drive line B, the button Bb, the button Cb and the button Cd are simultaneously pressed, and in addition to the output of the output line b, the current will also follow the slave drive line. B flows to the button Bb and then flows to the output line b and then flows to the button Cb and then flows to the driving line C and then flows to the button Cd and then to the output line d (as indicated by the broken line 14), so that the output line d has a pulse wave signal. Output, so you will get the result of the Bd button being pressed, but it is not. So this produces a fake code called the "ghost key" or "phantom key". In addition to this drawback, the m drive lines and n output lines of the keyboard circuit 10 must occupy m+n turns of the processor, which is not very economical.
In addition, in U.S. Patent No. 5,619,169, a button circuit design using a transmission line is proposed, in which a plurality of resistors of the same resistance value are connected in series, and a capacitor is connected in series. When the button is pressed, the capacitor is discharged through the series resistor grounding, and the discharge is consumed by the detector. Time to calculate the resistance value, you know which key is pressed. However, in this U.S. patent, the button can only perform one discharge operation at each press, so it is easy to generate an error, and only one key can be detected at a time, and cannot be applied to two or more keys at the same time. The situation.
SUMMARY OF THE INVENTION Accordingly, it is a primary object of the present invention to provide a key circuit capable of determining a button position in accordance with a discharge time during a single pressing and determining the position of a button in accordance with the length of the discharge time to solve the above problem.
Please refer to Figure 2 to Figure 3. 2 is an external view of a key pad 40 of a remote controller. FIG. 3 is a schematic diagram of the button circuit 50 of the present invention. The button circuit 50 of the present invention can be an encoding or decoding circuit of a key pad 40 (Fig. 3) of a remote controller. The keypad 41 includes a housing 42 and a plurality of buttons 44 are detachably disposed on the housing 42. The button circuit 50 includes a control unit 52, a first charge storage circuit 54, a second charge storage circuit 56, and a button matrix circuit 58 under the button 44.
The control unit 52 includes a processor 66 having a control terminal 60 and two detection terminals 62, 64, and two voltage sensors 68, 70.
The first charge storage circuit 54 has a charge and discharge terminal 72 coupled to the detection terminal 62 of the control unit 52 via a voltage sensor 68. The second charge storage circuit 56 also has a charge and discharge terminal 74 coupled to the other detection terminal 64 of the control unit 52 via the voltage sensor 70.
The key matrix circuit 58 includes a plurality of resistors 76 each having a first end and a second end, and a plurality of manual switches 78 each having a first end and a second end. The plurality of resistors 76 individually form a series resistor circuit having a first end 80 and a second end 82 in such a manner that the first end thereof is in contact with the second end of the adjacent resistor. The first end 80 of the series resistor circuit is coupled to the charge and discharge terminal 72 of the first charge storage circuit 54. The first charge storage circuit 54 includes a capacitor, and the first end 80 of the series resistor circuit is connected in series to form an RC circuit. The second terminal 82 of the resistor circuit is coupled to the charge and discharge terminal 74 of the second charge storage circuit 56. The second charge storage circuit 56 also includes a capacitor in series with the second terminal 82 of the series resistor circuit to form another RC circuit. The first ends of the plurality of switches 78 are respectively coupled to the junctions of the two resistors 76, and the second ends of the plurality of switches 78 are coupled to the control terminals 60 of the control unit 52.
In the control unit 52. The control terminal 60 can control the jump between the grounded or floating state. The voltage sensors 68, 70 are respectively connected to the first end 80 and the second end 82 of the series resistance circuit for measuring the discharge voltages of the first end 80 and the second end 82 of the series resistance circuit. The processor 66 includes a first conversion table 84 for storing a discharge time comparison value of the resistance between the adjacent contacts 76 and the first terminal 80 of the series resistance circuit, and a second conversion table 86. The memory has a discharge time comparison value of the resistance between the adjacent points of the adjacent resistors 76 to the second end 82 of the series resistor circuit.
When a button 44 is pressed, a corresponding switch 78 is actuated to be pressed against one of the adjacent resistors 76, and then the control terminal 60 is grounded (the processor 66 controls the control terminal 60). Will jump between the ground and the floating, and the processor 66 starts counting when the control terminal 60 starts to ground), at this time, the charge stored in the first charge storage circuit 54 starts to discharge, and the phase contact to the series resistance circuit The value of the resistance between one end 80 determines the discharge time of the RC circuit. The voltage drops when discharging, and when the voltage of the first terminal 80 of the series resistance circuit drops below a predetermined voltage value, the voltage sensor 68 is turned on, and the first detecting end 62 is raised by the low level. To the high level, as detected by the processor 66, the processor 66 calculates the length of time from when the RC circuit begins to discharge until the voltage sensor 68 is turned on (correctly, the control terminal 60 begins to ground to the detect The measuring terminal 62 detects the length of the high level on time. Finally, the processor 66 determines the corresponding position of the activated switch 78 according to the first conversion table 84 according to the length of time, and outputs a correct button signal.
Similarly, when the control terminal 60 is grounded, the charge stored in the second charge storage circuit 56 also begins to discharge, and the resistance value of the pressed contact point to the second end 82 of the series resistance circuit determines the value. Discharge time of the RC circuit. The voltage drops when discharging, and when the voltage of the second end 82 of the series resistance circuit drops below a predetermined voltage value, the voltage sensor 70 is turned on, and the second detecting end 64 is detected. To the high level, similarly, the processor 66 calculates the length of time that the RC circuit begins to discharge until the voltage sensor 70 is turned on (correctly, when the control terminal 60 starts to ground until the detection terminal 64 is detected high). According to the length of time, the final processor 66 determines the corresponding position of the activated switch 78 according to the second conversion table 86, and outputs a correct button signal.
When the control terminal 60 is floating, the first charge storage circuit 54 and the second charge storage circuit 56 re-store the charge.
Therefore, when a button 44 is pressed, that is, when a switch 78 is turned on, the first detecting end 62 and the second detecting end 64 are detected to change the level, so that the first and second conversion tables are respectively performed. 84, 86 get the same button signal. When two buttons 44 are pressed at the same time, two switches 78 are turned on, and the two buttons 44 are detected by the first and second detecting ends 62, 64, respectively, and then according to the first and second. The conversion tables 84, 86 get two button signals. When a plurality of buttons 44 are pressed, the button signals of the two buttons 44 on the button circuit 50 closest to the first end 80 and the second end 82 of the series resistor circuit are obtained.
Please refer to FIG. 4, which is a schematic diagram of the relationship between the pressing time of the button and the charging and discharging time. In this embodiment, each of the resistance values of the series resistors between the different keys is 50 Ω, the capacitance value of the capacitor is 1 μF, and then the voltage value of the voltage Vcc is 5 V, and the relationship of the discharge time of the capacitor is applied.<img file="TW439366B_D0001.tif" />, you get, the unit is μs, very short. The charging time is determined by the capacitance value and the resistance value between the voltage terminals. Here, the resistance value is 100KΩ, so the charging time is about 500μs. The processor 66 controls the control terminal 60 to have a key scan period between ground and floating for about 2 ms. Of course, each floating time is greater than 500 μs to allow the charging to be full. Because the present invention begins to calculate the RC circuit discharge time when the control terminal 60 starts to ground, the first button signal may be wrong, and it may be obtained that the control terminal 60 has been grounded and the button is pressed after the calculation time is started. Therefore, the grounding time is not the same as the time when the RC circuit starts to discharge. Therefore, the incorrect RC circuit discharge time is obtained, and the wrong button signal is obtained, but according to the experiment, each button is pressed for the fastest time, 100 ms, during this period, according to In the design of this embodiment, the processor 66 can actually scan the button many times, so although the first signal can be wrong, but because there will still be a lot of correct button signal output, the correct output can be taken later. Or averaging to reduce the error, that is, designing the processor 66 to receive the output of several key signals to actually display a key signal. So in fact, it is not a problem to quickly press and press.
The first charge storage circuit 54 and the second charge storage circuit 56 are simultaneously disposed at both ends of the series resistance circuit, so that the two buttons can be detected at the same time, and if only one button is pressed at a time, In this case, only one of the first charge storage circuit 54 and the second charge storage circuit 56 may be disposed at one end of the series resistance circuit. And the resistor 76 shown therein may, of course, be printed directly on the thin film circuit board and the equivalent resistance of the printed material.
Please refer to Figure 5 and Figure 6. Figure 5 is a view of a computer keyboard 90. Figure 6 is a diagram of a key circuit 100 in accordance with another embodiment of the present invention. The computer keyboard 90 includes a housing 92 and three sets of buttons 94, 96, 98 that are pressably disposed on the housing 92. The button circuit 100 of the present invention is used, and each set of buttons 94, 96, 98 is provided. There is a button matrix circuit 110, 120, 130 and two charge storage circuits 112, 114, 122, 124, 132, 134. Each group of buttons can accept the pressing of two buttons at a time, so that a total of six buttons can be detected at a time, which can handle most occasions where multiple buttons need to be pressed at the same time, for example, hot boot The key should press the three keys ctrl, alt and del at the same time. At this time, the ctrl key and the alt key can be placed in the same group of buttons, for example, the button group 94, and then the de1 button is placed in another group button, for example, the button group. 98. You can use the hot power button. Each button group requires only three turns of the processor 140, so the keyboard 100 requires only nine turns in total.
In summary, the key circuits 50 and 100 of the present invention do not have the problem of generating a false word, a "ghost key", and require fewer processors than the conventional circuit 10. Conventional keyboard circuit 10 requires a set of m*n matrix keys to require m+n port. Now, no matter how many keys, you can use only three port, or more into several groups, for example, three groups are used and then nine port are used. .
The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be covered by the present invention.
<p>52 control unit 54 first charge storage circuit</p><p>56 second charge storage circuit 58 button matrix circuit</p><p>60 control terminal 62, 64 detection terminal</p><p>66 processor 68 , 70 voltage sensor</p><p>72, 74 charge and discharge end 76 resistor</p><p>78 switch 80 series resistance circuit first end</p><p>82 series resistance circuit second end 84 first conversion table</p><p>86 second conversion table</p>
The first figure is a schematic diagram of a conventional button circuit.
The second picture is a view of the keypad of the remote control.
The third figure is a schematic diagram of the button circuit of the present invention.
The fourth figure is a schematic diagram of the relationship between the pressing time of the button and the charging and discharging time.
The fifth picture is a view of a computer keyboard.
The sixth figure is another embodiment of the button circuit of the present invention.
23 sheets
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Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US9680980B2 | Cited by | United States of America | Applicant |
| US8891790B2 | Cited by | United States of America | Applicant |
| US8995689B2 | Cited by | United States of America | Applicant |
| US8600080B2 | Cited by | United States of America | Applicant |
| US8983093B2 | Cited by | United States of America | Applicant |
| TWI496477B | Cited by | Taiwan Province of China | Examiner |
| US8976976B2 | Cited by | United States of America | Applicant |
2 members in 2 offices
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 88120281 | Taiwan Province of China | A | |
| TW19990120281 | – | – | – |
Members2
| Document | Office | Kind | |
|---|---|---|---|
| TW439366BThis record | Taiwan Province of China | B | |
| US6538582B1 | United States of America | B1 |
2 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Annulment or lapse of patent due to non-payment of feesLapsedMM4A | MM4A | |
| Issue of patent certificate for granted invention patentGrantedGD4A | GD4A |
Numbers
- Publication
- 439366
- Publication, DOCDB
- 439366
- Publication, EPODOC
- TW439366B
- Application
- 88120281
- Application, DOCDB
- 88120281
- Application, EPODOC
- TW19990120281
Titles4
- English
- Key scanning circuit
- Chinese
- 一種按鍵掃瞄電路
- Unlabeled
- 一種按鍵掃瞄電路
- Unlabeled
- Button scanning circuit
Classification
- CPC, 2
- H03M11/24
- H03M11/003
- IPC, 2
- H03M11 00
- H03M11 24