Digital pulse width modulator with integrated test and control

Related applications

The following U.S. patent applications have the same filing date as the immediate application, and are adopted and incorporated by reference for this application.

The U.S. patent application titled "Flat Top Concept" Lawyer's Review Case No. 58,295, and filed on the same date; the U.S. patent application titled "Induction Motor and Related Methods of Cooling" Lawyer's Review Case No. 58,332, and on the same date Application; US patent application titled "Automatic 12-volt system for electric vehicles" Attorney's case number 58,333, and filed on the same date; US patent application titled "Direct cooling exchange module for electric vehicle propulsion system" Attorneys record The trial case number was 58,334, and the application was filed on the same date; the U.S. patent application was titled "Electric Vehicle Propulsion System", and the lawyers trial case number 58,335 was filed on the same date; the U.S. patent application was titled "For High Voltage Motor Control Speed control and start-up program technology" Lawyer's case number 58,336, and filed on the same date; the US patent application titled "Vector control board for motor controller of electric locomotive propulsion system" Lawyer's case number 58,337, and filed on the same date Date of application; US patent application titled "Electric Vehicle Control Mechanism" Lawyer's Review Case No. 58,339, and filed on the same date; US patent application titled "Improved Ergonomic Filter Topology for Power Converters" prepared by lawyers The trial case number was 58,340, and the application was filed on the same date; the United States patent application was titled "Inductive power source and the current leakage detection circuit between the body and chassis" Attorney's trial case number 58,341, and the application was filed on the same date; the United States patent application title Lawyer's case number 58,342 for "Electric Vehicle Spare Assembly", and filed on the same date; US patent application titled "Three-stage Power Axle Assembly" lawyer's case number 58,343, and filed on the same date; US patent application Attorneys case number 58344, entitled "Built-in test of electric vehicle propulsion system power axle", was filed on the same date; the US patent application titled "Method of testing electric vehicle propulsion system power axle" Attorney's case number 58,345 , And applied on the same date; the U.S. patent application titled "Electric Vehicle Power Configuration Module" Attorney's Review Case No. 58,346, and filed on the same date; the U.S. patent application titled "Electric Vehicle Body Chassis Controller" filed by attorneys The trial case number was 58,347, and the application was filed on the same date; the U.S. patent application was titled "Electric Vehicle System Control Unit Architecture" Lawyers' trial case number 58,347,348, and filed on the same date; the U.S. patent application titled "Electric vehicle system control unit low-cost fluid cooling architecture" Attorney's trial case number 58,349, and filed on the same date; U.S. patent application titled "Electric vehicle refrigerant The lawyers case number of "Pump assembly" is 58,350 and filed on the same date; the US patent application is titled "Heat Dissipation Converter Coil", the lawyers case number is 58,351, and it is filed on the same date; the US patent application is titled "Electric "Car battery charger" lawyer's case number 58,352, and applied on the same date;

Background of the invention

The present invention is mainly related to electric vehicles. More particularly, the present invention relates to a digital pulse width modulator with integrated testing and control for electric vehicles. On the other hand, the present invention relates to a wide range of applications, and is particularly suitable for electric vehicles that utilize batteries or a set of batteries and other power such as a heat engine coupled to a selector as a power source, and will be specifically described with respect to this aspect. related.

The cost and performance of commercially available electric vehicles must be able to compete with their petrol-powered opponents. Generally speaking, the propulsion system and battery of the vehicle are the main factors that affect the cost and performance competitiveness of the vehicle.

Generally speaking, in order to be commercially acceptable, the electric vehicle propulsion system must provide the following features: (1) The efficiency of the vehicle is equal to that of the traditional petroleum-powered propulsion system; (2) The vehicle propulsion control is smooth; (3) Regenerative braking; ( 4) High efficiency; (5) Low cost; (6) Automatic cooling; (7) Suppress electromagnetic interference; (8) Error detection and self-protection; (9) Self-test and diagnosis capabilities; (10) Control with external systems And status interface; (11) safe operation and maintenance; (12) flexible battery charging capacity; (13) auxiliary 12 volt power from the main battery. However, in the previous practice, the design of electric vehicle propulsion systems mostly included matching motors and controllers with a set of vehicle performance goals, so that performance is usually sacrificed to achieve a more feasible motor and controller design. In addition, little attention has been paid to the aforementioned features that promote commercial acceptance.

For example, a general traditional electric vehicle propulsion system includes a DC motor, a chopper-type motor controller, an independent battery charger, and a set of assigned control and status displays. When driving on highways, vehicle performance is generally not fully utilized, acceleration is uneven, and gears need to be changed manually. In addition, arguments about mass production costs, electromagnetic interference, error detection, maintenance, control and status interfaces, and safety are generally not put forward in an understandable manner.

There are two techniques to generate pulse width modulator waveforms. The most common technique is to use analog components, but some use digital components. In an analog system, the pulse width modulator waveform is generated by using an analog design of an operational amplifier and a voltage comparator to compare the intersection of the triangular reference voltage signal with the applied control voltage waveform. The voltage comparator outputs the generated pulse width modulator waveform. Then, the asynchronous off-time circuit is used to generate a delay between the transition period of the pulse width modulator signal and the converted pulse width modulator signal. The three systems require three sets of the same analog circuit. However, the analog circuit has a tendency to drift due to, for example, temperature changes, replacement, and gain changes that affect the pulse width and channel mispairing that cause a reduction in the dynamic range of the motor control system. The implementation of the built-in test capacitor requires the generation of the test pulse width, and it is not practical to use 9-bit resolution. Using digital capacitors can eliminate the shortcomings of analog design, such as drift due to temperature changes and replacement.

Digital pulse width modulator waveform generation is possible, but it also has limitations. For example, in the existing microcontrollers and digital processors that generate pulse width modulator waveforms (1) use a sawtooth reference waveform to generate pulse width modulator signals instead of triangular waveforms, (2) a synchronous pause time is generated and Not included in the processor, and/or (3) The resolution depends on the pulse width modulator frequency, and the resolution decreases as the frequency increases.

There are other independent pulse width modulator integrated circuits that generate pulse width modulator waveforms, but these do not have asynchronous stop time generation. Triangle-based pulse width modulator waveform generation or individual control of the waveform for built-in testing . At the same time, these independent pulse width modulator integrated circuits do not generate output pulses that are synchronized with the peaks and/or valleys of these triangular waveforms.

For electric vehicles, a pulse width modulator that can overcome the shortcomings of related technologies is needed.

The present invention is directly aimed at the digital pulse width modulator for electric vehicles, and basically eliminates one or more problems caused by the limitations and shortcomings of the past technology.

One of the advantages of the present invention is to provide an arrangement that eliminates one or more limitations and disadvantages due to the aforementioned past technologies.

The features and advantages of the present invention will be stated in the following description, and part of it is obvious from the description, or may be learned from the application of the present invention. The objectives and other advantages of the present invention will be realized and obtained by the device and method indicated in the text description, as well as the scope of application and the accompanying drawings.

To achieve these and other advantages, and in accordance with the purpose of the present invention, as embodied and broadly described, a digital pulse width modulator includes a pulse width modulator circuit that can generate pulses for the driver unit to drive a set of electric motors Switch circuit, the circuit includes an input area for receiving the N-bit digitized input signal to be modulated; a pulse width modulation counter that continuously counts from 0 to a number and then back to 0, the pulse width modulation counter generates A digitized triangular waveform with N-bit resolution; a comparison unit that receives and compares the digitized input signal and the digitized triangular waveform to generate an output pulse; and a comparison unit that generates a first pulse and a second pulse from the output pulse of the comparison unit The pulse dwell time generator unit, the first and second pulses each drive a matching switch circuit, and the first and second pulses have different conversion times from each other.

From another point of view, the pulse width modulator circuit of the present invention further includes a logic circuit that receives the first and second pulses and activates the driver units corresponding to the first and second pulses respectively; The built-in test circuit of the input signal is used to identify the correct operation of the pulse width modulator circuit. The modulator circuit includes a feedback path from the driver. The built-in test input signal provides individual control for each A pulse width modulated signal.

It should be understood that the foregoing general description and the following detailed description are both experimental and illustrative, and are intended to provide further explanation of the application of the present invention.

The accompanying drawings are also included to provide a further understanding of the present invention and are incorporated into and constitute a part of this specification, illustrate a specific example of the present invention, and together with the description serve as an explanation of the principles of the present invention.

In the drawings, Fig. 1 is a block diagram of an electric vehicle propulsion system according to a specific example of the present invention; Fig. 2 is a power distribution block diagram of the electric vehicle propulsion system of Fig. 1; Fig. 3 is a function of the electric vehicle propulsion system of Fig. 1 Block diagram; Fig. 4 is a functional block diagram of the motor controller of the electric vehicle propulsion system of Fig. 1; Fig. 5A is a block diagram of the motor controller architecture of the electric vehicle propulsion system of Fig. 1; Fig. 5B is the electric vehicle propulsion system of Fig. 1 Figure 6 is a block diagram of the vector control board of the motor controller of Figure 4; Figure 7 is a block diagram of a digital pulse width modulator circuit according to the present invention; Figure 8 is a diagram illustrating the digital pulse width modulation of Figure 7 The stop time generated by the inverter; Figure 9 is a detailed circuit block diagram of the digital pulse width modulator circuit in Figure 7;

Reference will now be made in detail to a specific example of the present invention, and an example of the specific example will be illustrated in the accompanying drawings.

As shown in FIG. 1, an electric vehicle propulsion system 10 includes a system control unit 12, a motor assembly 24, a cooling system 32, a battery 40 and a DC to DC converter 38. The system control unit 12 includes a cooling plate 14, a battery charger 16, a motor controller 18, a power distribution module 20 and a vehicle chassis controller 22. The motor assembly 24 includes a resolver 26, a motor 28 and a filter 30. The cooling system 32 includes an oil pump unit 34 and a radiator/fan 36.

FIG. 2 is a power distribution diagram of the electric vehicle propulsion system 10. As shown in FIG. 2, the battery 40 is charged as the main source of electric power for the electric propulsion system 10. The battery 40 includes, for example, a sealed lead-acid battery, a unipolar lithium-ionized sulfur battery, a two-polarity lithium-ionized sulfur battery, or the like to provide an output of 320 volts. The electric propulsion system 10 can operate in a wide range, for example, 120 to 400 volts, to match the output voltage variation of the battery 40 caused by the load or the depth of discharge. However, the electric vehicle propulsion system 10 has optimized the voltage of a general battery of approximately 320 volts.

The power distribution module 20 couples the output of the battery 40 and includes, among other things, fuses, wires, and terminals for distributing the 320 volt output from the battery 40 to various elements of the electric vehicle propulsion system 10. For example, the power distribution module 20 distributes the 320 volt output from the battery 40 to the motor controller 18, the DC to DC converter 38, the oil pump unit 34, and the battery charger 16. The power distribution module 20 also distributes the 320 volt output from the battery 40 to various vehicle accessories of the external electric vehicle propulsion system 10. These vehicle accessories include, for example, air conditioning systems, heating systems, power steering wheel systems, and any other accessories that may require a 320 volt power supply.

As described above, the DC-to-DC converter 38 is coupled to the 320 volt output of the power distribution module 20, and converts the 320 volt output of the power distribution module 20 into 12 volts. The DC-to-DC converter 38 then supplies its 12 volt output to the battery charger 16 as operating power, the motor controller 18, the vehicle chassis controller 22, the oil pump unit 34, and the radiator/fan 36. The DC-to-DC converter 38 also supplies its 12 volt output to various vehicle accessories externally connected to the electric vehicle propulsion system 10 as operating power. These vehicle accessories include, for example, vehicle lighting, audio systems, and any other accessories that may require a 12-volt power supply. Thankfully, the DC-to-DC converter 38 reduces the need for a separate 12-volt storage battery.

As shown in FIGS. 3 and 4, the components of the electric vehicle propulsion system 10 are connected to each other through various data buses. The data bus can be in the form of motors, optics, or electronics as known in the art. The operation of the electric vehicle propulsion system 10 will be described with reference to FIGS. 3 and 4.

The battery charger 16 receives the instruction signal from the status signal and transmits the status signal to the motor controller 18 to charge the battery 40. The battery charger 16 provides a controlled battery charging current from an external AC power source (not shown). The AC current is preferably drawn from an external source with a method that is close to the unit electric power factor and low harmonic failure that meets the expected future power quality standards. In addition, the battery charger 16 is preferably designed to comply with the standard ground fault current blocker and single-phase power generally in residential areas.

The oil pump unit 34 and the radiator/fan 36 also receive command signals from the status signal, and transmit the status signal to the motor controller 18. As will be described in detail below, the oil pump unit 34 and the radiator/fan 36 are part of a closed loop oil cooling system for the electric vehicle propulsion system 10.

As shown in Figure 5A, the motor 28 is separated from two identical motors, each phase has coils (coils A1 and A2 are phase A, coils B1 and B2 are phase B, and coils C1 and C2 are phase C ) A three-phase AC conduction motor that produces high torque at 0 speed to provide performance comparable to traditional petroleum-driven engines. The rotor (not shown) of the motor 28 is coupled to the transaxle (not shown) of the vehicle. The two coils of each phase of the motor 28 are substantially side by side along the top of each other and are electrically in phase so that each coil provides approximately half of the total power of the phase. At the same time, the motor 28 is completely sealed and uses oil injection cooling to directly remove the hot air from the rotor and tail coil to increase reliability.

The resolver 26 is illustrated in FIG. 5B and is close to the motor 28 to detect the angular position of the motor shaft and to provide a signal indicating the angular position of the motor to the motor controller 18. The reference signal line R1 connected to the resolver is a positive or negative reference value showing the angular position of the motor shaft. The S1 signal line from the resolver provides a positive or negative sine value to the motor angle axis and the S2 signal line from the resolver provides a positive or negative cosine value to the motor angle axis.

The parser 26 can include a commercially available parser or other parsers known in the art. The reference signal of the resolver 26 is provided by the motor controller 18.

The body chassis controller 22 and the motor controller 18 receive signals from the vehicle communication bus. Generally speaking, the vehicle communication bus will serve as a communication path to various vehicle sensors and controller interfaces of the vehicle chassis controller 22 and the motor controller 18 as explained in detail below.

The body chassis controller 22 includes a microprocessor-based digital and analog electronic system and provides a control and status interface to the vehicle sensors and controllers and the motor controller 18. For example, the body chassis controller 22 is connected to the vehicle key switch, accessory, brake, and driving selector switch through the vehicle communication bus. The vehicle chassis controller 22 interprets the signals from these switches to provide the motor controller 18 start, drive mode (for example, forward, reverse, and neutral), motor torque, regenerative braking, shutdown, and built-in test commands. The body chassis controller 22 communicates with the motor controller 18 through an optical coupling serial data interface, and receives status signals from the motor controller 18 to which all commands are transmitted to confirm that the body chassis controller 22, the vehicle, and the motor control Communication link between the devices 18, and to confirm that the vehicle is operating properly. Since the body chassis controller 22 provides control and status interfaces for the vehicle sensors and controllers and the motor controller 18, the electric vehicle propulsion system 10 can be used in any different types of vehicles as long as it simply modifies the body chassis controller 22 of a specific vehicle. On the vehicle.

By using the signal received by the vehicle communication bus from the battery current sensor in the power distribution module 20, the vehicle chassis controller 22 can also provide battery management capabilities. The vehicle chassis controller 22 interprets the signal from the battery current sensor, provides a charging command to the motor controller 18, and transmits the value of the state of charge to an "energy" meter position on the vehicle dashboard. The body chassis controller 22 is further connected to a vehicle controller including an odometer, a speedometer, a lighting, a self-diagnosis, and a radiation controller through the vehicle communication bus, and an RS-232 interface for system development. As shown in FIG. 4, the motor controller 18 includes a low-voltage power supply 42, an input filter and DC relay control unit 44, a vector control board 46, and first and second power bridges and respective brake drives 48 and 50.

The low voltage power supply 42 converts the 12 volt output from DC to DC converter 38 to provide +5 volt, +/-15 volt, and +20 volt output to the input filter and DC relay control unit 44, vector control board 46, The first power axle 48, and the second power axle 50. The low-voltage power supply 42 can include a commercially available power supply as known in the art.

The input filter and DC relay control unit 44 includes a motor connection to couple 320 volts of the power distribution module 20 to the first power bridge 48 and the second power bridge 50. The input filter and DC relay control unit 44 includes electromagnetic interference filtering, a relay circuit that couples 320 volts of the power distribution module 20 to the respective first and second power bridges 48 and 50, and various built-in test circuits Including voltage sensing circuit and a body ground fault circuit. The input filter and DC relay control unit 44 receives the control signal from the status signal and transmits the status signal, for example, the built-in test signal, to the relay control board 46.

Each of the first and second power bridges 48 and 50 includes an insulated gate bipolar transistor switching circuit and a combined gate driving circuit to apply a driving current to each coil of the motor 28. Each of the first power bridge 48 and the second power bridge 50 provides half of the current to the coil of the motor 28, thus allowing the use of ready-to-use, low-cost gate bipolar transistor switching circuits. The first power bridge 48 and the second power bridge 50 each receive a control signal from the status signal and transmit the status signal, such as a built-in test signal, to the vector control board 46.

The vector control board 46 includes a microprocessor-based digital and analog electronic system. As its main function, the vector control board 46 receives the acceleration and braking requests generated by the driver from the body chassis controller 22. The vector control board 46 then obtains rotor position measurements from the resolver 26 and current measurements from the first power bridge 48 and the second power bridge 50, and uses these measurements to generate a pulse width modulated voltage waveform to drive the first power bridge 48 and the second power axle 50 to produce the desired speed or braking effect in the motor 28. The pulse width modulator voltage waveform is generated according to a control program designed to generate the desired torque output. As mentioned above, the vector control board 46 also has control input filter and DC relay control unit 44, oil pump unit 34, radiator/fan 36, battery charger 16, input filter and DC relay control unit 44, built-in testing Capacitance, vehicle communication, and false detection functions.

As shown in FIG. 6, the vector control board 46 includes a microcontroller 100, a digital signal processor 200, a digital gate array 300, a resolver interface 400, and a digital interface 500. The clock signal of the microcontroller 100, the digital signal processor 200, and the digital gate array 300 are all provided by the oscillator 202.

Referring to FIG. 6, the microcontroller 100 includes, for example, a microcontroller selected from the Motorola 68HC11 microcontroller family or other similar devices in the known technology. As its main function, the microcontroller 100 performs various management functions of the vector control board 46. The microcontroller 100 communicates with the body chassis controller 22 by receiving current commands from the status signal, built-in test commands, torque commands, and module commands, and transmitting the status signals to the body chassis controller through the optical isolator 102. The microcontroller 100 also provides the torque requirements of the digital signal processor 200 through the digital gate array 300, and communicates with the digital gate array 300 to perform, for example, various built-in tests and control operations. The microcontroller 100 includes a random access memory, a read-only memory, and a combination of an erasable programmable read-only memory that stores program instructions for controlling its operation. In addition, part or all of the programming can be stored in the erasable programmable read-only memory 112.

The microcontroller 100 also receives digital input signals from the temperature sensor interface 104, the analog-to-digital signal built-in test circuit 106, and the voltage detector interface 108 through the analog-to-digital signal converter 110. The analog-to-digital signal converter 110 is preferably part of the microcontroller 100.

The analog input signal from the temperature sensor interface 104 includes a temperature signal transmitted by a temperature sensor (not shown) located on the cooling plate 14 close to the first and second power bridges 48 and 50. The analog input signal from the analog to digital built-in circuit 106 includes a voltage test signal from the analog to digital signal converter 110. The analog input signal from the voltage detector interface includes a voltage signal from a voltage sensor (not shown) located in the input filter and DC relay control unit 44.

The digital signal processor 200 includes, for example, a Texas Instruments TMS320C50 digital signal processor or other similar devices in the known technology. As its main function, the digital signal processor 200 executes a torque control program stored in the erasable programmable read-only memory 204, and once the electric vehicle propulsion system 10 is started, it is input down to the digital signal processor Random access memory within 200. In addition, the digital signal processor 200 may be pre-programmed to include a torque control program.

In particular, the digital signal processor 200 receives digital rotor position measurements from the resolver interface 400, digital current measurements from the analog interface 500, torque commands from the microcontroller 100 and uses these measurements and commands to generate phase voltage signals. As will be described in detail below, these phase voltage signals are supplied to the digital gate array 300, so the digital gate array 300 generates a pulse width modulated voltage waveform in the form of a gate drive signal to generate the desired acceleration or braking in the motor 28 Effect. The phase voltage signal and the pulse width modulator voltage waveform are generated according to a torque control program designed to generate the required torque output.

The digital gate array 300 includes, for example, a one-stage programmable gate array or other similar devices known in the art. The digital gate array 300 generates and receives various pulse width modulation signals through an optical splitter driver 304 to control the oil pump unit 34 and the battery charger 16 and various control signals to control the radiator/fan 36, located in the input filter and DC The main and pre-charge/discharge array of the array control unit 44 (not shown), and the vehicle chassis error detection unit also located in the input filter and DC array control unit 44. Similarly, the digital gate array 300 transmits the light splitter driver 304 to receive the energy stop signal generated by the operator.

The digital gate array 300 receives the stage voltage signals Va, Vb, and Vc from the digital signal processor 200. The phase voltage signal is applied to the digital pulse width modulator having a pulse width modulator voltage waveform generated in the form of a gate drive signal to drive the first and second power bridges 48 and 50 for modulation testing and control.

An experimental specific example of the digital pulse width modulator with modulation test and control of the present invention is shown in FIG. 7 and indicated by the reference number 1110. The digital pulse width modulator circuit 1110 is included in the digital gate array 300 (FIG. 6).

As shown in Figure 7, the digital pulse width modulator of the present invention includes a digital pulse width modulator 1102 including input registers 1112, 1114 and 1116, a second set of registers 1118, 1120 and 1122, a comparator 1124, 1126 and 1128, digital pulse width modulator counter 1138, and digital pulse width modulator control 1140; rest time generator unit 1104 includes rest time generators 1130, 1132 and 1134; gate drive logic 1136; built-in test can be tested Sexual input 1142; and test signal input 1144. Fig. 7 also shows the gate drivers 1146 and 1148 receiving the waveform of the digital pulse width modulator, and the digitized triangular waveform 1150 output from the digital pulse width modulator counter 1138. The counter counts from 0 to 511 and then back to 0.

The digital pulse width modulator of the present invention includes an input area for receiving an N-bit digitized input signal to be modulated.

Referring to FIG. 7, the voltage reference signals Va, Vb, and Vc are applied to the first set of input registers 1112, 1114, and 1116. The voltage reference signal is preferably a N=9-bit digital signal. The voltage reference signal from the first set of input registers is loaded into the second set of input registers 1118, 1120, and 1122 and the terminal count from the digital pulse width modulator counter 1138 in FIG. 7 is asynchronous. The two sets of input registers are preferably 9-bit registers.

The digital pulse width modulator circuit of the present invention includes a digital pulse width modulator counter that continuously counts from 0 to a predetermined number and then back to 0. The digital pulse width modulator generates a predetermined number of digitized triangular waveforms with N-bit resolution.

Referring to FIG. 7, the digital pulse width modulator counter 1138 outputs a terminal counter to synchronously load the digitized voltage reference signal into the registers 1118, 1120, and 1112 controlled by the digital pulse width modulator control 1140. The digital pulse width modulator controller 1138 continuously counts a number from 0 to 511 (9-bit resolution) and counts it back to 0 to generate a digitized triangular waveform (shown as number 1150).

The digital pulse width modulator of the present invention includes a comparison unit that receives and compares the digitized input signal with the digitized triangular waveform to generate a digital pulse width modulator output pulse.

Referring to FIG. 7, the comparison unit includes comparators 1124, 1126, and 1128. The comparators 1124, 1126, and 1128 respectively compare the digitized voltage reference signal from the registers 1118, 1120, and 1122 with the digitized triangular waveform 1150 from the digital pulse width modulator counter 1138. Considering the comparator 1124 and the first voltage reference signal Va, the comparator 1124 will load the voltage reference signal Va from the input register 1118 and the value from 1 to 510 (or from the digital pulse width modulator counter 1138) to the voltage reference signal Va loaded in the input register 1118. 510 to 1) Compare each successive calculation. For example, the comparator 1124 calculates the ratio of the reference signal Va loaded into the digital pulse width modulator calculation from 1, 2, 3, 4 to, for example, 510 (or 510, 509, 508 to, for example, 1). When the loaded reference signal is greater than the calculation of the digital pulse width modulator, the output digital pulse width modulator pulse is in the logic low state. When the loaded reference signal is less than or equal to the calculation of the digital pulse width modulator, the output digital pulse width modulator pulse is in the logic high state.

The input register can be loaded in advance to compare and generate the pulse width during the up or down calculation of the 9-bit counter. The voltage reference signal may be loaded in one of two ways. In the first method, the voltage reference signal is loaded for each calculation from 0 to 511 or from 511 to 0. In other words, if the calculation of two from 0 to 511 and back to 0 is regarded as a stage of the triangular waveform, the voltage reference signal is loaded every half stage (or a whole stage is loaded twice). In the second method, the voltage reference signal is loaded in an entire phase. The first method has less harmonic deviation and smoother motor control. However, the second method can have more processing time when the pulse width is updated.

However, the comparator does not compare the loaded voltage reference signal with the valley calculation 0 (9 bits are all 0) or the peak calculation 511 (9 bits are all 1), thereby avoiding excessive modulation. When the input register value (loaded reference signal) is the same as the counter value corresponding to the peak and trough of the triangular waveform, overmodulation occurs. The pulse width modulator circuit modifies the value of the input signal by making a calculation to prevent the peak (511) and the valley (0) from being compared with the triangular waveform. The design of the digital pulse width modulator circuit solves the problem that the controller of the processor does not need to spend time checking each input value as designed.

The digital pulse width modulator counter is controlled by the digital pulse width modulator controller 1140. When the digital pulse width modulator controller 1140 calculates the peak (511) and trough (0), it provides synchronization pulses (TC) to, for example, the input recorders 1118, 1120, and 1122, so that the next signal (depending on the use discussed above) It depends on the method) is loaded into the analog-to-digital converter (504a, 504b, 504c and 504d), which is through the analog interface of the vector control board 46 (Figure 4) of the motor controller 18 (Figure 1) 500 (FIG. 6) to sample the current in the motor 28 and load it into the digital signal processor 200 of the vector control board 46 (FIG. 1). The digital signal processor 200 receives the sampling current synchronized with the synchronization pulse from the pulse width modulator control 1140 and generates an algorithm to provide the correct torque required by the vehicle operator through the microcontroller 100. Accordingly, the pulse width modulator control 1140 utilizes the peak and/or trough of the pulse width modulator counter 1138 to synchronize various devices in the vector control board. The calculated peak (511) and valley (0) are used for synchronization because when calculating 0 and 511, the switching transient state of the motor controller 18 will not hinder the analog to digital samples in the analog interface 500.

Accordingly, the pulse width modulator control 1140 of the pulse width modulator circuit is designed to force the generation of pulses, which are used to generate analog to digital samples, synchronized with the peaks and/or valleys of the triangular waveform. Accordingly, the calculations 0 and 511 are not compared with the voltage reference signals Va, Vb, and Vc.

The pulse width modulator circuit includes a first pulse generated from the output pulse of the comparing unit and a dead time generating unit 1104 of the second pulse. Each of the first and second pulses drives a corresponding switching circuit and the first and second pulses have different switching times from each other. The first pulse has a first stagnation and the second pulse has a second stagnation, synchronized with the output pulse from the comparison unit.

Referring to FIG. 7, a dead time generating unit 1104 includes dead time generators 1130, 1132, and 1134, each of which receives a pulse width modulator output pulse from the comparators 1124, 1126, and 1128. The dwell time generator unit 1104 generates a higher pulse and a lower pulse from each pulse width modulator output pulse that matches. This higher pulse corresponds to a gate driver driving one of a set of switching devices including insulated gate bipolar transistors. This lower pulse is equivalent to driving the other of the group of switching devices. For example, consider a set of switching devices that deliver high power to the motor 28 (Figure 5). In this case, a set of higher and lower pulses drive a connected and equivalent to the insulated gate bipolar transistors of each terminal A1, A2, B1, B2, C1, and C2 of the motor 28. Accordingly, each terminal has two power transmission switch devices. A dead time stagnation is required between the higher and lower pulses, because if the stagnation is not introduced, the two switching devices of the terminal may be activated (closed) to create a short circuit. Accordingly, appropriate stagnation should be introduced at the higher and lower pulses synchronized with the pulse width modulator output pulse. The start of the stall is always synchronized with the occurrence of the comparator output transmission and the synchronization of the stall allows the pulse width modulator signal to maintain a 9-bit resolution.

The rest time stagnation is generated by the rest time generation unit 1104 and is explained with reference to FIG. 8 as follows. When the pulse output of the pulse width modulator is generated by the comparison unit, the dwell time generator unit 1104 generates a higher pulse and a lower pulse, as shown in FIG. 8. In order to allow sufficient time for the opening and closing of each corresponding switch, the stop time stagnation is introduced. For example, when a higher pulse from logic 1 to logic 0 is transmitted to turn on the corresponding switch, and the lower pulse is transmitted from logic 0 to logic 1 to turn off the corresponding switch, it must wait for a long enough to turn on the switch. period. In this state, when the higher pulse needs to be transferred from logic 0 to logic 1 to switch its corresponding switch, when the higher pulse can be transferred to logic 1 and close its switch, the higher pulse must wait a long enough to make the low The time for the pulse to pass from logic 1 to logic 0 to turn on the coincidence switch. To ensure that a switch is turned on before another switch is turned off, stagnant import is necessary. The off-time generator unit 1104 provides this guarantee, as shown in FIG. 8.

At the same time, the digital pulse width modulator 1102 operates at a frequency of approximately 8 kHz and the dwell time generator unit 1104 generates a stagnation of approximately three millionths of a second.

The pulse width modulator circuit of the present invention further includes a logic circuit that receives the first (higher) and second (lower) pulses and can activate the driver control unit separately according to the first and second pulses.

Referring to Figures 7 and 9, the generators 1130, 1132, and 1134 at rest send each voltage reference signal Va, Vb, and Vc of the higher and lower pulses to the gate drive of the opening logic circuit 1136, which includes closing Logic circuit 1135 and combinational logic circuits 1136a, 1136b, 1136c, 1136d, 1136e, 1136f. The gate drive logic circuit 1136 is preferably a combined logic circuit that generates higher and lower pulses corresponding to the respective voltage reference signals when the correct gate drive signal is generated. In particular, the logic circuit 1136 provides double gate drive signals for the same higher and lower pulses. The front brake drive signal corresponds to the first set (A1, B1 and C1) of the motor 28 (Figure 5A), while the rear brake signal (replicated) corresponds to the second set (A2, B2 and C2) of the motor 28 , Here the A1 and A2 coils are in the A stage, the B1 and B2 coils are in the B stage, and the C1 and C2 coils are in the C stage. Therefore, these six lines (according to A1 higher and lower, B1 higher and lower, and C1 higher and lower) are output from the gate drive logic circuit 1136 to the gate driver 1146, and the other six lines (according to A2 is higher and lower, B2 is higher and lower, C2 is higher and lower) is output to the gate driver 1148.

The pulse width modulator circuit of the present invention includes a built-in test input signal corresponding to the first (higher) and second (lower) pulses provided to the built-in test circuit to confirm the correct operation of the pulse width modulator circuit, These operations include the feedback path from the driver control unit, and the driver control unit whose modulation level is higher than that of the pulse width cyclic converter circuit. The built-in test input signal provides individual control for each pulse width modulation signal.

Referring to FIG. 7, the built-in test circuit includes gate driving logic 1136, test signal input 1144, and built-in test input 1142. The built-in test circuit confirms the correct operation of the higher level modulation such as the motor controller 18. For example, referring to FIG. 8, the microcontroller 100 (FIG. 6) controls each state of the output by writing the built-in test input 1142 and turning off the pulse width modulator output pulse from the pause time generator. There is a detailed illustration in Figure 9.

Referring to FIG. 9, the built-in test input 1142 is divided into two groups, the built-in test 1142a and 1142b. The built-in tests 1142a and 1142b each meet two identical, independent phase coils on the motor (A1 and A2 coils are phase A, coils B1 and B2 are phase B, and coils C1 and C2 are phase C. Refer to Figure 5 above. To illustrate. The built-in test 1142a includes A1U, A1L, B1U, B1L, C1U, C1L ("U" corresponds to the higher pulse from the rest time generator unit and "L" corresponds to the higher pulse from the rest time generator unit The lower pulse) bit test input. Similarly, the built-in test 1142b includes A2U, A2L, B2U, B2L, C2U, C2L built-in test input. The built-in test 1142a and 1142b include a system for power restart Power restart input for the purpose of restarting. The built-in test 1142a also includes the built-in input test period through an opening/closing unit 1135 (this unit is part of the brake drive logic 1136) to turn off generated from the rest time The pulse width modulator of the signal from the unit 1104 turns off the input. According to this, the signals VA1U, VA1L, VB1U, VB1L, VC1U, VC1L are turned off and the test input signals from the built-in test inputs 1142a and 1142b are applied to the combined type The logic circuits 1136a, 1136b, 1136c, 1136d, 1136e, and 1136f. The combined logic circuit can be restarted together with the total start signal from the microcontroller 100.

In addition to testing the correct operation of higher-level modulation, the entire pulse width modulator circuit including the digital pulse width modulator 1102, the dwell time generator unit 1104 and the gate drive logic 1136 can be analyzed for all 9-bit pulse widths. Degree tested. For example, referring to FIGS. 7 and 9, the digital signal processor 200 provides test input signals TVa, TVb, and TVc instead of the voltage reference signals Va, Vb, and Vc. The test input signal includes each step of 9 bits (0 to 511). The pulse width modulation circuit performs the same operation-as discussed with reference voltage reference signals Va, Vb, Vc-using test input signals to generate higher and lower pulses from the rest time generating unit 1104. The higher and lower pulses corresponding to the test input signal are applied to the gate driving logic 1136, and then to the gate drivers 1146 and 1148 (the built-in test input 1142 does not play a role in this test procedure). The gate drivers 1146 and 1148 feed back the corresponding driving signals to the test signal input 1144. The drive signal is compared with the known value corresponding to the special test input signal. Accordingly, every step of the 9-bit test input signal from 0 to 511 can be tested.

The independent pulse width modulation signal circuit 1102, including the built-in test input 1142 and the test signal input 1144, and the built-in circuit of the control circuit are packaged in a digital logic array 300 that interfaces with the digital signal processor 200 and the microcontroller 100 ( See Figure 6).

The stagnation generated from the rest time generating unit 1104 is synchronized with the pulse width modulator output pulse. The regular digital triangle waveform is programmable to avoid over-modulation, and an asynchronous sampling signal is developed and adjusted by programming.

The present invention demonstrates several features for generating pulse width modulation including (1) all digital implementations to support interface circuits such as digital signal processor 200, microcontroller 100 and other digital components to overcome the shortcomings of analog components, (2) in 1. Three high-resolution, 9-bit, pulse width modulator function execution control in a three-stage motor controller that can reduce the current wave and make the torque control smoother and more efficient, (3) Synchronous stop time generation The device maintains a 9-bit resolution in a 9-bit system. (4) The built-in test is to individually control each pulse width modulator signal and the feedback of a signal level to confirm the function of the pulse width modulation design and its comparison. High-level modulation performance, (6) The generation of sampling pulses synchronized with the crests and troughs of the triangular waveform and the synchronization with the crests or crests and troughs can allow the pulse width to be controlled at the pulse width modulator frequency or Programmable selection of twice the frequency, and (7) avoid over-modulation.

The circuit of the off-time generator unit 1104 implements a synchronous off-time stall between signals, which is used to control the switching device in the power output stage of the controller. The two pulse width modulator signals (higher and lower) are generated from the dwell time circuit (Figure 8) and produce a lag between the higher and lower signals. The start of the stall is always synchronized with the occurrence of the comparator output transfer. This synchronization stagnation enables the pulse width modulator signal to maintain a complete N (=9) bit resolution.

The built-in test circuit controls each output state by writing the test register. This is used in the independent test part of the next higher combination of the controller. By feeding back the pulse width modulator gate drive signal, the test input is used to confirm that the digital circuit generates the correct pulse width for the known input register value. Test the resolution of each bit by specifying the appropriate input values.

It is obvious to these known technologies that the digital pulse width modulator with modulation test and control of the present invention can be modified and changed in various ways to deviate from the spirit or scope of the present invention. Therefore, the present invention covers various modifications and changes of this invention, as long as they fall within the scope of the appended application and its equivalents.

Digital pulse width modulator with integrated testing and control