Logarithmic detector amplifier system for use as high sensitivity selective receiver without frequency conversion

As a logarithmic detection and amplification system for highly sensitive selective receivers without frequency conversion

LOGARITHMIC DETECTOR AMPLIFIER SYSTEM FOR USE AS HIGH SENSITIVITY SELECTIVE RECEIVER WITHOUT FREQUENCY CONVERSION

The present invention relates to the field of a logarithmic amplifier.

In many electronic applications, such as cellular communication, etc., it is desirable to be able to detect certain signals in an environment with low power levels of noise or other unwanted signals. In order to achieve the above-mentioned purpose, the conventional technical solution includes log amps. One of the characteristics of the logarithmic amplifier is that its output signal is a voltage proportional to the logarithm of the input signal, so that the logarithmic amplifier can receive low-level input signals and logarithmically amplify them to generate output signals without amplifying noise. Or other unwanted signals.

One stage of the logarithmic amplifier includes multiple gain blocks, that is, amplifiers, and the gain blocks are connected in series to achieve a logarithmic relationship. Due to the series structure, the difference in the performance of each element will have an impact on the performance of the entire logarithmic amplifier. For example, the dynamic range will be limited; that is, the voltage output corresponding to a relatively high or relatively low input signal does not follow a logarithmic relationship. For these extreme input values, this can lead to erroneous output.

The Logarithmic Detection Amplification (LDA) system is used as a high-selectivity receiver booster or one of the low noise amplifiers in the receiving chain of a communication device instead. The logarithmic detection amplification system includes an amplification circuit, a sampling circuit, and at least one resonance circuit. The amplifying circuit receives an input signal and generates an oscillation based on the input signal. The sampling circuit is coupled to the amplifying circuit and terminates the oscillation based on a predetermined threshold, so as to periodically clamp and restart the oscillation by the oscillation and the input signal to generate a series of modulation pulses. The resonance circuit is coupled to the amplifying circuit and establishes an operating frequency, and outputs a signal having a radio frequency.

<p>100Logarithmic detector</p><p>104, 224, 324Amplifying circuit</p><p>108, 228, 328Resonance circuit</p><p>112, 232, 332Sampling circuit</p><p>116,220Frequency voltage converter</p><p>200, 300Logarithmic detection and amplification system</p><p>204,304Insulation circuit</p><p>208, 308matching network</p><p>212, 312Logarithmic detection amplification core</p><p>216Boost circuit</p><p>404antenna</p><p>408Transmit/Receive Switch</p><p>412Receive filter/filter</p><p>416Low Noise Amplifier</p><p>420Transceiver</p><p>424Baseband processor</p><p>428Power Amplifier</p><p>432Transmission filter</p><p>436Receive signal processing circuit</p><p>440Transmission signal processing circuit</p><p>C1, C2, C3, CS, CCCapacitor</p><p>CP1, CP2Power Division Capacitor</p><p>D1Diode</p><p>INPUTInput terminal/input</p><p>LS, LP, L1Inductor</p><p>OUTPUToutput</p><p>OUTPUT1Output 1</p><p>OUTPUT2Output 2</p><p>OUTPUT AOutput A</p><p>OUTPUT BOutput B</p>

Figure 1 is a block diagram of an embodiment of a logarithmic detector.

Fig. 2 is a block diagram of an embodiment of a logarithmic detection and amplification system.

Fig. 3 is a block diagram of another embodiment of the logarithmic detection and amplification system.

Figure 4 shows a first embodiment of a communication device capable of transmitting and receiving radio frequency signals, in which the low noise amplifier is replaced by a logarithmic detection and amplification system.

Fig. 5 is a schematic diagram of an embodiment of a circuit configuration of a logarithmic detection amplification system.

FIG. 6 is a schematic diagram of an embodiment of a resonance circuit, in which the resonance circuit can output radio frequency signals without affecting the nature of the logarithmic detection amplification.

FIG. 7A is a schematic diagram of another embodiment of a resonance circuit, in which the resonance circuit can output radio frequency signals without affecting the properties of logarithmic detection amplification.

FIG. 7B is a schematic diagram of another embodiment of a resonance circuit, in which the resonance circuit has a differential input and a differential output to output radio frequency signals without affecting the nature of the logarithmic detection amplification.

FIG. 8 is a schematic diagram of another embodiment of a circuit configuration of a logarithmic detection and amplification system, in which the resonance circuit is coupled in parallel with the amplification circuit as a feedback circuit.

9 is a schematic diagram of a circuit configuration of a logarithmic detection amplification system according to another embodiment of the present invention, in which the resonance circuit can be in shunt and coupled to the amplification circuit on the input side of the amplification circuit.

Fig. 10 shows an embodiment of a topology in which the logarithmic detection and amplification system is implemented in a phase-locked loop (PLL).

Hereinafter, a logarithmic detection and amplification system as a highly sensitive selective receiver without frequency conversion according to a preferred embodiment of the present invention will be described with reference to related drawings, in which the same components will be described with the same reference signs.

The following describes a new type of logarithmic detector. An example of the structure and implementation of the existing logarithmic detector is as described in the U.S. Patent (US Patent No. 7,911,235, issued on March 22, 2011), whose patent references are cited as the disclosure of this specification. Revealed here The exposed logarithmic detector is explained further below, and please refer to the embodiment in FIG. 1.

FIG. 1 is a block diagram of an embodiment of a logarithmic detector 100. As shown in FIG. In this embodiment, the input signal from the input terminal INPUT is received by an amplifier circuit 104. The amplifying circuit 104 can amplify the input signal and can include any suitable amplifying element, such as an operational amplifier, a bipolar junction transistor (BJT), a field-effect transistor (FET) or Other discrete transistors, a vacuum tube, an RF amplifier or similar components. The oscillation may be initiated in the amplifying circuit 104 in response to electrical noise and/or a demand signal. Oscillation may end periodically in response to the strength of the input signal. A resonance circuit 108 can be used as a feedback circuit and connected in parallel with the amplifying circuit 104 to control an operating frequency. In the embodiment of FIG. 1, the resonance circuit 108 may include a series LC (inductance capacitance) circuit, wherein the inductance value and the capacitance value can be selected to generate a resonance frequency corresponding to the operating frequency of the logarithmic detector 100. The oscillation can be set in the amplifying circuit 104 to a frequency determined by the value of the inductance and capacitance. In this way, noise outside of the LC resonance will have the least impact on the operation of the LC circuit. The input signal within the LC resonance bandwidth can start to oscillate faster than just random noise. Circuit quality factor (factor of The merit) or the factor Q can be mainly determined by the components of the resonance circuit 108. A high-Q circuit can be achieved by a crystal resonator in the resonance circuit 108, for example. Frequency selectivity, skirt ratio, overall LDA regeneration and factor Q can also depend on other parameters, such as instantaneous gain and one-cycle suppression gain. quenching gain), voltage spike frequency, the value of capacitor C1 in Figure 5, and the amplifier's input bias level (voltage or current) or other possible parameters.

A sampling circuit 112 can be coupled to the amplifying circuit 104. The sampling circuit 112 can effectively sample the current flowing on the voltage supply line and flowing to the amplifying circuit 104. Once a preset threshold is reached, the sampling circuit 112 can stop the oscillation. That is, the sampling circuit 112 can periodically interrupt the oscillation every time the threshold is reached. A frequency-to-voltage converter 116 is coupled to the sampling circuit 112. The input of the frequency-to-voltage converter 116 may include a series of voltage spikes, which are marked by F_rep and described below, and the frequency of the voltage spikes may change substantially as the logarithm of the power of the input signal. The output OUTPUT of the frequency-to-voltage converter 116 can be a DC voltage, which is proportional to the input spike frequency.

When the input signal is modulated, the output of the frequency-to-voltage converter 116 can be Including a DC voltage part and an AC voltage part. The AC part can correspond to the input modulation and effectively become a copy of the demodulation input signal in the baseband.

The above embodiment of the logarithmic detector can be based on different electronic applications. Kind of change. A logarithmic detector amplifier (LDA) can have certain basic properties and can be adjusted to suit the performance improvement in the target application. FIG. 2 is a block diagram of an embodiment of a logarithmic detection and amplification system 200. The logarithmic detection and amplification system 200 may include an insulation circuit 204, a matching network 208, a logarithmic detection and amplification core 212, a boost circuit 216, and a frequency-to-voltage converter 220. In this embodiment, the output can be coupled to the frequency-to-voltage converter 220 and labeled as OUTPUT1. The boost circuit 216 and/or the frequency-to-voltage converter 220 are unnecessary components; one or both of them can be omitted depending on the target application. When the logarithmic detection amplification system 200 does not include the boost circuit 216 and the frequency-voltage converter 220, the output port can be arranged near the logarithmic detection amplification core 212, as shown in output 2 (OUTPUT2) of FIG. 2. The logarithmic detection amplifier core 212 may include an amplifier circuit 224, a resonance circuit 228, and a sampling circuit 232. The operations and functions of the three are respectively the same as those of the amplifier circuit 104, resonance circuit 108, and sampling circuit of the logarithmic detector 100 in FIG. 1 112 similar.

The insulation circuit 204 can filter out power leaks and detect logarithmically Amplify the reflected signal from the core 212 and other interference effects from surrounding circuits, especially the Tx chain, to protect the Rx chain and optimize the regeneration. In particular, when the regeneration construction process is synchronized, the signal reflected from the logarithmic detection amplification core input back to the insulating circuit 204 has an unknown phase (relative to the input signal) and adversely affects the signal regeneration. When a signal that is reflected, out of phase, and mixed with the input signal occurs, the regeneration process cannot achieve the expected effect and thus leads to poor performance.

The leakage power will also find a way into the receiver input, for example via an antenna, and will be emitted as unwanted radiation or electromagnetic interference (EMI). The insulation circuit 204 may include a circulator to achieve insulation. A circulator located in the receiving chain can transmit the Rx signal to ground and short-circuit unwanted leakage and reflections to ground. A typical circulator contains a ferromagnetic element, such as ferrite, to correct for non-linearity. However, ferromagnetic elements are generally bulky and expensive. Other types of circulators can contain nanostrong The magnetic structure and metamaterial have reduced the volume a lot. If the circulator is not used, the isolation circuit 204 can have a low noise amplifier (LNA) or any that can provide increased gain (for an active circuit), insulation, signal-to-noise ratio, and Passive or active component of bandwidth. When input signal attenuation and/or noise reduction are permitted, a resistive attenuator, a resistive power divider, a Wilkinson splitter, or a coupler can be used. The matching network 208 can achieve impedance matching and/or phase correction. Based on the same mechanism as described in FIG. 1, the logarithmic detection and amplification core 212 can output a series of voltage spikes F_rep whose frequency changes substantially as the logarithm of the power of the input signal. The voltage spike signal R_rep can be output from the output 2 (OUTPUT2) or sent to the boost circuit 216 and/or the frequency-voltage converter 220 for further processing and output from the output 1 (OUTPUT1). The boost circuit 216 may include at least one transistor or any suitable amplifying element to amplify the signal F-rep, for example, from about 100 mV to several volts. The boost circuit may further include a Schmidt trigger circuit or any simple digital circuit, such as a digital inverter, to digitize the amplified F_rep to obtain a cleaner and sharper tip Wave. The output signal of the boost circuit 216 can be transmitted to the frequency-to-voltage converter 220, and the signal is converted into a DC and AC voltage in the frequency-to-voltage converter 220, for example, in an audio range, and output from the output 1 (OUTPUT1).

As mentioned earlier, the logarithmic detection amplification system 200 may include some basic properties of the logarithmic detector as described in FIG. 1, and appropriate performance enhancements for the target application. For example, the operating frequency can be determined by the choice of inductance and capacitance in the resonance circuit; therefore, regarding the logarithmic detection amplification core amplifier circuit, high out-of-band rejection and high skirt ratio ) And a high signal-to-noise ratio can be achieved by using the logarithmic detection amplification system 200. In other words, the logarithmic detection and amplification system 200 can be used in applications with high frequency selectivity. In addition, each time the threshold is reached, the sampling circuit can periodically interrupt the oscillation, thus providing self-quenching and time-dependent sampling functions. In this way, the regenerative properties of the oscillation can be improved by the low instantaneous regenerative gain of the amplifying circuit and the clamping and restarting of the oscillations (clamping and restarting of the oscillations), thereby enhancing the Rx sensitivity. The low instantaneous regeneration gain of the amplifying circuit can be in the range of 1 to 5 in the embodiment. However, the logarithmic detection amplification gain of the entire regeneration cycle is substantially higher. Generally speaking, it is low To high and, for example, lies in the range of -10dB to +50dB. Compared with a typical low noise amplifier (LNA), the signal-to-noise ratio can be improved, and the output received signal strength indicator (RSSI) level can become higher. Since no amplification is required or less amplification is required, this is an advantage for the subsequent receive stages or communication components used in the logarithmic detection amplification system 200. The reception selectivity of logarithmic detection amplification can be increased by reducing the frequency bandwidth of the logarithmic detection amplification core. This can be achieved by using high-Q components in the resonance circuit, such as capacitors, inductances, and surface acoustic waves (surface acoustic wave, SAW) filters, bulk acoustic wave (BAW) filters, ceramic resonators, mechanical resonators, etc. The high Q value of the inductor or capacitor may be in the range of 25-200 in the embodiment. In particular, the high Q values of SAW filters, BAW filters, ceramic filters, and mechanical filters can be in the range of 500 to 20000.

The embodiment of the present invention can regenerate a weak to strong received signal and select it Amplification and minimum noise addition, and without any frequency conversion usually associated with logarithmic amplifiers.

Fig. 3 is a block diagram of another embodiment of the logarithmic detection and amplification system. Correct The digital detection and amplification system 300 may include an insulation circuit 304, a matching network 308, and a logarithmic detection and amplification core 312. The logarithmic detection amplifying core 312 may include an amplifying circuit 324, a resonance circuit 328, and a sampling circuit 332, whose operations and functions are respectively similar to those of the amplifying circuit 104, resonance circuit 108, and sampling circuit 112 of the logarithmic detector 100 in FIG. 1 . The output A (OUTPUT A) is equivalent to the output 2 (OUTPUT2) of FIG. 2, in which the logarithmic detection and amplification core 312 can output a series of voltage spikes F_rep. Or, F_rep may not be output in the case of an open circuit. In the logarithmic detection and amplification system 300, the resonance circuit 328 can output a radio frequency signal through an output B (OUTPUT B). The signal of the output B (OUTPUT B) is essentially a reproduction copy of the input signal, and the power level is increased as a result, but the frequency is essentially the same, except that the output signal can be sampled over time at a ratio of the quenching frequency. Due to time sampling, the frequency spectrum appears to be repeated. In some cases, the quenching frequency pulse may be too small so that the system behaves like a non-quenching frequency, and the output signal of output B (OUTPUT B) can be continuous over time.

The insulating circuit 304 can filter out power leakage, reflected signals and other interference effects from surrounding circuits, especially the Tx chain, to protect the Rx chain and As mentioned above, the reduction of regeneration efficiency or the leakage of divergent power (such as electromagnetic interference) are avoided. The insulation circuit 304 may include a circulator for insulation purposes. A circulator located in the receiving chain can transmit the Rx signal to ground and short-circuit unwanted leakage and reflections to ground. A typical circulator contains a ferromagnetic element, such as ferrite, to correct for non-linearity. However, ferromagnetic elements are generally bulky and expensive. Other types of circulators can include nano-strong magnetic structures and metamaterials so that the volume is much reduced. If the circulator is not used, the isolation circuit 304 can have a low noise amplifier (LNA) or any passive or passive or any combination that can provide increased gain (for an active circuit), insulation, signal-to-noise ratio, and bandwidth. Active components.

The matching network 308 can achieve impedance matching and/or phase correction. based on With a mechanism similar to that described in FIG. 1, the logarithmic detection and amplification core 312 can output a series of voltage spikes F_rep. The voltage spike F_rep can be output from output A (OUTPUT A) or only in an open circuit state and not output.

By configuring the resonance circuit 328 to output the radiation through the output B (OUTPUT B) Frequency signals, such as the logarithmic detection and amplification system shown in Figure 3, can be implemented in a variety of radio frequency applications, which provide a higher level of performance than traditional radio frequency communication devices. The circuit of Fig. 3 is essentially different from the circuit of Fig. 1 in that the output B (OUTPUT B) of Fig. 3 is at the same central frequency (compared to the input INPUT signal) with a surround center frequency substantially equivalent Spectrum (the ratio range is between 0.05% and 20%). There is no frequency offset between input INPUT and output B (OUTPUT B), but there is a significant difference between the frequency of input INPUT and the frequency of output A (OUTPUT A), and the frequency ratio is essentially 0.01% to 10 %between. However, the output A (OUTPUT A) can carry a substantially equivalent frequency spectrum around the center frequency of the input INPUT (compared to the input INPUT), but at a different frequency, such as a low intermediate frequency (IF) . The voltage spike F_rep needs to be greater than the input frequency spectrum so that the frequency spectrum can be in the output A (OUTPUT A) Substantially equivalent (compared to input INPUT). For example, the input INPUT frequency signal can be a 500MHz sine wave with a bi-phase offset modulation (BPSK) of 1Mbps occupying 1.5MHz. The logarithmic detection amplifier can be designed to provide 500MHz frequency on output B (OUTPUT B) with 1.5MHz BPSK modulation, and output A (OUTPUT A) with a repetition frequency of 5MHz (repetition) frequency) with 1.5MHz BPSK modulation. Fig. 4 shows an embodiment of a conventional communication device capable of transmitting and receiving radio frequency signals. In this example, a single antenna 404 is used to achieve transmission (Tx) and reception (Rx) modes. A transmission/reception switch 408 can be coupled to the antenna 404 to select the transmission chain or the reception chain according to the operation mode. The receiving chain usually has a receiving filter 412 and a low noise amplifier (LNA) 416. Depending on the desired filtering level and frequency range, additional receive filters can be added before, after, or both of the LNA. An LNA is usually used to amplify the received signal while adding as much noise and distortion as possible to increase selectivity. The received signal can be amplified and output from the low noise amplifier 416 to a transceiver 420 and finally to a baseband processor 424, such as a modem. The receiving chain may have a power amplifier 428 and a transmission filter 432. Depending on the filtering level and frequency range, an additional transmission filter can be provided before, after, or both of the power amplifier 428. The transmission signal is output from the transceiver 420 and transmitted to the power amplifier 428, where the transmission signal is amplified and output to the transmission filter 432, as described in this embodiment, and is transmitted to the antenna 404. The transceiver 420 may include various circuits to process radio frequency signals. These circuits are shown in FIG. 4, such as the receiving signal processing circuit 436 of one of the receiving chains and the transmitting signal processing circuit 440 of one of the transmitting chains. The received signal processing circuit 436 may include a down converter to down-convert the frequency, a demodulator to demodulate the modulated signal, an analog-to-digital converter to generate a digital signal input to the baseband processor 424, and A synchronization function synchronizes the symbol data stream coming in from the remote transmitter and receiver over time.

In the conventional radio frequency communication device as shown in FIG. 4, the low noise amplifier 416 Amplify the received signal, and at the same time increase some noise and distortion as much as possible. As explained earlier, the logarithmic detection amplification system can provide amplified signals while minimizing unwanted noise. Therefore, a new type of radio frequency communication device with improved performance can be provided by replacing the low noise amplifier 416 with the logarithmic detection and amplification system 300 and by coupling the radio frequency output and output B (OUTPUT B) to the transceiver 420. As shown in the dotted square in Figure 4. Alternatively, the logarithmic detection amplification system can be configured as the first amplification stage and a receiving selective booster to supplement the low noise amplifier. The receiving filter 412 and other components may also be included in the logarithmic detection amplification system. In one embodiment, because the logarithmic detection amplification system has frequency selectivity and is an active filtering device with a high skirting ratio, the receive filter 412 can be removed or significantly relaxed (that is, low-order, less frequency bands). outside Restrained and more affordable). In an example where the communication device is a WiFi system, the radio frequency signal is about 2.4 GHz and can be amplified by the logarithmic detection and amplification system 300 and output to the transceiver 420, which has a down converter. A typical down converter converts a digitized signal centered at an intermediate frequency into a baseband signal centered at a very low frequency. Therefore, by obtaining the RF reception signal at about 2.4 GHz from the RF output (ie output B) of the logarithmic detection amplification system 300, the existing transceiver technology, which includes a down converter, can be used without adjustment. It is used to obtain the down-conversion signal before transmitting the signal to the baseband processor 424, which is about 20MHz to 40MHz to comply with the WiFi (IEEE 802.11b to 802.11n) standard.

Other applications are related to sub-1GHz narrowband transceivers, which are used at 168MHz, 433MHz or 868MHz, where the modulation signal bandwidth is reduced by some KHz.

Other applications can be related to satellite communications, such as the 1.5GHz global positioning system, where the received radio frequency signal is at a very low power level. Logarithmic detection amplification can be used as a receiving booster in such low receiving level and relatively low data rate applications.

Other applications may involve very high frequencies, such as the 60 GHz band, where a simple electronic topology with very fast transistors is required. The 60GHz CMOS process can be used to design such a receiver booster or an LNA replacement to provide a highly sensitive receiver.

Other applications can be related to WLAN communication standards, such as IEEE 802.11ac (5~6GHz with a bandwidth of 20MHz to 160MHz), Bluetooth, Z-Wave, Zigbee, DECT, DECT 6.0, 2.5GHz DECT, etc.

Other applications can be related to cellular communication standards, such as AMPS, PCS, Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), CDMA, IS-95, cdmaOne, CDMA2000, Evolution-Data Optimized (EV-DO ), Enhanced Data Rates for GSM Evolution (EDGE), Universal Mobile Telecommunications System (UMTS), Digital AMPS (IS-136/TDMA), Integrated Digital Enhanced Network (iDEN), 3G, 4G, WIMAX, from hundreds of MHz to digital LTE with multiple frequency bands in thousands of GHz.

Other applications can be related to a variety of modulation communication signals, which are transmitted from a wireless or wired system via cables, power lines, telephone lines, optical fibers, etc., in which carrier power and/or modulation signals need to be amplified and have high Selective and low noise addition and with a receiver unit And be processed further.

The logarithmic detection amplification system of Figure 3 can amplify a continuous wave (CW) radio frequency signal (unmodulated) or a radio frequency carrier signal with a modulated signal. The modulation signal can be analog amplitude, frequency modulation or phase modulation, abbreviated as AM, FM, PM, or digital modulation, such as ASK, OOK, quadrature m-AM, FSK, MSK, GFSK, GMSK, 4- FSK, 4GMSK, m-FSK, PSK, QPSK, m-QAM, the above are all abbreviations well known to those skilled in the art. More complex modulation can also be used, such as FH-SS, DS-SS, OFDM, MIMO NxN with BPSK, QPSK, m-QAM, OFDM, which are also abbreviations well-known to those skilled in the art. Generally speaking, the logarithmic detection and amplification system 300 shown in FIG. 3 uses high reception selectivity and low noise patterns to regenerate and amplify the input signal from the input INPUT within its reproduction frequency bandwidth, and output the signal to the output B (OUTPUT B) without frequency conversion (that is, with the same frequency and the same frequency spectrum). This includes carrier and modulation.

As mentioned earlier, the logarithmic detection and amplification system 300 can be implemented in the communication device of FIG. 4 as a receiving booster, not by replacing the low noise amplifier 416, but in a complementary manner between the blocks 412 and 416 A logarithmic detection and amplification system 300 is added to the receiving path. In such a configuration, the receiving selectivity can be improved by the high receiving selectivity, low noise pattern and amplification of the logarithmic detection amplification.

In another embodiment, because the logarithmic detection amplification system can be used as a frequency selection circuit due to a pulse oscillator and an amplifier having an increased skirting ratio, the filter 412 can be removed. This can replace the filter 412 and even exceed the out-of-band rejection performance.

FIG. 5 is a schematic diagram of an embodiment of a circuit configuration of the logarithmic detection and amplification system 300. The isolation circuit is coupled to the input port and used to filter out power leakage, reflected signals, and other interference effects from surrounding circuits to protect the receiving chain and, as previously mentioned, to avoid the reduction of regeneration efficiency or the divergent power Leakage (such as electromagnetic interference). The insulation circuit may include a circulator for insulation purposes. Previous circulators were larger and contained more expensive ferromagnetic components. The new type of circulator can include nano-strong magnetic structures and metamaterials so that the volume is much reduced. If the circulator is not used, the insulation circuit can have a low noise amplifier (LNA) or anything that can provide increased gain (for an active circuit), insulation, signal-to-noise ratio and bandwidth The passive or active components. Matching network system can reach impedance For matching and/or phase correction purposes. The matching network can be critically coupled to the input section of the amplifying circuit. In this embodiment, the coupling is achieved through a capacitor C2. Because there is not enough input energy to inject the logarithmic detection amplification (LDA), the coupling under the coupling may adversely affect the regeneration process. In the opposite case, that is, when the system is over-coupled, because too much input energy is transferred to the logarithmic detection and amplification, the regeneration will also be affected. The amplifying circuit can be used to amplify the input signal, and can include any suitable amplifying element, such as an operational amplifier, a bipolar junction transistor (BJT), a field-effect transistor (FET), An RF amplifier or other discrete transistors.

In the logarithmic detector of FIG. 1, the resonance circuit 108 can be combined with the amplifying circuit 104 Coupled in parallel to form a feedback loop. In contrast, the resonant circuit of the logarithmic detection amplification system of FIG. 5 is coupled in series with the amplifying circuit on the output side of the amplifying circuit, and a capacitor C1 of the logarithmic detection amplification system is coupled in parallel with the amplifying circuit. Alternatively, the resonance circuit may be coupled in series with the amplifying circuit on the input side of the amplifying circuit. The operating frequency can be set by selecting the L value and C value in the resonance circuit. The oscillation can be established in the amplifying circuit and located at the above-mentioned frequency. In this embodiment, the sampling circuit can be coupled to the amplifying circuit via a diode D1. The sampling circuit can effectively sample the current flowing on the voltage supply line and flowing to the amplifying circuit. Once a preset threshold is reached, the sampling circuit can stop the oscillation. That is, the sampling circuit can periodically interrupt the oscillation every time the threshold is reached. Similar to the logarithmic detector of FIG. 1, the sampling circuit mirror output can therefore be a series of voltage spikes F_rep. The voltage spike can be output from output A (OUTPUT A) or be terminated without being output.

In order to output at radio frequency without affecting the nature of the logarithmic detection system According to the output signal, the resonance circuit of the logarithmic detection and amplification system of FIG. 3 or FIG. 5 may be different from the resonance circuit 228 of the logarithmic detection and amplification system 200 of FIG. 2. There are multiple techniques to achieve this goal. FIG. 6 is a schematic diagram of an embodiment of a resonance circuit, in which the resonance circuit can output radio frequency signals without affecting the nature of the logarithmic detection amplification. The resonance circuit may include two main parts: a series resonance circuit part and a parallel resonance circuit part. In this aspect, VCC represents a DC voltage supply, the input port of the resonance circuit can be coupled with the amplifier circuit, and the output port can be coupled with the output B (OUTPUT B) to output a radio frequency signal. The series resonance part may include a capacitor CS and an inductor LS to provide a series resonance. The parallel resonance circuit part may include an inductor LP and a third capacitor CC. The inductor LP is connected in parallel with the power dividing capacitors CP1 and CP2, and the third capacitor CC is coupled to the common node of the power dividing capacitors CP1 and CP2. By determining the values of the power dividing capacitors CP1, CP2 and the third capacitor CC to achieve a critical coupling with each other and optimize the output impedance, the radio frequency signal can be optimally output. In addition, some of the inductors and capacitors in the parallel resonant circuit part can be high-Q inductors and high-Q capacitors, which can have a small bandwidth and an improved selectivity. The bandwidth can be further determined by the instantaneous amplifier gain and the single-loop quenching gain. The gain of the amplifier can be set by the capacitor C1 in FIG. 5 and the bias level (voltage or current) of the amplifier.

FIG. 7A is a schematic diagram of another embodiment of a resonance circuit, in which the resonance circuit Can output radio frequency signal without affecting the nature of logarithmic detection and amplification. In this aspect, VCC represents a DC voltage supply, the input port of the resonance circuit can be coupled with the amplifier circuit, and the output port can be coupled with the output B (OUTPUT B) to output a radio frequency signal. The resonance circuit may include an inductor L1 coupled to VCC, a capacitor C1 coupled to output B (OUTPUT B), and a resonator located on the output branch. The resonator may include a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, or a crystal filter to transmit signals with radio frequency, as well as a ceramic filter, Mechanical filter, an LC resonator, an active RC, a variation of RC or LC (where C is replaced by a variable capacitor or an active element with variable capacitance).

FIG. 7B is a schematic diagram of another embodiment of a resonance circuit, in which the resonance circuit The radio frequency signal can be output without affecting the nature of the logarithmic detection amplification, and a differential input/output (differential input/output) resonator can be used in it. In this aspect, VCC represents a DC voltage supply, and one of the input ports of the resonance circuit can be coupled to the amplifier circuit, and the other can be coupled to VCC. One of the output ports can be coupled to output B (OUTPUT B) to output radio frequency signals, while the second output is grounded. The resonance circuit may include an inductor L1 coupled to VCC, a capacitor C1 coupled to output B (OUTPUT B), and a resonator with a differential input/output parallel output branch. The resonator can be a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, or a crystal filter to transmit signals with radio frequency.

Figures 6, 7A, and 7B illustrate three embodiments of the resonance circuit. In each embodiment In the middle, the output branch may further include an isolator, such as a low-noise amplifier with a medium-to-low gain, so as to improve the insulation performance of the system. In this case, the output branch may include a 50Ω pad. The aspect of the power dividing capacitors CP1 and CP2 shown in FIG. 6 may have an alternative solution, that is, the inductor LP can be divided into LP1 and LP2 by power, and the two can be coupled together by a common inductor. In this aspect, the RF output signal can be transmitted to one of the output nodes of LP2, while the second node can be connected to ground in a single ended configuration. These methods and some of other methods can be used in combination to configure the resonant circuit to optimize the output of the RF signal without affecting the logarithmic detection amplification properties.

Please refer to Figure 5 again, the logarithmic detection amplification system may include a resonance circuit, which is The output side of the amplifying circuit is coupled in series with the amplifying circuit. It should be noted that the resonance circuit can be coupled in series with the amplifying circuit on the input side of the amplifying circuit. FIG. 8 is a schematic diagram of another embodiment of a circuit configuration of the logarithmic detection and amplification system 300, in which the resonance circuit can be coupled in parallel with the amplification circuit as a feedback circuit. The resonance circuit can be configured as input/output single-ended or differential. The output side of the amplifying circuit can be coupled to VCC via an inductor (choke) L1, and a capacitor C1 is coupled to the output B (OUTPUT B). The rest of the circuit can be similar to the aspect described in FIG. 5. The resonance circuit may include a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, a crystal filter, etc., to transmit signals with radio frequency. In the example of FIG. 8, VCC, L1, and C1 are all shown as external components of the resonance circuit.

Figure 9 is a circuit configuration of a logarithmic detection amplification system according to another embodiment of the present invention The resonant circuit can be shunted and coupled with the amplifying circuit on the input side of the amplifying circuit. However, it should be noted that the resonance circuit can be branched and coupled to the amplifying circuit at the output side of the amplifying circuit. The other end of the resonance circuit can be short-circuited to ground. The resonance circuit can be input/output single-ended or differential, and one of the outputs can be in an open-circuit state so that it does not become a load on the circuit. The output terminal of the amplifying circuit can be coupled to VCC via an inductor L1, and a capacitor C3 is coupled to output B (OUTPUT B). The rest of the circuit can be similar to the aspect described in FIG. 5. In the example of FIG. 9, VCC, L1, and C3 are all shown as external components of the resonance circuit.

At least one resonance circuit can be used in the logarithmic detection amplification system described herein System. At least one resonance circuit can be coupled to the input side or the output side of the amplifying circuit in series with the amplifying circuit. Alternatively, at least one resonance circuit can be coupled in parallel with the amplifying circuit. Alternatively, at least one resonance circuit may be shunted to be coupled to the amplifying circuit on the input side or the output side of the amplifying circuit. In addition, a combination of series, shunt, and parallel configurations can also be used. Each resonance circuit may include at least one element, which is selected from a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, a crystal filter, a ceramic filter, and a mechanical filter Variations of an LC resonator, an active RC, RC or LC (where C is replaced by a variable capacitor, such as a varicap or an active element with a variable capacitance) . In addition, the matching network can be coupled to the input, radio frequency output, or both, or can be omitted. Similarly, the isolation circuit can be coupled to the input, the RF output, or both, or can be omitted.

Figure 10 shows an embodiment of a topology in which the logarithmic detection and amplification system can be implemented in a phase-locked loop (PLL). In Fig. 10, the aspect of Fig. 3 is modified to provide additional features, for example, it can be a very narrow adjustable frequency bandwidth, locked to a reference frequency, the reference frequency can be a certain channel in the use frequency band, or borrowed acquired by a carrier extraction circuit (not shown) from the input carrier frequency. The original output B (OUTPUT B) can be divided into two by a power divider: one is the new output B (OUTPUT B) in Figure 10, and the other is the second output, which is transmitted through an amplifier or attenuator An output signal is given to a digitally programmable or fixed frequency divider by N (fix frequency divider by N). The N-order frequency divider may include a frequency prescaler, where the maximum frequency can be amplified to the microwave frequency. The generated signal can be compared with the reference signal F_reference, and divided by a factor M through the use of a phase/frequency comparator. The phase/frequency comparator can be analog or digital. The phase difference can be through a 3-state switch (3-state switch) and a charge pump are fed to a low-pass filter, so that when the switch is turned on, the output voltage can be fixed in the low-pass filter. When the switch is turned off, the charge pump injects positive or negative current pulses to reduce or increase the output voltage of the low-pass filter. The output voltage of the filter can drive one of the inputs of the logarithmic detection amplifying core VT, which uses a voltage-controlled oscillation mode to change the oscillation frequency. The logarithmic detection amplifying input can be, for example, a resonance circuit or a logarithmic detection amplifying input node. A variable capacitance diode or a variable capacitance diode (varicap), in which the DC voltage changes the oscillation frequency. The input of the logarithmic detection amplification can be coupled to the input INPUT via a matching circuit and an isolation circuit. On the other hand, the signal of output A (OUTPUT A) is digitally reshaped Circuit (digital shaping circuit) and an adjustable delay function (not necessary), and can drive the 3-state switch of the phase comparator. By adjusting the frequency division ratios N and M, the compensation bandwidth of the phase-locked loop and logarithmic detection amplification can be changed, adjusted or programmed. The loop bandwidth can be adjusted so that it is substantially slower than the minimum data rate. In this configuration, the phase locked loop has a slow response time (compared to the data rate), and the data rate will not be affected by the phase locked loop, which balances the phase and frequency difference. Modulation input or data rate can go through the phase-locked loop without affecting it, and can be regenerated without the phase-locked loop. Since the regeneration process is not dependent on the phase-locked loop, the high reception selectivity of the logarithmic detection amplification will not be affected by the phase-locked loop.

The first application of logarithmic detection amplification plus phase-locked loop is to reduce the compensation frequency bandwidth and reduce the frequency bandwidth to a specific channel of the used frequency band, such as the third channel of the 10 channels. This topology provides an adjustable or fixed bandwidth for an electronically adjustable bandpass filter function. Due to its high skirting ratio (ie, the steepness of the left and right frequency edges) and its ability to increase selectivity and reject unwanted interference from the receiver, logarithmic detection amplification is very useful in this application. Locking the logarithmic detection amplification in a phase-locked loop can also correct the frequency drifting with time, so that the preset oscillation frequency of the logarithmic detection amplification core can be related to (N/M)* F_reference.

Other configurations of logarithmic detection amplification and phase-locked loop can be designed to provide additional performance. The reference signal F_reference drives the phase-locked loop phase comparator and can be obtained from a circuit that provides synchronization to the input receiving symbol rate. In this way, the logarithmic detection amplification can provide suppression for each symbol and synchronize with it. This helps reduce the F_rep frequency to the same value as the input modulation signal. In the opposite example, F_rep must be at least twice the input modulation to meet the Nyquist criteria.

Although this specification contains many embodiments, they should not be used to limit the spirit of the present invention or the scope of the patent application, but are only used to describe the features of the embodiments of the present invention. The features of the different embodiments described in the present invention can be combined and applied to the same embodiment. Conversely, many features in the same embodiment can also be separately applied to different embodiments or become sub-combinations. In addition, although the above-mentioned embodiments or the scope of patent application have some combination of features, the features in the combination can be implemented separately, for example, into a sub-combination or a variation of the sub-combination.

The above description is only illustrative, and not restrictive. Any equivalent modification or alteration that does not deviate from the spirit and scope of the present invention shall be included in the attached patent application. In the scope of interest.