Apparatus and method for testing a communication circuit

Apparatus and method for testing communication circuit

Field of invention

The present invention is related to wireless communication systems, and more related to production testing of wireless communication systems.

Background of the invention

When a communication circuit such as a wireless transmitter is first started, the packets that are just sent may have various power levels and/or carrier frequencies. Therefore, when testing the communication circuit, it is hoped that the communication circuit is stable to obtain an accurate and stable measurement value. For example, if a test system measures a first packet transmitted from the communication circuit after activation, the measured value may not represent the state of the communication circuit under normal use.

Accordingly, the test system of the prior art introduces a time delay after the communication circuit is activated; after the time delay, the communication circuit has stabilized, and the test system can begin to measure the packets sent by the communication circuit. In order to make sure that the communication circuit has reached stable operation, the time delay must be long enough. However, due to factors such as heat, control algorithm variation, absolute phase variation, settling time variation, and other known factors, the time delay may not be fixed for each communication circuit. In addition, the test system may execute other tests in parallel, which may also cause changes in the time delay.

In some communication circuits such as WiMAX (Worldwide Interoperability Microwave Access) circuits, testing generally starts after the circuit has been synchronized with the test system. In these communication circuits, the test system polls the communication circuit to determine whether it has been synchronized. After synchronization, the test system can introduce a time delay before measuring the test packet sent from the communication circuit.

Because the time delay required by the communication circuit may vary, many prior art test systems are designed for the worst-case time delay to stabilize the communication circuit. In this way, even if the communication circuit has stabilized, the test system of the prior art will still waste time waiting for the worst-case time delay to end. Therefore, it is particularly desirable to provide a device and method for testing communication circuits in a more time-saving manner.

Summary of the invention

In one example, a device for testing a communication circuit includes a detection module and a capture module. The detection module provides an activation signal in response to receiving at least one predetermined plurality of data from the communication device under test. The predetermined plurality of data may be one or more information packets or one or more time-based information signals. Frame; the capture module responds to the activation signal to capture at least one other predetermined multiple data. In another example, the detection module provides an activation signal in response to detecting a predetermined number of predetermined data. This case also reveals a method.

In addition to other advantages, since the capture module does not need to wait for a predetermined time delay to capture multiple predetermined data, the device and method also provide a shortened test time. This shortened test time can also reduce the production of communication circuits. cost. In addition, the test of the communication circuit is started when the detection module receives a predetermined number of predetermined data from the communication circuit. Therefore, the device does not need to issue an additional command to start the test, which shortens the test time. Those who are familiar with this technique can recognize other advantages.

In another example, the device includes a measurement module that measures the power and/or data rate of the at least one other predetermined data. In another example, the device includes a storage module that stores the at least one other predetermined data; in another example, the storage module stores measurement information received from the measurement module .

In another example, the detection module includes a counting module that increases and/or decreases a count in response to each of the at least one predetermined plurality of data received. In another example, the detection module includes a comparison module, and the comparison module provides the activation signal in response to the count exceeding the predetermined number.

In another example, the device includes a generating module that transmits a first predetermined plurality of data, and the at least one predetermined plurality of data is received in response to sending the first predetermined plurality of data. In another example, when the at least one other predetermined plurality of data is received, a remote communication circuit is regarded as synchronized.

In another example, the device includes a switching module that selectively transmits the at least one predetermined plurality of data communications to the detection module, and transmits the at least one other predetermined plurality of data to the capture module Group and/or transfer the first predetermined plurality of data from the generating module.

Schematic description

Figure 1 is an exemplary functional block diagram of a test architecture including a device under test, a test module, and a computer.

Figure 2 is a flowchart depicting exemplary steps that the test module can take.

Figure 3 is an exemplary functional block diagram depicting an alternative embodiment of the test module.

Figure 4 is a flowchart depicting exemplary steps that can be taken by the alternative embodiment of the test module.

Detailed description of the preferred embodiment

The following embodiment descriptions are merely exemplary in nature and are not intended to limit the present invention, its application, or its use. For clarity, the same reference numbers will be used in the drawings to identify similar components. These embodiments are described in sufficient detail so that those skilled in the art can implement the present invention, and it will be understood that other embodiments may be implemented in some variant forms that do not depart from the spirit or scope of the present invention.

As used herein, terms such as modules, circuits, and/or devices refer to specific-purpose integrated circuits (ASIC), electronic circuits, processors (shared, dedicated, etc.) that execute one or more software or firmware programs Or group) and memory, combinational logic circuit, and/or other appropriate components that provide the functions described. If the reverse is not clearly indicated in this article, it should be understood that the respective circuit elements can be single or plural in number. For example, the terms "circuit" and "loop" may include a single element or multiple elements, which are active and/or passive, and are connected or coupled together in other ways (for example, as One or more integrated circuit chips) to provide the functions. In addition, the term "signal" can refer to one or more currents, one or more voltages, or a data signal. What's more, even if the implementation of discrete electronic circuits (preferably in the form of one or more integrated circuit chips) has been discussed in this article, the function of any part of these circuits can be replaced by the use of One or more appropriately planned processors to perform, depending on the signal frequency or data rate to be processed.

Referring now to FIG. 1, the test architecture includes a device under test (DUT) 100 (such as a communication circuit), a test module 102, and a computer 104. The DUT 100 is operatively coupled to the test module 102 and the computer 104 via the interfaces 106 and 108, respectively; the test module 102 and the computer 104 are operatively coupled via the interface 110.

The test module 102 includes a detection module 112 and a capture module 114. After the DUT 100 is started and initialized, it starts to send one or more predetermined data to the test module 102 via the interface 106. The predetermined plurality of data may be one or more information packets, or one or more time-base information frames. The detection module 112 provides an activation signal 116 in response to receiving one or more predetermined data through the interface 106. In response to the activation signal 116, the capture module 114 starts to capture one or more predetermined pieces of data received via the interface 106.

In more detail, the detection module 112 provides the activation signal 116 in response to receiving a predetermined number of predetermined data via the interface 106. The predetermined number can be determined empirically and can be changed depending on the type of DUT 100 being tested. In one embodiment, the predetermined number can actually be any number of packets or frames in a wide range of numbers, such as, for example, 8 packets or frames.

In this way, when the DUT 100 stabilizes, the test module 102 starts to test the DUT 100. Since the test module 102 does not need to wait for a predetermined period of time before starting the test, the test module 102 exhibits a shortened test time, which can reduce the production cost of the DUT 100.

The detection module 112 may include a counting module 118 and a comparison module 120. Although in this example, the counting module 118 and the comparison module 120 are components of the detection module 112, those familiar with this technique will recognize that, if desired, the modules 118 and 120 can also be used as components of the detection module 112. The detection module 112 is implemented as a separate component.

The counting module 118 increases (or decreases) a counter 122 in response to receiving one or more predetermined pieces of data from the DUT 100. The comparison module 120 compares the count 122 with a predetermined number 124, where the predetermined number 124 can be stored in, for example, a memory (e.g., power-dependent or non-power-dependent), one or more registers, or other Appropriate storage components in the memory module 126. As mentioned earlier, the predetermined number 124 is often determined based on experience and can vary with the type of DUT 100 under test.

When the count 122 exceeds (or in some cases is equal to) the predetermined number 124, the comparison module provides a start signal 116 to the capture module 114. As mentioned above, the capture module 114 captures one or more predetermined pieces of data received from the DUT 100 in response to the activation signal 116.

The test module 102 may also include a measurement module 128 and/or a storage module 130. The measurement module 128 receives the predetermined plurality of captured data 132 from the capture module 114 and provides measurement information 134 based on it. In some embodiments, the measurement information 134 may include power level information, data rate information, transmission quality information, spectrum mask information, or other suitable measurement information. In some embodiments, the storage module 130 stores the measurement information 134 received from the measurement module 128; in other embodiments, the storage module 130 may not store the measurement information 134 but a predetermined number of captured data. 132, or in addition to storing the measurement information 134, a predetermined plurality of captured data 132 are also stored. In this way, in some embodiments, the measurement module 128 is unnecessary. The computer 104 can then retrieve or analyze the information 132 and/or 134 stored in the storage module 130 through the interface 110.

Referring now to FIG. 2, exemplary steps that the test module 102 can take are generally indicated by the procedure 200. This procedure starts at step 202 after the DUT 100 is started and/or initialized. In step 204, the test module 102 resets the counting module 118 and any other counters, registers, or other appropriate circuits; in step 206, the detection module 112 listens for one or more to be received via the interface 106 More reservations for more information.

In step 208, the detection module 112 determines whether a predetermined number of data has been received from the DUT 100; if the predetermined number of data has not been received, the procedure skips back to step 206; however, if the predetermined number of data has been received, the procedure proceeds to Step 210. In step 210, the counting module 118 increments (or decrements) the count 122.

In step 212, the comparison circuit 120 determines whether the count 122 has exceeded the predetermined number 124; if the count 122 has not exceeded the predetermined number 124, the procedure jumps back to step 206; however, if the count 122 has exceeded the predetermined number 124, the comparison module 120 Then, in step 214, the start signal 116 is provided. In step 216, the capture module 114 captures a predetermined plurality of data received from the DUT 100 in response to the activation signal 116. This procedure ends in step 218.

Refer now to FIG. 3, which depicts an exemplary functional block diagram of an alternative embodiment of the test module 102. In this embodiment, the test module 102 first determines whether the DUT 100 is synchronized with the test module 102 before capturing a plurality of predetermined data received from the DUT 100. In this example, the test module 102 also includes a switching module 300, a generating module 302, and a control module 304. The control module 304 provides the switching control signal 306, generating the activation signal 308, and detecting the activation signal 310 according to the timing information provided by an associated timing module 312.

In response to the switching control signal 306, the switching module 300 selectively transmits one or more predetermined data between the interface 106 and the detection module 112, the capture module 114, and/or the generation module 302. In some embodiments, the switching control signal 306 controls the switching module 300 to transmit a predetermined plurality of data to the interface 106 or receive a predetermined plurality of data from the interface 106 (for example, transmit or receive a predetermined plurality of data via the interface 106). In some embodiments, the switching module 300 can be replaced with a power combiner module (not shown) to allow simultaneous transmission between the interface 106 and the detection module 112, the capture module 114, and/or the generation module 302 .

When the DUT 100 is started and/or initialized, the generation module 302 sends one or more predetermined data to the DUT 100 via the switch module 300 and the interface 106 in response to the generation of the start signal 308. Once the generation module 302 sends one or more predetermined signals, the detection module 112 is activated through the detection activation signal 310. In response to the detection activation signal 310, the detection module 112 listens for one or more predetermined data to be received from the DUT 100 via the interface 106 and the switching module 300. If the detection module 112 does not receive one or more predetermined multiple data from the DUT 100, the generation module 302 is activated again by generating the activation signal 308, and sends one or more additional predetermined multiple data To the DUT 100; however, if the detection module 112 has received one or more predetermined pieces of data from the DUT 100, the DUT 100 is considered to be synchronized and can be tested next. In some embodiments, when a predetermined number of predetermined data has been received, the DUT 100 is considered to be synchronized. For example, when the detection module 112 receives three predetermined multiple data, the DUT 100 can be regarded as synchronized. Although three predetermined multiple data are used in this example, any other suitable predetermined number can also be used.

When the DUT 100 is synchronized, the test module 102 can send one or more predetermined data to the DUT 100. In response to these one or more predetermined multiple data, the DUT 100 sends one or more predetermined multiple data to the test module 102. The detection module 112 receives a predetermined number of data from the DUT 100 and increases (or decreases) the count 122. When the count 122 exceeds the predetermined number 124, the comparison module 120 provides a start signal 116. In response to the activation signal 116, the capture module 114 starts to capture one or more predetermined pieces of data received via the interface 106.

In some embodiments, the measurement module 128 receives the predetermined plurality of captured data 132 from the capture module 114 and provides measurement information 134 accordingly, and the storage module 130 stores the measurement information received from the measurement module 128 134. In other embodiments, the storage module 130 may not store the measurement information 134 but a predetermined plurality of captured data 132, or store the predetermined plurality of captured data 132 in addition to the measurement information 134. The computer 104 can then retrieve and analyze the information 132 and/or 134 stored in the storage module 130 via the interface 110.

Referring now to FIG. 4, exemplary steps that the test module 102 can take are generally indicated by the procedure 400. When the DUT 100 is started or initialized, the procedure starts from step 402. In step 404, the counting module 118, the timing module 312, and/or other suitable circuits are all reset. In step 406, the control module 304 provides a switching control signal 306 so that the generation module 302 can communicate with the interface 106. In step 408, the control module 304 provides a generation start signal 308, and the generation module 302 sends one or more predetermined data to the DUT 100 in response to the generation start signal 308. In step 410, the control module 304 provides a switching control signal 306 so that the detection module 112 and/or the capture module 114 can receive a predetermined number of data from the interface 106. In step 412, the detection module 112 listens for one or more predetermined data to be received from the DUT 100.

In step 414, the detection module 112 determines whether one or more predetermined pieces of data have been received. In some embodiments, the one or more predetermined pieces of data may include information indicating whether the DUT 100 has been synchronized. In other embodiments, the detection module 112 determines that the DUT 100 is synchronized by receiving one or more predetermined pieces of data when it is activated through the control module 304. If the detection module 112 does not receive one or more predetermined data when it is activated through the detection activation signal 308, the process jumps back to step 406; however, if the detection module 112 receives it when it is activated If one or more predetermined multiple materials are made, the procedure proceeds to step 416.

In step 416, the control module 304 provides a switching control signal 306 so that the generation module 302 can send a predetermined number of data to the DUT 100. In step 418, the control module 304 provides a generation activation signal 308, and the generation module 302 sends one or more predetermined data to the DUT 100 in response to the generation activation signal. In step 420, the control module 304 provides a switching control signal 306 so that the detection module 112 and/or the capture module 114 can receive a predetermined number of data from the DUT 100. In step 422, the control module 304 provides a detection activation signal 310, and the detection module 112 starts to listen for one or more predetermined pieces of data received from the DUT 100 in response to the detection activation signal 310. In step 423, the detection module 112 determines whether one or more predetermined pieces of data have been received from the DUT 100. If one or more predetermined data has not been received, the procedure skips back to step 416; however, if one or more predetermined data has been received, the procedure proceeds to step 424.

In step 424, the comparison module 120 determines whether the count 122 has exceeded the predetermined number 124. If the count 122 does not exceed the predetermined number 124, the counting module 118 increments (or decrements) the count 122 in step 426, and the program jumps back to 416; however, if the count 112 exceeds the predetermined number 124, the detection module 112 in step The start signal 116 is provided in 428. In step 430, the capture module 114 captures one or more predetermined pieces of data received from the DUT 100 in response to the activation signal 116. This procedure ends in step 432.

As mentioned above, in addition to other advantages, the test module 102 does not need to wait for the worst-case time delay before testing the DUT 100. In this way, the test module 102 exhibits a shortened test time, which reduces the production cost. In addition, the test starts when the test module 102 receives a predetermined number of predetermined data from the DUT 100. Therefore, the test module 102 does not need to issue additional commands, which further shortens the test time. Those who are familiar with this technique can recognize other advantages.

Various modifications and substitutions of the structure and operation method of the present invention can be clearly seen by those skilled in the art without departing from the scope and spirit of the present invention. Although the present invention has been described with specific preferred embodiments, it should be understood that the present invention as defined by the scope of the patent application should not be unduly limited to these specific embodiments. We want the following patent applications to define the scope of the present invention, and the structures, methods and equivalent variations within the scope defined by these patent applications should also be covered.

<p>100. . . Device Under Test (DUT)</p><p>102. . . Test module</p><p>104. . . computer</p><p>106, 108, 110. . . interface</p><p>112. . . Detection module</p><p>114. . . Capture module</p><p>116. . . Start signal</p><p>118. . . Counting module</p><p>120. . . Comparison module</p><p>122. . . count</p><p>124. . . Pre-determined quantity</p><p>126. . . Memory module</p><p>128. . . Measurement module</p><p>130. . . Storage module</p><p>132. . . Multiple captured data</p><p>134. . . Measurement information</p><p>200, 400. . . program</p><p>202~218, 402~432. . . step</p><p>300. . . Switch module</p><p>302. . . Generate module</p><p>304. . . Control module</p><p>306. . . Switch control signal</p><p>608. . . Generate start signal</p><p>310. . . Detect start signal</p>

Figure 1 is an exemplary functional block diagram of a test architecture including a device under test, a test module, and a computer.

Figure 2 is a flowchart depicting exemplary steps that the test module can take.

Figure 3 is an exemplary functional block diagram depicting an alternative embodiment of the test module.

Figure 4 is a flowchart depicting exemplary steps that can be taken by the alternative embodiment of the test module.