Image sensor array with variable resolution and high-speed output

Image sensor array with variable resolution and high-speed output

The present invention relates to an image sensor array used in a raster input scanner. In particular, the present invention relates to a photosensitive wafer in which each photoreceptor contains its own individual transfer circuit.

The image sensor array usually includes a linear array of photoreceptors that can perform raster scanning for image-bearing documents and convert the microscopic image area observed by each photoreceptor into image signal charges. Following the integration period, the charge of the image signal can be amplified by successively activated multiplexed transistors and transmitted to the common output line or bus in the form of an analog video signal. The basic circuit for this image sensor array can be found in US Patent No. 5,081,536.

The essential feature of photosensitive devices with photoreceptor arrays is to have multiple choices of image resolution. For example, if a wafer contains a set of photoreceptors spaced apart by 1/600 inch, it is necessary that the wafer is operated in such a way that each pair of adjacent photoreceptors actually operates as one photoreceptor, so the devices The effective spatial resolution is 300 spots per inch. A lower spatial resolution will result in a smaller image file size (which is necessary in certain scanning situations such as backup storage, pattern or symbol recognition) and can contribute to a higher reading rate. The description of the present invention relates to a photosensitive imaging device that can operate with multiple resolutions.

U.S. Patent No. 5,493,335 discloses a digital camera with variable resolution characteristics. The signal in the buffer memory downstream of the image sensor is manipulated to activate the mode with reduced resolution.

United States Patent No. 5,638,121 combined with the above documents uses separate lines for odd and even photoreceptors in a linear array. Using separate output lines can provide a longer settling time for each pixel signal when recording an image.

U.S. Patent No. 6,169,576 discloses a CCD device with a controllable resolution.

An imaging device provided by the present invention includes multiple groups of photoreceptors. The first output line will receive the signal from the photoreceptor of the first subgroup, and the second output line will receive the signal from the photoreceptor of the second subgroup. The connecting device attached to each photoreceptor group can selectively operate the photoreceptor group as an effective photoreceptor.

The present invention provides a method for operating an imaging device, wherein the device includes a plurality of photoreceptor groups, a first output line and a second output line. In the first mode, the signal is transmitted from the first subset of the photoreceptor group to the first output line, and the signal is transmitted from the second subset of the photoreceptor group to the second output line. In the second mode, for each group of photoreceptors in the group of photoreceptors, the signal is transmitted from the first photoreceptor in the group to the first output line, and the signal is sent from the photoreceptor in the group The second photoreceptor is sent to the second output line.

Figure 1 is a schematic diagram showing the photoreceptor array on a chip. For example, one or more of these chips 100 can be used in a device such as a digital photocopier or a facsimile machine for recording hard-copy images. In this equipment, the sheet with the image to be recorded is moved relative to the wafer. The photoreceptor on the wafer will "see" a series of small areas on the sheet over time and output an image signal for each small area. Each image signal can be processed and accumulated to obtain image data describing the entire recorded image.

Basically, the wafer 100 includes a linear array composed of photoreceptors; in this particular embodiment, as will be described in detail below, the wafer 100 includes a linear array composed of photoreceptors 10. In this embodiment, each photoreceptor group 10 includes a plurality of photoreceptors. Depending on the specially selected operating mode, each photoreceptor group 10 can effectively operate as a single and relatively large photoreceptor in low-resolution mode, or alternatively, as long as high-resolution scanning is performed, each photoreceptor can be A plurality of photoreceptors in a group 10 independently record light and output signals. The chip 100 may further include any number of contact pads 102 so that the chip 100 can interact with auxiliary circuits as required.

FIG. 2 is a partial schematic diagram showing the front side of some photoreceptor groups 10 that can be found on the chip of FIG. 1. FIG. In this embodiment, each photoreceptor group 10 includes a 2×2 array of photoreceptors (denoted as 12a, 12b, 12c, and 12d in each group). As will be explained below, the photoreceptors 12a, 12b in each group 10 can be independently operated so as to provide high spatial resolution along the linear array direction (the horizontal direction in Figure 2). However, in the low-resolution scanning mode, the operating system can make each sensor 12a, 12b, 12c, and 12d in each group 10 be "watched" by each group during the scanning period of a small area in the image being recorded. The subsidiary transistors in 10 are connected together to actually form a single large photoreceptor. If the photoreceptor 12a, 12b is operated in high-resolution mode, it can provide a spatial resolution of 600 spi (dots per inch), and all photoreceptors 12a, 12b, 12c and 12d in each group 10 are regarded as one photoreceptor When the device is operated, it can provide a spatial resolution of 300 spi (dots per inch). In this embodiment, when the photoreceptors 12a, 12b are operated in the high-resolution mode, the photoreceptors 12c and 12d in each group 10 are not used.

The other inputs on the photoreceptors 12a, 12b, 12c, and 12d in Figure 2 include the external voltage Vov, which is usually about 1 volt, and the "line readout" signal Φ_L_RAnd its complementary signal Φ_L_R_*, Where Vov and Φ_L_R_*Can be connected to a single line. Depends on signal Φ_L_RAnd its complementary signal Φ_L_R_*The relative value of can be operated in the "low resolution mode" in which all photoreceptors in the group 10 actually operate as one photoreceptor, or in the "high resolution mode" in which the photoreceptors 12a and 12b in a group operate independently.

It can be further seen from Figure 2 that the signal output by each photoreceptor is loaded into two video output lines, which are marked as Vido (video odd) and Vide (video even). The signal is output through one of a series of selectively activated amplifiers PIX1, PIX2, PIX3, PIX4, etc. Each amplifier can let the signal pass through when it is activated.

In this embodiment, in the high-resolution mode, every other photoreceptor 12a along the linear array direction sends a signal to the Vido line, and at the same time, each photoreceptor 12b along the linear array direction sends a charge to the Vide line. Figure 3 shows the input Φ related to each auxiliary amplifier_P_I_X₁, Φ_P_I_X₂, Φ_P_I_X₃, Φ_P_I_X₄In the clock sequence of each group 10, the photoreceptor 12a in each group 10 starts this odd-even output operation when the signal is sent to the Vido line. In this way, the configuration shown in Figure 2 can activate the output of the two "column" trains signals from the interlaced or alternating photodetector subsets effectively.

Downstream multiplication can be performed for two "columns" signals to form more directly usable video signals. The reason why this two-wire output configuration is necessary can be found in the explanation in US Patent No. 5,638,121, which also teaches the actual form of implementing this system. In short, because each output signal from the photoreceptor must be "settling" on the final value related to the true amount of light energy received, the two-wire parity output system enables us to implement more Fast overall output; the two-wire system allows us to partially overlap the settling time of adjacent odd and even photoreceptors over time when outputting video.

In addition, according to this embodiment, the dual-line parity readout configuration will remain in position, while keeping the device in each group 10. All photoreceptors 12a, 12b, 12c, 12d actually operate as one photoreceptor. Low-resolution mode. Figure 4 shows the clock sequence for the low-resolution mode odd-even readout operation related to the amplifier used to control the signal output from the odd and even groups 10 to be activated; Figure 4, you can see The output amplifiers PIX2 and PIX3 are in the operating state but PIX1 and PIX4 are not (similarly, the unmarked amplifiers PIX6 and PIX7 on the far right side of Figure 2 are in the operating state and PIX5 and PIX8 are not). Comparing Figure 4 with Figure 2, it can be seen that each signal is sent from the auxiliary photoreceptor group 10 to the Vide line through the amplifier PIX2 (and all even-numbered activated amplifiers), and through the amplifier PIX3 (and All odd-numbered activated amplifiers) send each signal from the auxiliary photoreceptor group 10 to the Vido line. Therefore, when the photoreceptor group 10 operates as a single photoreceptor in the low-resolution mode, the two-column parity output method can still be applied. With this configuration, the present embodiment can perform dual-line parity output operations in both high and high resolution modes at the same time.

Figure 5 is used to show a schematic diagram of a translation register (generally labeled 20) used to operate any four amplifiers such as PIX1, PIX2, PIX3 and PIX4 as shown in Figure 2. It can be seen from the figure that the output of the translation register in Figure 5 is the operating signal for the amplifier in Figure 2; basically, there is a positive signal for each amplifier attached to the photoreceptor 12a, 12b. Translation register stage in the form of inverter 22. Other connections to the translation register include incoming and outgoing connections SR_I_NAnd SR_O_U_T, Clock signal Φ_SAnd the line readout signal Φ as described above_L_RAnd Φ_L_R_*. Figures 6 and 7 are respectively used to show the timing diagrams of the result output of each pixel amplifier when the device is operated in a high-resolution mode and a low-resolution mode, respectively, when necessary. In Figure 6, when Φ_L_R= 0 and Φ_L_R_*When =1, it can be seen that all the pixel amplifiers in the group are activated once within the period to activate the high-resolution mode. In Figure 7, when Φ_L_R= 1 and Φ_L_R_*When = 0, only the amplifiers PIX2 and PIX3 are activated to perform low-resolution operations and the amplifiers PIX1 and PIX4 are not used effectively. In the low-resolution mode, only one translation register stage is required to operate each group 10 as a whole.

Although the display embodiment shows two output lines respectively dedicated to "odd" and "even" (ie, interlaced) photoreceptors or photoreceptors along the linear array direction, the present invention can also be applied to, for example, Signals are output from four subsets or photoreceptor groups composed of uniformly distributed photoreceptors to four output lines and other structures to perform even higher rate output operations. Alternatively, the two output lines can also be made exclusively for other types of photoreceptors, such as corresponding to different parts of a linear array, corresponding to different linear arrays, and corresponding to subsets that are photosensitive to different primary colors. Set or photoreceptor group. At the same time, although the above disclosure is directed to a linear array used for scanning prints, the basic disclosure can also be applied to devices such as a two-dimensional photoreceptor array used in a digital camera.

<p>10. . . Photoreceptor group</p><p>12a~12d. . . Photoreceptor</p><p>20. . . Translation register</p><p>twenty two. . . Flip-flop</p><p>100. . . Chip</p><p>102. . . Contact pad</p><p>PIX1~PIX4. . . Amplifier</p>

Figure 1 is a schematic diagram showing a photoreceptor array on a chip.

FIG. 2 is a partial schematic diagram showing the front side of some photoreceptor groups 10 that can be found on the chip of FIG. 1. FIG.

Figures 3 and 4 show the clock sequence related to the input on the auxiliary amplifier as shown in Figure 2.

Fig. 5 is a schematic diagram showing an embodiment of a translation register used to operate any four amplifiers as shown in Fig. 2.

Figures 6 and 7 are respectively used to show the output timing diagrams of the amplifier shown in Figure 2 when the device in Figure 5 is operated with high resolution and low resolution.