Lead frame and method for manufacturing semiconductor package with the same

Lead frame and method for manufacturing semiconductor package using the lead frame

[Background of the invention]

The applicant of this application is the Korean Patent Application No. 10-2004-0011819 of the Korean Intellectual Property Office, and its application date is February 23, 2004; the contents disclosed in this patent application are hereby incorporated by reference The file is included in its entirety.

The present invention relates to a lead frame and a method for manufacturing a semiconductor package using the lead frame, in particular to a lead frame for connecting a semiconductor chip to an external circuit, the lead frame is composed of a pre-plated frame (pre-plated frame) Manufactured. The present invention further relates to a method for manufacturing a semiconductor package using the lead frame.

Figure 1 shows a conventional lead frame.

As shown in Figure 1, the lead frame includes a die pad 110 and a lead 120. A pad support 180 is used to connect the die pad 110 to a rail 170 to support the semiconductor wafer. The pins include inner pins 130 and outer pins 140. In this case, a damper 160 is arranged between the inner pin 130 and the outer pin 140 to maintain the gap between the inner pin 130 and the outer pin 140, so as to support the inner pin 130 and the outer pin 140. Pin 140. After the semiconductor package is assembled, the guide rail 170 and the barrier 160 are removed.

Figure 2 shows a semiconductor package 105 with the lead frame described in Figure 1, in which the semiconductor chip is mounted on the lead frame.

As shown in FIG. 2, the semiconductor chip 50 is mounted on the die base 110. The inner lead 130 is connected to the semiconductor chip 50 by wire bonding with the metal wire 52, and the outer lead 140 is electrically connected to an external circuit. Therefore, the pin 120 has a bonding portion W for wire bonding to the semiconductor chip 50, an outer bonding portion S connected to an external circuit, and a bent portion B bent in the middle of the pin 120.

The semiconductor wafer 50 and the inner leads 130 are molded with resin so that the semiconductor package 105 is fixedly formed.

The manufacturing of such a semiconductor package 105 needs to improve the wire bonding performance between the semiconductor chip 50 and the inner pins 130. Therefore, it is possible to deposit solder made of tin-lead (Sn-Pb) on a predetermined area of the outer lead 140.

However, since this manufacturing process must be completed through a wet process after the resin molding process is completed, the reliability of the product may decrease.

It is recommended to use a pre-plated frame to solve this problem. In this method, metal with excellent solder wettability is pre-deposited before the semiconductor packaging process, so that it can be used in the post semiconductor process. The solder-plating process can be omitted. The use of a lead frame with a pre-plated frame simplifies the post packaging process. In addition, since soldering can be omitted in the semiconductor packaging process, environmental pollution can be prevented.

However, since semiconductor chip bonding, wire bonding, epoxy resin molding, and soldering are all performed at temperatures above 200°C, when the lead frame is made of a pre-plated frame, the selection of an external plating layer becomes extremely important.

That is, the oxidation performance of the outer plating layer of the lead frame made of the pre-plated frame at high temperature, the bonding performance of the bonding metal wire, the adhesion performance of the silicon chip, the bonding performance of the epoxy resin, and the melting of the lead during soldering The fit must be good. Moreover, the outer plating layer has appropriate flexibility in order to prevent the bonding capillary from abrasion during the bonding process. In addition, the external plating layer must have the performance of preventing migration phenomenon, so that the semiconductor device can obtain long-term reliability; because when the plating metal is diffused into the medium under high temperature and humidity for a long time, the migration phenomenon may cause a short circuit.

Figure 3 shows the lead frame disclosed in US Patent No. 6,518,508, which has been assigned to the assignee of this application. The lead frame is made of a conventional pre-plated frame that can meet the above conditions.

As shown in Figure 3, the lead frame 120 includes: a base metal layer 121 (or called a base metal layer) made of copper, copper alloy or iron-nickel alloy, and a base metal layer deposited on the substrate. The nickel plating layer 122 on at least one surface of the layer 121, the nickel plating layer 122 is made of nickel or nickel alloy, a palladium plating layer 123 deposited on the nickel plating layer 122, the palladium plating layer 123 is made of palladium or palladium It is made of alloy and a protective electroplating layer 124 deposited on the palladium electroplating layer 123. The protective electroplating layer 124 is made of silver or a silver alloy.

The lead frame that is pre-plated with a pre-plated frame has good performance if it is not damaged by external impact. However, since the lead frame must undergo a bending process (attached to the assembly process of conventional semiconductor packages), the plating structure of the bent part may be cracked or corroded.

This problem may be more serious when the substrate metal layer 121 is made of alloy 42 instead of copper or copper alloy. That is, the alloy 42 is composed of 42% nickel and 58% iron, and is widely used as a lead frame material. However, because the alloy 42 and the palladium electroplating layer 123 and the palladium, gold, and silver dielectric systems of the protective electroplating layer 124 are very different, electrostatic coupling may be caused, which may cause severe corrosion of the substrate metal layer 121.

In particular, as shown in FIG. 4, cracks or other defects may be easily caused during the manufacturing process of the lead frame, which may cause the protective plating layer 124 to easily peel off. When the protective electroplating layer 124 is peeled off, the substrate metal layer 121 and the nickel electroplating layer 122 are exposed to the oxygen container of the outside air. Electrostatic coupling occurs in the portion 120c exposed to the outside air, thus accelerating corrosion.

In this case, when the palladium electroplating layer 123 is electroplated on the nickel electroplating layer 122 formed on the defective part through the electroplating process, since the eduction potential of palladium is similar to that of hydrogen, a large amount of hydrogen Mixed with the released palladium, the palladium electroplating layer 123 is damaged more quickly. Therefore, the wire bonding portion W and the soldering portion S of the lead frame 120 may be easily broken.

In addition, the nickel, palladium and protective plating layers are generally formed by an electroplating process. However, electroplating will make the flexibility of the plating layer worse. Therefore, when forming the bent portion of the lead, the bent portion B may be prone to cracks.

When cracks occur between the bent part B and the bonding part W of the lead (bonding wire to the semiconductor chip and the soldering part S electroplated on the external substrate), these parts are exposed to the air, resulting in electrostatic coupling Increase, thus causing the exposed part to be easily corroded.

In addition, in the process of forming the palladium and nickel electroplating layer, a large amount of hydrogen is mixed with the lead frame, so that the compactness of the palladium and nickel electroplating layer is deteriorated, and the reliability of the lead frame is also reduced.

The present invention provides the first method of manufacturing a semiconductor package, which includes an operation to prevent corrosion, which may be caused by cracks produced during the manufacturing process of using alloy 42 to manufacture the metal layer of the substrate. In addition, the present invention provides a lead frame manufactured by using this semiconductor package manufacturing method.

In addition, the present invention provides a second method of manufacturing a semiconductor package, which includes an operation of discharging the hydrogen generated in the process of manufacturing the electroplating layer to the outside.

The feature of the present invention is to provide a method for manufacturing a semiconductor package, which includes: a lead frame substrate metal layer made of iron and nickel as a base material; forming one or more electroplating layers on the substrate metal layer; and mounting on the lead frame Semiconductor wafer; molding the semiconductor wafer and at least a part of the lead frame; bending the lead frame to form the lead frame into a predetermined shape; and heat-treating the lead frame after the lead frame is bent.

The heat treatment is performed when the heat treatment temperature is about 150-350°C.

The heat treatment time for heat treatment is about 1-10 minutes.

The formed one or more electroplating layers may include: forming a nickel electroplating layer with nickel or a nickel alloy on the metal layer of the substrate; and forming a palladium electroplating layer with palladium or a palladium alloy on the nickel electroplating layer.

The formed one or more electroplating layers may further include: selecting at least one metal or alloy from silver, gold, cobalt, titanium, and palladium to form a protective electroplating layer on the palladium electroplating layer.

Another feature of the present invention is to provide a lead frame, which includes: a substrate metal layer made of nickel and iron as a base material; a nickel electroplating layer is deposited on at least one surface of the substrate metal layer, and the nickel electroplating layer is made of nickel Or nickel alloy; forming a palladium electroplating layer on the nickel electroplating layer, the palladium electroplating layer is made of palladium or palladium alloy; and at least one exposed portion on the substrate metal layer, nickel electroplating layer, and palladium electroplating layer Partially deposit a diffusion layer.

The metal layer of the substrate is made of Alloy 42.

After the palladium plating layer is formed on the nickel plating layer, the lead wire frame is heat-treated to obtain the diffusion layer.

According to the present invention, even if fine cracks are generated during the bending of the lead frame, the lead frame containing the substrate metal layer made of alloy 42 can be prevented from being corroded.

The following are preferred specific embodiments of the present invention, which are described in more detail with the accompanying drawings. However, the present invention may have many different implementation forms and should not be considered limited only to the proposed embodiment. More specifically, these proposed embodiments make this disclosure more complete and complete, and fully convey the concept of the present invention to those skilled in the art. In the figure, the thickness and range of the build-up layer are exaggerated for clarity.

The lead frame of the present invention has a base metal layer made of iron and nickel as a base material. In this case, the base metal layer may be made of alloy 42 containing 42% nickel, 58% iron and other minor elements. production.

FIG. 5 shows a flowchart of a method for manufacturing a semiconductor package according to a specific embodiment of the present invention, and FIGS. 6a to 6g show cross-sectional views of individual operations of the method for manufacturing a semiconductor package according to a specific embodiment of the present invention.

As shown in the figure, the substrate metal layer 221 is provided first (S10). Then, an electroplating layer is deposited on the substrate metal layer 220 before the semiconductor assembly process is completed (S20).

In step (S20), a nickel plating layer 222 formed of nickel or nickel alloy is first deposited on the substrate metal layer 221 (S21), and then a nickel plating layer 222 formed of palladium or a palladium alloy may be deposited on the nickel plating layer 222. Palladium plating layer 223 (S22).

The function of the nickel plating layer 222 is to prevent the substrate metal layer 221 from spreading to the surface of the lead frame. The palladium electroplating layer 223 is made of a metal with good solderability, and it functions to protect the surface of the nickel electroplating layer 222.

In addition, it is possible to deposit a protective plating layer 224 made of a noble metal with high oxidation resistance to cover the palladium plating layer 223. Therefore, the oxidation of the palladium electroplated layer 223 can be effectively prevented.

The protective electroplating layer 224 may be made of one or more selected metals such as silver, gold, cobalt, titanium, and palladium.

The protective electroplating layer 224 may be made by a variety of different methods. For example, when the protective electroplating layer 224 is made of palladium and gold or gold and silver, the metals may be electroplated individually through at least one different electroplating process. In addition, these metals may be alloys and electroplated through an electroplating process.

Then the lead frame is subjected to the semiconductor packaging assembly process. In the semiconductor package assembly process, the semiconductor chip is bonded on the lead frame (S30), and then at least a part of the semiconductor chip and the lead frame is molded to fix the semiconductor package (S40).

In the operation step (S30), firstly, the semiconductor chip 50 is mounted on the die base 210 and connected to the pin 220 by the connection object 52. In the figure, the semiconductor chip 50 and the pins 220 are wire-bonded to each other by the connecting object 52. However, the present invention is not limited to this specific example, and any structure that can electrically connect the semiconductor chip 50 and the pins 220 may be used.

In the step (S40), at least a part of the semiconductor chip 50 and the lead frame 220 may be molded with a mold 55 to protect the semiconductor chip from external force.

Then, a part of the molded pin 220 is bent into a predetermined shape (S50).

In the process of bending the pin 220, the bent portion may be slightly cracked, so the substrate metal layer 221 and/or the nickel plating layer 222 in the exposed portion 220c may be exposed to the outside air due to the cracks.

Therefore, electrostatic coupling may occur between the metal of the palladium plating layer 223 and/or the protective plating layer 224 and nickel, or between the metal of the palladium plating layer 223 and/or the protective plating layer 224 and the alloy 42, thereby accelerating corrosion .

Therefore, in the present invention, in order to prevent corrosion of the exposed portion 220c, after the lead 220 is bent (S50), the lead frame is heat-treated (S60).

In step (S60), the heat treatment temperature may be set to 150-350°C. When the heat treatment temperature is lower than 150°C, the heat treatment effect cannot be sufficiently obtained. When the heat treatment temperature is higher than 150°C, the surface of the lead frame may be oxidized, resulting in poor welding quality.

In addition, the heat treatment may be performed for 1-10 minutes. When the heat treatment is performed for less than 1 minute, a sufficient heat treatment effect cannot be obtained. When the heat treatment is performed for more than 10 minutes, the welding quality deteriorates. These conditions are specific considerations for using the shortest time and not damaging the semiconductor package during the process of transferring the active energy required by the diffused metal to the metal. The actual power used to diffuse the metal may be supplied by other methods.

Subsequently, deposit a metal layer formed of at least one metal selected from silver, gold, cobalt, titanium, and palladium on the surface of the lead frame (especially on the exposed portion 220c where the metal layer of the substrate and the nickel plating layer are exposed to the outside air) The diffusion layer 225.

In more detail, the exposed part 220c of the lead frame may be a good way for atoms to diffuse. That is, in the heat treatment step (S60), the atoms of the protective plating layer 224 formed of silver, gold, cobalt, titanium, or palladium diffuse to the outside or the surface through the exposed portion 220. Therefore, the diffusion layer 225 containing at least one metal of silver, gold, cobalt, titanium, and palladium may be deposited on the exposed portion 220c.

The diffusion layer 225 functions as a protective electroplating layer to prevent the alloy 42 or nickel exposed in the exposed portion 220c from directly contacting the outside air. Therefore, preventing corrosion of the lead frame can protect alloy 42 and nickel from oxidation.

At the same time, in the operation steps of forming the palladium electroplating layer 223 and the nickel electroplating layer 222, hydrogen may be mixed in the lead frame, therefore, the tightness of the lead frame becomes poor and the electroplating layer is unstable.

However, when the heat treatment is performed in the present invention, the hydrogen is activated by high temperature. Therefore, the hydrogen atoms interact to diffuse to the surface and release to the outside, thereby increasing the compactness and reliability of the plating layer and improving the corrosion resistance of the plating layer. sex.

The effect of the method of the present invention is explained more clearly with the following test example.

<Experimental example>

The test sample used is a semiconductor package containing a lead frame. The lead frame has a substrate metal layer, a nickel plating layer, a palladium plating layer, and a protective plating layer made of gold or silver, which are stacked in the above order.

The corrosion resistance was tested by the salt spray test. When the temperature of the incubator is 35°C, the brine containing 55% sodium chloride is used at 40g/m per 24 hours²spray. In this case, the lead frame is in a state where the reflow operation has been completed in the reflow device. The maximum reflow temperature of the reflow device is 235°C, and the reflow time is 7mm/min.

Figure 7A shows a photograph of the semiconductor package 105 that has not been heat-treated and has completed the salt spray test. This photo shows that a large part of C of the lead 120 mounted on the semiconductor package 105 has been corroded. In particular, the photo shows that the corrosion at the curved part B is more serious. When the semiconductor package 105 is analyzed by X-ray photoelectron spectroscopy (XPS), as shown in Fig. 8A, it can be seen that nickel and iron are detected.

FIG. 7B shows a photograph of the semiconductor package 205 after the heat treatment of the present invention and the salt spray test has been completed. This photo shows that the pins 220 mounted on the semiconductor package 205 have no corroded parts. Particularly, there is no corrosion even in the bending zone part B. When the semiconductor package 205 is analyzed by X-ray photoelectron spectroscopy (XPS), as shown in Figure 8B, it can be seen that no nickel and iron are detected, and only gold and silver constituting the protective plating layer are detected.

Figure 9 shows the lead frame 200 and its semiconductor package 205 manufactured according to the method of the present invention.

As shown in FIG. 9, the lead frame 200 of the present invention includes: a substrate metal layer 221, a nickel plating layer 222, a palladium plating layer 223, and a diffusion layer 225.

The base metal layer 221 is the empty frame of the lead frame 200, which is made of nickel and iron as the main base materials. In this case, the substrate metal layer 221 may be made of Alloy 42.

The nickel electroplating layer 222 is deposited on the metal layer 221. The nickel electroplating layer 222 is made of nickel or a nickel alloy to prevent the alloy 42 or nickel from being diffused to the surface of the lead frame.

The palladium electroplating layer 223 is deposited on the nickel electroplating layer 222, and the palladium electroplating layer 223 is made of palladium or a palladium alloy. The function of the palladium plating layer is to improve the solder characteristics.

The protective plating layer 224 may be deposited on the palladium plating layer 223. The protective plating layer 224 functions to prevent the surface of the palladium plating layer 223 from being oxidized. The protective electroplating layer 224 may be made of at least one metal selected from silver, gold, cobalt, titanium, and palladium.

The diffusion layer 225 is deposited on at least the exposed portions of the substrate metal layer 221, the nickel electroplating layer 222, and the palladium electroplating layer 223. That is, the exposed part may be caused by the cracks generated on the bonding part W (bonding the inner leads to the semiconductor chip by wire bonding) and the cracks generated on the outer soldering part S (bonding the outer leads to the outer substrate) 220c is filled with a diffusion layer 225, thereby preventing the exposed part from being exposed to the outside air.

In the steps of forming the palladium electroplated layer 223 and the nickel electroplated layer 222, hydrogen may be mixed in the lead frame, thereby causing the tightness of the lead frame to deteriorate and making the electroplating layer unstable.

However, in the present invention, the heat treatment step has been implemented, and the hydrogen is activated by high temperature. Therefore, the hydrogen atoms interact to diffuse to the surface and be released to the outside, thereby increasing the compactness and reliability of the plating layer and improving the corrosion resistance of the plating layer. sex.

During the bending operation step of the lead frame, small cracks may often be generated in the bending area portion B. However, in the present invention, a diffusion layer is used to prevent the substrate metal layer 221, the nickel plating layer 222, and the palladium plating layer 223 from being exposed to the outside. In the air, it can prevent the lead frame from being corroded in the bending part B.

The diffusion layer 225 may be made of at least one metal selected from silver, gold, cobalt, titanium, and palladium, and these metals are heat-treated to form the diffusion layer.

The semiconductor chip 50 is mounted on the lead frame 220 and electrically connected to an external circuit, thereby forming the semiconductor package 205. The semiconductor package 205 generally includes a lead frame 200, a semiconductor chip 50, a metal wire 252 and a mold resin 255.

That is, the semiconductor chip 50 is arranged on the die base 210, and the inner lead 130 is bonded to the semiconductor chip 50 by the metal wire 252. The outer pin 140 is electrically connected to an external circuit. The semiconductor chip 50 and the inner leads 130 are molded with a mold resin 255, so that the semiconductor package 205 is fixedly molded.

Figure 9 also shows an example of a semiconductor package containing the lead frame of the present invention. However, the present invention is not limited to the scope of this example.

According to the present invention, since the heat treatment operation step is performed after the lead frame completes the bending operation step, the substrate metal layer, the nickel electroplating layer and the palladium electroplating layer will not be exposed to the outside air. Therefore, even when the lead frame generates fine cracks during the bending operation, the lead frame with the base metal layer made of alloy 42 can be prevented from being corroded.

In addition, the stress concentration caused by the hydrogen in the lead frame can be eliminated through the heat treatment operation, so the tightness and reliability of the lead frame can be further improved.

Although the present invention has been described in detail with reference to examples and specific embodiments, those skilled in the art will understand that various forms and details may be changed, but this does not violate the scope and spirit of the following patent applications of the present invention.

<p>105, 205. . . Semiconductor packaging</p><p>110, 210. . . Die seat</p><p>120, 220. . . Pin</p><p>130. . . Inner pin</p><p>140. . . Outer pin</p><p>160. . . Barrier</p><p>170. . . guide</p><p>180. . . Die seat support</p><p>42. . . alloy</p><p>50. . . Semiconductor wafer</p><p>52, 252. . . metal wires</p><p>55. . . Molded objects</p><p>120, 200. . . Lead frame</p><p>120c, 220c. . . Exposed part</p><p>121, 221. . . Substrate metal layer</p><p>122, 222. . . Nickel plating</p><p>123, 223. . . Palladium plating</p><p>124, 224. . . Protective plating</p><p>225. . . Diffusion layer</p><p>255. . . Molded resin</p><p>W. . . Junction</p><p>B. . . Curved part</p><p>S. . . Soldering part</p>

Figure 1 shows a plan view of a conventional lead frame; Figure 2 shows a cross-sectional view of a semiconductor package with semiconductor chips mounted on the lead frame of Figure 1; Figure 3 shows a stack of conventional lead frames A cross-sectional view of the structure; Fig. 4 is an enlarged cross-sectional view of the bent portion of the lead frame described in Fig. 3; Fig. 5 is a flowchart of a method for manufacturing a semiconductor package according to a specific embodiment of the present invention; Fig. 6A~ Figure 6G shows a cross-sectional view of individual operations of the method for manufacturing a semiconductor package according to a specific embodiment of the present invention; Figure 7A shows a photo of a lead frame manufactured according to a conventional method and subjected to a salt spray test; Figure 7B shows a basis The photograph of the lead frame manufactured by the present invention and passed the salt spray test; Figure 8A shows the X-ray photoelectron spectrometer (XPS) spectrum of the lead frame described in Figure 7A; Figure 8B shows the 7B The X-ray photoelectron spectrometer (XPS) spectrum of the lead frame shown in the figure; Figure 9 is a perspective view of the lead frame and its semiconductor package manufactured according to the method described in Figure 5.