Data structure design system and method for prolonging useful life of FRAM

Data structure design system and method for prolonging the service life of ferroelectric memory

The present invention relates to a system and method for extending the service life of ferroelectric memory, and more particularly to a data structure design system and method for extending the service life of ferroelectric memory.

With the vigorous development of the information industry and the increasing popularity of information media applications, memory used to store various types of information has become increasingly important. Among them, electronic memory is undoubtedly the most important one. At present, electronic memory can be divided into two categories according to its functions. One is Random Access Memory (RAM), which emphasizes high-speed access. Its read and write speed can be below 100 nanoseconds (ns), but there is no permanent memory. The other type is non-volatile (Non-Volatile) Read Only Memory (ROM), which emphasizes the function of permanent memory, but the data writing speed takes more than microseconds (ms) . Neither of these two types of memory can have both functions at the same time, which makes the application of electronic memory subject to many restrictions. For this reason, Ferroelectric Random Access Memory (FRAM) appears, which applies ferroelectric materials to the memory, which has the characteristics of high-speed reading and writing, and can save the data in it without power supply.

At present, systems or methods for ferroelectric memory are disclosed in many patent documents. For example, the US Patent Office issued Patent No. 6385078 on April 7, 2002, entitled "Controlling Ferroelectric Memory Reading and Writing Operations" Apparatus and Method (Ferroelectric Random Access Memory Device and Method for Controlling Read/Write Operations Thereof)", the patent discloses an address translation detection circuit that generates a pulse signal corresponding to a column of addresses locked by the address lock circuit , The identification signal generating circuit generates a chip usable identification signal corresponding to the available signal of the internal chip, the delay circuit delays the pulse signal within a predetermined time, and at the same time makes the internal chip usable signal unavailable within the delay time, the identification signal generation circuit makes the chip The available identification signal cannot be used, thereby preventing misreading and writing operations on the ferroelectric memory and improving the reliability of reading and writing. However, due to the limit of the number of reads and writes of ferroelectric memory, the entire storage space is often not used evenly. When used for a certain number of times, its storage function will be lost. The invention can only prevent the spike signal from affecting the ferroelectric memory. The misreading and writing operation of the ferroelectric memory cannot make the entire ferroelectric memory be used evenly to extend its service life. Therefore, users cannot use the same ferroelectric memory for a long time.

In order to overcome the above-mentioned shortcomings of the prior art, it is necessary to provide a data structure design system and method for prolonging the service life of ferroelectric memory.

The main purpose of the present invention is to provide a data structure design system and method for prolonging the service life of ferroelectric memory, which can evenly use the entire storage space of the ferroelectric memory and prolong the service life of the ferroelectric memory.

The present invention provides a data structure design system for extending the service life of ferroelectric memory. The system includes: a central processing unit, a ferroelectric memory, a synchronous dynamic memory, a timer and a system bus. Among them, the ferroelectric memory is logically divided into a plurality of fixed-size storage blocks for storing data. Synchronous dynamic memory is used to store the data that needs to be written into the ferroelectric memory. It is logically divided into three storage spaces, and each storage space is logically divided into a plurality of storage blocks of fixed size, and Three data structures corresponding to the three storage spaces are set in the synchronous dynamic memory: queue one, queue two and Hash table. Among them, queue one is composed of empty blocks and blocks storing unused data, and this block corresponds to the hollow blocks of ferroelectric memory and blocks storing unused data one-to-one; queue two is no longer stored by storage The composition of the block used and the related data has not been removed from the ferroelectric memory. This block corresponds to the block in the ferroelectric memory that stores the data that is no longer used; the Hash table records that the storage is in use and has been The block in which the data is recorded in the ferroelectric memory, and the block corresponds to the block in the ferroelectric memory that stores the data being used. The central processing unit is used to divide the ferroelectric memory block and the synchronous dynamic memory block, and control the data stored in the ferroelectric memory and the synchronous dynamic memory by setting three data structures in the synchronous dynamic memory , Or use the system bus to receive data from an external data source and store it in ferroelectric memory and synchronous dynamic memory. The timer is used to record the time when the data stored in the ferroelectric memory block has not been read.

The present invention also provides a data structure design method for extending the service life of the ferroelectric memory. The method includes the following steps: (a) dividing the ferroelectric memory into a plurality of blocks; (b) dividing the synchronous dynamic memory into three (C) Divide each storage space into multiple blocks; (d) Set up three data structures corresponding to the three storage spaces in the synchronous dynamic memory: Queue 1, Queue 2, and Hash table; (e) One-to-one correspondence between the blocks in the three data structures and the blocks in the ferroelectric memory; (f) Read a piece of data from an external data source; (g) Update the blocks contained in the second queue; h) Determine whether there is an empty block in the queue 1 of the synchronous dynamic memory. If there is an empty block in the queue 1, go directly to step k; (i) If there is no empty block in the queue 1, delete it The data stored in the first plural blocks in the second queue and the corresponding ferroelectric memory block; (j) put the empty block after the deleted data in the second queue into the first queue; (k) write the data to the queue (L) Determine whether the data in the external data source has been read, if the data in the external data source has not been read, return to step f; (m) If the data in the external data source has been read When finished, check whether there is data to be written into the ferroelectric memory in the second queue; (n) If there is the data in the second queue, put the block storing the data into the Hash table, and the process ends; (o) If there is no such data in queue two, check whether there is such data in queue one; (p) if there is no such data in queue one, the process ends; (q) if there is such data in queue one, read the data; ( r) Write the data into the corresponding block of the ferroelectric memory, and put the block containing the data in the queue 1 into the Hash table.

The step (g) updating the blocks included in the second queue further includes the following steps: (g1) initializing the timer to zero; (g2) setting a predetermined time; (g3) judging whether the timer displays the predetermined time, if the timer displays this For a predetermined time, search for unused data blocks in the ferroelectric memory during the time and the corresponding blocks in queue one; (g4) put a plurality of unused data storage blocks in queue one into queue two.

The data structure designed by the present invention can uniformly use the storage space of the ferroelectric memory, avoiding some areas that are frequently used from being damaged first, so as to achieve the purpose of extending the service life of the ferroelectric memory.

As shown in the first figure, it is the hardware architecture diagram of the data structure design system for extending the service life of the ferroelectric memory of the present invention. The system includes a central processing unit 1, a ferroelectric memory 2, a synchronous dynamic memory 3, a timer 4, and a system bus 5. Among them, the ferroelectric memory 2 and the synchronous dynamic memory 3 are respectively connected to the central processing unit 1 through the system bus 5. The ferroelectric memory 2 is logically divided into a plurality of storage blocks for storing data. The synchronous dynamic memory 3 is used to store data to be written into the ferroelectric memory 2. The central processing unit 1 is used to divide the ferroelectric memory 2 into fixed-size blocks, and logically divide the synchronous dynamic memory 3 into three storage spaces, and then logically divide each storage space into plural fixed blocks For storage blocks of a large size, three data structures corresponding to the three storage spaces are set in the synchronous dynamic memory 3: Queue 1, Queue 2, and Hash table. The three data structures are used to compare the ferroelectric memory 2 and The data stored in the synchronous dynamic memory 3 is read and written, or the system bus 5 receives data from an external data source (not shown in the figure) and stores it in the synchronous dynamic memory 3. The timer 4 is used to record the time when the data stored in the ferroelectric memory 2 block has not been read.

As shown in the second figure, it is a schematic diagram of the ferroelectric memory storage space of the data structure design system for extending the service life of the ferroelectric memory of the present invention. A ferroelectric memory 2, which is logically divided into a plurality of fixed-size blocks BLOCK[0], BLOCK[1], ... BLOCK[w], in this embodiment, each block has a capacity of 1MByte The storage space is used to store a piece of data.

As shown in the third figure a, it is a schematic diagram of the synchronous dynamic memory storage space of the data structure design system for extending the service life of the ferroelectric memory of the present invention. A synchronous dynamic memory 3 is logically divided into three storage spaces, and each storage space is logically divided into a plurality of fixed-size storage blocks, and each block has a storage space with a capacity of 1 MByte. And three data structures corresponding to the three storage spaces are set in the synchronous dynamic memory 3: Queue 1, Queue 2, and Hash table. Among them, queue 1 is composed of n empty blocks and blocks BLOCK[0], BLOCK[1], ..., BLOCK[n-1] that store unused data, and the plural blocks are connected to ferroelectric memory 2 There is a one-to-one correspondence between the hollow blocks and the blocks of unused data; the second queue consists of m blocks BLOCK[n] and BLOCK[n+1 that are no longer in use and have not yet removed relevant data from the ferroelectric memory 2. ],......, BLOCK[n+m-1], the complex number of blocks corresponds to the blocks in the ferroelectric memory 2 that store data that is no longer used; the Hash table records that u storages are in use and The blocks BLOCK[n+m], BLOCK[n+m+1],..., BLOCK[n+m+u-1] that have recorded the data in the ferroelectric memory 2, the complex number of blocks and the iron The blocks storing the data in use in the electrical memory 2 correspond one to one.

As shown in the third figure b, it is a schematic diagram of the Hash table structure of the data structure design system for extending the service life of the ferroelectric memory of the present invention. The Hash table is an array of pointers. Each array element corresponds to a set of nodes with the same hash value. Each node is the name of a piece of data stored. Among them, the array elements are: BLOCK[n+m], BLOCK[n+m+1], ..., BLOCK[n+m+u-1], the array element BLOCK[n+m] corresponds to the data being used One,..., the array element BLOCK[n+m+u-1] corresponds to the data U being used. If a certain piece of data needs to be searched, the central processing unit 1 obtains the array index value according to the data name through the Hash function calculation, and the required piece of data can be found by searching the node pointed to by the corresponding element of the array.

As shown in the fourth figure, it is a flow chart of the synchronous dynamic memory write data in the data structure design method for extending the service life of the ferroelectric memory of the present invention. First, the central processing unit 1 divides the ferroelectric memory 2 into plural blocks (step S401), and divides the synchronous dynamic memory 3 into three storage spaces (step S402), and each storage space is divided into plural blocks (Step S403), and then set three data structures corresponding to the three storage spaces in the synchronous dynamic memory 3: Queue 1, Queue 2, and Hash table (Step S404). The central processing unit 1 maps the blocks in the three data structures to the blocks in the ferroelectric memory one-to-one (step S405), and then the central processing unit 1 uses the system bus 5 from an external data source (not shown) A piece of data is read (step S406), and the blocks included in the second queue are updated (step S407), and it is determined whether there is an empty block in the first queue of the synchronous dynamic memory 3 (step S408). If there is an empty block in the first queue, go directly to step S411; if there is no empty block in the first queue, delete the data in the first plural blocks and the corresponding ferroelectric memory block in the second queue (step S409 ). Put the empty block in the queue 2 after deleting the data into the queue 1 (step S410), and then write the data into the empty block in the queue 1 (step S411). Then the central processor 1 judges whether the data in the external data source has been read (step S412), if it has not been read, the flow returns to step S407; if it has been read, the flow goes to step A (please refer to the fifth figure).

As shown in Fig. 5, it is a flow chart of data writing into ferroelectric memory in the data structure design method for extending the service life of ferroelectric memory according to the present invention. When it is necessary to write data into the ferroelectric memory 2, the central processing unit 1 first checks whether there is data to be written into the ferroelectric memory 2 in the second queue (step S501). If there is the data in the second queue, the block storing the data is put into the Hash table, and the process ends (step S502); if there is no such data in the second queue, the central processing unit 1 searches for whether there is any need to write in the first queue Enter the data of the ferroelectric memory 2 (step S503). If there is the data in the queue 1, the CPU 1 reads the data (step S504), and then writes the data into the corresponding block of the ferroelectric memory 2 , And put the block storing the data in the queue 1 into the Hash table (step S505); if there is no such data in the queue 1, the process ends.

As shown in Figure 6, it is a flowchart of the block included in the update queue 2 of the data structure design method for extending the service life of the ferroelectric memory of the present invention. First, the central processing unit 1 initializes the timer 4 to zero (step S601), and sets a predetermined time (step S602), and then determines whether the timer 4 displays the predetermined time (step S603). If the timer 4 displays the predetermined time, the central The processor 1 searches for the data blocks in the ferroelectric memory 2 that have not been read during the time and the corresponding blocks in the queue 1 (step S604). Finally, the central processing unit 1 puts the plurality of unused blocks in the first queue into the second queue (step S605).

Although the present invention is disclosed as above in preferred embodiments, it is not intended to limit the present invention. Anyone familiar with this technique can make changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the attached patent application.

<p>1Central Processing Unit</p><p>2Ferroelectric memory</p><p>3Synchronous dynamic memory</p><p>4Timer</p><p>5System bus</p>

The first figure is the system architecture diagram of the data structure design for extending the life of the ferroelectric memory according to the present invention.

The second figure is a schematic diagram of the storage space of the ferroelectric memory in the data structure design system for extending the service life of the ferroelectric memory of the present invention.

The third figure a is a schematic diagram of the synchronous dynamic memory storage space of the data structure design system for extending the service life of the ferroelectric memory of the present invention.

The third figure b is a schematic diagram of the Hash table structure of the data structure design system for extending the service life of the ferroelectric memory according to the present invention.

The fourth figure is the data flow chart of the synchronous dynamic memory write data in the data structure design method for extending the service life of the ferroelectric memory of the present invention.

The fifth figure is a flow chart of data writing into ferroelectric memory in the data structure design method for extending the service life of ferroelectric memory according to the present invention.

The sixth figure is a flowchart of the block included in the second update queue of the data structure design method for extending the service life of the ferroelectric memory of the present invention.