Radio architecture

The invention comprises the use of transistors with different threshold voltages in different parts of an integrated circuit for a digital radio.

Λ

Advantageously, the invention includes the use of transistors with high or normal threshold voltages in circuits using digital signals, and transistors with reduced threshold voltages in circuits that process analog signals.

Further, the invention may include the use of certain transistors with high or normal threshold voltages and some transistors with reduced threshold voltages in the front end circuits of a transceiver 5. Such a transceiver may be a CMOS arrangement or may include only NMOS or PMOS devices.

Fig. 1 is a block diagram of a receiving transmitter according to the invention.

Figure 2 is a schematic circuit diagram of a front-end circuit according to the invention.

Fig. 3 shows a first conventional circuit for illustrating the advantages of the present invention.

Figure 4 illustrates a second conventional circuit for illustrating the advantages of the present invention.

As shown in FIG. 1, a receiver transmitter 15 for use in a mobile phone has radio 2, a receiver antenna 4 for receiving radio signals, and a low noise amplifier 6 for renewing the received signals to usable levels. The amplified signals are passed to a mixer where they are converted to an intermediate frequency lower than the radio frequency and then filtered through a filter 10. The filtered signals pass to an analog-to-digital (A / D) converter 12, which converts the signals into digital form; wherein the signal is output to line 16 after being used by the processor 14.

The signals for transmission are provided in digital form via line 18 to the signal processor 14 and then post-processed to a digital-to-analog (D / A) converter 20. Once converted to the analog form, the signals are transmitted to a modulator 22 for conversion to radio frequency and then to a power amplifier 24 and to a transmitting antenna 26 (which can be combined with the receiver antenna 4) for transmission as a radio signal.

The general structure of the transceiver described above will be apparent to those skilled in the art and it will be seen that various changes and modifications are possible.

It has also been proposed that it would be advantageous to integrate the circuits into a single chip 30.

The transceiver shown in FIG. 1 comprises two different types of circuits that exhibit different needs, and these conflicting needs may be reduced in different circuit types.

It has been recognized by the inventors of the present invention that transistors having TJ voltages can be met. This allows the performance of the transceiver radio to be optimized, while allowing the radio circuits to be formed into a single integrated circuit, which means advantages in terms of the size and weight of the telephone.

In particular, the digital parts of the circuit, such as the A / D converter and the D / A converter, may be advantageous using CMOS transistors having normal (sometimes high) voltages in the + 1V region for an NMOS device or the -IV region for a PMOS device. is created. Thus, in each case, the magnitude of the threshold voltage is greater than 0.5 V. In contrast, the analog RF parts of the circuit, for example amplifiers, are advantageously formed using CMOS transistors with reduced threshold voltages of magnitudes less than 0.5V. This can lead to less power consumption, less noise, and higher bandwidth. The threshold voltages are preferably reduced to near zero or even out of zero. Thus, NMOS transistors may have small negative threshold voltages, PMOS transistors may have small positive threshold voltages.

The line 28 of FIG. 1 shows a preferred portion of the circuit at present. The circuits to the right of line 28 may have transistors with high threshold voltages, while the circuits to the left of line 28 may have transistors with low threshold voltages. However, other sections are also possible and in fact it is possible to use transistors with different threshold voltages in different parts of the same circuit.

U.S. Pat. No. 5,407,849, it is possible to achieve different threshold voltages at different transistors by varying threshold placement doses in selected parts of the semiconductor device by using existing masks or by adding additional extra masks.

Thus, a radio structure is disclosed which can be integrated on a single chip without a reduction in performance.

Figure 2 is a schematic circuit diagram of the front end circuit of a radio receiver in accordance with the invention. As mentioned briefly above, this circuit includes transistors with different threshold voltages. In the drawing, only transistors are shown for clarity. In Figure 2, transistors with reduced threshold voltages are shown with thick discharge source channels. As mentioned above, the threshold voltages of these devices can be substantially advantageously reduced to near or even below zero. Devices with thresholds below zero are referred to as depletion devices. The remainder of the circuit is conventional and the overall circuit design will be known to those skilled in the art. Transistors,

CMOS devices or PMOS or NMOS devices.

Generally, the receiver circuit of Figure 2 includes an input amplifier stage 52, local oscillator drivers 54, 56, and a pair of mixers 58, 60T. The circuit forms a single balanced front end. The circuit may be combined with another identical circuit to form a dual balanced low noise amplifier and mixer.

The amplifier stage 52 comprises a pair of input transistors M1, M4, which are separately connected to ground and supply voltage Vdd. An input radio frequency signal Rfin is provided by the first input transistor M1 being closed and the second input transistor M4 is reversed. The amplifier stage 52 also includes a pair of common gate transistors M2, M3 which receive the split supply voltage Vdd / 2 at their gates (inverted in the case of M3) and have discharge source channels connected to the discharge source channels of the input transistors M1, M4. It contains.

As can be seen, the cascade co-transistors M2, M3 are low-threshold devices.

The amplifier stage 52 is fed to the in-phase mixer 58 consisting of transistors M5, M6 and to a square mixer 60 consisting of transistors M7, M8.

The in-phase local oscillator signal LOi is supplied to the gate of the transistor M9 and the transistor

The entrapment of M10 is fed inverted; The transistors M9 and M10 are connected to ground searching with the supply voltage Vdd so that M9 and M10 form a local oscillator driver 54. The output signal from the transistors M9 and MI 0 is supplied to the gate of transistor M8 and is inverted to the gate of transistor M5.

A squared local oscillator signal LOq is supplied to the gate of transistor M1 and is fed to the gate of transistors M12; in this way the transistors Mil and M12 form a local oscillator driver 56. The output signal from the transistors Mil and M1 is supplied to the gate of the transistors M6, and to the gate of the transistor M7.

The output from the in-phase mixer 58 is an in-phase intermediate frequency signal IFi, and the output from the quadrature mixer 60 is the quadrature intermediate frequency signal IFq.

As can be seen, transistors M5, M6, M7 and M8 are low-threshold devices, while local oscillator drive transistors M9, MIO, Mil and M12 are of regular threshold type. In the case of local oscillator drive transistors, it is necessary to minimize the leakage currents in the closed state, so that the use of regular threshold transistors is preferred.

Furthermore, the use of transistors with high or regular threshold voltages in a VCO has the advantage that this results in a greater "signal oscillation" on the resonator and thus lower (phase) interference.

The advantage of using low threshold devices in a cascade as in amplifier 52 will be explained with reference to Figure 3. Fig. 3 shows two cascaded transistors Q1 and Q2 with the individual gate-supply voltages Vgs1 and Vgs2. An input signal, Q1, is applied to the gate and the output signal is obtained in the discharge of Q2. The threshold voltage of the gate welding voltage Vgs1, Vgsl - Vth = 1V of the ground welding device Q1 must be at least sufficiently high compared to the Vth. Otherwise, the device will not work in RF. Similar considerations apply to Q2; this means that the gate voltage Q2 must be set to at least about 2.8V. This may not be achieved in a 3V process and will not be achieved with certainty in any process with a low supply voltage. However, when the threshold voltage is to be reduced, for example, to zero, a gate voltage of 2V will be sufficient for Q2.

Therefore, when turned to the circuit of FIG. 2, it can be seen that the use of low-threshold devices for common door transistors M2, M3 with cascade may increase the dynamic range of the circuit and allow the use of lower supply voltages.

A potential problem associated with the use of low-mated devices is that they will provide transmission (even when the threshold ab is connected to the transmission), even when the gate supply voltages are zero. This problem is overcome in the amplifier circuit 52 of FIG. 2 with the input transistors M1, M4 being of the regular threshold type with low leakage currents. The input transistors M1, M4 may also have reduced thresholds; in this case it will be necessary to turn off the supply current to turn off the amplifier. In this case, it will be necessary to make the AC connection of the transistors M1, M4 to the input and to provide their separate pre-voltage.

The advantage of using low-threshold devices in a transmission gate as in the mixers 58, 60 will be explained with reference to FIG. In particular, Fig. 4 shows a transmission gate consisting of two transistors; one of them, Q3, has a gate connected to the supply voltage Vdd, and the other, Q4, has a gate connected to ground. For each transistor, the gate supply voltage is Vdd / 2. When the threshold voltage is taken into account and the back-bias effects are ignored, the effective gate voltage is Vdd / 2 Vth. For a 3 V process where the threshold voltage is 0.8V, this provides an effective gate voltage of about 0.7V. The lower the effective gate voltage, the greater the noise-related problem. Further, when the supply voltage is to be reduced, it will be difficult to make the effective door voltage high enough to fully switch the door. When the threshold voltage is to be reduced to zero, the effective gate voltage is equal to a Vdd / 2 of approximately 1.5 V, which is approximately twice the value provided when devices with normal thresholds are used.

Therefore, when it is returned to the circuit of FIG. 2, it can be seen that the transistors M5,

The use of low-threshold devices for M6, M7 and M8 reduces noise and also reduces the open resistance of the devices. It is also possible to use a lower supply voltage.

A potential problem associated with the use of low threshold devices is that they will be able to transmit even when the gate source is zero (due to subthreshold transmission).

This problem is overcome in the mixer circuits 58,60 of Fig. 2 due to the proper closure of each of the transistors by applying a negative door source voltage equal to and opposite to the operating voltage Vdd / 2.

In this way, receiver circuits are described which can operate effectively with low supply voltages without causing problems due to high leakage currents.