Noise detector and signal receiver arrangement for a frequency modulated receiver
Abstract
A noise detector and data signal receiver for a frequency modulation system has a first phaselock loop circuit (300), responsive to the received signal, for providing a signal indicative of the noise level and a first stage of demodulation of the received signal. A high speed comparator (330) of the first phaselock loop circuit provides a 90 degree phase-shifted signal which exhibits lesser delay and is substantially in phase with the input. Accordingly, the noise detection capability of the phaselock loop circuit (300) is improved. A second phaselock loop (200), also responsive to the received signal, extracts a voice signal from the received signal. A third phaselock loop (400) responsive to the once demodulated output signal of the first phaselock loop (300), extracts a digital data signal from the received signal. Squelch circuits (120, 121), activated at separate particular levels of noise, are responsive to the noise level indicator signal of the first phaselock loop. In addition, a noise proportional signal is provided to a speaker for providing the user of a hands-free telephone system of which the present receiver comprises a component with an audible feedback of the noise.

Term
No projected expiry on record.
- Priority
- Filed
- Granted
- Today
7 claims: 2 independent, 5 dependent
- 1Patentkrav claim 1. Brusdetektor- och signalmottagaranordning för frekvensmodulationsmottagare och innefattande en faslåsningskrets (300) inrättad att reagera på en mottagen signal (116) för att därvid avge en första utsignal (135) representerande den mottagna signalens bärvågs/brus-förhållande och en andra utsignal (119) representerande demoduleringen av den mottagna signalen, kännetecknad av att faslåsningskretsen (300) innefattar en faslåsningsslinga, en komparatorförstärkare (330) och en EXELLER-grind (3^0) kopplade i serie, varvid EXELLER-grinden (340) reagerar på komparatorförstärkaren (330) och komparatorförstärkaren i sin tur på faslåsningsslingan. 1st Noise detector and signal receiver device for frequency modulation receivers and comprising a phase locking circuit (300) adapted to respond to a received signal (116) thereby providing a first output (135) representing the carrier / noise ratio of the received signal and a second output (119) representing the demodulation of the received signal, characterized in that the phase locking circuit (300) comprises a phase locking loop, a comparator amplifier (330) and an EXELLER gate (300) connected in series, the EXELLER gate (340) responding to the comparator amplifier (330) and the comparator amplifier in turn on the phase locking loop.
- 6Anordning enligt något av kraven 3-5, kännetecknad av att den innefattar en tredje faslåsningskrets (200), som reagerar på en~mottagen talsignal (116) i och~för demodulering av densamma. 6th Device according to any of claims 3-5, characterized in that it comprises a third phase locking circuit (200) which responds to a received speech signal (116) in and ~ for demodulation thereof.
Independent claims2
90 paragraphs in 2 sections, as filed
(24) Running day
PATENT AUTHORITY (62) Number of the application
87-12-1* 452 833
62-10-07
2-03 24 Ansokan income as;
82-03-24
E Swedish patent application (86) International filing day (86) Filing date for European patent application (30)
81-04-06 US 251320
O Completed International Patent Application with Number □ European Patent Application Converted with Number (71) Applicant Western Electric Company Incorporated, New York NY US (72) Inventor D H. Nash, D H. Yen, Colts Neck, Shrewsbury NJ (74) Ombud AB Stockholm patent office (54) Designation Noise detector and signal receiver device according to frequency modulation receiver (56) Published publications: --- (57) Summary:
The invention relates to a noise detector and data signal receiver for an FM system with a first phase-locking circuit (300) responsive to the received signal for emitting a signal indicative of the noise level, and there is a first demodulation step for the received signal. A fast comparator (330) in the first phase-locking circuit provides a 90 ° phase-shifted signal scm gives a shorter delay and which is substantially in phase with the input signal. Accordingly, the noise detection capability of the phase locking circuit (300) is enhanced. A second phase locking circuit (200), which responds to the received signal, extracts a speech signal from the receiving signal. A third phase locking circuit (400), responsive to the once demodulated output of the first phase locking circuit (300), extracts a digital data signal from the received signal. Locking circuits (120, 121), activated at different noise levels, respond to the noise level indicating signal of the first phase locking circuit. Furthermore, a signal proportional to the noise is fed to a loudspeaker to give the user, especially when the same uses a handset that leaves hands free, an audible feedback signal of the noise.
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Figures in brackets indicate international identification code, INID code Letters in clamps indicate international document code
452 833
The present invention relates to a noise detector and signal receiver device of the kind specified in the preamble of claim 1.
It is often desirable to have an indication of the noise content of a signal received via a particular transmission system. In some types of transmission systems, the transmission medium changes so rapidly and between such extreme values that a constant working noise level indication is necessary for the system to function properly. Such systems include transmission systems operating with light frequency, especially when the transmitter and receiver are movable relative to each other. When such facilities are used for transmitting voice signals, it has been found desirable to set up an undesirably high noise level noise canceling circuit for excessive attenuation or suppression of the speech signal.
In a telephone system that leaves the operator's hands free and where the transmitter is intended to be portable and carried by the operator as he moves in the room, the transmission distance will vary considerably during normal use. the length of the transmission distance will undoubtedly vary greatly. In installations of this type, instantaneous and continuous noise detection and suppression are indispensable.
Methods for deriving a signal indicating the noise level of a received signal are generally discussed in the book Phaselock Techniques. by FM Gardner. U.S. Patent No. 4,228,220 (Celli et al.) Discloses that a phase locking circuit comprising an EXELLER gate provides such an indication signal in the receiver of a telephone system where the operator's hands are left free.
However, a problem has appeared when applying the instructions in Celli's patent. The two with two dividing circuits, which are utilized to give a single-phase signal of the same frequency for comparison with the received signal, cause an undesirable delay. The output of a voltage controlled oscillator included in the phase locking circuit is under normal operation 90 ° out of phase and before the received signal. The two with two dividing circuits, while providing the desired phase equilibrium with the received signal, give rise to
452nd 833 is a delay of the locally generated signal, which manifests itself as a source of undesired noise. Accordingly, according to Celli's patent, the phase locking circuit is unable to detect sufficiently low noise levels in the received signal.
In the practical use of the plant according to Celli, it was also realized that there was a need to provide alternate possibilities to process numbers and data. The portable installation described in the Celli patent lacks the ability to remotely request dial tone or call another subscriber. Assuming that the receiver contains a data display terminal, the Cellis transmitter lacks the ability to manipulate characters on the monitor.
The above-mentioned problems and related problems in the prior art are solved according to the present invention in that the noise detector and signal receiver device have obtained the features set out in claim 1.
The principles of the present invention permit the reception of a data signal over the same transmission medium as the transmitted speech signal, the data signal being capable of remotely processing a data display terminal ·. In accordance with the principles of the invention, the same phase-locked loop that provides the indicator signal representative of the noise level of the received signal also provides a once demodulated digital data signal. Accordingly, two working modes are provided: a speech and a data mode.
In accordance with one embodiment of the invention, the receiving signal may contain a frequency shift modulated signal, and the phase locking circuit may comprise a time comparator. Hereby, a comparator amplifier core is connected across the capacitor to provide the 90 ° phase-shifted, locally generated signal. In this way, the magnitude of the delay with respect to the locally generated signal can be significantly reduced. As a result, the noise detection capability of the phase locking loop is improved, so this loop can detect lower noise levels in the received signal.
It is assumed that the digital data signal is of the type first modulated above the speech signal and then added with the speech signal. This combined signal frequency is then modulated at a certain carrier frequency. Thus, there are two more
452 833 phase locking loops. A second such loop is used to extract the digital data signal from the once demodulated output of the first phase lock loop.
A transmitter which can be used for alternatively transmitting voice and data signals in the invention, where the latter are modulated!
over the voice signal, via an FM radio-modulated IR light medium is disclosed in U.S. Patent Application 251,258 filed April 6, 1982.
When the noise level indicating signal is obtained at the output of the first phase locking circuit, this signal can be used in speech or data operation mode to drive blocking circuits sensitive to certain levels of the reception noise. These sensitive noise cancellation circuits for selected levels of reception noise greatly attenuate - or 'block - the speech and / or data signals, respectively.
It is known that different types of received noise affect the reception of the speech signal differently than the data signal. For example, the effect of noise on the speech signal is subjectively determined by means of a group of listeners, while the effect of noise on the data signal is determined on probabilistic grounds by means of the number of errors in the received data signal. According to the present invention, therefore, the particular noise level for the function of the speech suppression circuit need not be the same level as for the function of the data suppression circuit.
If the invention is used in telephone systems that leave the operator's hands free, the noise level indicator output from the first phase lock loop will activate a speaker in order to provide an audible feedback of the noise to the user, regardless of the mode of operation.
The invention is further described below in the form of exemplary embodiments. Fig. 1 shows a schematic circuit diagram of an output device.
embodiment of a cordless telecommunications system comprising one!
a noise detector and a signal receiver according to the invention, the detector and receiver comprising three phase-locked circuits. F in g.2 is a detailed wiring diagram for an embodiment of the combined function of the phase-lock circuit of Fig. 1 for providing the noise level indicating signal and the once-demodulated digital data signal ·. Fig. 3 shows schematically an embodiment of the phase locking circuit according to fig. 1 for extracting a noise level indicating signal and a demodulated digital data signal. Fig. 4 shows in detail an embodiment of the phase locking circuit of Fig. 1 for recovering the digital signal from the
452 833 times, the output of the phase locking circuit demodulated. Fig. Shows graphically typical waveforms at various points in the phase locking circuit shown in Fig. 3.
Fig. 1 shows, as mentioned, a general block diagram of an embodiment of a cordless telephone system comprising a noise detector and signal receiver according to the invention. This facility includes a portable transmitter 1 for delivering an FM-modulated wave 101 to an optical receiver 110. The receiver provides the received FM-modulated carrier signal via the output 116.
The portable transmitter 1 includes a remote keyboard 1a, data input capabilities as well as the ability to remotely input via a microphone Ib. While the transmitter shown provides an FM-modulated frequency response signal 101 to the optical receiver 110, it is apparent that other transmission media are also possible. Such media are known in the radio and ultrasonic technology, in addition to the aforementioned light frequency applications.
In addition, it is assumed that the transmitter 1 is of the kind that first modulates the digital output from the keyboard 1b over the speech signal coming from the microphone 1b. -, radio or ultrasonic wave character.
A transmitter for providing FM-modulated infrared light as a signal and based on the above assumptions is disclosed in U.S. Application 251,258 of June 4, 1982. This states that the digital data signal from the keyboard la is frequency shift modulated to frequency levels just above the band 0-. 3 kHz, for example at the frequency 5.0 and 6.25 kHz. This method of modulating the data information above the speech information can also be realized by other known methods of data modulation without limiting the present invention.
The choice of receiver 110 depends on the media selected. As to the intended optical receiver, it is assumed to contain a lens system 11 which may include an optical filter for focusing received light waves 101 on the optical converter circuit 112, which may be a PIN diode or other known photodetecting or conversion device.
452 833
If voltage / current conversion is required, the electrical output of the converter 112 is output via a current converter 113 to a bandpass filter 114. This filter is selected so as to pass through a selected frequency band around the current carrier frequency.
In a particular embodiment, the carrier frequency is 120 kHz and the light frequency in the IR range. The selection of BF frequency to 120 kHz allows for desired two-way communication and some degree of insensitivity to fluorescent noise interference. A bandwidth of 50 kHz is selected to achieve satisfactory signal fidelity while minimizing power consumption in transmitter 1. After the receiving signal has passed through the filter, the signal passes through a limiting circuit 115. The constrained signal thus formed is supplied via the output lines 116 and the coupling capacitors C1 and C6 to the speech modulator phase locking circuit 200 and, respectively, to the combination functioning phase locking loop 300. The circuit 200 extracts the speech signal from the input signal. The speech output signal is delivered via the conductor 117 via the blocking circuit 120 to the de-emphasis circuit 125. The attenuated or lowered signal passes the line 118 to a telestation station and the called subscriber.
The phase locking circuits 200 and 300 follow the frequency of the incoming AC signals according to known principles and provide a certain degree of noise reduction. The active tracking of the phase locking loops and associated band limiting properties are combined with each other and give rise to noise reduction.
The received input is simultaneously supplied via coupling capacitors to the phase locking circuits 200 and 300; said signal is directly fed to one input of the EXELLER circuit 340, at whose output a signal representative of the noise level of the received signal is obtained.
It is required that the phase locking circuit 300 emits a delay-free signal in comparison with the received input signal at the EXELLER gate 340. A fast comparator gain circuit is used for this purpose. This connects the phase locking circuit to the second input of the EXELLER gate. The noise indication function of circuit 300 is discussed in more detail in connection with Figures 3 and 5.
The phase locking circuit 300 also provides the first demodulation of the digital data signal. The once demodulated data signal is output via output 119 to circuit 131.
452 .833
This signal is then coupled via capacitor C14 to the "data modulating phase locking circuit 400.
Circuit 400 performs the final demodulation of the data signal. The. particular type of demodulation phase locking circuit selected depends on the selected type of data modulation in the first stage of transmitter 1. The embodiment selected for the further discussion of Fig. 4 is based on frequency shift data modulation, but also other known modulation types can be used, for example phase shift modulation.
The digital data signal passes through the line 135 to the processing system 420, which can determine the execution of a certain function through the line 154 in accordance with received_data. For example, the user of the portable transmitter 1 can press a key on the keyboard 1a to request dial tone from the station. As a result, an order is transmitted over line 134 and initiates retransmission of dial tone over line 156, thereby driving speaker 520.
To return to the discussion of the indicator signal at the output of the EXELLER circuit 340, this signal will pass through the integration circuit 360, thereby giving rise to a second indicator signal representing the noise level of the received input signal. The non-integral input and integrated outputs of circuit 350 are described in more detail in connection with Figures 3 and 5. Nevertheless, it is also important at this stage to emphasize that both signals indicate the noise level and that appropriate selection of the latches 120 and 121, responsive to the unintegrated input, makes the need for the integrator 350 redundant.
In the described embodiment, the blocking circuits 120 and 121 act in response to an integrated input signal on the lines 131a and 12a, respectively. 131b. The blocking circuits can therefore be chosen to act as a response to either an integrated or an unintegrated signal. However, separate blocking circuits are required for speech and data because the noise levels at which the circuits are supposed to function are different.
The task of the latching circuits is to greatly attenuate or block the output levels of speech or data when a certain undesirable noise level is reached. It is known, especially in the application of a portable transmitter, that such a function is desirable. A user can rely on a transmission distance including reflected light
452 833 or inadvertently breaking the light path in one way or another and greatly increasing. noise level. As a result, no data or speech signals should be allowed to be misinterpreted or perceived as noise.
However, it is also known that the noise level presumed undesirable to the human ear can be determined subjectively, while the noise level which degrades the data signal quality is objectively determinable. These two levels are probably different for a particular application, and therefore the requirements of the two blocking circuits will relate to different noise levels.
It should not be concluded from Figure 1 that the blocking circuits
120 and 121 must be located in the exit distances 117 and 121 respectively.
119th For example, they may be arranged at any location in the data or speech paths, such as in paths 118, 135 and 134. Alternatively, they may act to attenuate the speech and data signals in order to prevent transmission of either signal, or they may be arranged to interrupt power supply to current-drawing elements in the speech or data paths.
At the same time as the unintegrated data signal is applied to the integrator 560, the signal through the lowpass filter 370 is applied to the amplifier 395 and to the speaker 320. If the noise level is undesirably high, it is practical to provide an audible indication of the noise of the transmitter 1 user. Thereby, the user will be encouraged to reorient the transmitter 1 or move closer to the receiver 110.
Figure 2 shows in detail an embodiment of the phase locking circuit of Figure 1 for recovering the speech signal from the received signal. For example, the phase locking circuit 200 may comprise an IC of Western Electric type 502 EP provided with input terminals
1-16, for simplicity, designated 201-216 in this application.
Negative DC voltage is applied across terminal 203, positive across terminal 213, and ground across terminal 211.
The received input at terminal 210 is applied to the phase comparator 221 for phase comparison between the input signal and a ground reference signal via the coupling capacitor C3 at the ground reference terminal 55 of the motors 211 and 212. The resistors R1 and R4 provide ground reference.
The loop filter 230 is connected at the terminal 209 to the output of the phase comparator 221. The loop filter should be chosen especially in view of the speech modulations carried out by the phase comparator 21. The loop's natural frequency and loop bandwidth in this embodiment is approximately 5.8 kHz. A second order lead-law452,833
filter can be used as loop filter 230.
The demodulated speech output signal, buffered in the amplifier multiplier circuit 222, is obtained at the output terminal 208. The speech output signal is simultaneously applied to the low-pass filter 250 and to the amplifier 223 input terminal 205.
The gain-determining resistor R6 is selected according to the dimensioned gain of the amplifier 223 and is connected to the terminals 206 and 207. The choice of the resistor R6 and the characteristics of the filter 250 determines the gain of the phase-locked speech modulator circuit 200. 240th
The output voltage of the amplifier 223 is applied to the voltage controlled oscillator circuit 224. The frequency-determining resistor R10 and capacitor C4 establish the output voltage of the VCO oscillator 220 at 120 kHz, which is the selected carrier frequency. This carrier output is re-fed via the TTL amplifier 225.
Fig. 3 shows in detail an embodiment of the phase locking circuit of Fig. 1. This circuit provides three output signals: a single demodulated data output signal on line 119, an indicator signal on line 131 and representing the noise level of the receive signal, and a noise signal on conductor 132 for formation as well. audible feedback for the user on the noisy transmission path.
In this embodiment, the phase-locking circuit is comprised of Kestern Electric's IC circuit 502 EP. However, other well-known circuits in the art can be used. The function is similar to the function of the speech modulator phase locking circuit 200. With the exception of the component values of the filter 350 and the value of the gain-determining resistor R17, the values of the resistance and capacitor values of the feedback path can be unchanged, as is the value of the time capacitor.
In contrast, the loop filter 350 is completely different from the loop filter 230. The bandwidth of the phase locking circuit 230 is chosen so as to be greater than the bandwidth of filter 200. In this particular embodiment, the bandwidth is four times larger or 27 kHz. One reason for the greater bandwidth is that it wants to provide a better indication of the noise. The greater bandwidth allows more noise, but in conjunction with the previously described tracking features of the phase locking circuit, a total noise reduction is achieved. Since in addition the frequency shift data is modulated above the number
452 833 at alternating frequencies of 5.0 and 6.25 kHz, the higher bandwidth will readily accept the frequency shift modulated input.
The characteristics of the low pass filter 380 allow the frequency shift 5 modulated output to pass. The filter also eliminates carrier frequency ripple and harmonics of the carrier. The gain-determining resistance R17 of the amplifier 323 is selected so that sufficient frequency shift modulated output is obtained at output 119.
The noise indicating function of the present invention relates to the frequency-determining capacitor C10, the fast comparator amplifier 330 and the E.XELLER gate 340. The low-pass filter 370 and the integration circuit 360, which responds to the indicator output of the EXELLER circuit 340, provide a noise signal input ratio. for the user and also an integrated signal for operation of the blocking circuits 120 and 12 respectively. 121st
In conventional operation of a phase locking circuit, the output of the VCO oscillator 324 is 90 ° ahead of phase relative to the input of the conductor 116 and is of the same frequency. In order to obtain a signal of the same phase as the input signal, the output of the VCO oscillator must be brought 90 ° ahead of phase before the same is applied to the input of the EXELLER gate 340. In this particular embodiment, the comparator amplifier LM319 from National Semiconductor is used.
In Fig. 5, the typical waveform is shown at various points in the phase locking circuit 300. The waveform 501 represents the unmodulated carrier signal of 120 kHz on the line 116. The waveform 502 represents the output of the VCO oscillator 324, which is 90 ° ahead of phase relative to the waveform 501. -förstärkarens
325 output. The waveform represents the output of the phase comparator 321, in which the comparator compares the phase relations between the waveforms 501 and 502. The waveform 503 refers to a smoothed waveform at the double carrier frequency. The curve shape 503 from the phase comparator, after passing through the low-pass filter 250, transitions to a frequency shift modulated signal on line 119.
It is of particular importance to provide a phase shifted waveform 504 which is as delay free as possible for comparison with waveform 501 in EXELLER gate 340. Such a delay free signal is provided by the comparator circuit 330. The comparator 40 amplifier provides a 90 ° phase shifted output konden10
452 833 satorn CIO. Curve shapes similar to waveforms 505 and 506 tile time-dependent waveforms of these waveforms are obtained at the output of EXELLER gate 540 after the EXELLER function is performed on waveforms 504 and 501.
If the noise is low compared to the phase-locking characteristics of the phase-locking circuit 300 and if the received signal is strong, a good carrier-to-noise ratio exists and the output curve 505 behaves as a very narrow periodic pulse 505a of the order of 50 ns. On the other hand, if the carrier-to-noise ratio is read, the periodic pulses 506a, such as the curve shape 505, appear to be of the order of 200 ns.
If the noise contains white noise or facies' of_relatively uneven distribution, the noise will give rise to time-dependent pulse width variations. If the noise is of a continuous nature, such as pulses or phase transitions, then the pulse widths will vary considerably. If the phase locking circuit is unable to follow the input signal and if the carrier-to-noise ratio is weak, a phenomenon called period skip will occur. cycle-skipping), the pulse width occurring continuously as wide pulses.
At the passage of the waveforms 505 and 506 through the integrator circuit 360, the size of the resulting waveforms 507 and 508 will be proportional to the pulse widths 505a and 506a. Consequently, in the event of a good carrier-to-noise ratio, hardly any output signal 507 will occur. If the carrier-to-noise ratio is small, considerable size will occur for the function of the latching circuits 120 and 121.
The waveforms resulting from the passage of curves 505 and 506 through the low pass filter 370 are not shown. However, it is known that the integration function accomplished by integrator 360 is similar to that of filtering function performed by low pass filter 370. Accordingly, it can be assumed that a cartridge waveform is provided at the output of filter 370 for subsequent feeding of the speaker 320.
In Fig. 4, a data modulator phase locking circuit is shown in detail
400th In the intended embodiment, an EXAR Integrated System XR-2211 provides phase-locking loop in the form of an integrated circuit 400a phase shift demodulation and tone decoding of the frequency shift decoculated input on line 119. Some other type of phase40 locking should be used if other data modulation is used. Terminals
POOR
QUALITY <sup>452 833</sup>
1-14 in the phase locking circuit 400a are denoted by suitability case 400-414.
The function of the phase locking circuit 400 should now be briefly described. The frequency shift modulated input on line 119 passes through the preamplifier circuit 421 and is applied to one input of the phase detector 422. The output of this detector 422 is supplied via the filter 423 for operating the VCO oscillator 427. \<sup>r</sup>The output of the CO oscillator 427 is phase matched to the amplified output of the preamplifier 4 21.
The output of the phase-locking circuit 422 is supplied via the low-pass filter 425 for comparison with the voltage of an internal reference voltage source 424 at the comparator 425. The output signal generated at the terminal 407 will consequently be a binary data stream. To avoid so-called chatter, a feedback resistor R50 is provided for positive feedback of the data output on line 153 to the input of amplifier 426 at terminal 408.
452.833
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Contents2
6 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6
15 members in 10 offices
Priority claims4
| Document | Office | Kind | Date |
|---|---|---|---|
| 25132081 | United States of America | A | |
| 25132081 | United States of America | A | |
| 251320 | – | – | – |
| US19810251320 | – | – | – |
Members15
| Document | Office | Kind | |
|---|---|---|---|
| BE892760A | Belgium | A | |
| SE8201876L | Sweden | L | |
| FR2503496A1 | France | A1 | |
| GB2096846A | United Kingdom | A | |
| NL8201449A | Netherlands (Kingdom of the) | A | |
| DE3212539A1 | Germany | A1 | |
| JPS57193130A | Japan | A | |
| US4388730A | United States of America | A | |
| CA1181818A | Canada | A | |
| GB2096846B | United Kingdom | B | |
| FR2503496B1 | France | B1 | |
| IT1150760B | Italy | B | |
| IT8220586A0 | Italy | A0 | |
| IT8220586D0 | Italy | D0 | |
| SE452833BThis record | Sweden | B |
1 legal event, as the office reported them to INPADOC
Events
| Event | Code | |
|---|---|---|
| Patent has lapsedLapsedNUG | NUG |
Numbers
- Publication, DOCDB
- 452833
- Publication, EPODOC
- SE452833
- Application
- 8201876
- Application, DOCDB
- 8201876
- Application, EPODOC
- SE19820001876
Titles2
- Swedish
- BRUSDETEKTOR- OCH SIGNALMOTTAGARANORDNING FOR FREKVENSMODULATIONSMOTTAGARE
- English
- SOUND DETECTOR AND SIGNAL RECEIVER DEVICE FOR FREQUENCY MODULATION RECEIVERS
Classification
- CPC, 3
- H03G3/34
- H04L27/14
- H04L27/152
- IPC, 10
- H03G3 34
- H04M11 06
- H04B1 10
- H04B10 00
- H04B10 11
- H04B10 2507
- H04B10 548
- H04L27 14
- H04L27 152
- H04M11 00