Apparatus for a data processing system having a peer relationship among a plurality of central processing units

. Field of the Invention

The present invention relates generally to data processing systems and more particularly to data processing systems having a plurality of central processing units.

2. Description of Related Art

In order to increase the processing capacity of data processing systems, a technique of connecting additional central processing units to the system has been used. The ability to select the number of central processing units in a data processing system enables efficient matching of system capacities to data processing requirements. Data processing units that have a plurality of central processing units typically have one of two configurations.

Referring now to Fig. 1A therein is shown a data processing system having a plurality of central processing units, according to a first implementation found in the prior art.

The data processing system includes a plurality of central processing units (11-12) connected to a common system link (19).

The central processing units 11-12 perform the manj. effective collection of data groups under the control of operating and user software programs.

The main memory unit (15), also attached to the system common link (19), stores the data and program signal groups that are currently being used by the central processing units. 17), connected to the system common link 19, include devices for storing large amounts of data and program signal groups, e.g. disk storage devices, terminals for data entry by system users, and communication devices for exchanging data groups and programs with remote locations.

System common link 19 provides the main route for exchanging data groups and programs between the component parts of the data processing system.

Referring next to Figure 1B, a second deployment of a multiprocessor system according to the related technique is shown. Generally, the same components are usable to perform the processing functions as in Fig. 1A, except that the components are connected by a memory control unit (14) instead of being connected by the system common link (19).

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The memory control unit (14) is typically an electronic switch providing the connection of the composite data processing unit; in response to control signals. The memory controller unit 14 may also provide functionality! such as conflict resolution, which would typically be distr_i_ | data processing system driven by! common link.

The data processing systems of Fig. 1A and Fig. 1B are typically implemented in the related art such that the central processing units are homogeneous. In a homogeneous data processing system, the operating systems are the same or similar, the implementing apparatus is the same or similar and the operations performed on apparatus external to the data processing system are the same or similar. Although central processing units are homogeneous, considerable efforts are made to prevent conflicts between central processing units. For example, one of the central processing systems may be selected to allocate resources and tasks among the plurality of central processing units, thereby preventing conflicts over resources by the plurality of programs that may be currently running.

System resources are storage devices, terminals, main memory locations, and other data processing service units to which a central processing unit has access for the purpose of performing data processing functions. This relationship is generally referred to as the master / slave relationship because of the control taken by the selected processor. However, some data processing systems may be designed where the central processing units operating under

control of the same operating system, may operate underneath but as equal members (in contrast to the master / slave ratio) of the data processing system.

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The following references provide! hundred examples of the way a plurality of units

Central processing ii can be incorporated into a system i

data processing without master / slave relationships, although it still conflicts over system resources. i i

In US Patent 3,631,405, issued December 28, 1971, entitled SHARING 0F CROPROGRAMS BETWEEN PROCESSORS and invented by GSHoff and RPKelly, two microprogrammed processing units share control elements that allow sharing of repertoires. microprograms.

Upon proper invocation of the operating system, control signals from a first of the microprogrammed processing units are transferred to the second microprogrammed processing unit.

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In fact, this configuration can best be described as a single processing unit with resources allocated by a supervisor controlled operating system. The use of a supervisory program, as well as the connection between the two processing units, distinguishes this configuration from the equal processing unit ratio described in the present invention.

In US Patent 4,131,941 issued December 26, 1978 entitled LINKED MICRO PROGRAMED PLURAL PROCESSOR UNIT and invented by HLSiegel,

GF Muething, Jr., and EJ Radkowski, describes a configuration of a plurality of processors that allows processors to act independently or be reconfigured so that a master / slave relationship can be invoked.

The plurality processors are linked together, and even when operating in a mode described as being independent, they are not independent but subject to a supervisory control structure for configuration determination and activity assignment. Of course, the control of the allocation of activities implies the control of the allocation of resources. In addition, the data processing system described by this US Patent has either an operating system, or a plurality of identical operating systems.

The invention of the US patent appears to be best described as a single data processing system with a controllable configuration. The present invention is directed to processing units of

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-8 data that operate independently with different operating systems.

In US Patent 4,200,930, issued April 29, 1980, entitled ADAPTER CLUSTER MODULE FOR DATA COMMUNICATIONS SUBSYSTEM, invented by RL Rawlings and RD Mathews, a processor unit. The main manger may have a plurality of data communication subsystems attached thereto to perform routine communications functions with input and output signals. Although data communications subsystems are capable of continuing communications in the event of a failure of the main processing unit, the role of the main processing unit towards the data communication subsystems is clearly that of a master / slave relationship. Equal processor ratios are not applicable because data communications systems do not have access to all resources available to the main processing unit.

In US Patent Application entitled MICROCOMPUTER SYSTEM WITH INDEPENDENT OPERATING SYSTEMS, invented by TS Hirsch, JW Stonier and TO Holtey, two processors, one processor, LSI-6 with an M0D400 operating system and an Intel 8086 processor with an MS-DOS or CPM-86 operating system, share processing responsibilities. (Also included with Motorola 6809 microprocessor, but generally works as input / output controller). The LSI-6 processor has memory space that is not accessible to the Intel 8086 processor.

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In addition, input / output operations performed by the 6809 microprocessor can only be initiated by the LSI-6 processor, so the Intel 8086 only has access to this feature through the intervention of the LSI-6 processor, a form of master relationship. /slave.

In US patent application entitled MULTIPROCESSOR SYSTEM ARCHITECTURE, the communication of two processors is described. In this application, interference-free memory sharing is accomplished by controlling common links associated with each processor system. Common links are linked to particular memory areas, and for a processor to have access to memory dedicated to the second processor, the common link of the first processor is linked to the common link of the second processor. An apparatus associated with each common link controls the ability of the other processor to have access to the common link, thereby effectively limiting each processor's access to system resources. j

More recently, interest in systems has been demonstrated by data processing incorporating a plurality of central processing units, generally having central processing inhomogeneous (generally incompatible) characteristics.

The possibility of using non-homogeneous central processing units may be particularly advantageous for a system user, giving him the possibility of having a plurality of program repertoires. Ideally, all central processing units should have an equal relationship, that is, they should be able to access all resources of the data processing system.

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-10 data without the benefit of the master protection auxiliary mechanisms described with respect to the related art and without having a master / slave relationship in which a central processing unit controls all activity and resource allocation. Many central processing systems do not have the hardware and / or software functionality required to perform resource allocation. However, the; equality ratio between central processing units j is a desirable ratio in multiprocessors, allowing for easy expansion of the processing system.

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A need has therefore been felt for the technique which allows a plurality of (normally) incompatible central processing units to be linked into a data processing system and to function without conflict without requiring a hierarchical relationship. ^!between central processing units.

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SUMMARY OF THE INVENTION

It is an object of the present invention to provide an improved data processing system that overcomes the disadvantages of the prior art.

It is a feature of the present invention to provide an improved data processing system having a plurality of central processing units.

It is another feature of the present invention to provide an improved data processing system having a plurality of central processing units using different operating systems.

It is yet another feature of the present invention to provide an improved data processing system in which a plurality of central processing units execute instructions under different operating systems, the central processing units having an equal relationship.

It is a more particular feature of the present invention to provide apparatus that allows two central processing units of a data processing system to function in an equal relationship while controlling the interaction between the central processing units.

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Yet another feature of the present invention is to allow a central processing unit to be connected to a data processing system, in which all central processing units have an equal relationship, even if the processing unit to be connected use an operating system and / or signal structures that are not compatible with the operating system and / or signal structures of the data processing system.

The foregoing and other features are realized in accordance with the present invention by ensuring that a plurality of center processing unit / operating system combinations to be coupled to data processing systems have appropriate mechanisms to prevent intentional or unauthorized use. unintentional use of resources that have not been allocated to the central processing unit / operating system combination.

With the internal mechanisms available for each central processing unit / operating system combination, each center 1 processing unit / operating system combination can function in an equal relationship, that is, it can have access to all data processing system resources. During startup procedures, system resources are assigned to each of the central processing units.

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During operation of the data processing system, these resources may be dynamically reassigned between central processing units.

These and other features of the invention will be understood by reading the following description together with the drawings.

BRIEF DESCRIPTION OF DRAWINGS

Figure 1A is a block diagram of a common link oriented data processing system having a plurality of central processing units according to the related art, while Figure 1B is a block diagram of a data processing system. memory controller oriented having a plurality of central processing units according to the prior art.

Figure 2A illustrates the apparatus for implementing an equal processor ratio in a multiprocessor data processing system having operating system / center processing unit combinations.

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which are mutually incompatible, while Fig. 2B illustrates the main memory storage sharing by two operating system / central processing unit combinations that have an equal processor ratio.

Figure 3 illustrates additional components that may be required for a data processing system that is multiprocessor and has an equality relationship.

Figure 4 is a flowchart illustrating how a user, interacting with a data processing system via a first operating system, can invoke processes that require a second operating system.

DESCRIPTION OF THE PREFERRED EMBODIMENT

1. Detailed Description of the Figures

Referring to Fig. 2A, there are illustrated the main components which allow two operating system / central processing units of a data processing system

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-15 multiprocessor data that are generally not compatible, assume an equal relationship. Each central processing unit has devices, software procedures, or a combination of device and software programs that prevent address generation, or access attempts and input / output devices that are nominally unavailable to the memory unit. central processing. This apparatus is illustrated as address generation security apparatus (111) as part of central processing unit (11), and address generation security apparatus (121) as part of central processing unit (12). The main memory unit 15 is divided into a plurality of regions.

Region 151 is a region reserved for the operating system controlling the operation of central processing unit 11, while region 152 is a part of the main memory unit reserved for the operating system controlling the operation of central processing unit 11. central processing industry (12).

The portion of the main memory unit (15) indicated by region (153) is reserved for the data / code for central processing unit (11), while region (154) is reserved for the data / code for processing unit (11). central (12). Region 155 is a common region accessible to both the central processing unit 11 and the cipri c processing unit 12.

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Referring to Fig. 2B, more detail is symbolically shown in the storage allocation of the main memory unit (15). The regions 151 and 152 reserved for operating systems of the associated central processing units each have two subregions (151A and Ί51 e, and 152A and 152B, respectively) important for operation of an equal relationship.

Subregions 151A and 152A provide a list of resources, that is, input / output devices and main memory reserved regions reserved for the associated central processing unit. Subregions 151B and 152B provide the procedure by which the two central processing systems can communicate.

In the preferred embodiment, this communication is effected via the subregion 155A of the part of the main memory unit 15 reserved for use by both central processing units 11 and 12 using a technique typically referred to as a mailbox. of data processing system. In this technique a message is left in mailbox 155A by a first central processing unit, and a second central processing unit reads the contents of the mailbox periodically or is alerted by the first central processing unit that a message is available By reading the contents of mailbox 155A, the second central processing unit may give an appropriate response.

Referring next to Fig. 3 is shown a part of a data processing system with two central processing units (11 and 12). The union

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The central processing facility (11) is directly linked to the system common link (19). The central processing unit (12) is connected to the system common link (19) by the system common link interface unit (31). The system common link interface unit (31) and the central processing unit (12) are connected to the dedicated memory unit (32).

Referring next to Fig. 4 is illustrated the technique by which a procedure of the first operating system may be invoked by a procedure of the second operating system. In step 401, a second operating system process requires a process that can only be performed by the first processing system, that is, an input / output operation. 0 The second operating system acts with the device driver module of the second operating system (402) as if the second operating system could implement the process. 0 second operating system driver module, instead of performing the process, applies the driver module to the processor interrupt mechanism actuator module (405) by means of the second operating system processor interrupt mechanisms (403) functions and locations of the shared main memory (404). 0 second operating system processor interrupt mechanism 403 and processor mechanism actuator module 405 may exchange interrupt signals. Processor interrupt library routines (406) adapt the activity requested by the second operating system and apply the resulting process block to the input / output server of the first operating system (407). 0 input / output server 407 applies the appropriate signals to the driver and communication modules of the first operating system 408 to cause the process originally requested by the user of the second operating system to be performed.

-182. Preferred Achievement Operation

In an ideal multiprocessor configuration, all central processing units would have access to all data processing system resources without the need for ancillary protection mechanisms to ensure resource sharing between central processing units. In addition, many operating system / central processing unit combinations have procedures and / or apparatus that may prevent attempts to gain access to a resource assigned to another central processing unit, but may still be incompatible with a computer processing system. main data. For example, certain central processing unit activity, such as procedures for accessing selected input / output channels, may not be possible for the central processing unit to be connected to the data processing unit.

Similarly, the central processing unit to be connected to the data processing system may exchange signal groups with the rest of the data processing system and may use protocols and formats that are different from the connected data processing system. Examples of such differences are system bus link widths and whether the system bus has individual groups of signal paths dedicated to different functions.

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Finally, conflicts may arise during startup. For example, different central processing units might expect to find the required boot procedures in overlapping main memory region. The present invention discloses the technique and apparatus which may allow an additional operating system / central processing unit combination to be treated in an equal relationship with other operating system unit (s) / unit (s). ) central processing of a data processing system.

In the preferred embodiment, the main central processing unit (11) is a Honeywell Buli MRX data processing system operating under the control of the MOD 400 operating system. The MOD 400 operating system includes procedures that provide system reliability. . In order to provide the data processing system with the ability to execute the vast repertoire of user programs using the UNIX operating system, a central processing unit (12) which operated under the control of the UNIX operating system was selected.

However, for the UNIX operating system deployment available to run user programs with the selected central processing unit, the required protection mechanisms were deemed inappropriate.

APPLICATION FOR APPLICATION AND METHOD FOR APPLICATION OF CHANGE RESOURCE SHARING IN A DATA PROCESSING SYSTEM HAVING CENTRAL PROCESSING UNITS USING DIFFERENT OPERATING SYSTEMS, cited above, provides apparatus and method for providing unmodified access protection mechanisms.

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-20fication of the data processing system or central processing unit.

Although the equality of processing ratio provides an equality between the central processing units of the data processing system with respect to resources and activity, two situations have to be provided in order to address specific circumstances.

The first of the special circumstances refers to the protocol used by the system to exchange data signals. Related to the system common link protocol is the organization of main memory. Typically, a main (host) central processing unit (11) will be adapted to operate with a common system link and will not need further manipulation of data groups. when transferring data groups to the system common link. However, the host central processing unit, generally adapted to operate with a different system common link protocol, will need a system common link interface unit (31) to permit the transfer of signal groups between the processing unit. (12) and the system common link. The system common link interface unit (31) may, to a extent not possible by the central processing unit (12), develop appropriate control signals, and, where necessary, adjust the data size to be compatible with the rest of the data processing system.

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While the relationship of

Equal processing can be utilized during normal operation, during an initialization of the data processing system, as described above, one central processing unit must provide control, such as preparing resource tables, for all central processing units. . In addition, for the configuration of the preferred embodiment described in the preceding paragraph, the host central processing unit during initialization is programmed to access main memory locations overlapping main memory locations to which the processing system is located. host central has access, and tries to gain access to memory locations that are not available to the main memory system.

In order to avoid this potential problem, in the preferred embodiment of the present invention, there is a dedicated memory unit (32) connected to the central processing guest unit (12). During initialization of the data processing system, initialization data for the host central processing unit (12) is input by the main central processing unit into the dedicated memory unit (32) at locations corresponding to the locations for which access is gained by the guest central processing unit during startup. Thereafter, when the guest central processing unit 12 is initialized, the memory locations in dedicated memory 32 are addressed by the guest central processing unit and the required initialization data is transferred to the guest central processing unit (1). 12).

In order to harmonize differences in protocols and formats for signal groups between a host data processing system and a host central processing unit, a system common link interface unit (31) may be connected between the host system. host data processing and guest central processing units. The system common link interface unit 31 includes apparatus that converts data, instruction and control signal groups from the data processing system (i.e. system common link 19) of Fig. 3. ) to a format compatible with the signal format (s) with which the processing guest unit is designed to operate.

The system common link interface unit (31) also has the apparatus for safeguarding the signal groups against differences in the data processing unit system clock and the guest central processing unit system clock. Similarly, the system common link interface unit has the apparatus for converting the data, instruction and control signal groups from the guest central processing unit into a format that can be used by and synchronized with the system common link.

The conversion and synchronization of signal groups transferred between the host central processing unit and the host data processing system may be performed by techniques which pertain to the related art and are generally implemented specifically.

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With respect to procedures that are incompatible between the host central processing unit and the host data processing system, the technique for performing the incompatible procedure is illustrated in Fig. 4.

Essentially, the procedure is performed by a central processing unit capable of performing the procedure under the direction of the central processing unit requiring execution.

Providing each central processing unit with the ability to perform incompatible procedures by performing the procedure by a second central processing unit, data processing system resources (eg input / output devices) typically inaccessible to certain central processing units are available to all central processing units of the data processing system.

Although the invention has been described with reference to two central (incompatible) processing units, it will be clear that the described technique can be used with a multiplicity of central processing units to provide an equal relationship between the central processing units.

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The foregoing description is given to illustrate the operation of the preferred embodiment and is not intended to limit the scope of the invention.

The scope of the invention should be limited only by the claims set forth. From the foregoing description, many variations will be apparent to those skilled in the art, variations which would still be within the spirit and scope of the invention.