PL354840A1
Method of setting a system time clock at the start of an mpeg sequence
Abstract
Method to enable a local system time clock counter (STC) of a receiving recording device to lock to program clock reference (PCR) information comprised in a received real time sequence of information signal packets, such as MPEG2 Transport Stream packets. The method comprising determining the number of cycles between arrival of the first information signal packet and the arrival of the information signal packet comprising the first Program Clock Reference (PCR) information. This information is stored as an attribute of the stored sequence.
Term
Term ended
Projected expiry passed 5 January 2021, 5.7 years ago.
- Priority
- Filed
- Published
- Projected expiry
- Today
28 members in 10 offices
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 00200038 | European Patent Office (EPO) | A | |
| 0100110 | European Patent Office (EPO) | W |
Members28
| Document | Office | Kind | |
|---|---|---|---|
| WO0152554A1 | World Intellectual Property Organization (WIPO) | A1 | |
| KR20010108339A | Republic of Korea | A | |
| EP1163802A1 | European Patent Office (EPO) | A1 | |
| BR0103897A | Brazil | A | |
| CN1364387A | China | A | |
| US2003058948A1 | United States of America | A1 | |
| JP2003520514A | Japan | A | |
| PL354840A1This record | Poland | A1 | |
| CN1606355A | China | A | |
| CN1606356A | China | A | |
| CN1606357A | China | A | |
| CN1227912C | China | C | |
| CN1316831C | China | C | |
| KR100779410B1 | Republic of Korea | B1 | |
| EP1926323A2 | European Patent Office (EPO) | A2 | |
| EP1926323A3 | European Patent Office (EPO) | A3 | |
| EP1936999A1 | European Patent Office (EPO) | A1 | |
| JP2011082992A | Japan | A | |
| JP4773664B2 | Japan | B2 | |
| US8098973B2 | United States of America | B2 | |
| US2012082433A1 | United States of America | A1 | |
| MY147128A | Malaysia | A | |
| US8942539B2 | United States of America | B2 | |
| BRPI0103897B1 | Brazil | B1 | |
| EP1163802B1 | European Patent Office (EPO) | B1 | |
| PL222487B1 | Poland | B1 | |
| EP1936999B1 | European Patent Office (EPO) | B1 | |
| ES2601140T3 | Spain | T3 |
Numbers
- Application
- 35484001
Titles2
- English
- METHOD OF SETTING A SYSTEM TIME CLOCK AT THE START OF AN MPEG SEQUENCE
- Polish
- Ustawianie zegara systemowego na początku sekwencji MPEG
Classification
- CPC, 17
- H04N21/242
- G11B27/005
- H04N21/4147
- H04N21/4302
- H04N21/4305
- H04N21/4334
- H04N21/4344
- H04N21/8455
- G11B27/034
- G11B27/105
- G11B27/28
- G11B27/3027
- G11B2220/2562
- H04N5/783
- H04N5/85
- H04N9/8042
- G11B27/00
- IPC, 24
- H04N21 242
- G11B27 00
- G11B27 034
- G11B27 10
- G11B27 28
- G11B27 30
- H04J3 00
- H04N5 00
- H04N5 783
- H04N5 85
- H04N5 92
- H04N7 24
- H04N9 804
- H04N19 00
- H04N19 102
- H04N19 134
- H04N19 159
- H04N19 169
- H04N19 196
- H04N19 44
- H04N19 503
- H04N19 577
- H04N19 70
- H04N19 80