Method, apparatus, and system for time synchronization of xdsl
Abstract
The present invention provides a method, an apparatus, and a system for time synchronization of an xDigital Subscriber Line (xDSL). The method includes: transmitting, by a customer premises equipment (CPE), a first symbol to a central office (CO) equipment, and obtaining time Ts2 indicating the moment that the first symbol is transmitted; receiving, by the CPE, a second symbol transmitted by the CO, and obtaining time Ts1 indicating the moment that the second symbol is received; obtaining, by the CPE obtains time Tm2 indicating the moment that the first symbol is received by the CO and time Tm1 indicating the moment that the second symbol is transmitted by the CO; the CPE calculates an offset between a clock of the CPE and a clock of the CO according to Ts1, Ts2, Tm1, Tm2 and a delay of the CPE; and the CPE adjusts the clock of the CPE according to the offset to achieve synchronization. According to the present invention, by adjusting the time of the clock of the CPE and the time of the clock of the CO, the offset between the clock of the CPE and the clock of the CO can be obtained accurately to effectively achieve time synchronization between the CPE and the CO.
Term
3.2 yearsto projected expiry
Projected expiry 18 November 2029, counted from filing; an application has no term until it is granted.
- Priority
- Filed
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18 claims: 5 independent, 13 dependent
- 1Claims Zastrzeżenia patentowe 1. A method of synchronizing a digital subscriber line, DSL, comprising:1. Sposób synchronizacji cyfrowej linii abonenckiej, DSL, obejmujący: odbieranie (20), przez pierwsze urządzenie, drugiego symbolu przesłanego przez drugie urządzenie i pozyskiwanie czasu Ts1 wskazującego moment, kiedy drugi symbol jest odebrany;receiving (20), through the first device, a second symbol sent by the second device and acquiring a time Ts1 indicating the moment when the second symbol is received;przesyłanie (30), przez pierwsze urządzenie, pierwszego symbolu do drugiego urządzenia, i pozyskiwanie czasu Ts2 wskazującego moment, kiedy pierwszy symbol jest przesłany;przy czym pierwszy symbol i drugi symbol są ramkami dyskretnej modulacji wielotonowej, DMT;transmitting (30), through the first device, the first symbol to the second device, and acquiring time Ts2 indicating the moment when the first symbol is transmitted;wherein the first symbol and the second symbol are frames of discrete multi-tone modulation, DMT;acquiring (40), by the first device, a time Tm2 indicating the moment when the first symbol is received by the second device and the time Tm1 indicating the moment when the second symbol is sent by the second device;pozyskiwanie (40), przez pierwsze urządzenie, czasu Tm2 wskazującego moment, kiedy pierwszy symbol jest odebrany przez drugie urządzenie i czasu Tm1 wskazującego moment, kiedy drugi symbol jest przesłany przez drugie urządzenie;calculating (60), by the first device, offsets between the clock of the first device and the clock of the second device based on times Ts1, Ts2, Tm1 and Tm2;and adjusting (60), by the first device, the clock of the first device by means of a offset to synchronize with the clock of the second device;obliczanie (60), przez pierwsze urządzenie, przesunięcia między zegarem pierwszego urządzenia i zegarem drugiego urządzenia na podstawie czasów Ts1, Ts2, Tm1 i Tm2;i regulowanie (60), przez pierwsze urządzenie, zegara pierwszego urządzenia za pomocą przesunięcia dla zsynchronizowania z zegarem drugiego urządzenia;przy czym czas Ts2 jest momentem, kiedy próbka w określonym położeniu pierwszego symbolu jest przesłana przez pierwsze urządzenie, czas Tm2 jest momentem, kiedy ta sama próbka w tym samym określonym położeniu pierwszego symbolu jest odebrana przez drugie urządzenie, czas Tm1 jest momentem, kiedy próbka w określonym położeniu drugiego symbolu jest przesłana przez drugie urządzenie, a czas Ts1 jest momentem, kiedy ta sama próbka w tym samym określonym położeniu drugiego symbolu jest odebrana przez pierwsze urządzenie. wherein time Ts2 is the moment when the sample at a predetermined position of the first symbol is transmitted by the first device, time Tm2 is the moment when the same sample at the same specific position of the first symbol is received by the second device, time Tm1 is the moment when the sample in the determined position of the second symbol is sent by the second device, and the time Ts1 is the moment when the same sample at the same specific position of the second symbol is received by the first device.
- 3A method according to claim The calculation, by the first device, of offsets between the clock of the first device and the clock of the second device based on Ts1, Ts2, Tm1 and Tm2, the delay of the path Delay1 from the second device to the first device and the delay of the path Delay2 from the first device to the second device includes:3. Sposób według zastrz. 1, przy czym obliczanie, przez pierwsze urządzenie, przesunięcia między zegarem pierwszego urządzenia i zegarem drugiego urządzenia na podstawie Ts1, Ts2, Tm1 i Tm2, opóźnienia ścieżki Opóźnienie1 z drugiego urządzenia do pierwszego urządzenia i opóźnienia ścieżki Opóźnienie2 z pierwszego urządzenia do drugiego urządzenia obejmuje: calculating, by the first device, shifts based on: obliczanie, przez pierwsze urządzenie, przesunięcia na podstawie: Offset = Ts1 - Tm1 - Delay1, and Offset = Ts2 - Tm2 + Delay2, the delay of the Delay1 path is calculated based on the second device transmission delay and the first device delay delay, and the Delay2 path delay is calculated based on the first device delay and delay receive the second device. Przesunięcie = Ts1 - Tm1 - Opóźnienie1, i Przesunięcie = Ts2 - Tm2 + Opóźnienie2, przy czym opóźnienie ścieżki Opóźnienie1 jest obliczane na podstawie opóźnienia przesyłania drugiego urządzenia i opóźnienia odbioru pierwszego urządzenia, a opóźnienie ścieżki Opóźnienie2 jest obliczane na podstawie opóźnienia przesyłania pierwszego urządzenia i opóźnienia odbioru drugiego urządzenia. - 25 - 25
- 8A method according to claim and comprising:acquiring a phase difference of the symbols between the phase of the reception point and the phase of the control point, the receiving point being a position in which the signal of the second symbol is initially received by the first device and the control point is a position in which the same signal of the second symbol is initially transmitted by the second device;8. Sposób według zastrz. l obejmujący: pozyskiwanie różnicy faz symboli między fazą punktu odbioru i fazą punktu kontroli, przy czym punktem odbioru jest położenie, w którym sygnał drugiego symbolu jest początkowo odbierany przez pierwsze urządzenie, a punkt kontroli jest położeniem, w którym ten sam sygnał drugiego symbolu jest początkowo przesyłany przez drugie urządzenie;correcting the time Tsl based on the phase difference. korygowanie czasu Tsl na podstawie różnicy faz.
- 12The device of the digital subscriber line, DSL, as the first device, containing:12. Urządzenie cyfrowej linii abonenckiej, DSL, jako pierwsze urządzenie, zawierające: a transmitting unit (300) configured to transmit the first symbol and acquire time Ts2 indicative of the moment when the first symbol is transmitted;jednostkę nadawczą (300), skonfigurowaną do przesyłania pierwszego symbolu i pozyskiwania czasu Ts2 wskazującego moment, kiedy pierwszy symbol jest przesłany;a receiving unit (400) configured to receive a second symbol transmitted by the second device and acquiring a time Ts1 indicating the moment the second symbol is received;and acquiring Tm2 time indicating the moment when the first symbol is received by the second device and the Tml time indicating the moment when the second symbol is sent by the second device;and a processing unit (600) configured to acquire a delay of the first device, calculating the offset between the clock of the first device and the clock of the second device based on Ts1, Ts2, Tml, Tm2 and adjusting the clock of the first device based on the offset;jednostkę odbiorczą (400), skonfigurowaną do odbierania drugiego symbolu przesłanego przez drugie urządzenie i pozyskiwania czasu Tsl wskazującego moment, kiedy drugi symbol jest odebrany;i pozyskiwania czasu Tm2 wskazującego moment, kiedy pierwszy symbol jest odebrany przez drugie urządzenie i czasu Tml wskazującego moment, kiedy drugi symbol jest przesłany przez drugie urządzenie;i jednostkę przetwarzającą (600), skonfigurowaną do pozyskiwania opóźnienia pierwszego urządzenia, obliczania przesunięcia między zegarem pierwszego urządzenia i zegarem drugiego urządzenia na podstawie Tsl, Ts2, Tml, Tm2 i regulowania zegara pierwszego urządzenia na podstawie przesunięcia;przy czym pierwszy symbol i drugi symbol są ramkami dyskretnej modulacji wielotonowej, DMT;przy czym czas Ts2 jest momentem, kiedy próbka w określonym wherein the first symbol and the second symbol are frames of discrete multi-tone modulation, DMT;whereby the time Ts2 is the moment when the sample in the specified - 27 położeniu pierwszego symbolu jest przesłana przez pierwsze urządzenie, czas Tm2 jest momentem, kiedy ta sama próbka w tym samym określonym położeniu pierwszego symbolu jest odebrana przez drugie urządzenie, czas Tm1 jest momentem, kiedy próbka w określonym położeniu drugiego symbolu jest przesyłana przez drugie urządzenie, a czas Ts1 jest momentem, kiedy ta sama próbka w tym samym określonym położeniu drugiego symbolu jest odebrana przez pierwsze urządzenie. - the position of the first symbol is transmitted by the first device, the time Tm2 is the moment when the same sample at the same specific position of the first symbol is received by the second device, time Tm1 is the moment when the sample at the specified position of the second symbol is transmitted by the second device and the time Ts1 is the moment when the same sample in the same specific position of the second symbol is received by the first device.
- 18System synchronizacji czasu cyfrowej linii abonenckiej, DSL, zawierający pierwsze urządzenie według dowolnego z zastrz. 12-17 i drugie urządzenie, w którym:18. The DSL subscriber time synchronization system comprising a first device according to any one of claims 1-18. 12-17 and a second device in which: pierwsze urządzenie przesyła pierwszy symbol do drugiego urządzenia i odbiera drugi symbol przesyłany przez drugie urządzenie, pozyskuje czas Ts2 wskazujący moment, kiedy pierwszy symbol jest przesłany przez pierwsze urządzenie, czas Ts1 wskazujący moment, kiedy drugi symbol jest odebrany przez pierwsze urządzenie, czas Tm1 wskazujący moment, kiedy drugi symbol jest przesłany przez drugie urządzenie i czas Tm2 wskazujący moment, kiedy pierwszy symbol jest odebrany przez drugie urządzenie, oblicza przesunięcie między zegarem pierwszego urządzenia i zegarem drugiego urządzenia na podstawie Ts1, Ts2, Tm1, Tm2 i reguluje zegar pierwszego urządzenia na podstawie przesunięcia dla zsynchronizowania z zegarem drugiego urządzenia;i drugie urządzenie odbiera pierwszy symbol i przesyła drugi symbol, pozyskuje czas Tm1 oraz czas Tm2 i przesyła czas Tm1 oraz czas Tm2 do pierwszego urządzenia;przy czym pierwszy symbol i drugi symbol są ramkami dyskretnej modulacji wielotonowej, DMT;the first device transmits the first symbol to the second device and receives the second symbol sent by the second device, acquires the time Ts2 indicating the moment when the first symbol is sent by the first device, time Ts1 indicating the moment when the second symbol is received by the first device, time Tm1 indicating the moment when the second symbol is sent by the second device and the time Tm2 indicating the moment when the first symbol is received by the second device, calculates the offset between the clock of the first device and the clock of the second device on the basis of Ts1, Ts2, Tm1, Tm2 and adjusts the clock of the first device based on offsets for synchronizing the second device with the clock;and the second device receives the first symbol and transmits the second symbol, acquires time Tm1 and time Tm2 and transmits time Tm1 and time Tm2 to the first device;wherein the first symbol and the second symbol are frames of discrete multi-tone modulation, DMT;przy czym czas Ts2 jest momentem, kiedy próbka w określonym położeniu pierwszego symbolu jest przesłana przez pierwsze urządzenie, czas Tm2 jest momentem, kiedy ta sama próbka w tym samym określonym położeniu pierwszego symbolu jest odebrana przez drugie urządzenie, czas Tm1 jest momentem, kiedy próbka w określonym położeniu drugiego symbolu jest przesłana przez drugie urządzenie i czas Ts1 jest momentem, kiedy ta sama próbka w tym samym określonym położeniu drugiego symbolu jest odebrana przez pierwsze urządzenie. wherein time Ts2 is the moment when the sample at a predetermined position of the first symbol is transmitted by the first device, time Tm2 is the moment when the same sample at the same specific position of the first symbol is received by the second device, time Tm1 is the moment when the sample in the determined position of the second symbol is sent by the second device and the time Ts1 is the moment when the same sample at the same specific position of the second symbol is received by the first device. Anna Stenzel Anna Stenzel Patent Attorney Rzecznik patentowy
Independent claims5
215 paragraphs in 1 section, as filed
[0001] The invention relates to the field of communication, in particular to a method, device and time subscriber line (DSL) system.
BACKGROUND OF THE INVENTION [0002] With the emergence of mobile communication of the third generation (3G) and other advanced technologies of mobile digital communication, to meet the needs, the number of femtocells increases. Femtocell requires time synchronization with high accuracy. Basically, the network terminal includes a clock recovery module. Therefore, it is easy for the femtocell to provide clock synchronization (i.e. frequency synchronization). However, it is very difficult to ensure time synchronization. Some technical difficulties have to be resolved. Fig. 1 is a schematic diagram showing a plan for achieving accurate time synchronization proposed in the prior art. Assuming that the offset is a shift between the "slave" clock and the "master" clock, Delay1 is the propagation delay from the "master" clock to the "slave" clock, and Delay2 is the propagation delay from the "slave" clock to the "master" clock. It can then be concluded from Figure 1 that:
Ts0 = Tm1 + Offset Ts1 - Ts0 = Delay l then
Offset = Ts1 - Tm1 - Delay1 similarly,
Tm2 = Ts2 - Offset + Delay2 so,
Offset = Ts2 - Tm2 + Delay2 [0003] If the delay from the "master" clock to the "slave" clock is equal to the delay from the "slave" clock to the "master" clock, that is Delay1 = Delay2, then
Offset = (Ts1 + Ts2 - Tm1 - Tm2) / 2. (1) [0004] Thus, a shift is obtained between the "slave" clock and the "master" clock so that the "slave" clock can be accurately synchronized with the "master" clock.
[0005] 'However, in the case where a digital subscriber line device (xDSL) works for a mobile backhaul, the' master 'device corresponds to the central office unit (CO), and the "slave" device corresponds to the user premise equipment (CPE). The channel between the CO and CPE device is complicated and goes through the analogue circuit of the CO device, cable, CPE analog system, as well as digital signal processing systems
- 2 CO and CPE devices. As a result, the downlink delay from the CO device to the CPE may not necessarily be equal to the uplink latency.
uplink) from CPE to the CO device; i.e., essentially, Delayl R Delay2. Based on a number of measurement results, the difference between Delay1 and Delay2 is greater than 1 μs. Hence, the shift between the CO clock and the CPE clock can not be obtained directly from equation (1).
[0006] As shown in Fig. 2, the downstram delay includes the At1 delay of the digital transmission system CO 70, the delay of At2 of the analogue transmission system CO 203, the downlink delay, Δt3 of the twisted pair 90, the delay of At2 'of the analogue receiving circuit CPE 205 and the delay At1 'of the digital receiving system CPE 80; and the upstream delay includes the At4 delays of the CO 75 digital reception circuit, the At5 delays of the analog receiver system 2005, the At6 delays of the twisted pair A6, the At5 delays of the CPE 2003 analog chip and the At4 delays of the CPE digital transmission system 85 In general, Delay1 = At1 + At2 + At3 + At2 '+ At1' R Delay2 = At4 + At5 + At6 + At5 '+ At4',
[0007] The xDSL receiver senses the frame boundary during initialization and performs frame synchronization. In actual cases, there may be a small error in the synchronization algorithm and the synchronization accuracy is limited by the sampling rate, and the frame sync error may affect the accuracy of time synchronization. If the beginning of a specific frame is saved by the transmitter as timestamp Tm1 (on the CO side) or timestamp Ts2 (on the CPE side), an error is entered when timestamp Ts1 (on the CPE side) or timestamp Tm2 is written by the receiver with the synchronization algorithm frame. Due to the error of frame synchronization, the error introduced by writing Ts1 on the CPE or Tm2 side on the CO side will be very large. In particular, the error will be even greater,
[0008] Delay1 can also be obtained by directly measuring the downlink delay. Thus, the shift between CO and CPE can be obtained directly, i.e. Offset = Ts1 - Tm1 - Delay1. However, currently measuring the delay of the xDSL channel (especially the twisted pair) is not quite accurate, especially when the length of the loop is too large, large interferences or looping occur in the loop.
[0009] An article entitled: "An Enhanced IEEE 1588 Time Sychronization Algorithm for Asymmetric Communication" by Sungwon Lee in the publication IEEE COMMUNICATIONS LETTERS, VOL. 12, NO 9 of September 2008, pages 687-699 discloses an extended synchronization algorithm for calculating the asymmetry coefficient of the xDSL communication link and the algorithm increases the accuracy of time synchronization.
SUMMARY OF THE INVENTION [0010] Embodiments of the invention may acquire a precise channel delay, correct clock time reading by the CO and CPE apparatus and achieve time synchronization
- 3 between CPE and the CO device by calculating the offset between the CPE clock and the CO device clock.
[0011] An embodiment of the invention provides a method of synchronizing the time of a digital subscriber line (DSL). The method includes:
receiving, by the first device, a second symbol transmitted by the second device, and acquiring time Ts1 indicating the moment when the second symbol is received;
transmitting, by the first device, the first symbol to the second device, and acquiring time Ts2 indicative of the moment when the first symbol is transmitted; wherein the first symbol and the second symbol are frames of discrete multi-tone modulation, DMT (discrete multitone modulation);
acquiring, by the first device, a time Tm2 indicating the moment at which the first symbol is received by the second device and the time Tm1 indicating the moment at which the second symbol is transmitted by the second device;
calculating, by the first device, offsets between the clock of the first device and the clock of the second device based on times Ts1, Ts2, Tm1 and Tm2; and adjusting, by the first device, the clock of the first device based on the offset for synchronization with the clock of the second device;
wherein the time Ts2 is the moment when the sample at a predetermined position of the first symbol is transmitted by the first device, the time Tm2 is the moment when the same sample at the same specific position of the first symbol is received by the second device, time Tm1 is the moment when the sample in the determined position of the second symbol is transmitted by the second device and the time Ts1 is the moment when the same sample at the same specific position of the second symbol is received by the first device.
[0012] An embodiment of the invention provides a DSL device. The DSL device, as the first device, contains:
a transmitting unit configured to transmit the first symbol and acquire a time Ts2 indicative of the moment at which the first symbol is transmitted;
a receiving unit configured to receive a second symbol transmitted by the second device and acquiring a time Ts1 indicative of the moment the second symbol is received; and acquiring a time Tm2 indicating the moment at which the first symbol is received by the second device and the time Tm1 indicating the moment at which the second symbol is sent by the second device; and a processing unit configured to acquire a delay of the first device, calculating the offset between the clock of the first device and the clock of the second device on the basis of Ts1, Ts2, Tm1, Tm2 and adjusting the first clock
- 4 devices based on the offset; wherein the first symbol and the second symbol are frames of discrete multi-tone modulation, DMT;
wherein the time Ts2 is the moment when the sample at a predetermined position of the first symbol is transmitted by the first device, the time Tm2 is the moment when the same sample at the same specific position of the first symbol is received by the second device, time Tm1 is the moment when the sample in the determined position of the second symbol is transmitted by the second device and the time Ts1 is the moment when the same sample at the same specific position of the second symbol is received by the first device.
[0013] An embodiment of the invention provides a DSL time synchronization system. The system includes the first device and the second device, whereby:
the first device transmits the first symbol to the second device and receives the second symbol sent by the second device, acquires the time Ts2 indicating the moment at which the first symbol is sent by the first device, time Ts1 indicating the moment at which the second symbol is received by the first device, time Tm1 indicating the moment at which the second symbol is sent by the second device and the time Tm2 indicating the moment at which the first symbol is received by the second device, calculates on the basis of Ts1, Ts2, Tm1, Tm2 the offset between the clock of the first device and the clock of the second device and adjusts the clock the first device based on the offset for synchronization with the clock of the second device; and the second device receives the first symbol and sends the second symbol, acquires Tm1 time and Tm2 time, and transmits time Tm1 and time Tm2 to the first device; wherein the first symbol and the second symbol are frames of discrete multi-tone modulation, DMT;
wherein the time Ts2 is the moment when the sample at a predetermined position of the first symbol is transmitted by the first device, the time Tm2 is the moment when the same sample at the same specific position of the first symbol is received by the second device, time Tm1 is the moment when the sample in the determined position of the second symbol is transmitted by the second device and the time Ts1 is the moment when the same sample at the same specific position of the second symbol is received by the first device.
[0014] According to an embodiment of the invention, the problem of a fuzzy border of a frame that occurs when the border of the frame is recovered by the receiving terminal algorithm can be solved; the synchronization error between the receiving terminal and the sending terminal may be calculated based on the particular symbol sent by the transmitting terminal, and then the timestamp error caused by the blurred boundary of the frame may be corrected based on the synchronization error. Meanwhile, a shift between the CPE clock and the clock of the CO device can be obtained by calculating the channel delay so that time synchronization between the CPE clock and the CO device clock can be accurately achieved based on the offset.
BRIEF DESCRIPTION OF THE DRAWINGS
- [0015]
Fig. 1 is a schematic diagram illustrating the time synchronization principle defined in IEEE 1588v2;
Fig. 2 is a schematic diagram of the downlink propagation delay and the ascending channel propagation delay;
Fig. 3 is a flow diagram of a synchronization method according to a first embodiment of the invention;
Fig. 4 is a schematic diagram identifying elements comprising the downward propagation of the descending channel;
Fig. 5 is a schematic diagram identifying elements that make up the advancement of the ascending channel propagation;
Fig. 6 is a sequence diagram of a synchronization method according to a second embodiment of the invention;
Fig. 7 is a schematic diagram of a system according to the invention; and Fig. 8 is a schematic diagram of a device according to the invention.
DETAILED DESCRIPTION OF EMBODIMENTS [0016] Hereinafter, the invention is clearly described with reference to the accompanying drawings.
[0017] A first embodiment of the invention provides a method for synchronizing xDSL time. The method includes the following steps:
transmitting, by the first device, the first symbol to the second device and acquiring time Ts2 indicating the moment when the first symbol is transmitted;
receiving, by the first device, a second symbol transmitted by the second device, and acquiring time Ts1 indicating the moment when the second symbol is received;
acquiring, by the first device, a time Tm2 indicating the moment at which the first symbol is received by the second device and the time Tm1 indicating the moment at which the second symbol is transmitted by the second device;
calculating, by the first device, offsets between the clock of the first device and the clock of the second device based on Ts1, Ts2, Tm1, Tm2 and the delay of the first device; and adjusting, by the first device, the clock of the first device based on the offset to achieve synchronization. In further embodiments, CPE is assumed as the first device and CO is taken as the second device; however, it will be obvious to those skilled in the art that the first device may also be CO and the second device may also be CPE.
[0018] When the uplink delay is not equal to the downlink delay, the offset between the CPE clock and the CO clock is obtained by applying a specific mathematical relationship occurring between the delay propagation channel Delay1 and the delay propagation of the downward channel Delay2, so that CPE (or CO ) can adjust the local clock based on this shift.
[0019] The time synchronization method according to the first embodiment operates such that the CPE first transmits the synchronization symbol and then the CO sends the sync symbol, the particular method being shown in Fig. 3.
[0020] In step 10, the CPE transmits the first symbol and acquires a time Ts2 indicative of the transmission moment of the first symbol.
[0021] In xDSL, a discrete multi-tone modulation (DMT) scheme is used such that the signal is transmitted in a DMT frame. In this case, time synchronization in xDSL is also achieved in DMT frames. Thus, the first symbol sent by CPE may be a DMT frame, and the specified frame to be chosen is determined by the negotiations between CPE and CO. During initialization, the CPE sends the first symbol. When the determined position of the first symbol is written to the buffer or C / A module from the buffer, the CPE stores the corresponding time Ts2 of its local clock.
[0022] The specific point at which the timestamp is triggered for writing is also determined by negotiation between CO and CPE. Any position in the first symbol may be used. In further embodiments, an initial location of the first symbol is taken as an example.
[0023] In step CO, the first symbol sent by the CPE receives and acquires a time Tm2 indicating the moment of receiving the first symbol.
[0024] The CO receives the first symbol sent by the CPE. When the CO saves the sample in the initial position of the first symbol to the buffer or the sample in the initial position of the first symbol is read by the A / C module from the buffer, the CO records the appropriate Tm2 'time of its local clock (i.e. the action is taken to acquire the time stamp). Because CO acquires a frame boundary by computing with a specific algorithm, an error may be introduced when the initial position is calculated by an algorithm. In this case the time Tm2 'must be corrected by CO.
[0025] Based on the phase difference between the phase of the reception point and the phase of the sinusoidal control point (or cosine signal) of the first symbol, the CO corrects the time Tm2 'to time Tm2, the time Tm2 being the time indicating when the control point should be received by WHAT. The reception point is the signal point at which the first symbol is initially received by CO, and the control point is the signal point at which the first symbol is initially transmitted by the CPE.
[0026] When the CO corrects the time Tm2 'based on the sinusoidal signal in the first symbol:
- the phase of the appropriate point in the sinusoidal signal is constant (e.g. 0 °, 45 °, 90 °, or any other angle) when the timestamp acquisition is triggered by the CPE such that the point can be taken as a control point, and the control point phase is acquired when the CO corrects the Tm2 'time. In further embodiments, an angle of 0 ° is taken as an example.
[0027] CO obtains the position of a sinusoidal signal in which the CO triggers acquisition of the time stamp, the location being the pickup point at which the first symbol is received by CO, and calculating the time needed between the phase of the pickup point and the phase of the control point. Then, based on the CO time, it regulates the time Tm2 'until the time Tm2.
[0028] CO can also make corrections by using multiple sinusoidal signals in the symbol. When the CPE saves the sample in the initial position of the first symbol to the buffer or the sample in the starting position of the first symbol is read from the buffer, each of the sinusoidal signals in the first symbol is at a precisely defined point. WHAT takes these points as control points and knows the corresponding phases of control points in sinusoidal signals when CPE collects time stamps. For example, the control point in one of the sinusoidal signals is at 0 °, one control point is at 90 °, one control point is at 45 ° and so on.
[0029] Upon receipt of the first symbol CO obtains the corresponding reception point in each of the sinusoidal signals and acquires the phase of the reception point. Then CO calculates the time taken from the phase of the pickup point to the phase of the control point. Time is the offset of the timestamp made by CO in each of the sinusoidal signals. The phases of these sinusoidal signals can be obtained by means of a fast Fourier transform (FFT) in the DMT system. To improve the accuracy of the estimation and reduce the impact of interference, the shift may be the average of many calculations or an estimate with the frequency equalized FEQ (Frequency Equalizer) of the trained frequency domain (FEQ) followed by FFT because offset compensation can be accomplished using FEQ. Because an error can be introduced during the synchronization of the DMT frame, there may be a shift between the angles acquired by the CO and CPE. The offset has a linear relationship with the frequencies of sinusoidal signals, and the slope of the linear relationship directly reflects the frame synchronization error. The offset of each of the sinusoidal signals can be plotted in the coordinate system, and then these shifts are connected by a straight line. The slope of the straight line is exactly the offset of the timestamp taken by the CO due to a synchronization error. By the influence of factors such as interference, the angular errors acquired by the actual calculation may not be exactly a straight line.
[0030] Given the characteristics of the xDSL system, angle errors can also be obtained by using FEQ information, and then the time Tm2 'is adjusted until the Tm2 time in a similar manner.
[0031] In step CO, sends the second symbol and acquires time Tm1 indicating the moment when the second symbol is sent.
[0032] The CO sends a second symbol, which can also be a DMT frame. When the CO saves the sample in the start position of the second symbol to the buffer or the sample in the start position of the second symbol is read from the buffer by the CO module of the CO device, the CO local clock time value is taken by the CO (i.e. the action is triggered to acquire tags) time) and acquires Tm1 time. The specific point at which the time acquisition activity is triggered is also determined by the negotiation between CO and CPE, and each location of the second symbol can be used as a specific point. In further embodiments, an initial position of the second symbol is taken as an example.
[0033] In step 40, the CPE receives the second symbol transmitted by CO and acquires the exact time Ts1 indicating the moment when the second symbol is received.
[0034] When the sample in the start position of the second symbol is written into the buffer or read from the buffer by the A / C module, the CPE triggers the acquisition of time stamps and stores the local clock time on the CPE side as the time Ts1 '. Since the CPE also calculates the frame boundary using a specific algorithm, an error may be introduced in determining the starting position of the second symbol and the acquired time Ts1 'must also be corrected by the CPE.
[0035] Based on the phase difference between the phase of the reception point and the phase of the sinusoidal control point (or cosine signal) in the second symbol, the CPE corrects the time stamp Ts1 'to the time stamp Ts1, the time stamp Ts1 being the time indicating when the control point should be picked up. The reception point is the signal point at which the second symbol is initially received by the CPE and the control point is the signal point at which the second symbol is initially transmitted by the CO.
[0036] When the CPE uses one sinusoidal signal in the second symbol, the phase of the corresponding point in this sinusoidal signal is constant when the CO triggers the timestamp recording action, so the point in the sinusoidal signal can be taken as the control point and the point phase is acquired, for example 0 °. Hence, CPE may make an amendment based on this control point.
[0037] The CPE adopts a corresponding point of the sinusoidal signal indicative of the moment when the second symbol is received by the CPE as the reception point, and acquires the phase of that point. Then CPE calculates the time taken from this phase to the next phase of the control point, and from this time it adjusts the time Ts1 'to the time Ts1.
[0038] The CPE may further use a plurality of sinusoidal signals in the second symbol. CPE knows the phases of the corresponding points in these sinusoidal signals when CO performs characters
- 9 time; for example, the corresponding point of one of the sinusoidal signals is at 0 °, one is at 90 °, one is at 45 ° and so on. Hence, the CPE may take the corresponding point of each sinusoidal signal as the control point. After receiving the second symbol, the CPE acquires a position in which the CPE performs a time stamp on each of the sinusoidal signals and accepts these points as pickup points. The CPE then calculates the time taken from the reception point phase to the control point phase. Time is exactly the offset of the time sign made by CPE W in each of the sinusoidal signals. The angles of these sinusoidal signals can be obtained using FFT in the DMT system. To improve the accuracy of the estimation and reduce the impact of disturbances, the offset can be obtained by averaging multiple calculations or by training the frequency domain equalizer (FEQ) after the FFT. Because the FEQ compensates for the angular displacement, the trained FEQ coefficient can also be used to estimate the angular displacement of each of the sinusoidal signals. Because DMT frame synchronization can make an error, there may be offsets between the angles acquired by CPE and CO. These shifts have a linear relationship with the frequency of sinusoidal signals, and the slope of the linear relationship directly reflects the frame synchronization error. The offset of each sinusoidal signal can be plotted in a coordinate system, and these offsets are connected by a straight line; the slope of the straight line is exactly the offset of the timestamps made by the CPE due to a synchronization error. Due to the influence of factors such as interference, the angular errors acquired by the actual calculation may not be exactly a straight line. Thus, CPE can calculate the optimal straight line for approximation based on a specific optimization algorithm (for example, the least squares method). Hence, CPE calculates the offset of timestamps made by CPE and corrects the time Ts1 'to time Ts1 based on the offset. Thus, CPE can calculate the optimal straight line for approximation based on a specific optimization algorithm (for example, the least squares method). Hence, CPE calculates the offset of timestamps made by CPE and corrects the time Ts1 'to time Ts1 based on the offset. Thus, CPE can calculate the optimal straight line for approximation based on a specific optimization algorithm (for example, the least squares method). Hence, CPE calculates the offset of timestamps made by CPE and corrects the time Ts1 'to time Ts1 based on the offset.
[0039] In step 50, the CPE acquires the time Tm2 and the time Tm1 of the CO device.
[0040] CO sends the time Tm1 and Tm2 to the CPE via the message channel.
[0041] The CPE acquires a CO propagation delay and a CPE propagation delay.
[0042] The propagation delay from CO to CPF is shown in Figure 4 and includes:
(1) the delay of the digital transmission system CO indicated as ΔΠ, which includes the delay BUF 201 and the delay of C / A 202; and delay of the digital receiving system CPE denoted as Δ11 ', which includes the delay BUF 207 and delay C / A 206. In some delay systems ΔΠ and Δ11' are fixed and can be read directly from the device. In calculating the delay, both delays must be taken into account. In some other delay systems, ΔΠ and Δ11 'are not constant, so you have to exclude them from the calculation. It may also happen that a part of both delays is fixed, and then only a fixed portion of delays are considered during calculations;
(2) the delay of the analogue transmission system CO 203 denoted as Δ & and the delay of the analogue receiving system CPE 205 marked as Δ12 '. Both delays Δ £ and
- At2 'occur in devices and can be obtained at the factory or through information exchange between CPE and CO; and (3) the symbol delay in twisted pair 204 from CO to CPE marked as At3, which is unknown.
[0043] The propagation delay from CPE to CO is shown in Fig. 5 and includes:
(1) the delay of the digital broadcasting system CPE marked as At4, which includes the delay of the BUF 2001 CPE and the delay of the C / A 2002 CPE; and the delay of the digital CO receiving system designated At4 ', which includes the delayed C / A 2006 CO and the delay BUF 2007. On some systems, both the latencies At4 and At4' are constant and can be read directly from the device. On some other systems, both delays are not constant, and then both delays are not included in the calculations;
(2) the delay of the analogue transmission system 2003 CPE marked as At5 and the delay of the analogue receiving system 2005 CO marked as At5 '. Because both At5 and At5 'delays occur in devices, they can be obtained at the factory or by exchanging information between CO and CPE; and (3) symbol delay in twisted pair strand 2004 from CPE to CO marked as Δt6, which is unknown.
[0044] CO sends latencies Atl, At2, At4 'and At5' to CPE via the message channel or previously recorded data is acquired by CPE.
[0045] In step 60, the CPE calculates the offset between the CPE clock and the CO clock and adjusts the CPE clock based on the offset.
[0046] CPE calculates the offset between the CPE clock and the CO clock based on:
Offset = Ts1 - Tm2 - Delay1,
Offset = Tm2 - Ts2 + Delay2.
[0047] During the calculation process, CPE assumes a calculation model and separates Delay1 and Delay2. The CPE device stores the mathematical relationship between the Delay1 and Delay2 values, for example a ratio of Δt3 = 0.9At6 or Δt6 = 0.9Δt3. You can get the proportion from the statistics. The offset can be obtained using the following equations:
Offset = Tsl - Tm1 - Delayl = Tsl - Tm1 - (ΔΜ + At2 + Δt3 + Atl '+ At2') Offset = Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At4 + At5 + At6 + At5 '+ At4') or
Offset = Tsl - Tm1 - Delayl = Tsl - Tm1 - (At2 + At3 + At2 ')
Offset = Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At5 + At6 + At5 ')
[0048] The delays Δt3 and Δt6 are approximately identical or have a proportional relationship. Assume that the delays Δt3 and Δt6 are approximately identical. The offset can be estimated using the following equation:
Offset = (Ts1 - Tm1 - (Δ ^ + At2 + At1 '+ At2') + Ts2 - Tm2 + (At4 + Δt5 + At4 '+ At5')) / 2 or
Offset = (Ts1 - Tm1 - (At2 + At2 ') + Ts2 - Tm2 + (At5 + At5')) / 2 [0049] Delays Delay1 and Delay2 can be obtained using the estimated Offset:
Delay1 = Ts1 - Tm1 - Offset Delay2 = Ts2 - Tm2 + Offset [0050] After obtaining the offset between the CPE clock and the CO clock, the CPE acquires the local clock time value and adjusts the local clock time based on the acquired local clock time and offset.
[0051] In the above embodiments, the CPE sends the symbol, and then the CO receives the symbol and further transmits the symbol. In the actual monitoring process, there is also the possibility that the CO sends a symbol, then the CPE receives the symbol and then sends the symbol. The latter case will be described in a further second embodiment and its detailed process is shown in FIG. 6.
[0052] In step CO, sends the second symbol and acquires a time Tm1 indicating the moment when the second symbol is transmitted.
[0053] During the CO initialization, it sends the second symbol. When a sample at a particular location of the second symbol is written to the buffer by CO or read from the buffer by the CO device of the CO device, the timestamp acquisition function is triggered to read the value of the CO local clock time and acquire the timestamp Tm1. The second symbol can be a DMT frame. The specified point at which the timestamp acquisition activity is called is also determined by the negotiation between CO and CPE. Each position in the second symbol can be used as a specific point. Hereinafter, in the exemplary embodiment, the starting position of the second symbol is taken as an example.
[0054] In step 25, the CPE receives the second symbol transmitted by the CO and acquires an accurate time Ts1 indicative of the moment when the second symbol is received.
[0055] When the sample in the start position of the second symbol is written to the buffer by the CPE or read from the buffer by the A / C module, the timestamp acquisition activity is triggered to acquire the local clock time value CPE designated as Ts1 '. Because CPE calculates the frame boundary using a specific algorithm, an error can be entered when the initial position is calculated using an algorithm.
- 12 In this case, the time Ts1 'must be corrected by the CPE. The correction method used here is the same as in the CPE in the first embodiment.
[0056] In step 35, the CPE transmits the first symbol and acquires time Ts2 indicating the moment at which the first symbol is sent by the CPE.
[0057] During initialization, the CPE transmits the first symbol, which may also be a DMT frame. When the sample at a predetermined position of the first symbol is written to the buffer or read from the buffer by the C / A module, the timestamp acquisition action is triggered by the CPE to read the local clock time value CPE designated by Ts2. The specific point at which the timestamp acquisition activity is triggered is also determined by the negotiations between CO and CPE. Each position in the first symbol can be used. Hereinafter, in this embodiment, the starting position of the first symbol is taken as an example.
[0058] In step 45, the CO receives the first symbol sent by CPE and acquires the exact time Tm2 indicating the moment when the first symbol is received.
[0059] The CO receives the first symbol sent by the CPE. When the sample in the start position of the first symbol is written to the buffer or read from the buffer by the A / C module, the timestamp acquisition action is triggered to read the value of the CO local clock time designated Tm2 '. Because CO calculates the frame boundary using a specific algorithm, the timestamp Tm2 'must be corrected by CO. The correction method used here is the same as in the case of CO in the first embodiment.
[0060] In step 55, the CPE acquires time Tm1 and Tm2 acquired by CO.
[0061] The CO sends the time Tm1 and Tm2 to the CPE via the message channel.
[0062] CPE acquires CO delay and CPE delay:
(1) a delay of the digital transmission system CO designated as At1, which includes a delay BUF 201 CO and a delay of C / A 202; and delay of the CPE digital reception system designated as At1 ', which includes a BUF 207 CPE delay and a C / A delay of 206. On some systems, both latencies are fixed and can be read directly from the device. In calculating the propagation delay both delays are to be considered. On some other systems, both latencies are not constant, so you have to exclude them during calculations. It is also possible that a part of both delays is constant, and then only a fixed part is taken into account during calculations;
(2) the delay of the analogue transmission system CO 203 denoted as At2 and the delay of the analogue receiving system CPE 205 designated At2 '. Both At2 and At2 'delays can occur in the device and can be obtained at the factory or by exchanging information between CPE and CO;
(3) delay of the symbol in twisted pair 204 from CO to CPE marked as At3, which is unknown.
[0063] The propagation delay from CPE to CO is shown in Fig. 5 and includes:
(1) the delay of the digital broadcasting system CPE marked as At4, which includes the delay of the BUF 2001 CPE and the delay of the C / A 2002 CPE; and delay of the digital CO receiving system designated as At4 ', which includes the C / A 2006 CO delay and the BUF 2007 delay. On some systems, both latencies are fixed and can be read directly from the device. On some other systems, both latencies are not constant, so later both calculations are not included in the calculations;
(2) the delay of the analogue transmission system 2003 CPE marked as At5 and the delay of the analogue receiving system 2005 CO marked as At5 '. Because both At5 and At5 'delays occur in devices, they can be obtained at the factory or by exchanging information between CO and CPE;
(3) signal delay in twisted pair cable 2004 from CPE to CO marked as Δt6, which is unknown.
[0064] CO sends latencies Atl, At2, At4 'and At5 to CPE via the message channel; or alternatively CPE acquires previously saved data and thus CO may also not send information.
[0065] In step 65, the CPE calculates the offset between the CPE timer and the CO shift timer, and adjusts the CPE clock time based on this offset.
[0066] CPE calculates the offset based on the following equations:
Offset = Ts1 - Tm2 - Delayl,
Offset = Ts2 - Tm2 + Delay2.
[0067] During the calculation process, the CPE assumes a calculation model and separates Delay1 and Delay2. The CPE device stores the mathematical relationship between the Delay1 and Delay2 values, for example the ratio of Δt3 = 0.9At6 or Δt6 = 0.9Δt3. A certain mathematical dependence can be obtained from statistics. The offset is acquired using the following equations:
Offset = Tsl - Tm1 - Delayl = Ts1 - Tm1 - (Δ ^ + At2 + Δt3 + Atl '+ At2') Offset = Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At4 + Δt5 + Δt6 + At5 '+ Δt4' ) or
Offset = Tsl - Tm1 - Delayl = Ts1 - Tm1 - (At2 + Δt3 + At2 ')
Offset = Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At5 + Δt6 + Δt5 ') [0068] Because the delays Δt3 and Δt6 are approximately identical or have a proportional relation, the Offset can be estimated.
[0069] After obtaining the Offset, you can obtain related delays Delay1 and Delay2:
- 14 Delay1 = Ts1 - Tm1 - Offset Delay2 = Ts2 - Tm2 + Offset [0070] After obtaining the offset between the CPE clock and the CO clock, the CPE acquires the local clock time CPE and adjusts the local clock time based on the acquired local clock time and estimated offset .
[0071] A third embodiment of the invention provides a method of synchronizing xDSL time. The method applies to cases when Delays1 and Delay2 delays can be acquired using SELT, DELT or other methods. The method includes the following steps.
[0072] In step 1, CO sends a symbol and acquires a time Tm1 indicating the moment when the symbol is transmitted (or the CPE sends the symbol and acquires time Ts2 indicating the moment when the symbol is transmitted) and the symbol may be a DMT frame.
[0073] In the CO initialization step, it sends a symbol. When the CO saves the sampled data at a particular location of the symbol to the buffer or the CO device module reads the data sampled at a particular location of the symbol from the buffer, the CO triggers the time stamping action, reads the CO local clock time and acquires the Tm1 time. The specific point at which the time stamping action is triggered is also determined by negotiating between CO and CPE and any position in that symbol can be used. Hereinafter, in this embodiment, the initial position of this symbol is taken as an example.
[0074] In step 2, the CPE receives the symbol sent by the CO and acquires the reception time Ts1 (or the CO receives the symbol sent by the CPE and acquires the time Tm2 indicating the moment when the symbol is received).
[0075] When the CPE saves the sampled data at the start position of this symbol to the buffer or the A / C module reads the sampled data at the start position of this symbol from the buffer, the CPE triggers the time stamping action and reads the local time Ts1 'CPE. Because CPE calculates the frame boundary using a specific algorithm, the initial position calculated using the algorithm can make an error. In this case, the time Ts1 'must be corrected by the CPE. The correction method is the same as in the case of CPE in the first embodiment.
[0076] In step 3, the CPE acquires the time Tm1 sent by CO (or the CPE acquires the time Tm2 sent by CO).
[0077] CO sends the time Tm1 (or time Tm2) to the CPE via the message channel.
[0078] In step 4, the CPE calculates the offset between the CPE clock and the CO clock based on Offset = Ts1 - Tm1 - Delay1 or Offset = Ts2 - Tm2 + Delay2. Because Delay1 (or Delay2) has been measured, the offset can be solved.
[0079] In step 4, the CPE obtains the local clock time value and adjusts the local clock time based on the acquired local clock time and offset.
[0080] A fourth embodiment of the invention provides a method for synchronizing DSL time. Because the delay occurs due to the processing of the device, the delay of the device should be taken into account when calculating the propagation delay of the symbol. Therefore, the delay of the CO device may not be needed when the Offset is calculated by the CPE. The specific steps are as follows:
In the first stage, CO sends the second symbol and acquires time indicating the moment when the second symbol is sent.
[0081] During initialization, when the sample in the start position of the second symbol is written to the buffer by CO or read from the buffer via CO, the timestamp acquisition action is triggered to read the local clock time Tm1.
[0082] The CO device obtains the digital transfer delay CO At1 and the delay of the analogue transfer At2, and process the time when the second symbol is sent by the central heating device. Especially Tm1 = Tm1 + At1 + At2; and if the delay of digital transmission is not constant, it can be switched off and in this case Tm1 = Tm1 + At2.
[0083] In the second step, the CPE receives the second symbol and acquires a time indicating the moment when the second symbol is received by the CPE.
[0084] When the sample in the start position of the second symbol is written to the buffer via the CPE or read from the buffer by the A / C module, the timestamp acquisition function is triggered by the CPE to read the local clock time value CPE designated as Ts1 '. Because CPE calculates the frame boundary using a specific algorithm, the initial position calculated using the algorithm can make an error. In this case, the time Ts1 'must be corrected by the CPE and the correction method used here is the same as in the case of CPE in the first embodiment.
[0085] In the third step, the CPE transmits the first symbol and acquires a time indicating the moment when the first symbol is transmitted.
[0086] During initialization, the CPE sends the first symbol. When a sample at a predetermined position of the first symbol is written to the buffer via CPE or a sample at a specific position of this symbol is read from the buffer by the C / A module, the timestamp acquisition action is triggered to read the local clock time Ts2.
[0087] In the fourth step, the CO receives the first symbol and acquires a time indicating the moment when the first symbol is received.
[0088] CO receives the first symbol sent by CPE. When the sample in the initial position of the first symbol is written to the buffer by the CO or the sample is read at a specific position of that symbol from the buffer by the A / C module, the timestamp acquisition action is triggered to read the local clock time Tm2 'value. Because CO calculates frame boundaries using a specific algorithm, an error can be entered when the initial position is calculated using an algorithm. In this case, the reading time Tm2 'must be corrected by CO, and the correction method used here is the same as in the first embodiment.
[0089] The specific point at which the timestamp acquisition activity is triggered is determined by negotiating between CO and CPE. Each position in the first symbol may be used, e.g. the starting position of the first symbol.
[0090] CO obtains a delay of the digital reception system CO denoted as At4 and a delay of the analogue receiving circuit designated as At5, and processes time stamps indicative of the moment when the first symbol is received by the CO device. Especially Tm2 = Tm2 - At4 - At5. If the delay of digital reception is not constant, it can be switched off and then Tm2 = Tm2 - At5.
[0091] In the fifth step, CO sends the time Tm1 and the time Tm2 to the CPE via the message channel, and CPE computes the offset between the CPE clock and the CO clock. CPE acquires the delay of the digital receiving system Atl ', the delay of the analogue receiving circuit At2', the delay of the digital transmission system At4 'and the delay of the analogue transmission system At5' CPE.
[0092] CPE calculates the offset based on:
Offset = Ts1 - Tm1 - Delayl = Ts1 - Tm1 - (Atl '+ At2' + At3),
Offset = Ts2 - Tm2 + Delayl = Ts2 - Tm2 + (At4 '+ At5' + At6).
[0093] Alternatively, the digital reception delay and the digital transmission delay are not constantly and thus disabled, and then CPE computes the offset based on:
Offset = Tsl - Tm1 - Delayl = Ts1 - Tm1 - (At2 '+ At3),
Offset = Ts2 - Tm2 + Delayl = Ts2 - Tm2 + (At5 '+ At6).
[0094] In this process, the CPE may also process a time stamp Ts2 indicating the time of sending the second symbol and a time stamp Ts1 indicating the moment of receiving the first symbol. For example, Tsl = Tsl - Atl '- At2' or Tsl = Tsl - At2 '; Ts2 = Ts2 At4 '- At5' or Ts2 = Ts2 - At5 '. The CPE calculates the offset based on:
Offset = Tsl - Tm1 - Delay1 = Ts1 - Tm1 - At3,
Offset = Ts2 - Tm2 + Delayl = Ts2 - Tm2 + At6.
[0095] The offset is estimated based on the ratio between At3 and At6 or the assumption that the delays At3 and At6 are approximately identical.
[0096] In the sixth step, the CPE adjusts the CPE clock based on the offset.
[0097] The CPE acquires a local clock time value and adjusts the local clock time based on the acquired local clock time and estimated offset.
[0098] In the above embodiments, the CPE adjusts the local clock CPE so that the CPE clock is synchronized with the CO clock. In practice, CO can also adjust the local CO clock so that the local CO clock is synchronized with the CPE clock, in which case the synchronization method is similar to the synchronization method in which the CPE adjusts the local clock.
[0099] The method described in the above embodiments takes into account the influence of the sampling frequency and can be performed for many times.
[0100] An embodiment of the invention provides an xDSL communication system. According to FIG. 7, the communication system includes CO 100 and CPE 200.
[0101] The CPE 200 transmits the symbol and acquires a time Ts2 indicative of the moment when the first symbol is transmitted. CPE 200 transmits the first symbol, which is a DMT frame determined by negotiating between CO 100 and CPE 200 in the initialization step. The CO 100 and CPE 200 determine, by negotiating a point in the first symbol as a control point, which can be in any position in the first symbol. In the following, the starting position of the first symbol is taken as an example.
[0102] When the CPE 200 saves the sampled data at the start position of the first symbol to the buffer or reads the sampled data at the initial location from the buffer, the CPE 200 triggers the timestamp acquisition action and reads the local clock time Ts2 CPE 200.
[0103] The CO 100 receives the first symbol sent by the CPE 200 and acquires a time Tm2 indicating the moment when the first symbol is received. When the CO 100 saves the sampled data at the start position of the first symbol to the buffer or reads the sampled data at the start position of the first symbol from the buffer, the CO 100 triggers the timestamp acquisition action and reads the local clock time value Tm2 '. Since CO 100 recovers the frame boundary by using a specific algorithm, an error may occur when the starting position of the first symbol is determined and hence the time must be corrected by CO 100. Based on the phase difference between the phase of the pickup point and the phase of the sinusoidal control point (or cosine signal) in the first symbol, The CO 100 corrects the time stamp Tm2 'to the timestamp Tm2 indicating the moment when the CO 100 is to receive the control point. The reception point is the signal point at which the first symbol is initially received by CO 100, and the above-mentioned control point is the signal point at which the first symbol is initially transmitted by CPE 200.
[0104] When CO 100 corrects the time Tm2 'based on one sinusoidal signal in the first symbol:
the phase of the corresponding sinusoidal signal point is constant (e.g. 0 °, 45 °, 90 °, or any other angle) when the timestamp acquisition is triggered by
CPE 200 so that during the adjustment process CO 100 can take the point as a control point and acquire the phase of the control point. In further embodiments, an angle of 0 ° is taken as an example.
[0105] CO00 acquires a position in a sinusoidal signal in which CO00 triggers acquisition of a time stamp (whose location is a pickup point in which the first symbol is received by CO00) and calculates the busy time from the phase of the pickup point to the control point phase . Then CO 100 on the basis of time regulates the time Tm2 'until the time Tm2.
[0106] CO 10 may also make adjustments by using multiple sinusoidal signals in the symbol. When the CPE 200 writes the starting position of the first symbol to the buffer or reads the starting position of the first symbol from the buffer, each of the sinusoidal signals in the first symbol is at a specific point. The CO00 device accepts these points as control points and knows the corresponding phases of the control points in the sinusoidal signals when the CPE 200 has made the timestamps. For example, the control point in one of the sinusoidal signals is placed at 0 °, one control point is at 90 °, one control point is at 45 ° and so on.
[0107] Upon receipt of the first symbol CO 100 acquires a corresponding pickup point in each of the sinusoidal signals and acquires a phase of the pickup point. Then CO00 calculates the time taken from the reception point to the control point phase. Time is the shift of the time sign made by CO00 in each of the sinusoidal signals. The phases of these sinusoidal signals can be obtained using the FFT in the DMT system. To improve the accuracy of the estimation and reduce the impact of disturbances, the shift can be obtained by means of the average of many calculations or by training the FEQ after the FFT. Because the FEQ performs offset compensation, the trained FEQ can also be used to estimate the angle shift of each sinusoidal signal. Because the error can be entered during the synchronization of the DMT frame, there may be an offset between the angles acquired by CO00 and CPE 200. The offsets have a linear relationship with the frequencies of the sinusoidal signals, and the slope of the linear relationship directly reflects the frame synchronization error. The offset of each sinusoidal signal can be plotted in a coordinate system, and then these offsets are connected by a straight line; and the slope of the straight line is exactly the offset of the timestamp taken by CO 100 due to the synchronization error. Due to the influence of factors such as interference, the angular errors acquired by the actual calculation may not be exactly a straight line. Thus, CO 100 can acquire the optimal straight line for approximation based on a specific optimization algorithm (for example, the least squares method).
[0108] Given the characteristics of the xDSL system, angle errors can also be obtained by using FEQ information, and then the time Tm2 'is, in a similar manner, regulated to the time Tm2.
[0109] CO 10 transmits the second symbol and acquires a Tml time indicative of when the second symbol is transmitted. When CO 100 records data sampled in the initial position of this symbol to the buffer or reads data sampled in the initial location of this symbol from the buffer, CO 100 triggers the acquisition of time stamps
- 19 and reads the value of the local clock time Tm1 of the CO 100. The specific point at which the time stamping action is triggered is also determined by negotiating between CO and CPE and each position in the second symbol may be used. In this embodiment, an initial position of the second symbol is taken as an example.
[0110] The CPE 200 receives the symbol transmitted by CO 100 and acquires a receive time Ts1 indicative of the moment the second symbol is received. When the CPE 200 saves the sampled data at the start position of the second symbol to the buffer or reads the sampled data at the start position of the second symbol from the buffer, the CPE 200 triggers the timestamp acquisition action and reads the local clock time Ts1 '. Because the CPE 200 recovers the frame boundary using a specific algorithm, the CPE 200 corrects the time Ts1 'to the time Ts1 in the same way as for the CO 100.
[0111] The CO 100 transmits the time Tm1 and the time Tm2 to the CPE 200 via the message channel. If the CPE 200 does not record the transmission delay and the CO 100 reception delay, the CO 100 transmits, by interacting with the CPE 200, a transmission delay and a CO 100 reception delay to the CPE 200 via the message channel.
[0112] The transmission delay and the CO 100 reception delay comprise the digital transmission system At1 delay, the analogue transmission system At2 delay, the At5 & apos; of the analog reception system, and the At4 & apos; delay of the digital reception system.
[0113] The CPE 200 acquires a transmission delay and a receive delay CPE 200 that includes a latency of At1 'of the digital transmission system, an At2' delay of the analogue transmission system, an At5 delay of the analog reception system, and an At4 delay of the digital reception system. These delays can be read directly from the CPE
200.
[0114] The CPE 200 calculates the offset between the CPE 200 clock and the CO 100 clock based on Ts1, Ts2, Tm1, Tm2, the CO 100 delay and the CPE 200 delay. Especially the CPE 200 calculates the offset based on:
Offset = Ts1 - Tm1 - Delayl = Ts1 - Tm1 - (Δ ^ + At2 + Δt3 + At1 '+ At2') Offset = Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At4 + At5 + At6 + At5 '+ At4' ) or
Displacement: Ts1 - Tm1 - Delayl = Ts1 - Tm1 - (At2 + At3 + At2 ')
Offset: Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At5 + At6 + At5 '), where CPE 200 records the mathematical relation contained here between delay Delay1 and delay Delay2. Especially on the basis of statistics, it can be known that the delay At3 and the delay At6 are approximately equal to or have a proportional relationship, for example At3 = 0.9At6 or At6 = 0.9At3.
[0115] After obtaining the offset, the CPE 200 acquires the local clock time value and adjusts the local clock time based on the acquired local clock time and offset.
[0116] In the above communication system, the CPE 200 adjusts the local clock time such that the local clock CPE 200 is synchronized with the clock CO 100. Alternatively, the CO 100 may also adjust the clock CO 100 so that the clock CPE 200 will be synchronized with the clock CO 100 and its synchronization process is the same as the synchronization process in which the CPE 200 clock is adjusted.
[0117] The invention also provides an xDSL device that can be used for CO and CPE. According to FIG. 8, the apparatus includes a transmitting unit 300, a receiving unit 400 and a processing unit 600.
[0118] The transmitting unit is configured to transmit the first symbol and acquire time Ts2 indicative of the moment at which the first symbol is transmitted.
[0119] The receiving unit is configured to receive a second symbol transmitted by the second device and acquire time Ts1 indicating the moment when the second symbol is received; and acquiring a time Tm2 indicating the moment at which the first symbol is received by the second device and the time Tm1 indicating the moment at which the second symbol is sent by the second device.
[0120] The processing unit is configured to acquire a delay of the DSL device, calculate the offset between the clock of the DSL device and the clock of the second device on the basis of Ts1, Ts2, Tm1, Tm2 and the delay of the DSL device and adjust the DSL timer based on the offset.
[0121] In particular, the transmitting unit 300 transmits the first symbol and acquires a time Ts2 indicative of the moment when the first symbol is transmitted. The first symbol may be a training signal transmitted during the initialization phase and the signal may be a DMT frame.
[0122] When the transmitting unit 300 writes the sampled data at the start position of the first symbol to the buffer or reads the sampled data at the start position of the first symbol from the buffer, the transmitting unit 300 triggers the time mark acquisition activity and reads the local time Ts2. The receiving unit 400 receives the second symbol sent by the opposite terminal and acquires the time Ts1 indicative of the moment when the second symbol is received. The second symbol can be a training signal transmitted during the initialization phase.
[0123] The receiving unit 400 also comprises a acquisition module and a correction module. The acquisition module receives the second symbol, acquires the clock time Ts1 'of the DSL device and acquires a time Tm2 indicating the moment when the first symbol is received by the second device and the time Tm1 indicating the moment when the second symbol is sent by the second device.
[0124] The correction module, based on the phase difference between the phase of the reception point and the phase of the signal control point in the second symbol, corrects the time stamp Ts1 'to the time stamp
Ts1 indicating the moment when the acquisition module is to collect the control point and acquire
A timer Tsl for use as a time indicating the moment when the second symbol is received by the acquisition module. The reception point is the signal point at which the second symbol is initially received by the acquisition module and the control point is the signal point at which the second symbol is initially transmitted by the second device.
[0125] When the acquisition module saves the sampled data at the start position of the second symbol to the buffer or reads the sampled data at the start position of the second symbol from the buffer, the acquisition module triggers the time mark acquisition activity and reads the local clock time value Tsl '. Because the boundary of the second symbol is recovered using a specific algorithm, an error may occur when the boundary has a fixed position. Correspondingly, the correction module, based on the phase difference between the phase of the reception point and the phase of the signal control point in the second symbol, corrects the time stamp Ts1 'to the time stamp Ts1 indicating the moment when the acquisition module is to receive the control point.
[0126] The correction module obtains the position of a sinusoidal signal in which the module triggers acquisition of a time stamp, assumes this position as a pickup point and calculates the time taken from the phase of the pickup point to the phase of the control point. Then, based on time, the correction module corrects the time Tsl 'to the time Tsl.
[0127] The correction module may further use a plurality of sinusoidal signals in the second symbol. The correction module knows the respective angles of the respective points (i.e., control points) in these sinusoidal signals when the second device performs time stamps. For example, the control point in one sinusoidal signal is at 0 °; one is at 90 °; one is at 45 °; and so on. Hence, upon receipt of the second symbol by the acquisition module, the correction module acquires positions in which the acquisition module makes time stamps, which are pickup points, and calculates the time taken from the phase of each pickup point to the phase of the corresponding control point. The angles of these sinusoidal signals can be obtained using the FFT in the DMT system. To improve the accuracy of the estimation and reduce the impact of disturbances, the shift can be obtained by averaging after multiple calculations or by training the FEQ after the FFT. Because FEQ compensates for the offset of the angle, the FEQ-trained ratio can also be used to estimate the angular displacement of each of the sinusoidal signals. Since the synchronization of the DMT frame may introduce an error, there may be offsets between the angles obtained by the correction module and the angles acquired by the opposite device. These shifts have a linear relationship with the frequency of sinusoidal signals, and the slope of the linear relationship directly reflects the frame synchronization error. Therefore, the correction module can plot the offset of each of the sinusoidal signals in the coordinate system and combine these shifts into a straight line, which slope is exactly the offset of timestamps made by CPE due to a synchronization error. Due to the influence of factors such as interference, the angular errors acquired by the actual calculation may not be exactly a straight line. CPE can calculate the optimal straight line for approximation based on a specific algorithm
- 22 optimization (for example, using the least squares method). The correction module calculates the timestamp error CPE and corrects the time Ts1 'to the time Ts1 based on this error.
[0128] The correction module may be located in the communication device, independent of the receiving unit 400.
[0129] The receiving unit 400 may also receive, via a message, channel information transmitted by the second device, including a time Tm2 indicating the moment when the first symbol is received by the second device, time Tm1 indicating the moment when the second symbol is sent by the second device and delay of transmission and delay of receipt of the second device. The delay of the transmission and the delay of reception of the second device include: At1 delay of the digital transmission system, At2 delay of the analogue transmission system, At5 delay of the analogue receiving circuit and the At4 delay of the digital receiving system.
[0130] The second device may also process the time Tm2 and the time Tm1 by using the delay data of the second device. Thus, the second device only needs to transmit the time Tm1 and the time Tm2 that are processed to the DSL device; for example, Tm1 = Tm1 + At1 + At2 or Tm1 = Tm1 + At2, Tm2 = Tm2 - Δt5 - Δt4 or Tm2 = Tm2 - Δt5.
[0131] The DSL device may also process time Ts1 and time Ts2; i.e., Ts1 = Ts1 - At1 'At2' or Ts1 = Ts1 - At2 '; Ts2 = Ts2 - At4 '- At5' or Ts2 = Ts2 - At5 '.
[0132] The processing unit 600 acquires a delay of the DSL device, calculates the offset between the local device clock and the second device timer based on the time Ts2 acquired by the transmitting unit, Ts1, Tm2, Tm1 acquired by the reception unit and the delay of the DSL device and adjusts the DSL device clock based on shift.
[0133] The delay of the DLS device includes: At1 'delay of the digital transmission system, At2' delay of the analogue transmission system, At5 delay of the analog reception circuit and At4 delays of the digital reception system, all of which can be acquired directly when the DSL device is being delivered from the factory .
[0134] The processing unit 600 calculates the offset based on:
Offset = Ts1 - Tm1 - Delay1 = Ts1 - Tm1 - (At1 + At2 + At3 + At1 '+ At2') Offset = Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At4 + At5 + At6 + At5 '+ At4') or
Offset = Ts1 - Tm1 - Delay1 = Ts1 - Tm1 - (At2 + At3 + At2 ')
Offset = Ts2 - Tm2 + Delay2 = Ts2 - Tm2 + (At5 + At6 + At5 ');
or a DSL device and a second device, after processing the received / received symbol, they calculate the offset based on:
Offset = Ts1 - Tm1 - Delay1 = Ts1 - Tm1 - At3, and
- 23 Offset = Ts2 - Tm2 + Delayl = Ts2 - Tm2 + At6.
[0135] The processing unit 600 reads the local clock time and adjusts the local time based on the local clock time and the offset time.
[0136] The second device may be CO or CPE, and the DSL device may also be used as CO or CPE.
[0137] As can be seen from the above embodiments according to the invention, by adjusting the local time corresponding to the time stamps, the local time can be accurately read by the receiver, and the offset between the CPE clock and the CO clock can be calculated so that the CPE clock can be adjusted at on the basis of the offset to achieve synchronization between the CH clock and the CPE clock.
[0138] Those skilled in the art will understand that all or part of the steps in the methods in the above embodiments may be implemented by means of a program running on the appropriate equipment. The program can be saved on a computer readable medium containing read-only memory (ROM), random access memory (RAM), magnetic disk or compact disc (CD).
[0139] The above description only refers to several embodiments of the invention. The invention, however, is not limited only to these embodiments and any modifications that may be apparent to those skilled in the art will fall within the scope of protection of the invention.
Anna Stenzel Patent attorney
31 members in 13 offices
Priority claims3
| Document | Office | Kind | Date |
|---|---|---|---|
| 200910105103 | China | A | |
| 200910105103 | – | – | – |
| CN20091105103 | – | – | – |
Members31
| Document | Office | Kind | |
|---|---|---|---|
| CN101783779A | China | A | |
| CA2749879A1 | Canada | A1 | |
| WO2010081348A1 | World Intellectual Property Organization (WIPO) | A1 | |
| AU2009337606A1 | Australia | A1 | |
| KR20110102941A | Republic of Korea | A | |
| MX2011007601A | Mexico | A | |
| US2011274149A1 | United States of America | A1 | |
| EP2387190A1 | European Patent Office (EPO) | A1 | |
| EP2387190A4 | European Patent Office (EPO) | A4 | |
| JP2012515476A | Japan | A | |
| RU2011134258A | Russian Federation | A | |
| US8442175B2 | United States of America | B2 | |
| RU2483460C2 | Russian Federation | C2 | |
| US2013148710A1 | United States of America | A1 | |
| KR101288435B1 | Republic of Korea | B1 | |
| EP2387190B1 | European Patent Office (EPO) | B1 | |
| AU2009337606B2 | Australia | B2 | |
| EP2658201A1 | European Patent Office (EPO) | A1 | |
| ES2437665T3 | Spain | T3 | |
| JP5429758B2 | Japan | B2 | |
| PL2387190T3 | Poland | T3 | |
| CN101783779B | China | B | |
| CA2749879C | Canada | C | |
| EP2966826A1 | European Patent Office (EPO) | A1 | |
| BRPI0924053A2 | Brazil | A2 | |
| EP2658201B1 | European Patent Office (EPO) | B1 | |
| ES2579154T3 | Spain | T3 | |
| PL2658201T3This record | Poland | T3 | |
| EP2966826B1 | European Patent Office (EPO) | B1 | |
| US10135602B2 | United States of America | B2 | |
| BRPI0924053B1 | Brazil | B1 |
Numbers
- Publication
- 2658201
- Publication, DOCDB
- 2658201
- Publication, EPODOC
- PL2658201T
- Application
- 131781056
- Application, DOCDB
- 13178105
- Application, EPODOC
- PL20130178105T
Titles2
- English
- METHOD, APPARATUS, AND SYSTEM FOR TIME SYNCHRONIZATION OF XDSL
- Polish
- Sposób, urządzenie i system synchronizacji czasu XDSL
Classification
- CPC, 3
- H04L7/0041
- H04J3/0638
- H04M11/062
- IPC, 4
- H04L27 26
- H04J3 06
- H04L7 10
- H04M11 06